LLVM  15.0.0git
Passes.h
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1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
20 
21 #include <functional>
22 #include <string>
23 
24 namespace llvm {
25 
26 class FunctionPass;
27 class MachineFunction;
28 class MachineFunctionPass;
29 class MemoryBuffer;
30 class ModulePass;
31 class Pass;
32 class TargetMachine;
33 class raw_ostream;
34 
35 } // End llvm namespace
36 
37 // List of target independent CodeGen pass IDs.
38 namespace llvm {
39 
40  /// AtomicExpandPass - At IR level this pass replace atomic instructions with
41  /// __atomic_* library calls, or target specific instruction which implement the
42  /// same semantics in a way which better fits the target backend.
43  FunctionPass *createAtomicExpandPass();
44 
45  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
46  /// work well with unreachable basic blocks (what live ranges make sense for a
47  /// block that cannot be reached?). As such, a code generator should either
48  /// not instruction select unreachable blocks, or run this pass as its
49  /// last LLVM modifying pass to clean up blocks that are not reachable from
50  /// the entry block.
52 
53  /// createBasicBlockSections Pass - This pass assigns sections to machine
54  /// basic blocks and is enabled with -fbasic-block-sections.
55  MachineFunctionPass *createBasicBlockSectionsPass();
56 
57  /// createMachineFunctionSplitterPass - This pass splits machine functions
58  /// using profile information.
59  MachineFunctionPass *createMachineFunctionSplitterPass();
60 
61  /// MachineFunctionPrinter pass - This pass prints out the machine function to
62  /// the given stream as a debugging tool.
63  MachineFunctionPass *
64  createMachineFunctionPrinterPass(raw_ostream &OS,
65  const std::string &Banner ="");
66 
67  /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
68  /// using the MIR serialization format.
69  MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
70 
71  /// This pass resets a MachineFunction when it has the FailedISel property
72  /// as if it was just created.
73  /// If EmitFallbackDiag is true, the pass will emit a
74  /// DiagnosticInfoISelFallback for every MachineFunction it resets.
75  /// If AbortOnFailedISel is true, abort compilation instead of resetting.
76  MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
77  bool AbortOnFailedISel);
78 
79  /// createCodeGenPreparePass - Transform the code to expose more pattern
80  /// matching during instruction selection.
81  FunctionPass *createCodeGenPreparePass();
82 
83  /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
84  /// load-linked/store-conditional loops.
85  extern char &AtomicExpandID;
86 
87  /// MachineLoopInfo - This pass is a loop analysis pass.
88  extern char &MachineLoopInfoID;
89 
90  /// MachineDominators - This pass is a machine dominators analysis pass.
91  extern char &MachineDominatorsID;
92 
93  /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
94  extern char &MachineDominanceFrontierID;
95 
96  /// MachineRegionInfo - This pass computes SESE regions for machine functions.
97  extern char &MachineRegionInfoPassID;
98 
99  /// EdgeBundles analysis - Bundle machine CFG edges.
100  extern char &EdgeBundlesID;
101 
102  /// LiveVariables pass - This pass computes the set of blocks in which each
103  /// variable is life and sets machine operand kill flags.
104  extern char &LiveVariablesID;
105 
106  /// PHIElimination - This pass eliminates machine instruction PHI nodes
107  /// by inserting copy instructions. This destroys SSA information, but is the
108  /// desired input for some register allocators. This pass is "required" by
109  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
110  extern char &PHIEliminationID;
111 
112  /// LiveIntervals - This analysis keeps track of the live ranges of virtual
113  /// and physical registers.
114  extern char &LiveIntervalsID;
115 
116  /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
117  extern char &LiveStacksID;
118 
119  /// TwoAddressInstruction - This pass reduces two-address instructions to
120  /// use two operands. This destroys SSA information but it is desired by
121  /// register allocators.
122  extern char &TwoAddressInstructionPassID;
123 
124  /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
125  extern char &ProcessImplicitDefsID;
126 
127  /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
128  extern char &RegisterCoalescerID;
129 
130  /// MachineScheduler - This pass schedules machine instructions.
131  extern char &MachineSchedulerID;
132 
133  /// PostMachineScheduler - This pass schedules machine instructions postRA.
134  extern char &PostMachineSchedulerID;
135 
136  /// SpillPlacement analysis. Suggest optimal placement of spill code between
137  /// basic blocks.
138  extern char &SpillPlacementID;
139 
140  /// ShrinkWrap pass. Look for the best place to insert save and restore
141  // instruction and update the MachineFunctionInfo with that information.
142  extern char &ShrinkWrapID;
143 
144  /// LiveRangeShrink pass. Move instruction close to its definition to shrink
145  /// the definition's live range.
146  extern char &LiveRangeShrinkID;
147 
148  /// Greedy register allocator.
149  extern char &RAGreedyID;
150 
151  /// Basic register allocator.
152  extern char &RABasicID;
153 
154  /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
155  /// assigned in VirtRegMap.
156  extern char &VirtRegRewriterID;
157  FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
158 
159  /// UnreachableMachineBlockElimination - This pass removes unreachable
160  /// machine basic blocks.
161  extern char &UnreachableMachineBlockElimID;
162 
163  /// DeadMachineInstructionElim - This pass removes dead machine instructions.
164  extern char &DeadMachineInstructionElimID;
165 
166  /// This pass adds dead/undef flags after analyzing subregister lanes.
167  extern char &DetectDeadLanesID;
168 
169  /// This pass perform post-ra machine sink for COPY instructions.
170  extern char &PostRAMachineSinkingID;
171 
172  /// This pass adds flow sensitive discriminators.
173  extern char &MIRAddFSDiscriminatorsID;
174 
175  /// This pass reads flow sensitive profile.
176  extern char &MIRProfileLoaderPassID;
177 
178  /// FastRegisterAllocation Pass - This pass register allocates as fast as
179  /// possible. It is best suited for debug code where live ranges are short.
180  ///
181  FunctionPass *createFastRegisterAllocator();
183  bool ClearVirtRegs);
184 
185  /// BasicRegisterAllocation Pass - This pass implements a degenerate global
186  /// register allocator using the basic regalloc framework.
187  ///
188  FunctionPass *createBasicRegisterAllocator();
190 
191  /// Greedy register allocation pass - This pass implements a global register
192  /// allocator for optimized builds.
193  ///
194  FunctionPass *createGreedyRegisterAllocator();
196 
197  /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
198  /// Quadratic Prograaming (PBQP) based register allocator.
199  ///
200  FunctionPass *createDefaultPBQPRegisterAllocator();
201 
202  /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
203  /// and eliminates abstract frame references.
204  extern char &PrologEpilogCodeInserterID;
205  MachineFunctionPass *createPrologEpilogInserterPass();
206 
207  /// ExpandPostRAPseudos - This pass expands pseudo instructions after
208  /// register allocation.
209  extern char &ExpandPostRAPseudosID;
210 
211  /// PostRAHazardRecognizer - This pass runs the post-ra hazard
212  /// recognizer.
213  extern char &PostRAHazardRecognizerID;
214 
215  /// PostRAScheduler - This pass performs post register allocation
216  /// scheduling.
217  extern char &PostRASchedulerID;
218 
219  /// BranchFolding - This pass performs machine code CFG based
220  /// optimizations to delete branches to branches, eliminate branches to
221  /// successor blocks (creating fall throughs), and eliminating branches over
222  /// branches.
223  extern char &BranchFolderPassID;
224 
225  /// BranchRelaxation - This pass replaces branches that need to jump further
226  /// than is supported by a branch instruction.
227  extern char &BranchRelaxationPassID;
228 
229  /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
230  extern char &MachineFunctionPrinterPassID;
231 
232  /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
233  /// serialization format.
234  extern char &MIRPrintingPassID;
235 
236  /// TailDuplicate - Duplicate blocks with unconditional branches
237  /// into tails of their predecessors.
238  extern char &TailDuplicateID;
239 
240  /// Duplicate blocks with unconditional branches into tails of their
241  /// predecessors. Variant that works before register allocation.
242  extern char &EarlyTailDuplicateID;
243 
244  /// MachineTraceMetrics - This pass computes critical path and CPU resource
245  /// usage in an ensemble of traces.
246  extern char &MachineTraceMetricsID;
247 
248  /// EarlyIfConverter - This pass performs if-conversion on SSA form by
249  /// inserting cmov instructions.
250  extern char &EarlyIfConverterID;
251 
252  /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
253  /// predicating if/else block and insert select at the join point.
254  extern char &EarlyIfPredicatorID;
255 
256  /// This pass performs instruction combining using trace metrics to estimate
257  /// critical-path and resource depth.
258  extern char &MachineCombinerID;
259 
260  /// StackSlotColoring - This pass performs stack coloring and merging.
261  /// It merges disjoint allocas to reduce the stack size.
262  extern char &StackColoringID;
263 
264  /// IfConverter - This pass performs machine code if conversion.
265  extern char &IfConverterID;
266 
267  FunctionPass *createIfConverter(
268  std::function<bool(const MachineFunction &)> Ftor);
269 
270  /// MachineBlockPlacement - This pass places basic blocks based on branch
271  /// probabilities.
272  extern char &MachineBlockPlacementID;
273 
274  /// MachineBlockPlacementStats - This pass collects statistics about the
275  /// basic block placement using branch probabilities and block frequency
276  /// information.
277  extern char &MachineBlockPlacementStatsID;
278 
279  /// GCLowering Pass - Used by gc.root to perform its default lowering
280  /// operations.
281  FunctionPass *createGCLoweringPass();
282 
283  /// GCLowering Pass - Used by gc.root to perform its default lowering
284  /// operations.
285  extern char &GCLoweringID;
286 
287  /// ShadowStackGCLowering - Implements the custom lowering mechanism
288  /// used by the shadow stack GC. Only runs on functions which opt in to
289  /// the shadow stack collector.
290  FunctionPass *createShadowStackGCLoweringPass();
291 
292  /// ShadowStackGCLowering - Implements the custom lowering mechanism
293  /// used by the shadow stack GC.
294  extern char &ShadowStackGCLoweringID;
295 
296  /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
297  /// in machine code. Must be added very late during code generation, just
298  /// prior to output, and importantly after all CFG transformations (such as
299  /// branch folding).
300  extern char &GCMachineCodeAnalysisID;
301 
302  /// Creates a pass to print GC metadata.
303  ///
304  FunctionPass *createGCInfoPrinter(raw_ostream &OS);
305 
306  /// MachineCSE - This pass performs global CSE on machine instructions.
307  extern char &MachineCSEID;
308 
309  /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
310  /// according to the semantics of the instruction as well as hoists
311  /// code.
312  extern char &MIRCanonicalizerID;
313 
314  /// ImplicitNullChecks - This pass folds null pointer checks into nearby
315  /// memory operations.
316  extern char &ImplicitNullChecksID;
317 
318  /// This pass performs loop invariant code motion on machine instructions.
319  extern char &MachineLICMID;
320 
321  /// This pass performs loop invariant code motion on machine instructions.
322  /// This variant works before register allocation. \see MachineLICMID.
323  extern char &EarlyMachineLICMID;
324 
325  /// MachineSinking - This pass performs sinking on machine instructions.
326  extern char &MachineSinkingID;
327 
328  /// MachineCopyPropagation - This pass performs copy propagation on
329  /// machine instructions.
330  extern char &MachineCopyPropagationID;
331 
332  MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
333 
334  /// PeepholeOptimizer - This pass performs peephole optimizations -
335  /// like extension and comparison eliminations.
336  extern char &PeepholeOptimizerID;
337 
338  /// OptimizePHIs - This pass optimizes machine instruction PHIs
339  /// to take advantage of opportunities created during DAG legalization.
340  extern char &OptimizePHIsID;
341 
342  /// StackSlotColoring - This pass performs stack slot coloring.
343  extern char &StackSlotColoringID;
344 
345  /// This pass lays out funclets contiguously.
346  extern char &FuncletLayoutID;
347 
348  /// This pass inserts the XRay instrumentation sleds if they are supported by
349  /// the target platform.
350  extern char &XRayInstrumentationID;
351 
352  /// This pass inserts FEntry calls
353  extern char &FEntryInserterID;
354 
355  /// This pass implements the "patchable-function" attribute.
356  extern char &PatchableFunctionID;
357 
358  /// createStackProtectorPass - This pass adds stack protectors to functions.
359  ///
360  FunctionPass *createStackProtectorPass();
361 
362  /// createMachineVerifierPass - This pass verifies cenerated machine code
363  /// instructions for correctness.
364  ///
365  FunctionPass *createMachineVerifierPass(const std::string& Banner);
366 
367  /// createDwarfEHPass - This pass mulches exception handling code into a form
368  /// adapted to code generation. Required if using dwarf exception handling.
369  FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
370 
371  /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
372  /// in addition to the Itanium LSDA based personalities.
373  FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
374 
375  /// createSjLjEHPreparePass - This pass adapts exception handling code to use
376  /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
377  ///
378  FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
379 
380  /// createWasmEHPass - This pass adapts exception handling code to use
381  /// WebAssembly's exception handling scheme.
382  FunctionPass *createWasmEHPass();
383 
384  /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
385  /// slots relative to one another and allocates base registers to access them
386  /// when it is estimated by the target to be out of range of normal frame
387  /// pointer or stack pointer index addressing.
388  extern char &LocalStackSlotAllocationID;
389 
390  /// This pass expands pseudo-instructions, reserves registers and adjusts
391  /// machine frame information.
392  extern char &FinalizeISelID;
393 
394  /// UnpackMachineBundles - This pass unpack machine instruction bundles.
395  extern char &UnpackMachineBundlesID;
396 
397  FunctionPass *
398  createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
399 
400  /// FinalizeMachineBundles - This pass finalize machine instruction
401  /// bundles (created earlier, e.g. during pre-RA scheduling).
402  extern char &FinalizeMachineBundlesID;
403 
404  /// StackMapLiveness - This pass analyses the register live-out set of
405  /// stackmap/patchpoint intrinsics and attaches the calculated information to
406  /// the intrinsic for later emission to the StackMap.
407  extern char &StackMapLivenessID;
408 
409  /// RemoveRedundantDebugValues pass.
410  extern char &RemoveRedundantDebugValuesID;
411 
412  /// LiveDebugValues pass
413  extern char &LiveDebugValuesID;
414 
415  /// createJumpInstrTables - This pass creates jump-instruction tables.
416  ModulePass *createJumpInstrTablesPass();
417 
418  /// InterleavedAccess Pass - This pass identifies and matches interleaved
419  /// memory accesses to target specific intrinsics.
420  ///
421  FunctionPass *createInterleavedAccessPass();
422 
423  /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
424  /// combines them into wide loads detectable by InterleavedAccessPass
425  ///
426  FunctionPass *createInterleavedLoadCombinePass();
427 
428  /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
429  /// TLS variables for the emulated TLS model.
430  ///
431  ModulePass *createLowerEmuTLSPass();
432 
433  /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
434  /// instructions. This is unsafe to do earlier because a pass may combine the
435  /// constant initializer into the load, which may result in an overflowing
436  /// evaluation.
438 
439  /// GlobalMerge - This pass merges internal (by default) globals into structs
440  /// to enable reuse of a base pointer by indexed addressing modes.
441  /// It can also be configured to focus on size optimizations only.
442  ///
443  Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
444  bool OnlyOptimizeForSize = false,
445  bool MergeExternalByDefault = false);
446 
447  /// This pass splits the stack into a safe stack and an unsafe stack to
448  /// protect against stack-based overflow vulnerabilities.
449  FunctionPass *createSafeStackPass();
450 
451  /// This pass detects subregister lanes in a virtual register that are used
452  /// independently of other lanes and splits them into separate virtual
453  /// registers.
454  extern char &RenameIndependentSubregsID;
455 
456  /// This pass is executed POST-RA to collect which physical registers are
457  /// preserved by given machine function.
458  FunctionPass *createRegUsageInfoCollector();
459 
460  /// Return a MachineFunction pass that identifies call sites
461  /// and propagates register usage information of callee to caller
462  /// if available with PysicalRegisterUsageInfo pass.
463  FunctionPass *createRegUsageInfoPropPass();
464 
465  /// This pass performs software pipelining on machine instructions.
466  extern char &MachinePipelinerID;
467 
468  /// This pass frees the memory occupied by the MachineFunction.
469  FunctionPass *createFreeMachineFunctionPass();
470 
471  /// This pass performs outlining on machine instructions directly before
472  /// printing assembly.
473  ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
474 
475  /// This pass expands the experimental reduction intrinsics into sequences of
476  /// shuffles.
477  FunctionPass *createExpandReductionsPass();
478 
479  // This pass replaces intrinsics operating on vector operands with calls to
480  // the corresponding function in a vector library (e.g., SVML, libmvec).
481  FunctionPass *createReplaceWithVeclibLegacyPass();
482 
483  /// This pass expands the vector predication intrinsics into unpredicated
484  /// instructions with selects or just the explicit vector length into the
485  /// predicate mask.
486  FunctionPass *createExpandVectorPredicationPass();
487 
488  // This pass expands memcmp() to load/stores.
489  FunctionPass *createExpandMemCmpPass();
490 
491  /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
492  FunctionPass *createBreakFalseDeps();
493 
494  // This pass expands indirectbr instructions.
495  FunctionPass *createIndirectBrExpandPass();
496 
497  /// Creates CFI Fixup pass. \see CFIFixup.cpp
498  FunctionPass *createCFIFixup();
499 
500  /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
501  FunctionPass *createCFIInstrInserter();
502 
503  /// Creates CFGuard longjmp target identification pass.
504  /// \see CFGuardLongjmp.cpp
505  FunctionPass *createCFGuardLongjmpPass();
506 
507  /// Creates EHContGuard catchret target identification pass.
508  /// \see EHContGuardCatchret.cpp
509  FunctionPass *createEHContGuardCatchretPass();
510 
511  /// Create Hardware Loop pass. \see HardwareLoops.cpp
512  FunctionPass *createHardwareLoopsPass();
513 
514  /// This pass inserts pseudo probe annotation for callsite profiling.
515  FunctionPass *createPseudoProbeInserter();
516 
517  /// Create IR Type Promotion pass. \see TypePromotion.cpp
518  FunctionPass *createTypePromotionPass();
519 
520  /// Add Flow Sensitive Discriminators. PassNum specifies the
521  /// sequence number of this pass (starting from 1).
522  FunctionPass *
524 
525  /// Read Flow Sensitive Profile.
526  FunctionPass *createMIRProfileLoaderPass(std::string File,
527  std::string RemappingFile,
529 
530  /// Creates MIR Debugify pass. \see MachineDebugify.cpp
531  ModulePass *createDebugifyMachineModulePass();
532 
533  /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
534  /// If OnlyDebugified is true then it will only strip debug info if it was
535  /// added by a Debugify pass. The module will be left unchanged if the debug
536  /// info was generated by another source such as clang.
537  ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
538 
539  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
540  ModulePass *createCheckDebugMachineModulePass();
541 
542  /// The pass fixups statepoint machine instruction to replace usage of
543  /// caller saved registers with stack slots.
544  extern char &FixupStatepointCallerSavedID;
545 
546  /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
547  /// or split the data to two <128 x i32>.
548  FunctionPass *createX86LowerAMXTypePass();
549 
550  /// The pass insert tile config intrinsics for AMX fast register allocation.
551  FunctionPass *createX86PreAMXConfigPass();
552 
553  /// The pass transforms amx intrinsics to scalar operation if the function has
554  /// optnone attribute or it is O0.
555  FunctionPass *createX86LowerAMXIntrinsicsPass();
556 
557  /// When learning an eviction policy, extract score(reward) information,
558  /// otherwise this does nothing
559  FunctionPass *createRegAllocScoringPass();
560 
561  /// JMC instrument pass.
562  ModulePass *createJMCInstrumenterPass();
563 
564  /// This pass converts conditional moves to conditional jumps when profitable.
565  FunctionPass *createSelectOptimizePass();
566 } // End llvm namespace
567 
568 #endif
llvm::createX86LowerAMXTypePass
FunctionPass * createX86LowerAMXTypePass()
The pass transforms load/store <256 x i32> to AMX load/store intrinsics or split the data to two <128...
Definition: X86LowerAMXType.cpp:1245
llvm::createJMCInstrumenterPass
ModulePass * createJMCInstrumenterPass()
JMC instrument pass.
llvm::createFastRegisterAllocator
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
Definition: RegAllocFast.cpp:1579
llvm::createCheckDebugMachineModulePass
ModulePass * createCheckDebugMachineModulePass()
Creates MIR Check Debug pass.
Definition: MachineCheckDebugify.cpp:124
llvm::OptimizePHIsID
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
Definition: OptimizePHIs.cpp:68
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::createGreedyRegisterAllocator
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
Definition: RegAllocGreedy.cpp:179
llvm::LiveStacksID
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
Definition: LiveStacks.cpp:30
llvm::createMachineCopyPropagationPass
MachineFunctionPass * createMachineCopyPropagationPass(bool UseCopyInstr)
Definition: MachineCopyPropagation.cpp:1026
Pass
print lazy value Lazy Value Info Printer Pass
Definition: LazyValueInfo.cpp:1979
RegAllocCommon.h
llvm::createMachineFunctionSplitterPass
MachineFunctionPass * createMachineFunctionSplitterPass()
createMachineFunctionSplitterPass - This pass splits machine functions using profile information.
llvm::PeepholeOptimizerID
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
Definition: PeepholeOptimizer.cpp:443
llvm::RABasicID
char & RABasicID
Basic register allocator.
Definition: RegAllocBasic.cpp:128
P
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
Definition: README-SSE.txt:411
llvm::createDefaultPBQPRegisterAllocator
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
Definition: RegAllocPBQP.cpp:952
llvm::PHIEliminationID
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions.
Definition: PHIElimination.cpp:128
llvm::MachinePipelinerID
char & MachinePipelinerID
This pass performs software pipelining on machine instructions.
Definition: MachinePipeliner.cpp:182
llvm::createVirtRegRewriter
FunctionPass * createVirtRegRewriter(bool ClearVirtRegs=true)
Definition: VirtRegMap.cpp:646
llvm::UnpackMachineBundlesID
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
Definition: MachineInstrBundle.cpp:42
llvm::ExpandPostRAPseudosID
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
Definition: ExpandPostRAPseudos.cpp:57
llvm::createPrologEpilogInserterPass
MachineFunctionPass * createPrologEpilogInserterPass()
Definition: PrologEpilogInserter.cpp:149
Discriminator.h
llvm::ShadowStackGCLoweringID
char & ShadowStackGCLoweringID
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:91
llvm::LocalStackSlotAllocationID
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
Definition: LocalStackSlotAllocation.cpp:108
llvm::createGCInfoPrinter
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
Definition: GCMetadata.cpp:89
llvm::MIRAddFSDiscriminatorsID
char & MIRAddFSDiscriminatorsID
This pass adds flow sensitive discriminators.
llvm::SpillPlacementID
char & SpillPlacementID
SpillPlacement analysis.
Definition: SpillPlacement.cpp:50
llvm::StackSlotColoringID
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
Definition: StackSlotColoring.cpp:131
llvm::MachineCopyPropagationID
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:354
llvm::TwoAddressInstructionPassID
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
Definition: TwoAddressInstructionPass.cpp:193
llvm::MachineLICMID
char & MachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:297
llvm::createUnreachableBlockEliminationPass
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
llvm::MIRCanonicalizerID
char & MIRCanonicalizerID
MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs according to the semantics of the in...
Definition: MIRCanonicalizerPass.cpp:68
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::createExpandMemCmpPass
FunctionPass * createExpandMemCmpPass()
Definition: ExpandMemCmp.cpp:920
llvm::sampleprof::FSDiscriminatorPass
FSDiscriminatorPass
Definition: Discriminator.h:57
llvm::EdgeBundlesID
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
llvm::LiveDebugValuesID
char & LiveDebugValuesID
LiveDebugValues pass.
Definition: LiveDebugValues.cpp:95
llvm::createLowerEmuTLSPass
ModulePass * createLowerEmuTLSPass()
LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...
llvm::createDwarfEHPass
FunctionPass * createDwarfEHPass(CodeGenOpt::Level OptLevel)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation.
Definition: DwarfEHPrepare.cpp:370
llvm::createEHContGuardCatchretPass
FunctionPass * createEHContGuardCatchretPass()
Creates EHContGuard catchret target identification pass.
llvm::PrologEpilogCodeInserterID
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
Definition: PrologEpilogInserter.cpp:138
llvm::FEntryInserterID
char & FEntryInserterID
This pass inserts FEntry calls.
Definition: FEntryInserter.cpp:48
llvm::PostRAHazardRecognizerID
char & PostRAHazardRecognizerID
PostRAHazardRecognizer - This pass runs the post-ra hazard recognizer.
Definition: PostRAHazardRecognizer.cpp:61
llvm::createPreISelIntrinsicLoweringPass
ModulePass * createPreISelIntrinsicLoweringPass()
This pass lowers the @llvm.load.relative and @llvm.objc.
llvm::FuncletLayoutID
char & FuncletLayoutID
This pass lays out funclets contiguously.
Definition: FuncletLayout.cpp:39
llvm::GCMachineCodeAnalysisID
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
Definition: GCRootLowering.cpp:238
llvm::createReplaceWithVeclibLegacyPass
FunctionPass * createReplaceWithVeclibLegacyPass()
Definition: ReplaceWithVeclib.cpp:251
llvm::MachineTraceMetricsID
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
Definition: MachineTraceMetrics.cpp:46
llvm::createResetMachineFunctionPass
MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)
This pass resets a MachineFunction when it has the FailedISel property as if it was just created.
llvm::RegisterCoalescerID
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
Definition: RegisterCoalescer.cpp:410
llvm::EarlyIfConverterID
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions.
Definition: EarlyIfConversion.cpp:782
llvm::createAtomicExpandPass
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
llvm::createMIRProfileLoaderPass
FunctionPass * createMIRProfileLoaderPass(std::string File, std::string RemappingFile, sampleprof::FSDiscriminatorPass P)
Read Flow Sensitive Profile.
Definition: MIRSampleProfile.cpp:75
llvm::createX86LowerAMXIntrinsicsPass
FunctionPass * createX86LowerAMXIntrinsicsPass()
The pass transforms amx intrinsics to scalar operation if the function has optnone attribute or it is...
Definition: X86LowerAMXIntrinsics.cpp:679
llvm::createCFIInstrInserter
FunctionPass * createCFIInstrInserter()
Creates CFI Instruction Inserter pass.
llvm::createRegAllocScoringPass
FunctionPass * createRegAllocScoringPass()
When learning an eviction policy, extract score(reward) information, otherwise this does nothing.
Definition: MLRegallocEvictAdvisor.cpp:103
llvm::AtomicExpandID
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional lo...
Definition: AtomicExpandPass.cpp:132
llvm::StackMapLivenessID
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
Definition: StackMapLivenessAnalysis.cpp:86
llvm::createShadowStackGCLoweringPass
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC.
Definition: ShadowStackGCLowering.cpp:100
llvm::createMachineOutlinerPass
ModulePass * createMachineOutlinerPass(bool RunOnAllFunctions=true)
This pass performs outlining on machine instructions directly before printing assembly.
Definition: MachineOutliner.cpp:458
llvm::createCFIFixup
FunctionPass * createCFIFixup()
Creates CFI Fixup pass.
llvm::createMachineFunctionPrinterPass
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
llvm::EarlyTailDuplicateID
char & EarlyTailDuplicateID
Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:77
llvm::VirtRegRewriterID
char & VirtRegRewriterID
VirtRegRewriter pass.
Definition: VirtRegMap.cpp:227
llvm::MachineLoopInfoID
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
Definition: MachineLoopInfo.cpp:43
llvm::GCLoweringID
char & GCLoweringID
GCLowering Pass - Used by gc.root to perform its default lowering operations.
Definition: GCRootLowering.cpp:85
llvm::StackColoringID
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
Definition: StackColoring.cpp:549
llvm::MIRProfileLoaderPassID
char & MIRProfileLoaderPassID
This pass reads flow sensitive profile.
Definition: MIRSampleProfile.cpp:73
llvm::RAGreedyID
char & RAGreedyID
Greedy register allocator.
Definition: RegAllocGreedy.cpp:142
llvm::MachineSinkingID
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
Definition: MachineSink.cpp:260
llvm::DetectDeadLanesID
char & DetectDeadLanesID
This pass adds dead/undef flags after analyzing subregister lanes.
Definition: DetectDeadLanes.cpp:125
llvm::createPrintMIRPass
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
Definition: MIRPrintingPass.cpp:66
llvm::FinalizeMachineBundlesID
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier,...
Definition: MachineInstrBundle.cpp:99
llvm::RegClassFilterFunc
std::function< bool(const TargetRegisterInfo &TRI, const TargetRegisterClass &RC)> RegClassFilterFunc
Definition: RegAllocCommon.h:17
llvm::createUnpackMachineBundles
FunctionPass * createUnpackMachineBundles(std::function< bool(const MachineFunction &)> Ftor)
Definition: MachineInstrBundle.cpp:81
llvm::createRegUsageInfoPropPass
FunctionPass * createRegUsageInfoPropPass()
Return a MachineFunction pass that identifies call sites and propagates register usage information of...
Definition: RegUsageInfoPropagate.cpp:152
llvm::createMachineVerifierPass
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness.
llvm::LiveRangeShrinkID
char & LiveRangeShrinkID
LiveRangeShrink pass.
Definition: LiveRangeShrink.cpp:64
llvm::LiveVariablesID
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
Definition: LiveVariables.cpp:45
llvm::MachineCSEID
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
Definition: MachineCSE.cpp:157
llvm::FinalizeISelID
char & FinalizeISelID
This pass expands pseudo-instructions, reserves registers and adjusts machine frame information.
Definition: FinalizeISel.cpp:42
llvm::createExpandReductionsPass
FunctionPass * createExpandReductionsPass()
This pass expands the experimental reduction intrinsics into sequences of shuffles.
Definition: ExpandReductions.cpp:200
llvm::createTypePromotionPass
FunctionPass * createTypePromotionPass()
Create IR Type Promotion pass.
Definition: TypePromotion.cpp:954
llvm::createGCLoweringPass
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
llvm::createExpandVectorPredicationPass
FunctionPass * createExpandVectorPredicationPass()
This pass expands the vector predication intrinsics into unpredicated instructions with selects or ju...
Definition: ExpandVectorPredication.cpp:601
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:82
llvm::ProcessImplicitDefsID
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
Definition: ProcessImplicitDefs.cpp:58
llvm::PatchableFunctionID
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
Definition: PatchableFunction.cpp:96
llvm::MachineBlockPlacementStatsID
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
Definition: MachineBlockPlacement.cpp:3649
llvm::createFreeMachineFunctionPass
FunctionPass * createFreeMachineFunctionPass()
This pass frees the memory occupied by the MachineFunction.
Definition: MachineModuleInfo.cpp:175
llvm::createSjLjEHPreparePass
FunctionPass * createSjLjEHPreparePass(const TargetMachine *TM)
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
llvm::createX86PreAMXConfigPass
FunctionPass * createX86PreAMXConfigPass()
The pass insert tile config intrinsics for AMX fast register allocation.
Definition: X86PreAMXConfig.cpp:411
llvm::XRayInstrumentationID
char & XRayInstrumentationID
This pass inserts the XRay instrumentation sleds if they are supported by the target platform.
Definition: XRayInstrumentation.cpp:264
llvm::UnreachableMachineBlockElimID
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
llvm::createHardwareLoopsPass
FunctionPass * createHardwareLoopsPass()
Create Hardware Loop pass.
Definition: HardwareLoops.cpp:543
llvm::createStripDebugMachineModulePass
ModulePass * createStripDebugMachineModulePass(bool OnlyDebugified)
Creates MIR Strip Debug pass.
Definition: MachineStripDebug.cpp:106
llvm::BranchFolderPassID
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
Definition: BranchFolding.cpp:118
llvm::MachineBlockPlacementID
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
Definition: MachineBlockPlacement.cpp:610
llvm::createIndirectBrExpandPass
FunctionPass * createIndirectBrExpandPass()
Definition: IndirectBrExpandPass.cpp:77
llvm::MachineRegionInfoPassID
char & MachineRegionInfoPassID
MachineRegionInfo - This pass computes SESE regions for machine functions.
Definition: MachineRegionInfo.cpp:129
llvm::ShrinkWrapID
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:250
llvm::createWinEHPass
FunctionPass * createWinEHPass(bool DemoteCatchSwitchPHIOnly=false)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
llvm::createDebugifyMachineModulePass
ModulePass * createDebugifyMachineModulePass()
Creates MIR Debugify pass.
Definition: MachineDebugify.cpp:197
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::RenameIndependentSubregsID
char & RenameIndependentSubregsID
This pass detects subregister lanes in a virtual register that are used independently of other lanes ...
Definition: RenameIndependentSubregs.cpp:113
llvm::FixupStatepointCallerSavedID
char & FixupStatepointCallerSavedID
The pass fixups statepoint machine instruction to replace usage of caller saved registers with stack ...
Definition: FixupStatepointCallerSaved.cpp:84
llvm::createInterleavedAccessPass
FunctionPass * createInterleavedAccessPass()
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
Definition: InterleavedAccessPass.cpp:145
llvm::createRegUsageInfoCollector
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
Definition: RegUsageInfoCollector.cpp:75
llvm::createMIRAddFSDiscriminatorsPass
FunctionPass * createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P)
Add Flow Sensitive Discriminators.
llvm::createBreakFalseDeps
FunctionPass * createBreakFalseDeps()
Creates Break False Dependencies pass.
Definition: BreakFalseDeps.cpp:107
llvm::createJumpInstrTablesPass
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.
llvm::createSelectOptimizePass
FunctionPass * createSelectOptimizePass()
This pass converts conditional moves to conditional jumps when profitable.
Definition: SelectOptimize.cpp:229
llvm::createWasmEHPass
FunctionPass * createWasmEHPass()
createWasmEHPass - This pass adapts exception handling code to use WebAssembly's exception handling s...
Definition: WasmEHPrepare.cpp:134
llvm::createPseudoProbeInserter
FunctionPass * createPseudoProbeInserter()
This pass inserts pseudo probe annotation for callsite profiling.
Definition: PseudoProbeInserter.cpp:151
llvm::MachineFunctionPrinterPassID
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr's.
Definition: MachineFunctionPrinterPass.cpp:58
llvm::TailDuplicateID
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
Definition: TailDuplication.cpp:76
llvm::DeadMachineInstructionElimID
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
Definition: DeadMachineInstructionElim.cpp:56
llvm::createIfConverter
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
Definition: IfConversion.cpp:2364
llvm::createGlobalMergePass
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false, bool MergeExternalByDefault=false)
GlobalMerge - This pass merges internal (by default) globals into structs to enable reuse of a base p...
Definition: GlobalMerge.cpp:678
llvm::BranchRelaxationPassID
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
Definition: BranchRelaxation.cpp:118
llvm::MachineSchedulerID
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
Definition: MachineScheduler.cpp:213
CodeGen.h
llvm::MachineDominanceFrontierID
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis.
Definition: MachineDominanceFrontier.cpp:37
llvm::PostRASchedulerID
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
Definition: PostRASchedulerList.cpp:197
llvm::MachineDominatorsID
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
llvm::MachineCombinerID
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
Definition: MachineCombiner.cpp:129
llvm::MIRPrintingPassID
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
Definition: MIRPrintingPass.cpp:61
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::createBasicRegisterAllocator
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
Definition: RegAllocBasic.cpp:332
llvm::ImplicitNullChecksID
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
Definition: ImplicitNullChecks.cpp:816
llvm::EarlyMachineLICMID
char & EarlyMachineLICMID
This pass performs loop invariant code motion on machine instructions.
Definition: MachineLICM.cpp:298
llvm::createInterleavedLoadCombinePass
FunctionPass * createInterleavedLoadCombinePass()
InterleavedLoadCombines Pass - This pass identifies interleaved loads and combines them into wide loa...
Definition: InterleavedLoadCombinePass.cpp:1358
llvm::PostMachineSchedulerID
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
Definition: MachineScheduler.cpp:244
llvm::PostRAMachineSinkingID
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
Definition: MachineSink.cpp:1622
llvm::RemoveRedundantDebugValuesID
char & RemoveRedundantDebugValuesID
RemoveRedundantDebugValues pass.
Definition: RemoveRedundantDebugValues.cpp:61
llvm::IfConverterID
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
Definition: IfConversion.cpp:434
llvm::createSafeStackPass
FunctionPass * createSafeStackPass()
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
Definition: SafeStack.cpp:938
llvm::LiveIntervalsID
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.
Definition: LiveIntervals.cpp:62
llvm::createBasicBlockSectionsPass
MachineFunctionPass * createBasicBlockSectionsPass()
createBasicBlockSections Pass - This pass assigns sections to machine basic blocks and is enabled wit...
Definition: BasicBlockSections.cpp:392
llvm::createCodeGenPreparePass
FunctionPass * createCodeGenPreparePass()
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
Definition: CodeGenPrepare.cpp:465
llvm::EarlyIfPredicatorID
char & EarlyIfPredicatorID
EarlyIfPredicator - This pass performs if-conversion on SSA form by predicating if/else block and ins...
Definition: EarlyIfConversion.cpp:1107
llvm::createStackProtectorPass
FunctionPass * createStackProtectorPass()
createStackProtectorPass - This pass adds stack protectors to functions.
Definition: StackProtector.cpp:75
llvm::createCFGuardLongjmpPass
FunctionPass * createCFGuardLongjmpPass()
Creates CFGuard longjmp target identification pass.