35#define DEBUG_TYPE "machine-latecleanup"
37STATISTIC(NumRemoved,
"Number of redundant instructions removed.");
46 using Reg2DefMap = std::map<Register, MachineInstr*>;
47 std::vector<Reg2DefMap> RegDefs;
69 MachineFunctionProperties::Property::NoVRegs);
75char MachineLateInstrsCleanup::ID = 0;
80 "Machine Late Instructions Cleanup Pass",
false,
false)
83 if (skipFunction(MF.getFunction()))
86 TRI = MF.getSubtarget().getRegisterInfo();
87 TII = MF.getSubtarget().getInstrInfo();
90 RegDefs.resize(MF.getNumBlockIDs());
96 Changed |= processBlock(
MBB);
113 for (
auto &MO :
I->operands())
114 if (MO.isReg() &&
TRI->regsOverlap(MO.getReg(), Reg)) {
131 if (!VisitedPreds.
test(Pred->getNumber()))
138 BitVector VisitedPreds(
MI->getMF()->getNumBlockIDs());
140 MI->eraseFromParent();
152 bool SawStore =
true;
153 if (!
MI->isSafeToMove(
nullptr, SawStore) ||
MI->isImplicitDef() ||
156 for (
unsigned i = 0, e =
MI->getNumOperands(); i != e; ++i) {
174 bool Changed =
false;
184 auto PredDefI = RegDefs[Pred->getNumber()].find(Reg);
185 return PredDefI != RegDefs[Pred->getNumber()].end() &&
186 DefMI->isIdenticalTo(*PredDefI->second);
201 if (
MI.modifiesRegister(FrameReg,
TRI)) {
211 auto DefI = MBBDefs.find(DefedReg);
212 if (DefI != MBBDefs.end() &&
MI.isIdenticalTo(*DefI->second)) {
222 for (
auto DefI = MBBDefs.begin(); DefI != MBBDefs.end();) {
224 if (
MI.modifiesRegister(Reg,
TRI))
225 DefI = MBBDefs.erase(DefI);
234 MBBDefs[DefedReg] = &
MI;
MachineInstrBuilder MachineInstrBuilder & DefMI
This file implements the BitVector class.
const HexagonInstrInfo * TII
static bool isCandidate(const MachineInstr *MI, Register &DefedReg, Register FrameReg)
static void clearKillsForDef(Register Reg, MachineBasicBlock *MBB, MachineBasicBlock::iterator I, BitVector &VisitedPreds, const TargetRegisterInfo *TRI)
static void removeRedundantDef(MachineInstr *MI, const TargetRegisterInfo *TRI)
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallPtrSet class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
bool test(unsigned Idx) const
static constexpr unsigned NoRegister
bool isEHPad() const
Returns true if the block is a landing pad.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
pred_iterator pred_begin()
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
iterator_range< pred_iterator > predecessors()
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
virtual MachineFunctionProperties getRequiredProperties() const
Properties which a MachineFunction may have at a given point in time.
MachineFunctionProperties & set(Property P)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
Register getReg() const
getReg - Returns the register number.
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Wrapper class representing virtual and physical registers.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
char & MachineLateInstrsCleanupID
MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void initializeMachineLateInstrsCleanupPass(PassRegistry &)
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.