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28 #include "llvm/Config/llvm-config.h"
41 #define DEBUG_TYPE "codegen"
45 cl::desc(
"When printing machine IR, annotate instructions and blocks with "
46 "SlotIndexes when available"),
53 IrrLoopHeaderWeight =
B->getIrrLoopHeaderWeight();
56 MachineBasicBlock::~MachineBasicBlock() =
default;
59 MCSymbol *MachineBasicBlock::getSymbol()
const {
60 if (!CachedMCSymbol) {
87 return CachedMCSymbol;
91 if (!CachedEHCatchretMCSymbol) {
98 return CachedEHCatchretMCSymbol;
102 if (!CachedEndMCSymbol) {
110 return CachedEndMCSymbol;
137 MI.addRegOperandsToUseLists(RegInfo);
142 N->getParent()->removeFromMBBNumbering(
N->Number);
149 assert(!
N->getParent() &&
"machine instruction already in a basic block");
150 N->setParent(Parent);
156 MF->handleInsertion(*
N);
162 assert(
N->getParent() &&
"machine instruction not in a basic block");
166 MF->handleRemoval(*
N);
167 N->removeRegOperandsFromUseLists(MF->
getRegInfo());
170 N->setParent(
nullptr);
176 instr_iterator First,
177 instr_iterator Last) {
178 assert(Parent->getParent() == FromList.Parent->getParent() &&
179 "cannot transfer MachineInstrs between MachineFunctions");
182 if (
this == &FromList)
185 assert(Parent != FromList.Parent &&
"Two lists have the same parent?");
190 First->setParent(Parent);
194 assert(!
MI->getParent() &&
"MI is still in a block!");
195 Parent->getParent()->deleteMachineInstr(
MI);
200 while (
I !=
E &&
I->isPHI())
202 assert((
I ==
E || !
I->isInsideBundle()) &&
203 "First non-phi MI cannot be inside a bundle!");
212 while (
I !=
E && (
I->isPHI() ||
I->isPosition() ||
213 TII->isBasicBlockPrologue(*
I)))
217 assert((
I ==
E || !
I->isInsideBundle()) &&
218 "First non-phi / non-label instruction is inside a bundle!");
228 while (
I !=
E && (
I->isPHI() ||
I->isPosition() ||
I->isDebugInstr() ||
229 (SkipPseudoOp &&
I->isPseudoProbe()) ||
230 TII->isBasicBlockPrologue(*
I)))
234 assert((
I ==
E || !
I->isInsideBundle()) &&
235 "First non-phi / non-label / non-debug "
236 "instruction is inside a bundle!");
242 while (
I !=
B && ((--
I)->isTerminator() ||
I->isDebugInstr()))
244 while (
I !=
E && !
I->isTerminator())
251 while (
I !=
B && ((--
I)->isTerminator() ||
I->isDebugInstr()))
253 while (
I !=
E && !
I->isTerminator())
259 return find_if(
instrs(), [](
auto &II) {
return II.isTerminator(); });
275 if (
I->isDebugInstr() ||
I->isInsideBundle())
277 if (SkipPseudoOp &&
I->isPseudoProbe())
296 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
304 if (Succ->isInlineAsmBrIndirectTarget())
318 return LBB->getName();
336 bool IsStandalone)
const {
339 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
347 print(OS, MST, Indexes, IsStandalone);
352 bool IsStandalone)
const {
355 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
369 bool HasLineAttributes =
false;
373 if (Indexes) OS <<
'\t';
375 OS <<
"; predecessors: ";
380 HasLineAttributes =
true;
384 if (Indexes) OS <<
'\t';
386 OS.
indent(2) <<
"successors: ";
395 if (!Probs.empty() && IsStandalone) {
411 HasLineAttributes =
true;
415 if (Indexes) OS <<
'\t';
416 OS.
indent(2) <<
"liveins: ";
419 for (
const auto &LI :
liveins()) {
421 if (!LI.LaneMask.all())
424 HasLineAttributes =
true;
427 if (HasLineAttributes)
430 bool IsInBundle =
false;
438 if (IsInBundle && !
MI.isInsideBundle()) {
443 OS.
indent(IsInBundle ? 4 : 2);
444 MI.
print(OS, MST, IsStandalone,
false,
false,
457 if (IrrLoopHeaderWeight && IsStandalone) {
458 if (Indexes) OS <<
'\t';
459 OS.
indent(2) <<
"; Irreducible loop header weight: " << *IrrLoopHeaderWeight
483 bool hasAttributes =
false;
492 if (moduleSlotTracker) {
494 }
else if (
bb->getParent()) {
501 os <<
"<ir-block badref>";
510 os <<
'.' <<
bb->getName();
512 hasAttributes =
true;
521 os << (hasAttributes ?
", " :
" (");
522 os <<
"machine-block-address-taken";
523 hasAttributes =
true;
526 os << (hasAttributes ?
", " :
" (");
527 os <<
"ir-block-address-taken ";
529 hasAttributes =
true;
532 os << (hasAttributes ?
", " :
" (");
534 hasAttributes =
true;
537 os << (hasAttributes ?
", " :
" (");
538 os <<
"inlineasm-br-indirect-target";
539 hasAttributes =
true;
542 os << (hasAttributes ?
", " :
" (");
543 os <<
"ehfunclet-entry";
544 hasAttributes =
true;
547 os << (hasAttributes ?
", " :
" (");
549 hasAttributes =
true;
552 os << (hasAttributes ?
", " :
" (");
555 case MBBSectionID::SectionType::Exception:
564 hasAttributes =
true;
567 os << (hasAttributes ?
", " :
" (");
569 hasAttributes =
true;
586 if (
I == LiveIns.end())
589 I->LaneMask &= ~LaneMask;
590 if (
I->LaneMask.none())
597 LiveInVector::iterator LI = LiveIns.begin() + (
I - LiveIns.begin());
598 return LiveIns.erase(LI);
613 LiveInVector::const_iterator
I = LiveIns.begin();
614 LiveInVector::const_iterator J;
615 LiveInVector::iterator Out = LiveIns.begin();
616 for (;
I != LiveIns.end(); ++Out,
I = J) {
619 for (J = std::next(
I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
620 LaneMask |= J->LaneMask;
621 Out->PhysReg = PhysReg;
622 Out->LaneMask = LaneMask;
624 LiveIns.erase(Out, LiveIns.end());
631 assert(RC &&
"Register class is required");
633 "Only the entry block and landing pads can have physreg live ins");
642 for (;
I !=
E &&
I->isCopy(); ++
I)
643 if (
I->getOperand(1).getReg() == PhysReg) {
644 Register VirtReg =
I->getOperand(0).getReg();
682 assert(!
B &&
"UpdateTerminators requires analyzable predecessors!");
697 if (!PreviousLayoutSuccessor || !
isSuccessor(PreviousLayoutSuccessor) ||
698 PreviousLayoutSuccessor->
isEHPad())
726 assert(PreviousLayoutSuccessor);
730 if (PreviousLayoutSuccessor ==
TBB) {
761 for (
auto Prob : Probs)
762 Sum += Prob.getNumerator();
768 "The sum of successors's probabilities exceeds one.");
776 if (!(Probs.empty() && !Successors.empty()))
777 Probs.push_back(Prob);
778 Successors.push_back(Succ);
779 Succ->addPredecessor(
this);
787 Successors.push_back(Succ);
788 Succ->addPredecessor(
this);
793 bool NormalizeSuccProbs) {
795 assert(OldI !=
succ_end() &&
"Old is not a successor of this block!");
797 "New is already a successor of this block!");
805 : *getProbabilityIterator(OldI));
806 if (NormalizeSuccProbs)
811 bool NormalizeSuccProbs) {
818 assert(
I != Successors.end() &&
"Not a current successor!");
822 if (!Probs.empty()) {
823 probability_iterator WI = getProbabilityIterator(
I);
825 if (NormalizeSuccProbs)
829 (*I)->removePredecessor(
this);
830 return Successors.erase(
I);
853 assert(OldI !=
E &&
"Old is not a successor of this block");
857 Old->removePredecessor(
this);
858 New->addPredecessor(
this);
865 if (!Probs.empty()) {
866 auto ProbIter = getProbabilityIterator(NewI);
867 if (!ProbIter->isUnknown())
868 *ProbIter += *getProbabilityIterator(OldI);
875 if (!Orig->Probs.empty())
882 Predecessors.push_back(Pred);
887 assert(
I != Predecessors.end() &&
"Pred is not a predecessor of this block!");
888 Predecessors.erase(
I);
900 if (!FromMBB->Probs.empty()) {
901 auto Prob = *FromMBB->Probs.begin();
917 if (!FromMBB->Probs.empty()) {
918 auto Prob = *FromMBB->Probs.begin();
944 return Successors.size() == 1 ? Successors[0] :
nullptr;
974 if (!
TBB)
return &*Fallthrough;
980 return &*Fallthrough;
984 if (
Cond.empty())
return nullptr;
988 return (FBB ==
nullptr) ? &*Fallthrough :
nullptr;
1001 if (SplitPoint ==
end()) {
1009 if (UpdateLiveIns) {
1057 Indexes->insertMBBInMaps(NMBB);
1070 if (!MO.isReg() || MO.getReg() == 0 || !MO.isUse() || !MO.isKill() ||
1075 KilledRegs.push_back(
Reg);
1077 MO.setIsKill(
false);
1087 if (!MO.isReg() || MO.getReg() == 0)
1092 UsedRegs.push_back(
Reg);
1105 Terminators.push_back(&
MI);
1110 if (Succ == PrevFallthrough)
1111 PrevFallthrough = NMBB;
1118 NewTerminators.push_back(&
MI);
1122 Indexes->removeMachineInstrFromMaps(*
Terminator);
1137 if (Indexes->hasIndex(
MI))
1138 Indexes->removeMachineInstrFromMaps(
MI);
1139 Indexes->insertMachineInstrInMaps(
MI);
1148 for (
const auto &LI : Succ->
liveins())
1155 while (!KilledRegs.empty()) {
1158 if (!(--
I)->addRegisterKilled(
Reg,
TRI,
false))
1160 if (
Reg.isVirtual())
1167 if (LiveInSets !=
nullptr)
1184 SlotIndex StartIndex = Indexes->getMBBEndIdx(
this);
1186 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
1192 I !=
E &&
I->isPHI(); ++
I) {
1193 for (
unsigned ni = 1, ne =
I->getNumOperands(); ni != ne; ni += 2) {
1194 if (
I->getOperand(ni+1).getMBB() == NMBB) {
1204 "PHI sources should be live out of their predecessors.");
1217 if (!LI.
liveAt(PrevIndex))
1223 assert(VNI &&
"LiveInterval should have VNInfo where it is live.");
1237 MDT->recordSplitCriticalEdge(
this, Succ, NMBB);
1243 if (
MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
1244 if (TIL == DestLoop) {
1246 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1247 }
else if (TIL->contains(DestLoop)) {
1249 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
1250 }
else if (DestLoop->contains(TIL)) {
1252 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1258 assert(DestLoop->getHeader() == Succ &&
1259 "Should not create irreducible loops!");
1261 P->addBasicBlockToLoop(NMBB, MLI->getBase());
1302 LLVM_DEBUG(
dbgs() <<
"Won't split critical edge after degenerate "
1313 if (
MI->isBundledWithSucc() && !
MI->isBundledWithPred())
1314 MI->unbundleFromSucc();
1316 if (
MI->isBundledWithPred() && !
MI->isBundledWithSucc())
1317 MI->unbundleFromPred();
1337 assert(!
MI->isBundledWithPred() && !
MI->isBundledWithSucc() &&
1338 "Cannot insert instruction with bundle flags");
1365 assert(Old != New &&
"Cannot replace self with self!");
1370 if (!
I->isTerminator())
break;
1374 for (
unsigned i = 0,
e =
I->getNumOperands();
i !=
e; ++
i)
1375 if (
I->getOperand(
i).isMBB() &&
1376 I->getOperand(
i).getMBB() == Old)
1377 I->getOperand(
i).setMBB(New);
1387 for (
unsigned i = 2,
e =
MI.getNumOperands() + 1;
i !=
e;
i += 2) {
1401 return MBBI->getDebugLoc();
1408 if (!
MBBI->isDebugInstr())
1409 return MBBI->getDebugLoc();
1419 if (!
MBBI->isDebugInstr())
return MBBI->getDebugLoc();
1429 return MBBI->getDebugLoc();
1439 while (TI !=
end() && !TI->isBranch())
1443 DL = TI->getDebugLoc();
1444 for (++TI ; TI !=
end() ; ++TI)
1457 const auto &Prob = *getProbabilityIterator(Succ);
1458 if (Prob.isUnknown()) {
1461 unsigned KnownProbNum = 0;
1463 for (
const auto &
P : Probs) {
1464 if (!
P.isUnknown()) {
1469 return Sum.getCompl() / (Probs.size() - KnownProbNum);
1480 *getProbabilityIterator(
I) = Prob;
1484 MachineBasicBlock::const_probability_iterator
1485 MachineBasicBlock::getProbabilityIterator(
1487 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1488 const size_t index = std::distance(Successors.begin(),
I);
1489 assert(
index < Probs.size() &&
"Not a current successor!");
1490 return Probs.begin() +
index;
1494 MachineBasicBlock::probability_iterator
1496 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1497 const size_t index = std::distance(Successors.begin(),
I);
1498 assert(
index < Probs.size() &&
"Not a current successor!");
1499 return Probs.begin() +
index;
1511 unsigned Neighborhood)
const {
1512 unsigned N = Neighborhood;
1516 for (;
I !=
end() &&
N > 0; ++
I) {
1517 if (
I->isDebugOrPseudoInstr())
1528 if (
Info.FullyDefined ||
Info.Clobbered)
1555 if (
I->isDebugOrPseudoInstr())
1569 if (!
Info.PartialDeadDef)
1584 }
while (
I !=
begin() &&
N > 0);
1589 while (
I !=
begin() && std::prev(
I)->isDebugOrPseudoInstr())
1627 "Liveness information is accurate");
1628 return LiveIns.begin();
1635 "Liveness information is accurate");
1638 MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;
1645 return liveout_iterator(*
this, ExceptionPointer, ExceptionSelector,
false);
1651 for (
auto I = R.begin(),
E = R.end();
I !=
E; ++
I) {
bool requiresStructuredCFG() const
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
void remove(iterator MBBI)
bool isMachineBlockAddressTaken() const
Test whether this block is used as something other than the target of a terminator,...
unsigned succ_size() const
bool hasProperty(Property P) const
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
This is an optimization pass for GlobalISel generic memory operations.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Remove the branching code at the end of the specific MBB.
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...
Context object for machine code objects.
MCContext & getContext() const
uint32_t getNumerator() const
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
virtual const TargetInstrInfo * getInstrInfo() const
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
MachineBasicBlock * getNextNode()
Get the next node, or nullptr for the list tail.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
bool sizeWithoutDebugLargerThan(unsigned Limit) const
Reg
All possible values of the reg field in the ModR/M byte.
This represents a simple continuous liveness interval for a value.
bool isEntryBlock() const
Returns true if this is the entry block of the function.
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
MCSymbol * getEHCatchretSymbol() const
Return the EHCatchret Symbol for this basic block.
A set of physical registers with utility functions to track liveness when walking backward/forward th...
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
bool isIRBlockAddressTaken() const
Test whether this block is the target of an IR BlockAddress.
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE and DBG_LABEL instructions.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
LiveInVector::const_iterator livein_iterator
iterator getFirstTerminatorForward()
Finds the first terminator in a block by scanning forward.
void moveBefore(MachineBasicBlock *NewAfter)
Move 'this' block before or after the specified block.
static BranchProbability getZero()
iterator_range< livein_iterator > liveins() const
bool isPredicated(const MachineInstr &MI) const override
Returns true if the instruction is already predicated.
virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
void insert(iterator MBBI, MachineBasicBlock *MBB)
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Since we know that Vector is byte aligned and we know the element offset of we should change the load into a lve *x instead of doing a load store lve *x sequence Implement passing vectors by value into calls and receiving them as arguments GCC apparently tries to then a load and vperm of Variable We need a way to teach tblgen that some operands of an intrinsic are required to be constants The verifier should enforce this constraint We currently codegen SCALAR_TO_VECTOR as a store of the scalar to a byte aligned stack slot
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
pointer remove(iterator &IT)
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
uint8_t getBBAddrMapVersion() const
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
void incorporateFunction(const Function &F)
Incorporate the given function.
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
void copySuccessor(MachineBasicBlock *Orig, succ_iterator I)
Copy a successor (and any probability info) from original block to this block's.
std::optional< unsigned > getBBID() const
unsigned const TargetRegisterInfo * TRI
Manage lifetime of a slot tracker for printing IR.
Predicate any(Predicate P0, Predicate P1)
True iff P0 or P1 are true.
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)
AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.
iterator erase(iterator where)
LLVM Basic Block Representation.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
bool isBeginSection() const
Returns true if this block begins any section.
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
MachineInstrBundleIterator< const MachineInstr > const_iterator
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)
< i1 > br i1 label label bb bb
instr_iterator getFirstInstrTerminator()
Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
bool hasIndex(const MachineInstr &instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
TargetInstrInfo - Interface to description of machine instruction set.
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it.
bool liveAt(SlotIndex index) const
static uint32_t getDenominator()
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const MachineFunctionProperties & getProperties() const
Get the function properties.
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
BasicBlock * getAddressTakenIRBlock() const
Retrieves the BasicBlock which corresponds to this MachineBasicBlock.
const HexagonInstrInfo * TII
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
into llvm powi allowing the code generator to produce balanced multiplication trees First
MachineOperand class - Representation of each machine instruction operand.
bool isLegalToHoistInto() const
Returns true if it is legal to hoist instructions into this block.
Pair of physical register and lane mask.
MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)
Split a basic block into 2 pieces at SplitPoint.
SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const
Returns the base index for the given instruction.
This class implements an extremely fast bulk output stream that can only output to a stream.
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
bool hasPersonalityFn() const
Check whether this function has a personality function.
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Insert branch code into the end of the specified MachineBasicBlock.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
Analysis containing CSE Info
LiveInterval - This class represents the liveness of a register, or stack slot.
SlotIndex - An opaque wrapper around machine indexes.
static BranchProbability getUnknown()
DebugLoc findPrevDebugLoc(instr_iterator MBBI)
Find the previous valid DebugLoc preceding MBBI, skipping and DBG_VALUE instructions.
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
void insertMBBInMaps(MachineBasicBlock *MBB)
Template traits for intrusive list.
void sort(IteratorTy Start, IteratorTy End)
std::vector< MachineBasicBlock * >::iterator succ_iterator
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
BranchProbability getSuccProbability(const_succ_iterator Succ) const
Return probability of the edge from this block to MBB.
bool mayHaveInlineAsmBr() const
Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
reverse_iterator getReverse() const
Get a reverse iterator to the same node.
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
reverse_instr_iterator instr_rend()
Representation of each machine instruction.
const MCAsmInfo * getAsmInfo() const
auto find(R &&Range, const T &Val)
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.
const MachineBasicBlock * getSingleSuccessor() const
Return the successor of this block if it has a single successor.
void splice(iterator InsertPt, iterator MBBI)
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
reverse_instr_iterator instr_rbegin()
@ LQR_Live
Register is known to be (at least partially) live.
initializer< Ty > init(const Ty &Val)
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It, then continue decrementing it while it points to a debug instruction.
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Align getAlignment() const
Return alignment of the basic block.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
const static MBBSectionID ExceptionSectionID
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
succ_iterator succ_begin()
Information about how a physical register Reg is used by a set of operands.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
BasicBlockListType::const_iterator const_iterator
void erase(iterator MBBI)
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
livein_iterator livein_end() const
Register getReg() const
getReg - Returns the register number.
A Module instance is used to store all the information related to an LLVM module.
iterator_range< pred_iterator > predecessors()
Instructions::reverse_iterator reverse_instr_iterator
@ LQR_Dead
Register is known to be fully dead.
instr_iterator instr_begin()
LiveInterval & getInterval(Register Reg)
instr_iterator instr_end()
void moveAfter(MachineBasicBlock *NewBefore)
@ PrintNameIr
Add IR name where available.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the start of this basic block.
iterator_range< iterator > phis()
Returns a range that iterates over the phis in the basic block.
MachineBasicBlock * getMBB() const
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
SmallVector< MachineOperand, 4 > Cond
@ PrintNameAttributes
Print attributes.
iterator_range< succ_iterator > successors()
iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the first non-debug instruction in the basic block, or end().
bool isEHPad() const
Returns true if the block is a landing pad.
StringRef - Represent a constant reference to a string, i.e.
reverse_iterator rbegin()
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
bool hasEHPadSuccessor() const
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
MachineBasicBlock MachineBasicBlock::iterator MBBI
std::string getFullName() const
Return a formatted string to identify this block and its parent function.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
enum llvm::MBBSectionID::SectionType Type
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findDebugLoc (it also searches from the first to the last MI of this MBB) ...
void addNodeToList(NodeTy *)
When an MBB is added to an MF, we need to update the parent pointer of the MBB, the MBB numbering,...
self_iterator getIterator()
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
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bool hasBBSections() const
Returns true if this function has basic block sections enabled.
void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)
Split the old successor into old plus new and updates the probability info.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
liveout_iterator liveout_begin() const
Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...
StringRef getName() const
Return a constant reference to the value's name.
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
MBBSectionID getSectionID() const
Returns the section ID of this basic block.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
MCSymbol * getEndSymbol() const
Returns the MCSymbol marking the end of this basic block.
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const
Check if the edge between this block and the given successor Succ, can be split.
constexpr char SymbolName[]
Key for Kernel::Metadata::mSymbolName.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.
Function & getFunction()
Return the LLVM function that this machine code represents.
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
const static MBBSectionID ColdSectionID
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
Iterator for intrusive lists based on ilist_node.
uint64_t value() const
This is a hole in the type system and should not be abused.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
Instructions::iterator instr_iterator
StringRef getPrivateLabelPrefix() const
void removeNodeFromList(NodeTy *)
livein_iterator livein_begin() const
VNInfo - Value Number Information.
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findPrevDebugLoc (it also searches from the last to the first MI of this M...
std::pair< const_iterator, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
virtual const uint32_t * getNoPreservedMask() const
Return a register mask that clobbers everything.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
bool livein_empty() const
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified segment from this range.
iterator insert(iterator where, pointer New)
void validateSuccProbs() const
Validate successors' probabilities and check if the sum of them is approximate one.
const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the end of the basic block.
@ Kill
The last use of a register.
Pass interface - Implemented by all 'passes'.
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Reverses the branch condition of the specified condition list, returning false on success and true if...
virtual const TargetLowering * getTargetLowering() const
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
MachineBasicBlock * getFallThrough(bool JumpToFallThrough=false)
Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
static void deleteNode(NodeTy *V)
Simple wrapper around std::function<void(raw_ostream&)>.
VarInfo & getVarInfo(Register Reg)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
void setMBB(MachineBasicBlock *MBB)
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
A raw_ostream that writes to an SmallVector or SmallString.
void clearLiveIns()
Clear live in list.
const TargetRegisterClass * constrainRegClass(Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)
Update live intervals for instructions in a range of iterators.
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@ LQR_Unknown
Register liveness not decidable from local neighborhood.
iterator SkipPHIsLabelsAndDebug(iterator I, bool SkipPseudoOp=true)
Return the first instruction in MBB after I that is not a PHI, label or debug.
bool hasInterval(Register Reg) const
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)
Callback before transferring nodes to this list.
void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)
Update the terminator instructions in block to account for changes to block layout which may have bee...
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
@ Cold
Attempts to make code in the caller as efficient as possible under the assumption that the call is no...
APFloat abs(APFloat X)
Returns the absolute value of the argument.
unsigned getBBIDOrNumber() const
Returns the BBID of the block when BBAddrMapVersion >= 2, otherwise returns MachineBasicBlock::Number...
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<>> *LiveInSets=nullptr)
Split the critical edge from this block to the given successor block, and return the newly created bl...
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
auto instructionsWithoutDebug(IterT It, IterT End, bool SkipPseudoOp=true)
Construct a range iterator which begins at It and moves forwards until End is reached,...
Wrapper class representing physical registers. Should be passed by value.