LLVM  14.0.0git
CSEInfo.cpp
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1 //===- CSEInfo.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 //
10 //===----------------------------------------------------------------------===//
13 #include "llvm/InitializePasses.h"
14 #include "llvm/Support/Error.h"
15 
16 #define DEBUG_TYPE "cseinfo"
17 
18 using namespace llvm;
23 }
25  "Analysis containing CSE Info", false, true)
27  "Analysis containing CSE Info", false, true)
28 
29 /// -------- UniqueMachineInstr -------------//
30 
32  GISelInstProfileBuilder(ID, MI->getMF()->getRegInfo()).addNodeID(MI);
33 }
34 /// -----------------------------------------
35 
36 /// --------- CSEConfigFull ---------- ///
37 bool CSEConfigFull::shouldCSEOpc(unsigned Opc) {
38  switch (Opc) {
39  default:
40  break;
41  case TargetOpcode::G_ADD:
42  case TargetOpcode::G_AND:
43  case TargetOpcode::G_ASHR:
44  case TargetOpcode::G_LSHR:
45  case TargetOpcode::G_MUL:
46  case TargetOpcode::G_OR:
47  case TargetOpcode::G_SHL:
48  case TargetOpcode::G_SUB:
49  case TargetOpcode::G_XOR:
50  case TargetOpcode::G_UDIV:
51  case TargetOpcode::G_SDIV:
52  case TargetOpcode::G_UREM:
53  case TargetOpcode::G_SREM:
54  case TargetOpcode::G_CONSTANT:
55  case TargetOpcode::G_FCONSTANT:
56  case TargetOpcode::G_IMPLICIT_DEF:
57  case TargetOpcode::G_ZEXT:
58  case TargetOpcode::G_SEXT:
59  case TargetOpcode::G_ANYEXT:
60  case TargetOpcode::G_UNMERGE_VALUES:
61  case TargetOpcode::G_TRUNC:
62  case TargetOpcode::G_PTR_ADD:
63  case TargetOpcode::G_EXTRACT:
64  return true;
65  }
66  return false;
67 }
68 
70  return Opc == TargetOpcode::G_CONSTANT || Opc == TargetOpcode::G_IMPLICIT_DEF;
71 }
72 
73 std::unique_ptr<CSEConfigBase>
75  std::unique_ptr<CSEConfigBase> Config;
76  if (Level == CodeGenOpt::None)
77  Config = std::make_unique<CSEConfigConstantOnly>();
78  else
79  Config = std::make_unique<CSEConfigFull>();
80  return Config;
81 }
82 
83 /// -----------------------------------------
84 
85 /// -------- GISelCSEInfo -------------//
87  this->MF = &MF;
88  this->MRI = &MF.getRegInfo();
89 }
90 
92 
93 bool GISelCSEInfo::isUniqueMachineInstValid(
94  const UniqueMachineInstr &UMI) const {
95  // Should we check here and assert that the instruction has been fully
96  // constructed?
97  // FIXME: Any other checks required to be done here? Remove this method if
98  // none.
99  return true;
100 }
101 
102 void GISelCSEInfo::invalidateUniqueMachineInstr(UniqueMachineInstr *UMI) {
103  bool Removed = CSEMap.RemoveNode(UMI);
104  (void)Removed;
105  assert(Removed && "Invalidation called on invalid UMI");
106  // FIXME: Should UMI be deallocated/destroyed?
107 }
108 
109 UniqueMachineInstr *GISelCSEInfo::getNodeIfExists(FoldingSetNodeID &ID,
111  void *&InsertPos) {
112  auto *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
113  if (Node) {
114  if (!isUniqueMachineInstValid(*Node)) {
115  invalidateUniqueMachineInstr(Node);
116  return nullptr;
117  }
118 
119  if (Node->MI->getParent() != MBB)
120  return nullptr;
121  }
122  return Node;
123 }
124 
125 void GISelCSEInfo::insertNode(UniqueMachineInstr *UMI, void *InsertPos) {
127  assert(UMI);
128  UniqueMachineInstr *MaybeNewNode = UMI;
129  if (InsertPos)
130  CSEMap.InsertNode(UMI, InsertPos);
131  else
132  MaybeNewNode = CSEMap.GetOrInsertNode(UMI);
133  if (MaybeNewNode != UMI) {
134  // A similar node exists in the folding set. Let's ignore this one.
135  return;
136  }
137  assert(InstrMapping.count(UMI->MI) == 0 &&
138  "This instruction should not be in the map");
139  InstrMapping[UMI->MI] = MaybeNewNode;
140 }
141 
142 UniqueMachineInstr *GISelCSEInfo::getUniqueInstrForMI(const MachineInstr *MI) {
143  assert(shouldCSE(MI->getOpcode()) && "Trying to CSE an unsupported Node");
144  auto *Node = new (UniqueInstrAllocator) UniqueMachineInstr(MI);
145  return Node;
146 }
147 
148 void GISelCSEInfo::insertInstr(MachineInstr *MI, void *InsertPos) {
149  assert(MI);
150  // If it exists in temporary insts, remove it.
151  TemporaryInsts.remove(MI);
152  auto *Node = getUniqueInstrForMI(MI);
153  insertNode(Node, InsertPos);
154 }
155 
156 MachineInstr *GISelCSEInfo::getMachineInstrIfExists(FoldingSetNodeID &ID,
158  void *&InsertPos) {
160  if (auto *Inst = getNodeIfExists(ID, MBB, InsertPos)) {
161  LLVM_DEBUG(dbgs() << "CSEInfo::Found Instr " << *Inst->MI;);
162  return const_cast<MachineInstr *>(Inst->MI);
163  }
164  return nullptr;
165 }
166 
167 void GISelCSEInfo::countOpcodeHit(unsigned Opc) {
168 #ifndef NDEBUG
169  if (OpcodeHitTable.count(Opc))
170  OpcodeHitTable[Opc] += 1;
171  else
172  OpcodeHitTable[Opc] = 1;
173 #endif
174  // Else do nothing.
175 }
176 
178  if (shouldCSE(MI->getOpcode())) {
179  TemporaryInsts.insert(MI);
180  LLVM_DEBUG(dbgs() << "CSEInfo::Recording new MI " << *MI);
181  }
182 }
183 
185  assert(shouldCSE(MI->getOpcode()) && "Invalid instruction for CSE");
186  auto *UMI = InstrMapping.lookup(MI);
187  LLVM_DEBUG(dbgs() << "CSEInfo::Handling recorded MI " << *MI);
188  if (UMI) {
189  // Invalidate this MI.
190  invalidateUniqueMachineInstr(UMI);
191  InstrMapping.erase(MI);
192  }
193  /// Now insert the new instruction.
194  if (UMI) {
195  /// We'll reuse the same UniqueMachineInstr to avoid the new
196  /// allocation.
197  *UMI = UniqueMachineInstr(MI);
198  insertNode(UMI, nullptr);
199  } else {
200  /// This is a new instruction. Allocate a new UniqueMachineInstr and
201  /// Insert.
202  insertInstr(MI);
203  }
204 }
205 
207  if (auto *UMI = InstrMapping.lookup(MI)) {
208  invalidateUniqueMachineInstr(UMI);
209  InstrMapping.erase(MI);
210  }
211  TemporaryInsts.remove(MI);
212 }
213 
215  while (!TemporaryInsts.empty()) {
216  auto *MI = TemporaryInsts.pop_back_val();
218  }
219 }
220 
221 bool GISelCSEInfo::shouldCSE(unsigned Opc) const {
222  assert(CSEOpt.get() && "CSEConfig not set");
223  return CSEOpt->shouldCSEOpc(Opc);
224 }
225 
229  // For now, perform erase, followed by insert.
230  erasingInstr(MI);
231  createdInstr(MI);
232 }
234 
236  setMF(MF);
237  for (auto &MBB : MF) {
238  if (MBB.empty())
239  continue;
240  for (MachineInstr &MI : MBB) {
241  if (!shouldCSE(MI.getOpcode()))
242  continue;
243  LLVM_DEBUG(dbgs() << "CSEInfo::Add MI: " << MI);
244  insertInstr(&MI);
245  }
246  }
247 }
248 
250  print();
251  CSEMap.clear();
252  InstrMapping.clear();
253  UniqueInstrAllocator.Reset();
254  TemporaryInsts.clear();
255  CSEOpt.reset();
256  MRI = nullptr;
257  MF = nullptr;
258 #ifndef NDEBUG
259  OpcodeHitTable.clear();
260 #endif
261 }
262 
263 #ifndef NDEBUG
264 static const char *stringify(const MachineInstr *MI, std::string &S) {
265  raw_string_ostream OS(S);
266  OS << *MI;
267  return OS.str().c_str();
268 }
269 #endif
270 
272 #ifndef NDEBUG
273  std::string S1, S2;
275  // For each instruction in map from MI -> UMI,
276  // Profile(MI) and make sure UMI is found for that profile.
277  for (auto &It : InstrMapping) {
278  FoldingSetNodeID TmpID;
279  GISelInstProfileBuilder(TmpID, *MRI).addNodeID(It.first);
280  void *InsertPos;
281  UniqueMachineInstr *FoundNode =
282  CSEMap.FindNodeOrInsertPos(TmpID, InsertPos);
283  if (FoundNode != It.second)
284  return createStringError(std::errc::not_supported,
285  "CSEMap mismatch, InstrMapping has MIs without "
286  "corresponding Nodes in CSEMap:\n%s",
287  stringify(It.second->MI, S1));
288  }
289 
290  // For every node in the CSEMap, make sure that the InstrMapping
291  // points to it.
292  for (const UniqueMachineInstr &UMI : CSEMap) {
293  if (!InstrMapping.count(UMI.MI))
294  return createStringError(std::errc::not_supported,
295  "Node in CSE without InstrMapping:\n%s",
296  stringify(UMI.MI, S1));
297 
298  if (InstrMapping[UMI.MI] != &UMI)
299  return createStringError(std::make_error_code(std::errc::not_supported),
300  "Mismatch in CSE mapping:\n%s\n%s",
301  stringify(InstrMapping[UMI.MI]->MI, S1),
302  stringify(UMI.MI, S2));
303  }
304 #endif
305  return Error::success();
306 }
307 
309  LLVM_DEBUG(for (auto &It
310  : OpcodeHitTable) {
311  dbgs() << "CSEInfo::CSE Hit for Opc " << It.first << " : " << It.second
312  << "\n";
313  };);
314 }
315 /// -----------------------------------------
316 // ---- Profiling methods for FoldingSetNode --- //
319  addNodeIDMBB(MI->getParent());
320  addNodeIDOpcode(MI->getOpcode());
321  for (auto &Op : MI->operands())
323  addNodeIDFlag(MI->getFlags());
324  return *this;
325 }
326 
329  ID.AddInteger(Opc);
330  return *this;
331 }
332 
335  uint64_t Val = Ty.getUniqueRAWLLTData();
336  ID.AddInteger(Val);
337  return *this;
338 }
339 
342  ID.AddPointer(RC);
343  return *this;
344 }
345 
348  ID.AddPointer(RB);
349  return *this;
350 }
351 
354  ID.AddInteger(Imm);
355  return *this;
356 }
357 
360  ID.AddInteger(Reg);
361  return *this;
362 }
363 
367  return *this;
368 }
369 
372  ID.AddPointer(MBB);
373  return *this;
374 }
375 
378  if (Flag)
379  ID.AddInteger(Flag);
380  return *this;
381 }
382 
385  LLT Ty = MRI.getType(Reg);
386  if (Ty.isValid())
387  addNodeIDRegType(Ty);
388 
389  if (const RegClassOrRegBank &RCOrRB = MRI.getRegClassOrRegBank(Reg)) {
390  if (const auto *RB = RCOrRB.dyn_cast<const RegisterBank *>())
391  addNodeIDRegType(RB);
392  else if (const auto *RC = RCOrRB.dyn_cast<const TargetRegisterClass *>())
393  addNodeIDRegType(RC);
394  }
395  return *this;
396 }
397 
399  const MachineOperand &MO) const {
400  if (MO.isReg()) {
401  Register Reg = MO.getReg();
402  if (!MO.isDef())
404 
405  // Profile the register properties.
406  addNodeIDReg(Reg);
407  assert(!MO.isImplicit() && "Unhandled case");
408  } else if (MO.isImm())
409  ID.AddInteger(MO.getImm());
410  else if (MO.isCImm())
411  ID.AddPointer(MO.getCImm());
412  else if (MO.isFPImm())
413  ID.AddPointer(MO.getFPImm());
414  else if (MO.isPredicate())
415  ID.AddInteger(MO.getPredicate());
416  else
417  llvm_unreachable("Unhandled operand type");
418  // Handle other types
419  return *this;
420 }
421 
422 GISelCSEInfo &
423 GISelCSEAnalysisWrapper::get(std::unique_ptr<CSEConfigBase> CSEOpt,
424  bool Recompute) {
425  if (!AlreadyComputed || Recompute) {
426  Info.releaseMemory();
427  Info.setCSEConfig(std::move(CSEOpt));
428  Info.analyze(*MF);
429  AlreadyComputed = true;
430  }
431  return Info;
432 }
434  AU.setPreservesAll();
436 }
437 
439  releaseMemory();
440  Wrapper.setMF(MF);
441  return false;
442 }
llvm::GISelCSEAnalysisWrapperPass::releaseMemory
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
Definition: CSEInfo.h:234
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
llvm::GISelCSEInfo::handleRecordedInst
void handleRecordedInst(MachineInstr *MI)
Use this callback to inform CSE about a newly fully created instruction.
Definition: CSEInfo.cpp:184
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::GISelCSEInfo::~GISelCSEInfo
virtual ~GISelCSEInfo()
Definition: CSEInfo.cpp:91
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MachineOperand::CreateReg
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
Definition: MachineOperand.h:791
llvm::GISelCSEAnalysisWrapperPass
The actual analysis pass wrapper.
Definition: CSEInfo.h:220
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void Reset()
Deallocate all but the current slab and reset the current pointer to the beginning of it,...
Definition: Allocator.h:125
llvm::GISelCSEInfo::handleRemoveInst
void handleRemoveInst(MachineInstr *MI)
Remove this inst from the CSE map.
Definition: CSEInfo.cpp:206
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A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:625
DEBUG_TYPE
#define DEBUG_TYPE
Definition: CSEInfo.cpp:16
llvm::GISelCSEInfo
The CSE Analysis object.
Definition: CSEInfo.h:69
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const GISelInstProfileBuilder & addNodeIDMBB(const MachineBasicBlock *MBB) const
Definition: CSEInfo.cpp:371
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static ErrorSuccess success()
Create a success value.
Definition: Error.h:331
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Definition: MachineFunctionPass.h:30
Error.h
llvm::GISelInstProfileBuilder::addNodeIDMachineOperand
const GISelInstProfileBuilder & addNodeIDMachineOperand(const MachineOperand &MO) const
Definition: CSEInfo.cpp:398
llvm::GISelCSEAnalysisWrapper::setMF
void setMF(MachineFunction &MFunc)
Definition: CSEInfo.h:214
llvm::GISelInstProfileBuilder::addNodeID
const GISelInstProfileBuilder & addNodeID(const MachineInstr *MI) const
Definition: CSEInfo.cpp:318
llvm::MachineOperand::isCImm
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
Definition: MachineOperand.h:325
llvm::GISelCSEInfo::changedInstr
void changedInstr(MachineInstr &MI) override
This instruction was mutated in some way.
Definition: CSEInfo.cpp:233
llvm::GISelInstProfileBuilder::addNodeIDRegType
const GISelInstProfileBuilder & addNodeIDRegType(const LLT Ty) const
Definition: CSEInfo.cpp:334
llvm::GISelCSEInfo::shouldCSE
bool shouldCSE(unsigned Opc) const
Definition: CSEInfo.cpp:221
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bool isValid() const
Definition: LowLevelTypeImpl.h:117
llvm::DenseMapBase::count
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Return 1 if the specified key is in the map, 0 otherwise.
Definition: DenseMap.h:145
llvm::GISelCSEAnalysisWrapper::get
GISelCSEInfo & get(std::unique_ptr< CSEConfigBase > CSEOpt, bool ReCompute=false)
Takes a CSEConfigBase object that defines what opcodes get CSEd.
Definition: CSEInfo.cpp:423
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Definition: CSEInfo.h:29
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void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
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Definition: Debug.cpp:163
CSEInfo.h
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const GISelInstProfileBuilder & addNodeIDReg(Register Reg) const
Definition: CSEInfo.cpp:384
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Definition: SeparateConstOffsetFromGEP.cpp:496
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Definition: PassRegistry.cpp:31
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Definition: RegisterBank.h:28
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runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition: CSEInfo.cpp:438
llvm::GISelCSEInfo::recordNewInstruction
void recordNewInstruction(MachineInstr *MI)
Records a newly created inst in a list and lazily insert it to the CSEMap.
Definition: CSEInfo.cpp:177
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Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
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Definition: TargetRegisterInfo.h:46
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Definition: CSEInfo.cpp:226
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Definition: StackSlotColoring.cpp:142
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Definition: MachineOperand.h:49
llvm::GISelCSEInfo::analyze
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Definition: CSEInfo.cpp:235
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Definition: MCInstrDesc.h:146
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const GISelInstProfileBuilder & addNodeIDRegNum(Register Reg) const
Definition: CSEInfo.cpp:359
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const GISelInstProfileBuilder & addNodeIDImmediate(int64_t Imm) const
Definition: CSEInfo.cpp:353
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
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Definition: CSEInfo.cpp:227
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Definition: MachineBasicBlock.h:95
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Definition: PassSupport.h:58
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------— CSEConfigFull -------— ///
Definition: CSEInfo.cpp:37
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Definition: DenseMap.h:111
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Definition: MachineOperand.h:321
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Definition: MachineOperand.h:542
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Definition: MachineInstr.h:64
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Definition: CSEInfo.cpp:20
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Definition: MachineOperand.h:547
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Definition: MachineOperand.h:588
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Definition: LowLevelTypeImpl.h:374
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Register getReg() const
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Definition: MachineOperand.h:360
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Return the register bank or register class of Reg.
Definition: MachineRegisterInfo.h:668
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Definition: MachineFunction.h:230
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Definition: CSEInfo.h:144
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Definition: FoldingSet.h:313
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Definition: MIRSampleProfile.cpp:62
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Definition: CodeGen.h:52
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Definition: GISelWorkList.h:82
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Definition: CSEInfo.cpp:214
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Definition: PointerUnion.h:119
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Definition: Register.h:19
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Definition: GISelWorkList.h:75
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Definition: CSEInfo.cpp:377
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Create formatted StringError object.
Definition: Error.h:1231
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Definition: CSEInfo.h:167
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Definition: Error.h:157
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Definition: CSEInfo.cpp:249
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Definition: CSEInfo.cpp:69
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Error verify()
Definition: CSEInfo.cpp:271
llvm::MachineOperand::isImm
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Definition: MachineOperand.h:323
llvm::GISelCSEInfo::setMF
void setMF(MachineFunction &MF)
-----— GISelCSEInfo ----------—//
Definition: CSEInfo.cpp:86
llvm::MachineOperand::isFPImm
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
Definition: MachineOperand.h:327
llvm::MachineOperand::isPredicate
bool isPredicate() const
Definition: MachineOperand.h:353
llvm::MachineRegisterInfo::getType
LLT getType(Register Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register.
Definition: MachineRegisterInfo.h:732
llvm::GISelCSEInfo::print
void print()
Definition: CSEInfo.cpp:308
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:240
llvm::GISelWorkList::clear
void clear()
Definition: GISelWorkList.h:94
llvm::GISelCSEAnalysisWrapperPass::ID
static char ID
Definition: CSEInfo.h:224
true
basic Basic Alias true
Definition: BasicAliasAnalysis.cpp:1815
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std::string & str()
Flushes the stream contents to the target string and returns the string's reference.
Definition: raw_ostream.h:643
InitializePasses.h
llvm::GISelCSEInfo::changingInstr
void changingInstr(MachineInstr &MI) override
This instruction is about to be mutated in some way.
Definition: CSEInfo.cpp:228
llvm::GISelWorkList::empty
bool empty() const
Definition: GISelWorkList.h:39
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unsigned ID
Definition: TargetTransformInfo.h:37
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Definition: LowLevelTypeImpl.h:40