Here is a list of all file members with links to the files they belong to:
- e -
- E : BuiltinGCs.cpp
- E_FILENOTFOUND : MSVCSetupApi.h
- E_NOTFOUND : MSVCSetupApi.h
- EA_BASES_16BIT : X86DisassemblerDecoder.h
- EA_BASES_32BIT : X86DisassemblerDecoder.h
- EA_BASES_64BIT : X86DisassemblerDecoder.h
- EarlyByValArgsCopy : NVPTXTargetMachine.cpp
- EarlyCSEDebugHash : EarlyCSE.cpp
- EarlyCSELegacyPass : EarlyCSE.cpp
- EarlyCSEMssaOptCap : EarlyCSE.cpp
- EarlyExitHeuristic : DFAJumpThreading.cpp
- earlyExpandDIVFIX() : LegalizeIntegerTypes.cpp
- EarlyInlineAll : AMDGPUTargetMachine.cpp
- EarlyLiveIntervals : TargetPassConfig.cpp
- earlyUseOperand() : SystemZISelLowering.cpp
- EAT : regcomp.c
- eat12Bytes() : AMDGPUDisassembler.cpp
- eat16Bytes() : AMDGPUDisassembler.cpp
- eatBytes() : AMDGPUDisassembler.cpp
- EatsUnboundedNumberOfValues() : CommandLine.cpp
- EATTWO : regcomp.c
- EAXRetpolineName : X86IndirectThunks.cpp
- ECase : OffloadYAML.cpp, WasmYAML.cpp, XCOFFYAML.cpp, WasmYAML.cpp, ELFYAML.cpp, Wasm.cpp, COFFYAML.cpp, ELFYAML.cpp
- ECASE : XCOFFObjectFile.cpp
- ECase : ELFYAML.cpp
- eComplete : MSVCSetupApi.h
- ECXRetpolineName : X86IndirectThunks.cpp
- EdgeDescriptor : ControlFlowUtils.cpp
- EdgeKinds : ELF_riscv.cpp
- EDIRetpolineName : X86IndirectThunks.cpp
- EDXRetpolineName : X86IndirectThunks.cpp
- EFLAGSClobber : X86FlagsCopyLowering.cpp
- EHAllowlist : WebAssemblyLowerEmscriptenEHSjLj.cpp
- ELEMENT_W : R600MCCodeEmitter.cpp
- ELEMENT_X : R600MCCodeEmitter.cpp
- ELEMENT_Y : R600MCCodeEmitter.cpp
- ELEMENT_Z : R600MCCodeEmitter.cpp
- elementPairIsContiguous() : SIISelLowering.cpp
- elementTypeIsLegal() : AMDGPULegalizerInfo.cpp
- ELF_RELOC : ELF.h, X86AsmBackend.cpp, SystemZMCAsmBackend.cpp, SparcAsmBackend.cpp, RISCVAsmBackend.cpp, PPCAsmBackend.cpp, AVRAsmBackend.cpp, LoongArchAsmBackend.cpp, ELF.cpp, ELFYAML.cpp, AMDGPUAsmBackend.cpp, ARMAsmBackend.cpp, AArch64AsmBackend.cpp
- eliminateAvailableExternally() : ElimAvailExtern.cpp
- eliminateBlockCases() : SimplifyCFG.cpp
- eliminateConstraints() : ConstraintElimination.cpp
- eliminateDeadCode() : IRMutator.cpp, DCE.cpp
- eliminateDeadSwitchCases() : SimplifyCFG.cpp
- EliminateDuplicatePHINodesNaiveImpl() : Local.cpp
- EliminateDuplicatePHINodesSetBasedImpl() : Local.cpp
- EliminateFramePointer : HexagonFrameLowering.cpp
- eliminateLoadsAcrossLoops() : LoopLoadElimination.cpp
- eliminateSwiftError() : CoroFrame.cpp
- eliminateSwiftErrorAlloca() : CoroFrame.cpp
- eliminateSwiftErrorArgument() : CoroFrame.cpp
- Elimination : MachineCSE.cpp, TailRecursionElimination.cpp
- Ellip : TargetLibraryInfo.cpp
- eLocal : MSVCSetupApi.h
- else : PassBuilderBindings.cpp
- EltsFromConsecutiveLoads() : X86ISelLowering.cpp
- EmbedBitcode : LTOBackend.cpp
- EmbeddedData : MipsTargetObjectFile.cpp
- EMIT : regcomp.c
- EMIT_ARCHEXTKIND_ENUM : AArch64TargetParser.h
- EMIT_ARCHITECTURES : AArch64TargetParser.h
- EMIT_COMMENT : SystemZAsmPrinter.cpp
- EMIT_CPU_ALIAS : AArch64TargetParser.h
- EMIT_CPU_INFO : AArch64TargetParser.h
- EMIT_EXTENSION_DEPENDENCIES : AArch64TargetParser.h
- EMIT_EXTENSIONS : AArch64TargetParser.h
- EMIT_FMV_INFO : AArch64TargetParser.cpp
- EmitAbbrev() : MCDwarf.cpp
- EmitAbsDifference() : MCWin64EH.cpp
- emitAbsValue() : MCDwarf.cpp
- emitAccSpillRestoreInfo() : PPCRegisterInfo.cpp
- EmitADD() : SparcAsmPrinter.cpp
- EmitAddTreeOfValues() : Reassociate.cpp
- emitAlignedDPRCS2Restores() : ARMFrameLowering.cpp
- emitAlignedDPRCS2Spills() : ARMFrameLowering.cpp
- emitAligningInstructions() : ARMFrameLowering.cpp
- EmitAndPrintRemark() : SelectOptimize.cpp
- emitANDrm() : VEAsmPrinter.cpp
- emitAssignName() : SPIRVEmitIntrinsics.cpp
- emitAtomicRMWLegalRemark() : SIISelLowering.cpp
- emitAuthenticatedPointer() : AArch64AsmPrinter.cpp
- EmitAVX512Test() : X86ISelLowering.cpp
- emitBasicBlockLoopComments() : AsmPrinter.cpp
- emitBinary() : VEAsmPrinter.cpp
- EmitBinary() : SparcAsmPrinter.cpp
- emitBinaryFloatFnCallHelper() : BuildLibCalls.cpp
- EmitBranchProbability : PGOInstrumentation.cpp
- emitBSIC() : VEAsmPrinter.cpp
- emitBuildPairF64Pseudo() : RISCVISelLowering.cpp
- EmitCall() : SparcAsmPrinter.cpp
- emitCalleeSavedRestores() : AArch64FrameLowering.cpp
- emitCallSPUpdate() : Thumb1FrameLowering.cpp
- EmitCamlGlobal() : OcamlGCPrinter.cpp
- EmitCfiOffset() : XCoreFrameLowering.cpp
- emitclausemarkers : R600EmitClauseMarkers.cpp
- emitCmp() : SystemZISelLowering.cpp
- EmitCmp() : X86ISelLowering.cpp
- EmitCMP() : MSP430ISelLowering.cpp
- emitComments() : AsmPrinter.cpp, Disassembler.cpp
- emitComparison() : AArch64ISelLowering.cpp
- emitConditionalComparison() : AArch64ISelLowering.cpp
- emitConjunction() : AArch64ISelLowering.cpp
- emitConjunctionRec() : AArch64ISelLowering.cpp
- emitConstant() : X86MCCodeEmitter.cpp
- emitConstantPool() : ConstantPools.cpp
- emitConstantRange() : BitcodeWriter.cpp
- emitConstantSizeRepmov() : X86SelectionDAGInfo.cpp
- emitConstantSizeRepstos() : X86SelectionDAGInfo.cpp
- emitDarwinBCHeaderAndTrailer() : BitcodeWriter.cpp
- emitDbgAssign() : DebugInfo.cpp
- emitDebugLabelComment() : AsmPrinter.cpp
- emitDebugSectionImpl() : DWARFEmitter.cpp
- emitDebugValueComment() : AsmPrinter.cpp
- EmitDefCfaOffset() : XCoreFrameLowering.cpp
- EmitDefCfaRegister() : XCoreFrameLowering.cpp
- emitDefineCFAWithFP() : AArch64FrameLowering.cpp
- emitDirectiveRelocJalr() : MipsAsmPrinter.cpp
- EmitDot : X86LoadValueInjectionLoadHardening.cpp
- EmitDotOnly : X86LoadValueInjectionLoadHardening.cpp
- EmitDotVerify : X86LoadValueInjectionLoadHardening.cpp
- emitDWARF() : ELFEmitter.cpp
- emitDwarfSetLineAddr() : MCObjectStreamer.cpp
- emitDXILVersionTupleMD() : DXILTranslateMetadata.cpp
- emitEncodingByte() : MCDwarf.cpp
- emitEntryMD() : DXILTranslateMetadata.cpp
- emitErrorAndReplaceIntrinsicResults() : LoongArchISelLowering.cpp
- emitErrorMsg() : X86PreTileConfig.cpp
- emitExternalFile() : YAMLRemarkSerializer.cpp
- emitFakeUse() : AsmPrinter.cpp
- emitFDESymbol() : MCDwarf.cpp
- emitFileEntry() : DWARFEmitter.cpp
- emitFrameOffsetAdj() : AArch64InstrInfo.cpp
- emitFROUND() : RISCVISelLowering.cpp
- EmitFuncLineTableOffsetsOption : DwarfCompileUnit.cpp
- EmitGenDwarfAbbrev() : MCDwarf.cpp
- EmitGenDwarfAranges() : MCDwarf.cpp
- EmitGenDwarfInfo() : MCDwarf.cpp
- emitGenDwarfRanges() : MCDwarf.cpp
- emitGetSwiftErrorValue() : CoroFrame.cpp
- emitGlobalAliasInline() : AsmPrinter.cpp
- emitGlobalConstantArray() : AsmPrinter.cpp
- emitGlobalConstantDataSequential() : AsmPrinter.cpp
- emitGlobalConstantFP() : AsmPrinter.cpp
- emitGlobalConstantImpl() : AsmPrinter.cpp
- emitGlobalConstantLargeInt() : AsmPrinter.cpp
- emitGlobalConstantStruct() : AsmPrinter.cpp
- emitGlobalConstantVector() : AsmPrinter.cpp
- emitGPDisp() : MipsBranchExpansion.cpp
- EmitHiLo() : SparcAsmPrinter.cpp
- emitHiLo() : VEAsmPrinter.cpp
- emitIncrement() : SystemZFrameLowering.cpp
- emitIndirectDst() : SIISelLowering.cpp
- emitIndirectSrc() : SIISelLowering.cpp
- emitInlineAsm() : Mips16HardFloat.cpp
- EmitInlineAsmStr() : AsmPrinterInlineAsm.cpp
- emitIntrinsicErrorMessage() : LoongArchISelLowering.cpp
- emitIntrinsicWithCC() : SystemZISelLowering.cpp
- emitIntrinsicWithCCAndChain() : SystemZISelLowering.cpp
- emitIntrinsicWithChainErrorMessage() : LoongArchISelLowering.cpp
- EmitJalrReloc : MipsAsmParser.cpp, MipsABIInfo.cpp, MipsAsmPrinter.cpp, MipsFastISel.cpp, MipsISelLowering.cpp
- EmitJtInText : HexagonTargetObjectFile.cpp
- EmitJumpTables : HexagonISelLowering.cpp
- EmitJumpTableSizesSection : AsmPrinter.cpp
- emitKill() : AsmPrinter.cpp
- emitLatency() : Disassembler.cpp
- emitLEASLrri() : VEAsmPrinter.cpp
- emitLEASLzzi() : VEAsmPrinter.cpp
- emitLEAzii() : VEAsmPrinter.cpp
- emitLEAzzi() : VEAsmPrinter.cpp
- emitLibCall() : BuildLibCalls.cpp
- emitLoad() : AArch64LowerHomogeneousPrologEpilog.cpp
- emitLoadFromConstantPool() : LegalizerHelper.cpp
- emitLoadM0FromVGPRLoop() : SIISelLowering.cpp
- emitLoadScalarOpsFromVGPRLoop() : SIInstrInfo.cpp
- emitLockedStackOp() : X86ISelLowering.cpp
- emitLocList() : DwarfDebug.cpp
- emitLoclistsTableHeader() : DwarfDebug.cpp
- EmitLookupTables : HexagonTargetTransformInfo.cpp
- EmitLoweredCascadedSelect() : RISCVISelLowering.cpp
- emitLpad() : RISCVIndirectBranchTracking.cpp
- EmitLutInText : HexagonTargetObjectFile.cpp
- emitMacroHeader() : DwarfDebug.cpp
- emitMagic() : YAMLRemarkSerializer.cpp
- EmitMaskedTruncSStore() : X86ISelLowering.cpp
- emitMemMemImm() : SystemZSelectionDAGInfo.cpp
- emitMemMemReg() : SystemZSelectionDAGInfo.cpp
- emitNonHSAIntrinsicError() : SIISelLowering.cpp
- emitNonLazyStubs() : X86AsmPrinter.cpp
- emitNonLazySymbolPointer() : ARMAsmPrinter.cpp, X86AsmPrinter.cpp
- emitNop() : X86MCInstLower.cpp
- EmitNop() : SystemZAsmPrinter.cpp
- emitNullTerminatedSymbolName() : CodeViewDebug.cpp
- emitOneV5FileEntry() : MCDwarf.cpp
- emitOperand() : SPIRVMCCodeEmitter.cpp
- EmitOR() : SparcAsmPrinter.cpp
- emitOrXorXorTree() : X86ISelLowering.cpp
- emitPACCFI() : AArch64PointerAuth.cpp
- emitPACSymOffsetIntoX16() : AArch64PointerAuth.cpp
- EmitPALMetadataCommon() : AMDGPUAsmPrinter.cpp
- EmitPersonality() : MCDwarf.cpp
- emitPostLd() : ARMISelLowering.cpp
- emitPostSt() : ARMISelLowering.cpp
- emitPPA1Flags() : SystemZAsmPrinter.cpp
- emitPPA1Name() : SystemZAsmPrinter.cpp
- emitPrologueEpilogueSPUpdate() : Thumb1FrameLowering.cpp
- emitPseudoCTPOP() : LoongArchISelLowering.cpp
- emitPseudoXVINSGR2VR() : LoongArchISelLowering.cpp
- emitPubSection() : DWARFEmitter.cpp
- emitQuietFCMP() : RISCVISelLowering.cpp
- emitRangeList() : DwarfDebug.cpp
- EmitRDPC() : SparcAsmPrinter.cpp
- emitReadCounterWidePseudo() : RISCVISelLowering.cpp
- emitReciprocalU64() : AMDGPULegalizerInfo.cpp
- emitRegPlusImmediate() : ARMFrameLowering.cpp
- emitRegUpdate() : ARCFrameLowering.cpp
- emitRemark() : LowerAllowCheckPass.cpp, HWAddressSanitizer.cpp
- emitRemovedIntrinsicError() : SIISelLowering.cpp
- emitRepmovs() : X86SelectionDAGInfo.cpp
- emitRepmovsB() : X86SelectionDAGInfo.cpp
- emitRepstos() : X86SelectionDAGInfo.cpp
- emitRepstosB() : X86SelectionDAGInfo.cpp
- emitReservedArgRegCallError() : SparcISelLowering.cpp
- emitResourceMetadata() : DXILTranslateMetadata.cpp
- emitRnglistsTableHeader() : DwarfDebug.cpp
- emitRsqIEEE1ULP() : AMDGPUCodeGenPrepare.cpp
- EmitRuntimeFunction() : MCWin64EH.cpp
- emitSCSEpilogue() : RISCVFrameLowering.cpp
- emitSCSPrologue() : RISCVFrameLowering.cpp
- EmitSDKVersionSuffix() : MCAsmStreamer.cpp
- emitSelectPseudo() : CSKYISelLowering.cpp, RISCVISelLowering.cpp
- emitSetAndGetSwiftErrorValueAround() : CoroFrame.cpp
- emitSETCC() : SystemZISelLowering.cpp
- EmitSETHI() : SparcAsmPrinter.cpp
- emitSetSwiftErrorValue() : CoroFrame.cpp
- emitShaderModelVersionMD() : DXILTranslateMetadata.cpp
- emitShadowCallStackEpilogue() : AArch64FrameLowering.cpp
- emitShadowCallStackPrologue() : AArch64FrameLowering.cpp
- EmitSHL() : SparcAsmPrinter.cpp
- emitSIC() : VEAsmPrinter.cpp
- emitSignedInt64() : BitcodeWriter.cpp
- EmitSkeleton() : TableGenBackendSkeleton.cpp
- emitSMEStateSaveRestore() : AArch64ISelLowering.cpp
- emitSplitF64Pseudo() : RISCVISelLowering.cpp
- emitSPUpdate() : ARMFrameLowering.cpp
- emitStackProbeInline() : RISCVFrameLowering.cpp
- emitStore() : AArch64LowerHomogeneousPrologEpilog.cpp
- emitStrictFPComparison() : AArch64ISelLowering.cpp
- emitStrTab() : YAMLRemarkSerializer.cpp
- EmitSymbolRefWithOfs() : MCWin64EH.cpp
- EmitTailCallStoreFPAndRetAddr() : PPCISelLowering.cpp
- EmitTailCallStoreRetAddr() : X86ISelLoweringCall.cpp
- emitTargetCall() : OMPIRBuilder.cpp
- emitTargetOutlinedFunction() : OMPIRBuilder.cpp
- emitTargetTaskProxyFunction() : OMPIRBuilder.cpp
- emitTaskDependencies() : OMPIRBuilder.cpp
- Emitter : DXContainerGlobals.cpp
- EmitTest() : X86ISelLowering.cpp
- EmitTestAnnotations : MachinePipeliner.cpp
- emitThumb1LoadConstPool() : ThumbRegisterInfo.cpp
- emitThumb2LoadConstPool() : ThumbRegisterInfo.cpp
- emitThumbRegPlusImmInReg() : ThumbRegisterInfo.cpp
- emitTopLevelLibraryNode() : DXILTranslateMetadata.cpp
- emitTPIDR2Save() : SMEABIPass.cpp
- emitTransformedIndex() : LoopVectorize.cpp
- EmitTruncSStore() : X86ISelLowering.cpp
- emitTypedInstrOperands() : SPIRVMCCodeEmitter.cpp
- emitUnaryFloatFnCallHelper() : BuildLibCalls.cpp
- EmitUnrolledSetTag() : AArch64SelectionDAGInfo.cpp
- emitUnsupportedError() : SIRegisterInfo.cpp
- emitUntypedInstrOperands() : SPIRVMCCodeEmitter.cpp
- EmitUnwindCode() : MCWin64EH.cpp
- EmitUnwindInfo() : MCWin64EH.cpp
- emitValidatorVersionMD() : DXILTranslateMetadata.cpp
- emitVecCondBranchPseudo() : LoongArchISelLowering.cpp
- EmitVectorComparison() : AArch64ISelLowering.cpp
- emitVersion() : YAMLRemarkSerializer.cpp
- emitVFROUND_NOEXCEPT_MASK() : RISCVISelLowering.cpp
- emitVGSaveRestore() : AArch64FrameLowering.cpp
- emitWAccSpillRestoreInfo() : PPCRegisterInfo.cpp
- emitWideAPInt() : BitcodeWriter.cpp
- emitX86Nops() : X86MCInstLower.cpp
- emitX86ScalarSelect() : AutoUpgrade.cpp
- emitX86Select() : AutoUpgrade.cpp
- emitXBegin() : X86ISelLowering.cpp
- emplace() : DylibReader.cpp
- EmptyHash : TypeHashing.cpp
- EmptyOption : CommandLine.cpp
- EmptyVI : LLParser.cpp
- EmulateOldLDV : InstrRefBasedImpl.cpp
- Enable : DwarfDebug.cpp
- ENABLE_ADAPTIVE_THREAD_CACHE : rpmalloc.c
- ENABLE_ASSERTS : rpmalloc.c
- ENABLE_GLOBAL_CACHE : rpmalloc.c
- ENABLE_INSTR_PREDICATE_VERIFIER : XCoreMCTargetDesc.cpp, X86MCTargetDesc.cpp, WebAssemblyMCTargetDesc.cpp, VEMCTargetDesc.cpp, SystemZMCTargetDesc.cpp, SPIRVMCTargetDesc.cpp, SparcMCTargetDesc.cpp, RISCVMCTargetDesc.cpp, PPCMCTargetDesc.cpp, NVPTXMCTargetDesc.cpp, MSP430MCTargetDesc.cpp, MipsMCTargetDesc.cpp, ARCMCTargetDesc.cpp, M68kMCTargetDesc.cpp, AArch64MCTargetDesc.cpp, AMDGPUMCTargetDesc.cpp, R600MCTargetDesc.cpp, ARMMCTargetDesc.cpp, AVRMCTargetDesc.cpp, BPFMCTargetDesc.cpp, CSKYMCTargetDesc.cpp, HexagonMCTargetDesc.cpp, LanaiMCTargetDesc.cpp, LoongArchMCTargetDesc.cpp
- ENABLE_OVERRIDE : rpmalloc.c
- ENABLE_PRELOAD : rpmalloc.c
- ENABLE_STATISTICS : rpmalloc.c
- ENABLE_THREAD_CACHE : rpmalloc.c
- ENABLE_UNLIMITED_CACHE : rpmalloc.c
- ENABLE_VALIDATE_ARGS : rpmalloc.c
- ENABLE_VALIDATION : FormatVariadic.cpp
- EnableAArch64CopyPropagation : AArch64TargetMachine.cpp
- EnableAArch64ELFLocalDynamicTLSGeneration : AArch64ISelLowering.cpp, AArch64MCInstLower.cpp
- EnableAASchedMI : ScheduleDAGInstrs.cpp
- EnableAATrace : AliasAnalysis.cpp
- EnableACCForwarding : HexagonInstrInfo.cpp
- EnableAddiHeuristic : PPCMachineScheduler.cpp
- EnableAddPhiTranslation : PHITransAddr.cpp
- EnableAddressRebalancing : HexagonISelDAGToDAG.cpp
- EnableAdvSIMDScalar : AArch64TargetMachine.cpp
- enableAllocFrameElim() : HexagonFrameLowering.cpp
- EnableALUForwarding : HexagonInstrInfo.cpp
- EnableAMDGPUAliasAnalysis : AMDGPUTargetMachine.cpp
- EnableAMDGPUAttributor : AMDGPUTargetMachine.cpp
- EnableAMDGPUFunctionCallsOpt : R600TargetMachine.cpp
- EnableAndCmpSinking : CodeGenPrepare.cpp
- EnableAntiDepBreaking : PostRASchedulerList.cpp
- EnableARCOptimizations : ObjCARCAnalysisUtils.cpp
- EnableARM3Addr : ARMBaseInstrInfo.cpp
- EnableARMLoadStoreOpt : ARMTargetMachine.cpp
- EnableAtomicTidy : AArch64TargetMachine.cpp, ARMTargetMachine.cpp
- enableBackedgeSafepoints() : PlaceSafepoints.cpp
- EnableBasePointer : M68kRegisterInfo.cpp, PPCRegisterInfo.cpp, X86RegisterInfo.cpp
- EnableBitSimplify : HexagonTargetMachine.cpp
- EnableBlockPlacementStats : TargetPassConfig.cpp
- EnableBranchCoalescing : PPCTargetMachine.cpp
- EnableBranchHint : PPCISelDAGToDAG.cpp, X86MCInstLower.cpp
- EnableBranchPrediction : HexagonInstrInfo.cpp
- EnableBranchTargets : AArch64TargetMachine.cpp
- EnableBSBSched : HexagonSubtarget.cpp
- enableCallSafepoints() : PlaceSafepoints.cpp
- EnableCallSiteSpecific : Attributor.cpp
- EnableCCMP : AArch64TargetMachine.cpp
- EnableCExtOpt : HexagonTargetMachine.cpp
- EnableChainCommoning : PPCLoopInstrFormPrep.cpp
- EnableCheckBankConflict : HexagonSubtarget.cpp
- EnableCHR : PassBuilderPipelines.cpp
- EnableCmovConverter : X86CmovConversion.cpp
- EnableCodeSinking : InstructionCombining.cpp
- EnableColdCCStressTest : GlobalOpt.cpp
- EnableColdSection : HotColdSplitting.cpp
- EnableCollectLOH : AArch64TargetMachine.cpp
- EnableCombineMGatherIntrinsics : AArch64ISelLowering.cpp
- EnableCommGEP : HexagonTargetMachine.cpp
- EnableCompressedInst : CSKYAsmParser.cpp
- EnableCompressJumpTables : AArch64TargetMachine.cpp
- EnableCondBrTuning : AArch64TargetMachine.cpp
- EnableCondOpt : AArch64TargetMachine.cpp
- EnableCondStoresVectorization : LoopVectorize.cpp
- EnableConsecutiveMemOpOpt : AArch64PostLegalizerCombiner.cpp
- EnableConstpoolPromotion : ARMISelLowering.cpp
- EnableConstraintElimination : PassBuilderPipelines.cpp
- EnableCopyHoist : HexagonTargetMachine.cpp
- EnableCopyProp : FixupStatepointCallerSaved.cpp
- EnableCountDownLoop : LoopPredication.cpp
- EnableCSEInIRTranslator : IRTranslator.cpp
- EnableCSEInLegalizer : Legalizer.cpp
- EnableCyclicPath : MachineScheduler.cpp
- Enabled : Statistic.cpp
- EnableDCEInRA : AMDGPUTargetMachine.cpp
- EnableDeadRegisterElimination : AArch64TargetMachine.cpp
- EnableDeferredSpilling : RegAllocGreedy.cpp
- EnableDevelopmentFeatures : MLRegAllocEvictAdvisor.cpp
- EnableDFAJumpThreading : PassBuilderPipelines.cpp
- EnableDiscriminateMemops : X86DiscriminateMemOps.cpp
- EnableDotCurSched : HexagonSubtarget.cpp
- EnableDPPCombine : AMDGPUTargetMachine.cpp
- EnableEagerlyInvalidateAnalyses : PassBuilderPipelines.cpp
- EnableEarlyExitVectorization : LoopVectorize.cpp
- EnableEarlyIf : HexagonTargetMachine.cpp
- EnableEarlyIfConversion : AArch64TargetMachine.cpp, AMDGPUTargetMachine.cpp
- EnableEarlyIfConvert : AArch64Subtarget.cpp
- enableEntrySafepoints() : PlaceSafepoints.cpp
- EnableEpilogueVectorization : LoopVectorize.cpp
- EnableExpandCondsets : HexagonTargetMachine.cpp
- EnableExpensiveChecks : LegalizeTypes.cpp
- EnableExtraTOCRegDeps : PPCTargetMachine.cpp
- EnableExtToTBL : AArch64ISelLowering.cpp
- EnableFalkorHWPFFix : AArch64TargetMachine.cpp
- EnableFalkorHWPFUnrollFix : AArch64TargetTransformInfo.cpp
- EnableFastISelAbort : SelectionDAGISel.cpp
- EnableFastISelFallbackReport : SelectionDAGISel.cpp
- EnableFastISelOption : TargetPassConfig.cpp
- EnableFastMath : HexagonISelLowering.cpp
- EnableFiniteLoopControl : ScalarEvolution.cpp
- EnableFixedwidthAutovecInStreamingMode : AArch64TargetTransformInfo.cpp
- EnableFMARegPressureReduction : PPCInstrInfo.cpp
- EnableForwardingConflictDetection : LoopAccessAnalysis.cpp
- EnableGenAllInsnClass : HexagonVLIWPacketizer.cpp
- EnableGenExtract : HexagonTargetMachine.cpp
- EnableGenInsert : HexagonTargetMachine.cpp
- EnableGenMemAbs : HexagonTargetMachine.cpp
- EnableGenMux : HexagonTargetMachine.cpp
- EnableGenPred : HexagonTargetMachine.cpp
- EnableGEPOffsetSplit : CodeGenPrepare.cpp
- EnableGEPOpt : AArch64TargetMachine.cpp, PPCTargetMachine.cpp
- EnableGISelBigEndian : ARMCallLowering.cpp
- EnableGISelLoadStoreOptPostLegal : AArch64TargetMachine.cpp
- EnableGISelLoadStoreOptPreLegal : AArch64TargetMachine.cpp
- EnableGlobalAnalyses : PassBuilderPipelines.cpp
- EnableGlobalCopies : RegisterCoalescer.cpp
- EnableGlobalISelAbort : TargetPassConfig.cpp
- EnableGlobalISelAtO : AArch64TargetMachine.cpp
- EnableGlobalISelOption : TargetPassConfig.cpp
- EnableGlobalMerge : GlobalMerge.cpp, RISCVTargetMachine.cpp, PPCTargetMachine.cpp, AArch64TargetMachine.cpp, ARMTargetMachine.cpp
- EnableGlobalMergeFunc : TargetPassConfig.cpp
- EnableGlobalMergeOnConst : GlobalMerge.cpp
- EnableGlobalMergeOnExternal : GlobalMerge.cpp
- EnableGPRToVecSpills : PPCRegisterInfo.cpp
- EnableGVNHoist : PassBuilderPipelines.cpp
- EnableGVNSink : PassBuilderPipelines.cpp
- EnableHeapToStack : Attributor.cpp
- EnableHexagonBP : HexagonEarlyIfConv.cpp
- EnableHexagonCabac : HexagonMCTargetDesc.cpp
- EnableHexSDNodeSched : HexagonISelLowering.cpp
- EnableHipStdPar : AMDGPUTargetMachine.cpp
- EnableHistogramVectorization : LoopVectorizationLegality.cpp
- EnableHomogeneousPrologEpilog : AArch64FrameLowering.cpp, AArch64TargetMachine.cpp
- EnableHotColdSplit : PassBuilderPipelines.cpp
- EnableHVX : HexagonMCTargetDesc.cpp
- EnableHvxIeeeFp : HexagonMCTargetDesc.cpp
- EnableICMP_EQToICMP_ST : CodeGenPrepare.cpp
- EnableIfConversion : LoopVectorizationLegality.cpp
- EnableImageIntrinsicOptimizer : AMDGPUTargetMachine.cpp
- EnableImplicitNullChecks : TargetPassConfig.cpp
- EnableImportMetadata : FunctionImport.cpp
- EnableIndVarRegisterHeur : LoopVectorize.cpp
- EnableInitialCFGCleanup : HexagonTargetMachine.cpp
- EnableInitializesImprovement : DeadStoreElimination.cpp
- EnableInlineDeferral : InlineAdvisor.cpp
- EnableInsertDelayAlu : AMDGPUTargetMachine.cpp
- EnableInstSimplify : HexagonTargetMachine.cpp
- EnableIntArgExtCheck : SystemZISelLowering.cpp
- EnableInterleave : MVELaneInterleavingPass.cpp
- EnableInterleavedMemAccesses : LoopVectorize.cpp
- EnableIPRA : TargetPassConfig.cpp
- EnableIROutliner : PassBuilderPipelines.cpp
- EnableIVTruncation : LoopPredication.cpp
- EnableJoining : RegisterCoalescer.cpp
- EnableJoinSplits : RegisterCoalescer.cpp
- EnableJumpTableToSwitch : PassBuilderPipelines.cpp
- EnableLDV : LiveDebugVariables.cpp
- EnableLibCallSimplify : AMDGPUTargetMachine.cpp
- EnableLinkOnceODRIROutlining : IROutliner.cpp
- EnableLinkOnceODROutlining : MachineOutliner.cpp
- EnableLoadStoreOpt : AArch64TargetMachine.cpp
- EnableLoadStoreRuntimeInterleave : LoopVectorize.cpp
- EnableLoadStoreVectorizer : AMDGPUTargetMachine.cpp
- EnableLocalReassignment : RegAllocEvictionAdvisor.cpp
- EnableLoongArchDeadRegisterElimination : LoongArchTargetMachine.cpp
- EnableLoopDataPrefetch : AArch64TargetMachine.cpp, LoongArchTargetMachine.cpp, RISCVTargetMachine.cpp
- EnableLoopDistribute : LoopDistribute.cpp
- EnableLoopFlatten : PassBuilderPipelines.cpp
- EnableLoopHeaderDuplication : PassBuilderPipelines.cpp
- EnableLoopInterchange : PassBuilderPipelines.cpp
- EnableLoopIVHeuristic : SplitKit.cpp
- EnableLoopPrefetch : AMDGPUTargetMachine.cpp, HexagonTargetMachine.cpp
- EnableLoopResched : HexagonTargetMachine.cpp
- EnableLowerKernelArguments : AMDGPUTargetMachine.cpp
- EnableLowerModuleLDS : AMDGPUTargetMachine.cpp
- EnableLSRCostOpt : AArch64TargetTransformInfo.cpp
- EnableM0Merge : SIFixSGPRCopies.cpp
- EnableMachineCombiner : RISCVTargetMachine.cpp
- EnableMachineCombinerPass : PPCTargetMachine.cpp, SystemZTargetMachine.cpp, X86TargetMachine.cpp
- EnableMachineFunctionSplitter : TargetPassConfig.cpp
- EnableMachineOutliner : TargetPassConfig.cpp
- EnableMachinePipeliner : AArch64TargetMachine.cpp, PPCSubtarget.cpp, RISCVTargetMachine.cpp
- EnableMachineSched : MachineScheduler.cpp
- EnableMacroFusion : MacroFusion.cpp
- EnableMaskedGatherScatters : ARMTargetTransformInfo.cpp, MVEGatherScatterLowering.cpp
- EnableMaskedInterleavedMemAccesses : LoopVectorize.cpp
- EnableMaskedLoadStores : ARMTargetTransformInfo.cpp
- EnableMatrix : PassBuilderPipelines.cpp
- EnableMCR : AArch64TargetMachine.cpp
- EnableMemAccessVersioning : LoopAccessAnalysis.cpp
- EnableMemCpyDAGOpt : SelectionDAG.cpp
- EnableMemCpyOptWithoutLibcalls : MemCpyOptimizer.cpp
- EnableMemLocFragFill : AssignmentTrackingAnalysis.cpp
- EnableMemOpCluster : MachineScheduler.cpp
- EnableMemProfIndirectCallSupport : ModuleSummaryAnalysis.cpp
- EnableMemtransferTPLoop : ARMSelectionDAGInfo.cpp
- EnableMergeCompatibleInvokes : SimplifyCFG.cpp
- EnableMergeFunctions : PassBuilderPipelines.cpp
- EnableMISchedLoadStoreClustering : RISCVTargetMachine.cpp
- EnableModuleInliner : PassBuilderPipelines.cpp
- EnableMulMulFix : MipsTargetMachine.cpp
- enableMultiVectorSpillFill() : AArch64FrameLowering.cpp
- EnableNewLegality : AMDGPULegalizerInfo.cpp
- EnableNoAliasConversion : InlineFunction.cpp
- EnableNonnullArgPropagation : FunctionAttrs.cpp
- EnableNonTrivialUnswitch : SimpleLoopUnswitch.cpp
- EnableNoTrapAfterNoreturn : CodeGenTargetMachineImpl.cpp
- EnableOCLManglingMismatchWA : AMDGPULibFunc.cpp
- EnableOptimizeLogicalImm : AArch64ISelLowering.cpp
- EnableOrderFileInstrumentation : PassBuilderPipelines.cpp
- EnableOrLikeSelectOpt : AArch64TargetTransformInfo.cpp
- EnableParallelRegionMerging : OpenMPOpt.cpp
- EnablePartialOverwriteTracking : DeadStoreElimination.cpp
- EnablePartialStoreMerging : DeadStoreElimination.cpp
- EnablePatchPointLiveness : StackMapLivenessAnalysis.cpp
- EnablePCRelLinkerOpt : PPCPreEmitPeephole.cpp
- EnablePEVectorSpills : PPCFrameLowering.cpp
- EnablePGOInlineDeferral : PassBuilderPipelines.cpp
- EnablePGSO : MachineSizeOpts.cpp
- EnablePhiElim : LoopStrengthReduce.cpp
- EnablePhiOfOps : NewGVN.cpp
- EnablePostLoadHardening : X86SpeculativeLoadHardening.cpp
- EnablePostMISchedLoadStoreClustering : RISCVTargetMachine.cpp
- EnablePostPGOLoopRotation : PassBuilderPipelines.cpp
- EnablePostRAMachineSched : MachineScheduler.cpp
- EnablePostRAScheduler : PostRASchedulerList.cpp
- EnablePostSCCAdvisorPrinting : Inliner.cpp
- EnablePostShrinkWrapOpt : ShrinkWrap.cpp
- EnablePowerSched : GCNSubtarget.cpp
- EnablePPCColdCC : PPCTargetTransformInfo.cpp
- EnablePPCGenScalarMASSEntries : PPCTargetMachine.cpp
- EnablePreallocateSGPRSpillVGPRs : SIPreAllocateWWMRegs.cpp
- EnablePrecomputePhysRegs : LiveIntervals.cpp
- EnablePredicatedCalls : HexagonSubtarget.cpp
- EnablePrefetch : PPCTargetMachine.cpp
- EnablePreLink : AMDGPULibCalls.cpp
- EnablePreRAOptimizations : AMDGPUTargetMachine.cpp
- EnablePromoteAnyextLoad : X86ISelDAGToDAG.cpp
- EnablePromoteConstant : AArch64TargetMachine.cpp
- EnablePromoteKernelArguments : AMDGPUTargetMachine.cpp
- EnableR600IfConvert : R600TargetMachine.cpp
- EnableR600StructurizeCFG : R600TargetMachine.cpp
- EnableRDFOpt : HexagonTargetMachine.cpp
- EnableRecPhiAnalysis : BasicAliasAnalysis.cpp
- EnableReduceLoadOpStoreWidth : DAGCombiner.cpp
- EnableRedundantCopyElimination : AArch64TargetMachine.cpp, RISCVTargetMachine.cpp
- EnableReduxCost : TargetTransformInfo.cpp
- EnableRedZone : AArch64FrameLowering.cpp
- EnableRegPressure : MachineScheduler.cpp
- EnableRegReassign : AMDGPUTargetMachine.cpp
- EnableRemarksSection : RemarkStreamer.cpp
- EnableRenaming : AArch64LoadStoreOptimizer.cpp
- EnableRescheduling : TwoAddressInstructionPass.cpp
- EnableRewritePartialRegUses : AMDGPUTargetMachine.cpp
- EnableRISCVCopyPropagation : RISCVTargetMachine.cpp
- EnableRISCVDeadRegisterElimination : RISCVTargetMachine.cpp
- EnableRsqrtOpt : NVPTXISelDAGToDAG.cpp
- EnableSampledInstr : PassBuilderPipelines.cpp
- EnableSaveRestoreLong : HexagonFrameLowering.cpp
- EnableScalableAutovecInStreamingMode : AArch64TargetTransformInfo.cpp
- EnableScalarIRPasses : AMDGPUTargetMachine.cpp
- EnableSchedItins : TargetSchedule.cpp
- EnableSchedModel : TargetSchedule.cpp
- EnableScopedNoAlias : ScopedNoAliasAA.cpp
- EnableSDWAPeephole : AMDGPUTargetMachine.cpp
- EnableSelectionDAGSP : StackProtector.cpp
- EnableSelectOpt : AArch64TargetMachine.cpp
- EnableSeparateStorageAnalysis : BasicAliasAnalysis.cpp
- EnableSetWavePriority : AMDGPUTargetMachine.cpp
- EnableSExtElimination : PPCMIPeephole.cpp
- EnableShrinkLoadReplaceStoreWithStore : DAGCombiner.cpp
- EnableShrinkWrapOpt : ShrinkWrap.cpp
- EnableShrinkWrapping : HexagonFrameLowering.cpp
- EnableSIModeRegisterPass : AMDGPUTargetMachine.cpp
- EnableSinkFold : AArch64TargetMachine.cpp, RISCVTargetMachine.cpp
- EnableSMEPeepholeOpt : AArch64TargetMachine.cpp
- EnableSpeculativeExecutionSideEffectSuppression : X86SpeculativeExecutionSideEffectSuppression.cpp
- EnableSpeculativeLoadHardening : X86SpeculativeLoadHardening.cpp
- EnableSpillageCopyElimination : MachineCopyPropagation.cpp
- EnableSpillSGPRToVGPR : SIRegisterInfo.cpp
- EnableSpillVGPRToAGPR : SIFrameLowering.cpp
- EnableSSPCanaryBitInTB : PPCAsmPrinter.cpp
- EnableStackOVFSanitizer : HexagonFrameLowering.cpp
- EnableStaticAnalysis : HotColdSplitting.cpp
- EnableStats : Statistic.cpp
- EnableStoreMerging : DAGCombiner.cpp
- EnableStoreRefinement : NewGVN.cpp
- EnableStPairSuppress : AArch64TargetMachine.cpp
- EnableSubRegLiveness : MachineRegisterInfo.cpp
- EnableSubregLivenessTracking : AArch64Subtarget.cpp
- EnableSVEGISel : AArch64ISelLowering.cpp, AArch64CallLowering.cpp
- EnableSVEIntrinsicOpts : AArch64TargetMachine.cpp
- EnableSwLowerLDS : AMDGPUTargetMachine.cpp
- EnableSWP : MachinePipeliner.cpp
- EnableSWPOptSize : MachinePipeliner.cpp
- EnableSymbolicExecution : LoopDeletion.cpp
- EnableSymbolizerMarkupEnv : Signals.cpp
- EnableTailPredication : ARMTargetTransformInfo.cpp, MVETailPredication.cpp
- EnableTBAA : TypeBasedAliasAnalysis.cpp
- EnableTCLatencySched : HexagonSubtarget.cpp
- EnableTermFolding : LoopSimplifyCFG.cpp
- EnableTfrCleanup : HexagonTargetMachine.cpp
- EnableTileRAPass : X86TargetMachine.cpp
- EnableTimingClassLatency : HexagonInstrInfo.cpp
- EnableTLSOpt : PPCISelDAGToDAG.cpp
- EnableTrapOptimization : PPCMIPeephole.cpp
- EnableTrapUnreachable : CodeGenTargetMachineImpl.cpp
- EnableTypePromotionMerge : CodeGenPrepare.cpp
- EnableUnrollAndJam : PassBuilderPipelines.cpp
- EnableUnsafeFPShrink : SimplifyLibCalls.cpp
- EnableUnsafeGlobalsModRefAliasResults : GlobalsModRef.cpp
- EnableUnswitchCostMultiplier : SimpleLoopUnswitch.cpp
- EnableUpdateFormForNonConstInc : PPCLoopInstrFormPrep.cpp
- EnableV68FloatAutoHVX : HexagonTargetTransformInfo.cpp
- EnableVectorCombine : HexagonTargetMachine.cpp
- EnableVectorFCopySignExtendRound : DAGCombiner.cpp
- EnableVectorPrint : HexagonTargetMachine.cpp
- EnableVerboseRemarks : OpenMPOpt.cpp
- EnableVExtractOpt : HexagonTargetMachine.cpp
- EnableVGPRIndexMode : GCNSubtarget.cpp
- EnableVLOptimizer : RISCVTargetMachine.cpp
- EnableVOPD : AMDGPUTargetMachine.cpp
- EnableVScaleImmediates : LoopStrengthReduce.cpp
- EnableZExtElimination : PPCMIPeephole.cpp
- encodeBase64StringEntry() : COFF.cpp
- encodeBitmaskPerm() : AMDGPUAsmParser.cpp
- encodeCnt() : AMDGPUAsmParser.cpp
- encodeComponent() : Discriminator.h
- encodeCounter() : CoverageMappingWriter.cpp
- encodeCrel() : ELFObjectWriter.cpp, ELFObject.cpp
- encodeFltRoundsTable() : SIModeRegisterDefaults.cpp
- encodeFltRoundsTableSame() : SIModeRegisterDefaults.cpp
- encodeFltRoundsToHWTable() : SIModeRegisterDefaults.cpp
- encodeFltRoundsToHWTableSame() : SIModeRegisterDefaults.cpp
- encodeName() : TypeSanitizer.cpp
- encodePHINodeData() : IROutliner.cpp
- encodeRegisterForDwarf() : NVPTXRegisterInfo.cpp
- encodeSEHRegNum() : MCStreamer.cpp
- encodeSignedNumber() : MCCodeView.cpp
- encodeSpecial() : LineTable.cpp
- encodeThumbBLOffset() : ARMMCCodeEmitter.cpp
- encodeUTF8() : YAMLParser.cpp
- encodeVecTypeHint() : SPIRVAsmPrinter.cpp
- encodingBits() : Discriminator.h
- EncodingExpansionRegionBit : CoverageMappingReader.cpp
- EncodingInfo : YAMLParser.cpp
- ENCODINGS : X86DisassemblerDecoderCommon.h
- End : ELF_riscv.cpp
- END_REGISTER_VP_INTRINSIC : IntrinsicInst.cpp
- END_REGISTER_VP_SDNODE : SelectionDAG.cpp
- END_TWO_BYTE_PACK : SelectionDAGNodes.h, BasicBlock.h
- Endian : SampleProfWriter.cpp
- EndianWriter : SPIRVMCCodeEmitter.cpp
- EndOfList : FunctionInfo.cpp
- EndOfNumber() : FileUtilities.cpp
- EndSequence : LineTable.cpp
- enlarge() : regcomp.c
- eNone : MSVCSetupApi.h
- eNoRebootRequired : MSVCSetupApi.h
- ensureEntrySetPrio() : GCNHazardRecognizer.cpp
- ensurePromotedGV() : AArch64PromoteConstant.cpp
- EnsureStackAlignment() : PPCISelLowering.cpp
- ensureValueAvailableInSuccessor() : SimplifyCFG.cpp
- EnsureWholeVectorRegisterMoveValidVTYPE : RISCVInsertVSETVLI.cpp
- ENTRY : X86DisassemblerDecoder.h, X86EncodingOptimization.cpp, X86DisassemblerDecoder.h, X86Disassembler.cpp, MCSectionMachO.cpp
- ENUM : ClauseT.h
- ENUM_CASE : MachOYAML.h
- ENUM_ENTRY : X86DisassemblerDecoderCommon.h, TypeDumpVisitor.cpp
- ENUM_TO_CSTR : DWARFDebugFrame.cpp
- EnumName : MCSectionMachO.cpp
- Epilog : AArch64LowerHomogeneousPrologEpilog.cpp
- EpilogHeaderWeights : LoopUnrollRuntime.cpp
- EpilogTail : AArch64LowerHomogeneousPrologEpilog.cpp
- EpilogueVectorizationForceVF : LoopVectorize.cpp
- EpilogueVectorizationMinVF : LoopVectorize.cpp
- EQ : regexec.c
- equalsLoadStoreHelper() : NewGVN.cpp
- equivalentAddressValues() : InstCombineLoadStoreAlloca.cpp
- EqValue : CommandLine.cpp
- erase() : NVVMReflect.cpp
- eraseDeadBBsAndChildren() : WasmEHPrepare.cpp, WebAssemblyLateEHPrepare.cpp
- eraseDebugIntrinsicsWithNonLocalRefs() : CodeExtractor.cpp
- eraseFromModule() : HipStdPar.cpp
- eraseGPOpnd() : MipsOptimizePICCall.cpp
- EraseGPOpnd : MipsOptimizePICCall.cpp
- eraseInstruction() : LICM.cpp
- eraseLifetimeMarkersOnInputs() : CodeExtractor.cpp
- eraseTerminatorAndDCECond() : SimplifyCFG.cpp
- eRegistered : MSVCSetupApi.h
- error : SymbolRecordMapping.cpp, TypeRecordMapping.cpp, BitcodeReader.cpp, MetadataLoader.cpp, BitstreamReader.cpp, LazyRandomTypeCollection.cpp
- ErrorCallbackType : MIParser.cpp
- ErrorFromHResult() : DIASession.cpp
- ErrorHandler : ErrorHandling.cpp
- ErrorHandlerUserData : ErrorHandling.cpp
- ErrorMissingParenthesis : HexagonAsmParser.cpp
- ErrorNoncontigiousRegister : HexagonAsmParser.cpp
- errorUnsupported() : X86ISelLoweringCall.cpp
- ESSL : SPIRVEmitNonSemanticDI.cpp
- estimateFunctionSizeInBytes() : LoongArchFrameLowering.cpp
- EstimateFunctionSizeInBytes() : CSKYFrameLowering.cpp
- estimateFunctionSizeInBytes() : RISCVFrameLowering.cpp
- EstimateFunctionSizeInBytes() : ARMFrameLowering.cpp
- estimateRSStackSizeLimit() : AArch64FrameLowering.cpp, ARMFrameLowering.cpp, CSKYFrameLowering.cpp
- EstimateRuntime() : BranchFolding.cpp
- EvalAAMD : AliasAnalysisEvaluator.cpp
- evalBinaryInstruction() : SIFoldOperands.cpp
- EvaluateConstantChrecAtConstant() : ScalarEvolution.cpp
- EvaluateCRExpr() : PPCAsmParser.cpp
- EvaluateExpression() : ScalarEvolution.cpp
- evaluateICmpRelation() : ConstantFold.cpp
- evaluateInDifferentElementOrder() : InstCombineVectorOps.cpp
- evaluateIsSpace() : NVPTXTargetTransformInfo.cpp
- evaluateMemOpAddrForAddrMode3() : ARMMCTargetDesc.cpp
- evaluateMemOpAddrForAddrMode5() : ARMMCTargetDesc.cpp
- evaluateMemOpAddrForAddrMode5FP16() : ARMMCTargetDesc.cpp
- evaluateMemOpAddrForAddrMode_i12() : ARMMCTargetDesc.cpp
- evaluateMemOpAddrForAddrModeT1_s() : ARMMCTargetDesc.cpp
- evaluateMemOpAddrForAddrModeT2_i8s4() : ARMMCTargetDesc.cpp
- evaluateMemOpAddrForAddrModeT2_pc() : ARMMCTargetDesc.cpp
- EvaluateStaticConstructor() : GlobalOpt.cpp
- evaluateSymbolicAdd() : MCExpr.cpp
- EvitableClobber : X86FlagsCopyLowering.cpp
- EVLTransformOverride : ExpandVectorPredication.cpp
- evolution : ScalarEvolution.cpp
- exactClass() : ValueTracking.cpp
- exceptions : DwarfEHPrepare.cpp, WasmEHPrepare.cpp
- ExclusivelyNull : SafepointIRVerifier.cpp
- ExclusivelySomeConstant : SafepointIRVerifier.cpp
- ExecGraphViewer() : GraphWriter.cpp
- Execute() : Program.cpp
- executeFAddInst() : Execution.cpp
- executeFCMP_BOOL() : Execution.cpp
- executeFCMP_OEQ() : Execution.cpp
- executeFCMP_OGE() : Execution.cpp
- executeFCMP_OGT() : Execution.cpp
- executeFCMP_OLE() : Execution.cpp
- executeFCMP_OLT() : Execution.cpp
- executeFCMP_ONE() : Execution.cpp
- executeFCMP_ORD() : Execution.cpp
- executeFCMP_UEQ() : Execution.cpp
- executeFCMP_UGE() : Execution.cpp
- executeFCMP_UGT() : Execution.cpp
- executeFCMP_ULE() : Execution.cpp
- executeFCMP_ULT() : Execution.cpp
- executeFCMP_UNE() : Execution.cpp
- executeFCMP_UNO() : Execution.cpp
- executeFDivInst() : Execution.cpp
- executeFMulInst() : Execution.cpp
- executeFNegInst() : Execution.cpp
- executeFRemInst() : Execution.cpp
- executeFSubInst() : Execution.cpp
- executeICMP_EQ() : Execution.cpp
- executeICMP_NE() : Execution.cpp
- executeICMP_SGE() : Execution.cpp
- executeICMP_SGT() : Execution.cpp
- executeICMP_SLE() : Execution.cpp
- executeICMP_SLT() : Execution.cpp
- executeICMP_UGE() : Execution.cpp
- executeICMP_UGT() : Execution.cpp
- executeICMP_ULE() : Execution.cpp
- executeICMP_ULT() : Execution.cpp
- executeSelectInst() : Execution.cpp
- execution : SpeculativeExecution.cpp
- executionMode : jitprofiling.c
- ExeGeneric : ARMBaseInstrInfo.cpp
- ExeNEON : ARMBaseInstrInfo.cpp
- ExeVFP : ARMBaseInstrInfo.cpp
- ExhaustiveSearch : RegAllocGreedy.cpp
- ExitBlockBias : MachineBlockPlacement.cpp
- exits : UnifyLoopExits.cpp
- expand() : GlobPattern.cpp
- EXPAND : AVRExpandPseudoInsts.cpp
- Expand2AddrKreg() : X86InstrInfo.cpp
- Expand2AddrUndef() : M68kInstrInfo.cpp, X86InstrInfo.cpp
- Expand64BitShift() : ARMISelLowering.cpp
- expandAbs() : DXILIntrinsicExpansion.cpp
- expandAdjDynAlloc() : SystemZISelDAGToDAG.cpp
- expandAnyOrAllIntrinsic() : DXILIntrinsicExpansion.cpp
- expandAtan2Intrinsic() : DXILIntrinsicExpansion.cpp
- ExpandBasePaths() : CommandLine.cpp
- expandBinOp() : InstructionSimplify.cpp
- expandBitCastF128ToI128() : SystemZISelLowering.cpp
- expandBitCastI128ToF128() : SystemZISelLowering.cpp
- expandBounds() : LoopUtils.cpp
- ExpandBVWithShuffles() : LegalizeDAG.cpp
- expandClampIntrinsic() : DXILIntrinsicExpansion.cpp
- expandCommutativeBinOp() : InstructionSimplify.cpp
- ExpandConstantExprs : BitcodeReader.cpp
- expandCrossIntrinsic() : DXILIntrinsicExpansion.cpp
- ExpandCryptoAEK() : AArch64AsmParser.cpp
- expandDegreesIntrinsic() : DXILIntrinsicExpansion.cpp
- expandDisp() : SystemZISelDAGToDAG.cpp
- expandDivFix() : SelectionDAGBuilder.cpp
- ExpandDivRemBits : ExpandLargeDivRem.cpp
- expandExp() : SelectionDAGBuilder.cpp
- expandExp2() : SelectionDAGBuilder.cpp
- expandExpIntrinsic() : DXILIntrinsicExpansion.cpp
- expandf64Toi32() : ARMISelLowering.cpp
- expandFloatDotIntrinsic() : DXILIntrinsicExpansion.cpp
- expandFP_TO_UINT_SSE() : X86ISelLowering.cpp
- ExpandFpConvertBits : ExpandLargeFpConvert.cpp
- expandFPToI() : ExpandLargeFpConvert.cpp
- expandFromPrimitiveShadowRecursive() : DataFlowSanitizer.cpp
- ExpandHorizontalBinOp() : X86ISelLowering.cpp
- expandIndex() : SystemZISelDAGToDAG.cpp
- expandIntegerDotIntrinsic() : DXILIntrinsicExpansion.cpp
- expandIntrinsic() : DXILIntrinsicExpansion.cpp
- expandIntrinsicWChainHelper() : X86ISelLowering.cpp
- expandIToFP() : ExpandLargeFpConvert.cpp
- expandLengthIntrinsic() : DXILIntrinsicExpansion.cpp
- expandLerpIntrinsic() : DXILIntrinsicExpansion.cpp
- ExpandLimit : MLxExpansionPass.cpp
- expandLoadStackGuard() : X86InstrInfo.cpp
- expandLog() : SelectionDAGBuilder.cpp
- expandLog10() : SelectionDAGBuilder.cpp
- expandLog10Intrinsic() : DXILIntrinsicExpansion.cpp
- expandLog2() : SelectionDAGBuilder.cpp
- expandLogIntrinsic() : DXILIntrinsicExpansion.cpp
- expandMOV32r1() : X86InstrInfo.cpp
- ExpandMOVImmSExti8() : X86InstrInfo.cpp
- expandMOVImmSimple() : AArch64ExpandImm.cpp
- expandMul() : RISCVISelLowering.cpp
- expandNormalizeIntrinsic() : DXILIntrinsicExpansion.cpp
- expandNOVLXLoad() : X86InstrInfo.cpp
- expandNOVLXStore() : X86InstrInfo.cpp
- expandPow() : SelectionDAGBuilder.cpp
- ExpandPowI() : SelectionDAGBuilder.cpp
- expandPowIntrinsic() : DXILIntrinsicExpansion.cpp
- expandPseudoLogM() : VEInstrInfo.cpp
- expandPseudoVFMK() : VEInstrInfo.cpp
- expandRadiansIntrinsic() : DXILIntrinsicExpansion.cpp
- ExpandREAD_REGISTER() : ARMISelLowering.cpp
- expandSGPRCopy() : SIInstrInfo.cpp
- expandSHXDROT() : X86InstrInfo.cpp
- expandSignIntrinsic() : DXILIntrinsicExpansion.cpp
- expandStepIntrinsic() : DXILIntrinsicExpansion.cpp
- expandToSwitch() : JumpTableToSwitch.cpp
- expandUDivOrURem() : CorrelatedValuePropagation.cpp
- expandV4F32ToV2F64() : SystemZISelLowering.cpp
- expandVecReduceAdd() : DXILIntrinsicExpansion.cpp
- expandVPFunnelShift() : TargetLowering.cpp
- expandXorFP() : X86InstrInfo.cpp
- Expansion : DXILIntrinsicExpansion.cpp
- expansionIntrinsics() : DXILIntrinsicExpansion.cpp
- EXPECT_OR_RET : PGOCtxProfReader.cpp
- EXPECT_THAT_ERROR : Error.h
- EXPECT_THAT_EXPECTED : Error.h
- expectAbsExpression() : AMDKernelCodeTUtils.cpp
- EXPECTED : rpmalloc.c
- ExpensiveAsserts : InstructionPrecedenceTracking.cpp
- ExpensiveChecksEnabled : PostDominators.cpp, Dominators.cpp
- ExpensiveRematWeight : RegAllocScore.cpp
- ExperimentalCodeGen : MachinePipeliner.cpp
- ExperimentalPrefInnermostLoopAlignment : X86ISelLowering.cpp
- explicifyGuards() : MakeGuardsExplicit.cpp
- explicitlyBranchesTo() : WebAssemblyCFGStackify.cpp
- ExportSymFlagNames : EnumTables.cpp
- ExportToDot : MemProfContextDisambiguation.cpp
- EXPR_RESOLVE_OR_ERROR : AMDGPUAsmParser.cpp
- ExprStubPairTy : MachineModuleInfoImpls.cpp
- extendLow32IntoHigh32() : AMDGPURegisterBankInfo.cpp
- extendOpFromFlags() : CallLowering.cpp
- extendsConvergenceOutsideLoop() : CodeMetrics.cpp
- ExtendToType() : X86ISelLowering.cpp
- ExtendUsesToFormExtLoad() : DAGCombiner.cpp
- extendZeroIfEqual() : ConstantFPRange.cpp
- ExtensionMap : AArch64AsmParser.cpp
- ExtensionMaxWebSize : RISCVISelLowering.cpp
- Extensions : SPIRVSubtarget.cpp
- externalize() : SplitModule.cpp
- ExternSData : MipsTargetObjectFile.cpp
- ExtFixups : HexagonMCCodeEmitter.cpp
- ExtInstList : SPIRVInstructionSelector.cpp
- extOpcodeToISDExtOpcode() : AMDGPUCallLowering.cpp
- extract : LoopExtractor.cpp
- extract128BitVector() : X86ISelLowering.cpp
- extract256BitVector() : X86ISelLowering.cpp
- ExtractBitFromMaskVector() : X86ISelLowering.cpp
- extractBits() : GISelKnownBits.cpp
- extractBitsForFixup() : SystemZMCAsmBackend.cpp
- extractBooleanFlip() : DAGCombiner.cpp
- extractBranchProbabilities() : ControlHeightReduction.cpp
- extractBranchWeights() : SelectOptimize.cpp
- extractConstantBits() : X86FixupVectorConstants.cpp
- extractConstantWithoutWrapping() : ScalarEvolution.cpp
- ExtractCutoff : HexagonGenExtract.cpp
- extractEquivalentCondition() : InstructionSimplify.cpp
- extractF64Exponent() : AMDGPUISelLowering.cpp, AMDGPULegalizerInfo.cpp
- ExtractImmediate() : LoopStrengthReduce.cpp
- extractInteger() : SROA.cpp
- extractIntPart() : InstCombineAndOrXor.cpp
- extractLoadMMOs() : X86InstrInfo.cpp
- extractLOHI() : MipsSEISelLowering.cpp
- extractMaskedValue() : AtomicExpandPass.cpp
- extractMDNode() : Core.cpp
- extractPhiReg() : AArch64InstrInfo.cpp
- extractPredSuccWeights() : SimplifyCFG.cpp
- extractPtrauthBlendDiscriminators() : AArch64ISelLowering.cpp, AArch64ISelDAGToDAG.cpp
- extractRotateInfo() : RISCVMatInt.cpp
- extractRsrcPtr() : SIInstrInfo.cpp
- extractSections() : MachOReader.cpp
- extractSegmentName() : MachOObject.cpp
- extractShiftForRotate() : DAGCombiner.cpp
- extractStoreMMOs() : X86InstrInfo.cpp
- extractSubModule() : IRPartitionLayer.cpp
- extractSubVector() : WebAssemblyISelLowering.cpp, X86ISelLowering.cpp
- ExtractSymbol() : LoopStrengthReduce.cpp
- extractValues() : AMDGPUCodeGenPrepare.cpp
- extractVector() : SROA.cpp
- ExtraOutliningPenalty : PartialInlining.cpp
- ExtraVectorizerPasses : PassBuilderPipelines.cpp
- ExtTspBlockPlacementMaxBlocks : MachineBlockPlacement.cpp