LLVM 19.0.0git
Macros | Functions
X86ISelLoweringCall.cpp File Reference

This file implements the lowering of LLVM calls to DAG nodes. More...

#include "X86.h"
#include "X86CallingConv.h"
#include "X86FrameLowering.h"
#include "X86ISelLowering.h"
#include "X86InstrBuilder.h"
#include "X86MachineFunctionInfo.h"
#include "X86TargetMachine.h"
#include "X86TargetObjectFile.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/ObjCARCUtil.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/IRBuilder.h"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "x86-isel"
 

Functions

 STATISTIC (NumTailCalls, "Number of tail calls")
 
static void errorUnsupported (SelectionDAG &DAG, const SDLoc &dl, const char *Msg)
 Call this when the user attempts to do something unsupported, like returning a double without SSE2 enabled on x86_64.
 
static bool shouldDisableRetRegFromCSR (CallingConv::ID CC)
 Returns true if a CC can dynamically exclude a register from the list of callee-saved-registers (TargetRegistryInfo::getCalleeSavedRegs()) based on the return registers.
 
static bool shouldDisableArgRegFromCSR (CallingConv::ID CC)
 Returns true if a CC can dynamically exclude a register from the list of callee-saved-registers (TargetRegistryInfo::getCalleeSavedRegs()) based on the parameters.
 
static std::pair< MVT, unsignedhandleMaskRegisterForCallingConv (unsigned NumElts, CallingConv::ID CC, const X86Subtarget &Subtarget)
 
static void getMaxByValAlign (Type *Ty, Align &MaxAlign)
 Helper for getByValTypeAlignment to determine the desired ByVal argument alignment.
 
static bool isBitAligned (Align Alignment, uint64_t SizeInBits)
 
static bool hasStackGuardSlotTLS (const Triple &TargetTriple)
 
static ConstantSegmentOffset (IRBuilderBase &IRB, int Offset, unsigned AddressSpace)
 
static SDValue lowerMasksToReg (const SDValue &ValArg, const EVT &ValLoc, const SDLoc &DL, SelectionDAG &DAG)
 Lowers masks values (v*i1) to the local register values.
 
static void Passv64i1ArgInRegs (const SDLoc &DL, SelectionDAG &DAG, SDValue &Arg, SmallVectorImpl< std::pair< Register, SDValue > > &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, const X86Subtarget &Subtarget)
 Breaks v64i1 value into two registers and adds the new node to the DAG.
 
static SDValue getv64i1Argument (CCValAssign &VA, CCValAssign &NextVA, SDValue &Root, SelectionDAG &DAG, const SDLoc &DL, const X86Subtarget &Subtarget, SDValue *InGlue=nullptr)
 Reads two 32 bit registers and creates a 64 bit mask value.
 
static SDValue lowerRegToMasks (const SDValue &ValArg, const EVT &ValVT, const EVT &ValLoc, const SDLoc &DL, SelectionDAG &DAG)
 The function will lower a register of various sizes (8/16/32/64) to a mask value of the expected size (v8i1/v16i1/v32i1/v64i1)
 
template<typename T >
static bool hasCalleePopSRet (const SmallVectorImpl< T > &Args, const X86Subtarget &Subtarget)
 Determines whether Args, either a set of outgoing arguments to a call, or a set of incoming args of a call, contains an sret pointer that the callee pops.
 
static SDValue CreateCopyOfByValArgument (SDValue Src, SDValue Dst, SDValue Chain, ISD::ArgFlagsTy Flags, SelectionDAG &DAG, const SDLoc &dl)
 Make a copy of an aggregate at address specified by "Src" to address "Dst" with size and alignment information specified by the specific parameter attribute.
 
static bool canGuaranteeTCO (CallingConv::ID CC)
 Return true if the calling convention is one that we can guarantee TCO for.
 
static bool mayTailCallThisCC (CallingConv::ID CC)
 Return true if we might ever do TCO for calls with this calling convention.
 
static bool shouldGuaranteeTCO (CallingConv::ID CC, bool GuaranteedTailCallOpt)
 Return true if the function is being made into a tailcall target by changing its ABI.
 
static ArrayRef< MCPhysRegget64BitArgumentGPRs (CallingConv::ID CallConv, const X86Subtarget &Subtarget)
 
static ArrayRef< MCPhysRegget64BitArgumentXMMs (MachineFunction &MF, CallingConv::ID CallConv, const X86Subtarget &Subtarget)
 
static bool isSortedByValueNo (ArrayRef< CCValAssign > ArgLocs)
 
static SDValue EmitTailCallStoreRetAddr (SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue RetAddrFrIdx, EVT PtrVT, unsigned SlotSize, int FPDiff, const SDLoc &dl)
 Emit a store of the return address if tail call optimization is performed and it is required (FPDiff!=0).
 
static bool MatchingStackOffset (SDValue Arg, unsigned Offset, ISD::ArgFlagsTy Flags, MachineFrameInfo &MFI, const MachineRegisterInfo *MRI, const X86InstrInfo *TII, const CCValAssign &VA)
 Return true if the given stack call argument is already available in the same position (relatively) of the caller's incoming argument stack.
 

Detailed Description

This file implements the lowering of LLVM calls to DAG nodes.

Definition in file X86ISelLoweringCall.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "x86-isel"

Definition at line 30 of file X86ISelLoweringCall.cpp.

Function Documentation

◆ canGuaranteeTCO()

static bool canGuaranteeTCO ( CallingConv::ID  CC)
static

Return true if the calling convention is one that we can guarantee TCO for.

Definition at line 1247 of file X86ISelLoweringCall.cpp.

References CC, llvm::CallingConv::Fast, llvm::CallingConv::GHC, llvm::CallingConv::HiPE, llvm::CallingConv::SwiftTail, llvm::CallingConv::Tail, and llvm::CallingConv::X86_RegCall.

◆ CreateCopyOfByValArgument()

static SDValue CreateCopyOfByValArgument ( SDValue  Src,
SDValue  Dst,
SDValue  Chain,
ISD::ArgFlagsTy  Flags,
SelectionDAG DAG,
const SDLoc dl 
)
static

Make a copy of an aggregate at address specified by "Src" to address "Dst" with size and alignment information specified by the specific parameter attribute.

The copy will be passed as a byval function parameter.

Definition at line 1235 of file X86ISelLoweringCall.cpp.

References llvm::SelectionDAG::getIntPtrConstant(), and llvm::SelectionDAG::getMemcpy().

◆ EmitTailCallStoreRetAddr()

static SDValue EmitTailCallStoreRetAddr ( SelectionDAG DAG,
MachineFunction MF,
SDValue  Chain,
SDValue  RetAddrFrIdx,
EVT  PtrVT,
unsigned  SlotSize,
int  FPDiff,
const SDLoc dl 
)
static

◆ errorUnsupported()

static void errorUnsupported ( SelectionDAG DAG,
const SDLoc dl,
const char Msg 
)
static

Call this when the user attempts to do something unsupported, like returning a double without SSE2 enabled on x86_64.

This is not fatal, unlike report_fatal_error, so calling code should attempt to recover without crashing.

Definition at line 40 of file X86ISelLoweringCall.cpp.

References llvm::LLVMContext::diagnose(), llvm::SelectionDAG::getContext(), llvm::SDLoc::getDebugLoc(), llvm::MachineFunction::getFunction(), and llvm::SelectionDAG::getMachineFunction().

◆ get64BitArgumentGPRs()

static ArrayRef< MCPhysReg > get64BitArgumentGPRs ( CallingConv::ID  CallConv,
const X86Subtarget Subtarget 
)
static

Definition at line 1411 of file X86ISelLoweringCall.cpp.

References assert(), and llvm::X86Subtarget::isCallingConvWin64().

◆ get64BitArgumentXMMs()

static ArrayRef< MCPhysReg > get64BitArgumentXMMs ( MachineFunction MF,
CallingConv::ID  CallConv,
const X86Subtarget Subtarget 
)
static

◆ getMaxByValAlign()

static void getMaxByValAlign ( Type Ty,
Align MaxAlign 
)
static

Helper for getByValTypeAlignment to determine the desired ByVal argument alignment.

Definition at line 234 of file X86ISelLoweringCall.cpp.

References getMaxByValAlign().

◆ getv64i1Argument()

static SDValue getv64i1Argument ( CCValAssign VA,
CCValAssign NextVA,
SDValue Root,
SelectionDAG DAG,
const SDLoc DL,
const X86Subtarget Subtarget,
SDValue InGlue = nullptr 
)
static

Reads two 32 bit registers and creates a 64 bit mask value.

Parameters
VAThe current 32 bit value that need to be assigned.
NextVAThe next 32 bit value that need to be assigned.
RootThe parent DAG node.
[in,out]InGlueRepresents SDvalue in the parent DAG node for glue purposes. In the case the DAG is already using physical register instead of virtual, we should glue our new SDValue to InGlue SDvalue.
Returns
a new SDvalue of size 64bit.

Definition at line 1006 of file X86ISelLoweringCall.cpp.

References llvm::MachineFunction::addLiveIn(), assert(), llvm::ISD::CONCAT_VECTORS, DL, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getCopyFromReg(), llvm::CCValAssign::getLocReg(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValue(), llvm::CCValAssign::getValVT(), llvm::Hi, llvm::CCValAssign::isRegLoc(), and llvm::Lo.

◆ handleMaskRegisterForCallingConv()

static std::pair< MVT, unsigned > handleMaskRegisterForCallingConv ( unsigned  NumElts,
CallingConv::ID  CC,
const X86Subtarget Subtarget 
)
static

◆ hasCalleePopSRet()

template<typename T >
static bool hasCalleePopSRet ( const SmallVectorImpl< T > &  Args,
const X86Subtarget Subtarget 
)
static

Determines whether Args, either a set of outgoing arguments to a call, or a set of incoming args of a call, contains an sret pointer that the callee pops.

Definition at line 1200 of file X86ISelLoweringCall.cpp.

References llvm::X86Subtarget::getTargetTriple(), llvm::Triple::isOSMSVCRT(), and llvm::X86Subtarget::isTargetMCU().

◆ hasStackGuardSlotTLS()

static bool hasStackGuardSlotTLS ( const Triple TargetTriple)
static

◆ isBitAligned()

static bool isBitAligned ( Align  Alignment,
uint64_t  SizeInBits 
)
static

◆ isSortedByValueNo()

static bool isSortedByValueNo ( ArrayRef< CCValAssign ArgLocs)
static

Definition at line 1455 of file X86ISelLoweringCall.cpp.

References A, B, and llvm::is_sorted().

◆ lowerMasksToReg()

static SDValue lowerMasksToReg ( const SDValue ValArg,
const EVT ValLoc,
const SDLoc DL,
SelectionDAG DAG 
)
static

Lowers masks values (v*i1) to the local register values.

Returns
DAG node after lowering to register type

Definition at line 681 of file X86ISelLoweringCall.cpp.

References llvm::ISD::ANY_EXTEND, DL, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), and llvm::SDValue::getValueType().

◆ lowerRegToMasks()

static SDValue lowerRegToMasks ( const SDValue ValArg,
const EVT ValVT,
const EVT ValLoc,
const SDLoc DL,
SelectionDAG DAG 
)
static

The function will lower a register of various sizes (8/16/32/64) to a mask value of the expected size (v8i1/v16i1/v32i1/v64i1)

Returns
a DAG node contains the operand after lowering to mask type.

Definition at line 1057 of file X86ISelLoweringCall.cpp.

References assert(), DL, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getNode(), llvm::EVT::getSimpleVT(), llvm_unreachable, llvm::ISD::SCALAR_TO_VECTOR, llvm::MVT::SimpleTy, and llvm::ISD::TRUNCATE.

◆ MatchingStackOffset()

static bool MatchingStackOffset ( SDValue  Arg,
unsigned  Offset,
ISD::ArgFlagsTy  Flags,
MachineFrameInfo MFI,
const MachineRegisterInfo MRI,
const X86InstrInfo TII,
const CCValAssign VA 
)
static

◆ mayTailCallThisCC()

static bool mayTailCallThisCC ( CallingConv::ID  CC)
static

◆ Passv64i1ArgInRegs()

static void Passv64i1ArgInRegs ( const SDLoc DL,
SelectionDAG DAG,
SDValue Arg,
SmallVectorImpl< std::pair< Register, SDValue > > &  RegsToPass,
CCValAssign VA,
CCValAssign NextVA,
const X86Subtarget Subtarget 
)
static

◆ SegmentOffset()

static Constant * SegmentOffset ( IRBuilderBase IRB,
int  Offset,
unsigned  AddressSpace 
)
static

◆ shouldDisableArgRegFromCSR()

static bool shouldDisableArgRegFromCSR ( CallingConv::ID  CC)
static

Returns true if a CC can dynamically exclude a register from the list of callee-saved-registers (TargetRegistryInfo::getCalleeSavedRegs()) based on the parameters.

Definition at line 64 of file X86ISelLoweringCall.cpp.

References CC, and llvm::CallingConv::X86_RegCall.

◆ shouldDisableRetRegFromCSR()

static bool shouldDisableRetRegFromCSR ( CallingConv::ID  CC)
static

Returns true if a CC can dynamically exclude a register from the list of callee-saved-registers (TargetRegistryInfo::getCalleeSavedRegs()) based on the return registers.

Definition at line 50 of file X86ISelLoweringCall.cpp.

References CC, llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, and llvm::CallingConv::X86_RegCall.

◆ shouldGuaranteeTCO()

static bool shouldGuaranteeTCO ( CallingConv::ID  CC,
bool  GuaranteedTailCallOpt 
)
static

Return true if the function is being made into a tailcall target by changing its ABI.

Definition at line 1276 of file X86ISelLoweringCall.cpp.

References canGuaranteeTCO(), CC, llvm::CallingConv::SwiftTail, and llvm::CallingConv::Tail.

◆ STATISTIC()

STATISTIC ( NumTailCalls  ,
"Number of tail calls"   
)