LLVM 19.0.0git
Macros | Functions | Variables
HexagonSubtarget.cpp File Reference
#include "HexagonSubtarget.h"
#include "Hexagon.h"
#include "HexagonInstrInfo.h"
#include "HexagonRegisterInfo.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/IR/IntrinsicsHexagon.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <algorithm>
#include <cassert>
#include <map>
#include <optional>
#include "HexagonGenSubtargetInfo.inc"
#include "HexagonDepInstrIntrinsics.inc"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "hexagon-subtarget"
 
#define GET_SUBTARGETINFO_CTOR
 
#define GET_SUBTARGETINFO_TARGET_DESC
 
#define GET_SCALAR_INTRINSICS
 
#define GET_HVX_INTRINSICS
 

Functions

static SUnitgetZeroLatency (SUnit *N, SmallVector< SDep, 4 > &Deps)
 If the SUnit has a zero latency edge, return the other SUnit.
 

Variables

static cl::opt< boolEnableBSBSched ("enable-bsb-sched", cl::Hidden, cl::init(true))
 
static cl::opt< boolEnableTCLatencySched ("enable-tc-latency-sched", cl::Hidden, cl::init(false))
 
static cl::opt< boolEnableDotCurSched ("enable-cur-sched", cl::Hidden, cl::init(true), cl::desc("Enable the scheduler to generate .cur"))
 
static cl::opt< boolDisableHexagonMISched ("disable-hexagon-misched", cl::Hidden, cl::desc("Disable Hexagon MI Scheduling"))
 
static cl::opt< boolEnableSubregLiveness ("hexagon-subreg-liveness", cl::Hidden, cl::init(true), cl::desc("Enable subregister liveness tracking for Hexagon"))
 
static cl::opt< boolOverrideLongCalls ("hexagon-long-calls", cl::Hidden, cl::desc("If present, forces/disables the use of long calls"))
 
static cl::opt< boolEnablePredicatedCalls ("hexagon-pred-calls", cl::Hidden, cl::desc("Consider calls to be predicable"))
 
static cl::opt< boolSchedPredsCloser ("sched-preds-closer", cl::Hidden, cl::init(true))
 
static cl::opt< boolSchedRetvalOptimization ("sched-retval-optimization", cl::Hidden, cl::init(true))
 
static cl::opt< boolEnableCheckBankConflict ("hexagon-check-bank-conflict", cl::Hidden, cl::init(true), cl::desc("Enable checking for cache bank conflicts"))
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-subtarget"

Definition at line 38 of file HexagonSubtarget.cpp.

◆ GET_HVX_INTRINSICS

#define GET_HVX_INTRINSICS

◆ GET_SCALAR_INTRINSICS

#define GET_SCALAR_INTRINSICS

◆ GET_SUBTARGETINFO_CTOR

#define GET_SUBTARGETINFO_CTOR

Definition at line 40 of file HexagonSubtarget.cpp.

◆ GET_SUBTARGETINFO_TARGET_DESC

#define GET_SUBTARGETINFO_TARGET_DESC

Definition at line 41 of file HexagonSubtarget.cpp.

Function Documentation

◆ getZeroLatency()

static SUnit * getZeroLatency ( SUnit N,
SmallVector< SDep, 4 > &  Deps 
)
static

If the SUnit has a zero latency edge, return the other SUnit.

Definition at line 623 of file HexagonSubtarget.cpp.

References I.

Variable Documentation

◆ DisableHexagonMISched

cl::opt< bool > DisableHexagonMISched("disable-hexagon-misched", cl::Hidden, cl::desc("Disable Hexagon MI Scheduling")) ( "disable-hexagon-misched"  ,
cl::Hidden  ,
cl::desc("Disable Hexagon MI Scheduling")   
)
static

◆ EnableBSBSched

cl::opt< bool > EnableBSBSched("enable-bsb-sched", cl::Hidden, cl::init(true)) ( "enable-bsb-sched"  ,
cl::Hidden  ,
cl::init(true  
)
static

◆ EnableCheckBankConflict

cl::opt< bool > EnableCheckBankConflict("hexagon-check-bank-conflict", cl::Hidden, cl::init(true), cl::desc("Enable checking for cache bank conflicts")) ( "hexagon-check-bank-conflict"  ,
cl::Hidden  ,
cl::init(true ,
cl::desc("Enable checking for cache bank conflicts")   
)
static

◆ EnableDotCurSched

cl::opt< bool > EnableDotCurSched("enable-cur-sched", cl::Hidden, cl::init(true), cl::desc("Enable the scheduler to generate .cur")) ( "enable-cur-sched"  ,
cl::Hidden  ,
cl::init(true ,
cl::desc("Enable the scheduler to generate .cur")   
)
static

◆ EnablePredicatedCalls

cl::opt< bool > EnablePredicatedCalls("hexagon-pred-calls", cl::Hidden, cl::desc("Consider calls to be predicable")) ( "hexagon-pred-calls"  ,
cl::Hidden  ,
cl::desc("Consider calls to be predicable")   
)
static

◆ EnableSubregLiveness

cl::opt< bool > EnableSubregLiveness("hexagon-subreg-liveness", cl::Hidden, cl::init(true), cl::desc("Enable subregister liveness tracking for Hexagon")) ( "hexagon-subreg-liveness"  ,
cl::Hidden  ,
cl::init(true ,
cl::desc("Enable subregister liveness tracking for Hexagon")   
)
static

◆ EnableTCLatencySched

cl::opt< bool > EnableTCLatencySched("enable-tc-latency-sched", cl::Hidden, cl::init(false)) ( "enable-tc-latency-sched"  ,
cl::Hidden  ,
cl::init(false)   
)
static

◆ OverrideLongCalls

cl::opt< bool > OverrideLongCalls("hexagon-long-calls", cl::Hidden, cl::desc("If present, forces/disables the use of long calls")) ( "hexagon-long-calls"  ,
cl::Hidden  ,
cl::desc("If present, forces/disables the use of long calls")   
)
static

◆ SchedPredsCloser

cl::opt< bool > SchedPredsCloser("sched-preds-closer", cl::Hidden, cl::init(true)) ( "sched-preds-closer"  ,
cl::Hidden  ,
cl::init(true  
)
static

◆ SchedRetvalOptimization

cl::opt< bool > SchedRetvalOptimization("sched-retval-optimization", cl::Hidden, cl::init(true)) ( "sched-retval-optimization"  ,
cl::Hidden  ,
cl::init(true  
)
static