LLVM 19.0.0git
Public Types | Public Member Functions | Public Attributes | List of all members
llvm::SUnit Class Reference

Scheduling unit. This is a node in the scheduling DAG. More...

#include "llvm/CodeGen/ScheduleDAG.h"

Public Types

typedef SmallVectorImpl< SDep >::iterator pred_iterator
 
typedef SmallVectorImpl< SDep >::iterator succ_iterator
 
typedef SmallVectorImpl< SDep >::const_iterator const_pred_iterator
 
typedef SmallVectorImpl< SDep >::const_iterator const_succ_iterator
 

Public Member Functions

 SUnit (SDNode *node, unsigned nodenum)
 Constructs an SUnit for pre-regalloc scheduling to represent an SDNode and any nodes flagged to it.
 
 SUnit (MachineInstr *instr, unsigned nodenum)
 Constructs an SUnit for post-regalloc scheduling to represent a MachineInstr.
 
 SUnit ()
 Constructs a placeholder SUnit.
 
bool isBoundaryNode () const
 Boundary nodes are placeholders for the boundary of the scheduling region.
 
void setNode (SDNode *N)
 Assigns the representative SDNode for this SUnit.
 
SDNodegetNode () const
 Returns the representative SDNode for this SUnit.
 
bool isInstr () const
 Returns true if this SUnit refers to a machine instruction as opposed to an SDNode.
 
void setInstr (MachineInstr *MI)
 Assigns the instruction for the SUnit.
 
MachineInstrgetInstr () const
 Returns the representative MachineInstr for this SUnit.
 
bool addPred (const SDep &D, bool Required=true)
 Adds the specified edge as a pred of the current node if not already.
 
bool addPredBarrier (SUnit *SU)
 Adds a barrier edge to SU by calling addPred(), with latency 0 generally or latency 1 for a store followed by a load.
 
void removePred (const SDep &D)
 Removes the specified edge as a pred of the current node if it exists.
 
unsigned getDepth () const
 Returns the depth of this node, which is the length of the maximum path up to any node which has no predecessors.
 
unsigned getHeight () const
 Returns the height of this node, which is the length of the maximum path down to any node which has no successors.
 
void setDepthToAtLeast (unsigned NewDepth)
 If NewDepth is greater than this node's depth value, sets it to be the new depth value.
 
void setHeightToAtLeast (unsigned NewHeight)
 If NewHeight is greater than this node's height value, set it to be the new height value.
 
void setDepthDirty ()
 Sets a flag in this node to indicate that its stored Depth value will require recomputation the next time getDepth() is called.
 
void setHeightDirty ()
 Sets a flag in this node to indicate that its stored Height value will require recomputation the next time getHeight() is called.
 
bool isPred (const SUnit *N) const
 Tests if node N is a predecessor of this node.
 
bool isSucc (const SUnit *N) const
 Tests if node N is a successor of this node.
 
bool isTopReady () const
 
bool isBottomReady () const
 
void biasCriticalPath ()
 Orders this node's predecessor edges such that the critical path edge occurs first.
 
void dumpAttributes () const
 

Public Attributes

SUnitOrigNode = nullptr
 If not this, the node from which this node was cloned.
 
const MCSchedClassDescSchedClass
 nullptr or resolved SchedClass.
 
SmallVector< SDep, 4 > Preds
 All sunit predecessors.
 
SmallVector< SDep, 4 > Succs
 All sunit successors.
 
unsigned NodeNum = BoundaryID
 Entry # of node in the node vector.
 
unsigned NodeQueueId = 0
 Queue id of node.
 
unsigned NumPreds = 0
 
unsigned NumSuccs = 0
 
unsigned NumPredsLeft = 0
 
unsigned NumSuccsLeft = 0
 
unsigned WeakPredsLeft = 0
 
unsigned WeakSuccsLeft = 0
 
unsigned short NumRegDefsLeft = 0
 
unsigned short Latency = 0
 Node latency.
 
bool isVRegCycle: 1
 May use and def the same vreg.
 
bool isCall: 1
 Is a function call.
 
bool isCallOp: 1
 Is a function call operand.
 
bool isTwoAddress: 1
 Is a two-address instruction.
 
bool isCommutable: 1
 Is a commutable instruction.
 
bool hasPhysRegUses: 1
 Has physreg uses.
 
bool hasPhysRegDefs: 1
 Has physreg defs that are being used.
 
bool hasPhysRegClobbers: 1
 Has any physreg defs, used or not.
 
bool isPending: 1
 True once pending.
 
bool isAvailable: 1
 True once available.
 
bool isScheduled: 1
 True once scheduled.
 
bool isScheduleHigh: 1
 True if preferable to schedule high.
 
bool isScheduleLow: 1
 True if preferable to schedule low.
 
bool isCloned: 1
 True if this node has been cloned.
 
bool isUnbuffered: 1
 Uses an unbuffered resource.
 
bool hasReservedResource: 1
 Uses a reserved resource.
 
Sched::Preference SchedulingPref = Sched::None
 Scheduling preference.
 
unsigned TopReadyCycle = 0
 Cycle relative to start when node is ready.
 
unsigned BotReadyCycle = 0
 Cycle relative to end when node is ready.
 
const TargetRegisterClassCopyDstRC
 Is a special copy node if != nullptr.
 
const TargetRegisterClassCopySrcRC = nullptr
 

Detailed Description

Scheduling unit. This is a node in the scheduling DAG.

Definition at line 242 of file ScheduleDAG.h.

Member Typedef Documentation

◆ const_pred_iterator

Definition at line 261 of file ScheduleDAG.h.

◆ const_succ_iterator

Definition at line 262 of file ScheduleDAG.h.

◆ pred_iterator

Definition at line 259 of file ScheduleDAG.h.

◆ succ_iterator

Definition at line 260 of file ScheduleDAG.h.

Constructor & Destructor Documentation

◆ SUnit() [1/3]

llvm::SUnit::SUnit ( SDNode node,
unsigned  nodenum 
)
inline

Constructs an SUnit for pre-regalloc scheduling to represent an SDNode and any nodes flagged to it.

Definition at line 308 of file ScheduleDAG.h.

◆ SUnit() [2/3]

llvm::SUnit::SUnit ( MachineInstr instr,
unsigned  nodenum 
)
inline

Constructs an SUnit for post-regalloc scheduling to represent a MachineInstr.

Definition at line 319 of file ScheduleDAG.h.

◆ SUnit() [3/3]

llvm::SUnit::SUnit ( )
inline

Constructs a placeholder SUnit.

Definition at line 329 of file ScheduleDAG.h.

Member Function Documentation

◆ addPred()

bool SUnit::addPred ( const SDep D,
bool  Required = true 
)

◆ addPredBarrier()

bool llvm::SUnit::addPredBarrier ( SUnit SU)
inline

Adds a barrier edge to SU by calling addPred(), with latency 0 generally or latency 1 for a store followed by a load.

Definition at line 384 of file ScheduleDAG.h.

References addPred(), llvm::SDep::Barrier, getInstr(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), and llvm::SDep::setLatency().

Referenced by llvm::ScheduleDAGInstrs::buildSchedGraph(), and llvm::ScheduleDAGInstrs::reduceHugeMemNodeMaps().

◆ biasCriticalPath()

void SUnit::biasCriticalPath ( )

Orders this node's predecessor edges such that the critical path edge occurs first.

Definition at line 326 of file ScheduleDAG.cpp.

References llvm::SDep::Data, E, I, MaxDepth, NumPreds, Preds, and std::swap().

Referenced by llvm::ScheduleDAGMI::findRootsAndBiasEdges().

◆ dumpAttributes()

LLVM_DUMP_METHOD void SUnit::dumpAttributes ( ) const

◆ getDepth()

unsigned llvm::SUnit::getDepth ( ) const
inline

◆ getHeight()

unsigned llvm::SUnit::getHeight ( ) const
inline

◆ getInstr()

MachineInstr * llvm::SUnit::getInstr ( ) const
inline

Returns the representative MachineInstr for this SUnit.

This may be used during post-regalloc scheduling.

Definition at line 373 of file ScheduleDAG.h.

References assert().

Referenced by llvm::ScheduleDAGInstrs::addChainDependency(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), addPredBarrier(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::ScheduleDAGInstrs::addVRegUseDeps(), llvm::HexagonSubtarget::HVXMemLatencyMutation::apply(), llvm::HexagonSubtarget::BankConflictMutation::apply(), llvm::biasPhysReg(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::SchedBoundary::bumpNode(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::bumpNode(), llvm::ResourceManager::calculateResMII(), llvm::HexagonPacketizerList::canPromoteToDotCur(), llvm::HexagonPacketizerList::canPromoteToDotNew(), llvm::HexagonPacketizerList::canPromoteToNewValue(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), llvm::ResourceManager::canReserveResources(), llvm::SchedBoundary::checkHazard(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::checkHazard(), llvm::ScheduleDAGMILive::collectVRegUses(), llvm::ScheduleDAGMILive::computeCyclicCriticalPath(), computeLiveOuts(), computeScheduledInsts(), llvm::SMSchedule::computeStart(), llvm::SMSchedule::computeUnpipelineableNodes(), llvm::ScheduleDAGMILive::dump(), llvm::ScheduleDAGInstrs::dump(), llvm::ScheduleDAGInstrs::dumpNode(), llvm::SystemZHazardRecognizer::dumpSU(), llvm::HexagonHazardRecognizer::EmitInstruction(), llvm::GCNHazardRecognizer::EmitInstruction(), llvm::ARMHazardRecognizerFPMLx::EmitInstruction(), llvm::ARMBankConflictHazardRecognizer::EmitInstruction(), llvm::PPCHazardRecognizer970::EmitInstruction(), llvm::SystemZHazardRecognizer::EmitInstruction(), llvm::SMSchedule::finalizeSchedule(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::fuseInstructionPair(), llvm::ScheduleDAGInstrs::getGraphNodeLabel(), llvm::GCNHazardRecognizer::getHazardType(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::ARMBankConflictHazardRecognizer::getHazardType(), llvm::HexagonHazardRecognizer::getHazardType(), llvm::PPCHazardRecognizer970::getHazardType(), llvm::ScheduleDAG::getInstrDesc(), getMachineInstr(), llvm::ScheduleDAGInstrs::getSchedClass(), llvm::SystemZHazardRecognizer::getSchedClass(), llvm::GCNSchedStage::getScheduleMetrics(), llvm::SystemZHazardRecognizer::groupingCost(), llvm::HexagonVLIWResourceModel::hasDependence(), llvm::SchedRemainder::init(), llvm::GCNSchedStrategy::initCandidate(), llvm::GenericScheduler::initCandidate(), llvm::ScheduleDAGInstrs::initSUnits(), llvm::SMSchedule::insert(), isADDIInstr(), llvm::SwingSchedulerDAG::isBackedge(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::HexagonPacketizerList::isLegalToPruneDependencies(), llvm::SMSchedule::isLoopCarried(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), llvm::VLIWResourceModel::isResourceAvailable(), multipleIterations(), llvm::SMSchedule::normalizeNonPipelinedInstructions(), llvm::SMSchedule::orderDependence(), llvm::VLIWPacketizerList::PacketizeMIs(), llvm::GenericScheduler::pickNode(), llvm::PostGenericScheduler::pickNode(), llvm::GCNSchedStrategy::pickNode(), llvm::SMSchedule::print(), llvm::ConvergingVLIWScheduler::releaseBottomNode(), llvm::R600SchedStrategy::releaseBottomNode(), llvm::SchedBoundary::releaseNode(), llvm::SMSchedule::reorderInstructions(), llvm::GenericScheduler::reschedulePhysReg(), llvm::ResourceManager::reserveResources(), llvm::VLIWResourceModel::reserveResources(), llvm::R600SchedStrategy::schedNode(), llvm::ScheduleDAGMI::schedule(), llvm::SIScheduleDAGMI::schedule(), llvm::SIScheduleBlock::schedule(), llvm::ScheduleDAGMILive::scheduleMI(), llvm::ConvergingVLIWScheduler::SchedulingCost(), llvm::HexagonConvergingVLIWScheduler::SchedulingCost(), llvm::HexagonHazardRecognizer::ShouldPreferAnother(), llvm::GCNHazardRecognizer::ShouldPreferAnother(), llvm::AArch64PostRASchedStrategy::tryCandidate(), llvm::HexagonPacketizerList::updateOffset(), llvm::ScheduleDAGMILive::updatePressureDiffs(), llvm::SchedDFSImpl::visitPostorderNode(), and llvm::SchedDFSImpl::visitPreorder().

◆ getNode()

SDNode * llvm::SUnit::getNode ( ) const
inline

◆ isBottomReady()

bool llvm::SUnit::isBottomReady ( ) const
inline

◆ isBoundaryNode()

bool llvm::SUnit::isBoundaryNode ( ) const
inline

Boundary nodes are placeholders for the boundary of the scheduling region.

BoundaryNodes can have DAG edges, including Data edges, but they do not correspond to schedulable entities (e.g. instructions) and do not have a valid ID. Consequently, always check for boundary nodes before accessing an associative data structure keyed on node ID.

Definition at line 344 of file ScheduleDAG.h.

References NodeNum.

Referenced by llvm::SchedDFSResult::compute(), computePath(), llvm::ScheduleDAGTopologicalSort::GetSubGraph(), hasDataSucc(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), and llvm::SMSchedule::latestCycleInChain().

◆ isInstr()

bool llvm::SUnit::isInstr ( ) const
inline

◆ isPred()

bool llvm::SUnit::isPred ( const SUnit N) const
inline

Tests if node N is a predecessor of this node.

Definition at line 431 of file ScheduleDAG.h.

References N, and Preds.

Referenced by llvm::SMSchedule::computeStart(), and llvm::fuseInstructionPair().

◆ isSucc()

bool llvm::SUnit::isSucc ( const SUnit N) const
inline

◆ isTopReady()

bool llvm::SUnit::isTopReady ( ) const
inline

◆ removePred()

void SUnit::removePred ( const SDep D)

Removes the specified edge as a pred of the current node if it exists.

It also removes the current node as a successor of the specified node.

Definition at line 174 of file ScheduleDAG.cpp.

References assert(), D, llvm::SDep::Data, llvm::find(), I, isScheduled, N, NumPreds, NumPredsLeft, P, Preds, setDepthDirty(), setHeightDirty(), and WeakPredsLeft.

Referenced by llvm::HexagonSubtarget::UsrOverflowMutation::apply(), and swapAntiDependences().

◆ setDepthDirty()

void SUnit::setDepthDirty ( )

Sets a flag in this node to indicate that its stored Depth value will require recomputation the next time getDepth() is called.

Definition at line 218 of file ScheduleDAG.cpp.

References llvm::SmallVectorBase< Size_T >::empty(), llvm::SDep::getSUnit(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and Succs.

Referenced by addPred(), removePred(), and setDepthToAtLeast().

◆ setDepthToAtLeast()

void SUnit::setDepthToAtLeast ( unsigned  NewDepth)

If NewDepth is greater than this node's depth value, sets it to be the new depth value.

This also recursively marks successor nodes dirty.

Definition at line 248 of file ScheduleDAG.cpp.

References getDepth(), and setDepthDirty().

◆ setHeightDirty()

void SUnit::setHeightDirty ( )

Sets a flag in this node to indicate that its stored Height value will require recomputation the next time getHeight() is called.

Definition at line 233 of file ScheduleDAG.cpp.

References llvm::SmallVectorBase< Size_T >::empty(), llvm::SDep::getSUnit(), llvm::SmallVectorImpl< T >::pop_back_val(), Preds, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by addPred(), llvm::HexagonSubtarget::HVXMemLatencyMutation::apply(), removePred(), and setHeightToAtLeast().

◆ setHeightToAtLeast()

void SUnit::setHeightToAtLeast ( unsigned  NewHeight)

If NewHeight is greater than this node's height value, set it to be the new height value.

This also recursively marks predecessor nodes dirty.

Definition at line 256 of file ScheduleDAG.cpp.

References getHeight(), and setHeightDirty().

◆ setInstr()

void llvm::SUnit::setInstr ( MachineInstr MI)
inline

Assigns the instruction for the SUnit.

This may be used during post-regalloc scheduling.

Definition at line 366 of file ScheduleDAG.h.

References assert(), and MI.

Referenced by llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::SwingSchedulerDAG::applyInstrChange(), and llvm::SwingSchedulerDAG::fixupRegisterOverlaps().

◆ setNode()

void llvm::SUnit::setNode ( SDNode N)
inline

Assigns the representative SDNode for this SUnit.

This may be used during pre-regalloc scheduling.

Definition at line 348 of file ScheduleDAG.h.

References assert(), and N.

Member Data Documentation

◆ BotReadyCycle

unsigned llvm::SUnit::BotReadyCycle = 0

◆ CopyDstRC

const TargetRegisterClass* llvm::SUnit::CopyDstRC
Initial value:
=
nullptr

Is a special copy node if != nullptr.

Definition at line 302 of file ScheduleDAG.h.

◆ CopySrcRC

const TargetRegisterClass* llvm::SUnit::CopySrcRC = nullptr

Definition at line 304 of file ScheduleDAG.h.

◆ hasPhysRegClobbers

bool llvm::SUnit::hasPhysRegClobbers

Has any physreg defs, used or not.

Definition at line 281 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGSDNodes::Clone().

◆ hasPhysRegDefs

bool llvm::SUnit::hasPhysRegDefs

◆ hasPhysRegUses

bool llvm::SUnit::hasPhysRegUses

Has physreg uses.

Definition at line 279 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), and llvm::GenericScheduler::schedNode().

◆ hasReservedResource

bool llvm::SUnit::hasReservedResource

◆ isAvailable

bool llvm::SUnit::isAvailable

True once available.

Definition at line 283 of file ScheduleDAG.h.

◆ isCall

bool llvm::SUnit::isCall

◆ isCallOp

bool llvm::SUnit::isCallOp

Is a function call operand.

Definition at line 276 of file ScheduleDAG.h.

Referenced by BURRSort(), and llvm::ScheduleDAGSDNodes::Clone().

◆ isCloned

bool llvm::SUnit::isCloned

True if this node has been cloned.

Definition at line 287 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGSDNodes::Clone(), and llvm::ScheduleDAGSDNodes::EmitSchedule().

◆ isCommutable

bool llvm::SUnit::isCommutable

Is a commutable instruction.

Definition at line 278 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGSDNodes::Clone(), and llvm::ScheduleDAGInstrs::initSUnits().

◆ isPending

bool llvm::SUnit::isPending

True once pending.

Definition at line 282 of file ScheduleDAG.h.

◆ isScheduled

bool llvm::SUnit::isScheduled

◆ isScheduleHigh

bool llvm::SUnit::isScheduleHigh

◆ isScheduleLow

bool llvm::SUnit::isScheduleLow

True if preferable to schedule low.

Definition at line 286 of file ScheduleDAG.h.

Referenced by checkSpecialNodes(), and llvm::ScheduleDAGSDNodes::Clone().

◆ isTwoAddress

bool llvm::SUnit::isTwoAddress

Is a two-address instruction.

Definition at line 277 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGSDNodes::Clone().

◆ isUnbuffered

bool llvm::SUnit::isUnbuffered

◆ isVRegCycle

bool llvm::SUnit::isVRegCycle

May use and def the same vreg.

Definition at line 274 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGSDNodes::Clone(), hasVRegCycleUse(), initVRegCycle(), and resetVRegCycle().

◆ Latency

unsigned short llvm::SUnit::Latency = 0

◆ NodeNum

unsigned llvm::SUnit::NodeNum = BoundaryID

Entry # of node in the node vector.

Definition at line 264 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGTopologicalSort::AddSUnitWithoutPredecessors(), llvm::SIScheduleBlock::addUnit(), BUCompareLatency(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::SchedBoundary::bumpNode(), BURRSort(), CalcNodeSethiUllmanNumber(), llvm::SchedBoundary::checkHazard(), llvm::ScheduleDAGMILive::computeCyclicCriticalPath(), llvm::GCNSchedStage::computeSUnitReadyCycle(), llvm::SMSchedule::computeUnpipelineableNodes(), llvm::ScheduleDAG::dumpNodeName(), llvm::ScheduleDAGMI::dumpScheduleTraceBottomUp(), llvm::ScheduleDAGMI::dumpScheduleTraceTopDown(), llvm::SystemZHazardRecognizer::dumpSU(), llvm::SIScheduleBlock::finalizeUnits(), llvm::SchedBoundary::findMaxLatency(), llvm::ScheduleDAGSDNodes::getGraphNodeLabel(), llvm::SchedDFSResult::getILP(), llvm::DOTGraphTraits< ScheduleDAGMI * >::getNodeLabel(), llvm::SchedDFSResult::getNumInstrs(), llvm::ScheduleDAGMILive::getPressureDiff(), llvm::ScheduleDAGTopologicalSort::GetSubGraph(), llvm::SchedDFSResult::getSubtreeID(), hasVRegCycleUse(), llvm::GenericScheduler::initCandidate(), llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(), initVRegCycle(), llvm::ScheduleDAGInstrs::insertBarrierChain(), isBoundaryNode(), llvm::ScheduleDAGTopologicalSort::IsReachable(), llvm::SIScheduleBlockCreator::isSUInBlock(), llvm::SchedDFSImpl::isVisited(), llvm::SchedDFSImpl::joinPredSubtree(), llvm::SMSchedule::normalizeNonPipelinedInstructions(), llvm::GenericScheduler::pickNode(), llvm::PostGenericScheduler::pickNode(), llvm::GCNSchedStrategy::pickNode(), llvm::ConvergingVLIWScheduler::pickNodeFromQueue(), llvm::SMSchedule::print(), llvm::LatencyPriorityQueue::push(), llvm::ResourcePriorityQueue::push(), llvm::ScheduleDAGInstrs::reduceHugeMemNodeMaps(), llvm::SystemZPostRASchedStrategy::schedNode(), llvm::SIScheduleDAGMI::schedule(), llvm::SIScheduler::scheduleVariant(), llvm::ResourcePriorityQueue::SUSchedulingCost(), llvm::GenericSchedulerBase::traceCandidate(), llvm::PostGenericScheduler::tryCandidate(), llvm::PPCPostRASchedStrategy::tryCandidate(), llvm::GenericScheduler::tryCandidate(), llvm::GCNMaxILPSchedStrategy::tryCandidate(), llvm::PPCPreRASchedStrategy::tryCandidate(), llvm::ScheduleDAGMILive::updatePressureDiffs(), llvm::SchedDFSImpl::visitPostorderEdge(), llvm::SchedDFSImpl::visitPostorderNode(), and llvm::SchedDFSImpl::visitPreorder().

◆ NodeQueueId

unsigned llvm::SUnit::NodeQueueId = 0

◆ NumPreds

unsigned llvm::SUnit::NumPreds = 0

◆ NumPredsLeft

unsigned llvm::SUnit::NumPredsLeft = 0

◆ NumRegDefsLeft

unsigned short llvm::SUnit::NumRegDefsLeft = 0

◆ NumSuccs

unsigned llvm::SUnit::NumSuccs = 0

◆ NumSuccsLeft

unsigned llvm::SUnit::NumSuccsLeft = 0

◆ OrigNode

SUnit* llvm::SUnit::OrigNode = nullptr

If not this, the node from which this node was cloned.

(SD scheduling only)

Definition at line 250 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGSDNodes::Clone(), and llvm::ScheduleDAGSDNodes::EmitSchedule().

◆ Preds

SmallVector<SDep, 4> llvm::SUnit::Preds

All sunit predecessors.

Definition at line 256 of file ScheduleDAG.h.

Referenced by addPred(), AntiDepEdges(), llvm::HexagonSubtarget::UsrOverflowMutation::apply(), biasCriticalPath(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), calcMaxScratches(), CalcNodeSethiUllmanNumber(), llvm::HexagonPacketizerList::calcStall(), canClobberReachingPhysRegUse(), computePath(), llvm::SMSchedule::computeStart(), llvm::GCNSchedStage::computeSUnitReadyCycle(), llvm::SMSchedule::computeUnpipelineableNodes(), CriticalPathStep(), llvm::ScheduleDAG::dumpNodeAll(), llvm::SMSchedule::earliestCycleInChain(), llvm::fuseInstructionPair(), getPredClusterSU(), llvm::ScheduleDAGTopologicalSort::GetSubGraph(), hasDataDependencyPred(), hasOnlyLiveInOpers(), hasVRegCycleUse(), llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(), initVRegCycle(), isPred(), isSingleUnscheduledPred(), multipleIterations(), llvm::SMSchedule::normalizeNonPipelinedInstructions(), numberCtrlPredInSU(), llvm::SMSchedule::orderDependence(), llvm::ConvergingVLIWScheduler::pickNodeFromQueue(), pred_L(), llvm::ScheduleDAGMI::releasePredecessors(), llvm::ConvergingVLIWScheduler::releaseTopNode(), removePred(), llvm::GenericScheduler::reschedulePhysReg(), resetVRegCycle(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::ConvergingVLIWScheduler::SchedulingCost(), setHeightDirty(), succ_L(), swapAntiDependences(), llvm::HexagonPacketizerList::updateOffset(), llvm::SchedDFSImpl::visitPostorderNode(), and llvm::ScheduleDAGTopologicalSort::WillCreateCycle().

◆ SchedClass

const MCSchedClassDesc* llvm::SUnit::SchedClass
Initial value:
=
nullptr

nullptr or resolved SchedClass.

Definition at line 253 of file ScheduleDAG.h.

Referenced by llvm::ScheduleDAGInstrs::getSchedClass(), and llvm::SystemZHazardRecognizer::getSchedClass().

◆ SchedulingPref

Sched::Preference llvm::SUnit::SchedulingPref = Sched::None

Scheduling preference.

Definition at line 290 of file ScheduleDAG.h.

Referenced by BUCompareLatency(), llvm::ScheduleDAGSDNodes::Clone(), and llvm::ScheduleDAGSDNodes::newSUnit().

◆ Succs

SmallVector<SDep, 4> llvm::SUnit::Succs

◆ TopReadyCycle

unsigned llvm::SUnit::TopReadyCycle = 0

◆ WeakPredsLeft

unsigned llvm::SUnit::WeakPredsLeft = 0

of weak preds not scheduled.

Definition at line 270 of file ScheduleDAG.h.

Referenced by addPred(), dumpAttributes(), llvm::getWeakLeft(), llvm::ScheduleDAGMI::releaseSucc(), and removePred().

◆ WeakSuccsLeft

unsigned llvm::SUnit::WeakSuccsLeft = 0

of weak succs not scheduled.

Definition at line 271 of file ScheduleDAG.h.

Referenced by dumpAttributes(), llvm::getWeakLeft(), and llvm::ScheduleDAGMI::releasePred().


The documentation for this class was generated from the following files: