LLVM  12.0.0git
Macros | Functions
VEInstrInfo.cpp File Reference
#include "VEInstrInfo.h"
#include "VE.h"
#include "VEMachineFunctionInfo.h"
#include "VESubtarget.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#include "VEGenInstrInfo.inc"
Include dependency graph for VEInstrInfo.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "ve-instr-info"
 
#define GET_INSTRINFO_CTOR_DTOR
 
#define BRKIND(NAME)   (Opc == NAME##a || Opc == NAME##a_nt || Opc == NAME##a_t)
 
#define BRKIND(NAME)
 
#define BRKIND(NAME)   (Opc == NAME##ari || Opc == NAME##ari_nt || Opc == NAME##ari_t)
 
#define INSTRKIND(NAME)
 
#define NCINSTRKIND(NAME)
 

Functions

static bool IsIntegerCC (unsigned CC)
 
static VECC::CondCode GetOppositeBranchCondition (VECC::CondCode CC)
 
static bool isUncondBranchOpcode (int Opc)
 
static bool isCondBranchOpcode (int Opc)
 
static bool isIndirectBranchOpcode (int Opc)
 
static void parseCondBranch (MachineInstr *LastInst, MachineBasicBlock *&Target, SmallVectorImpl< MachineOperand > &Cond)
 
static bool IsAliasOfSX (Register Reg)
 
static void copyPhysSubRegs (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, const MCInstrDesc &MCID, unsigned int NumSubRegs, const unsigned *SubRegIdx, const TargetRegisterInfo *TRI)
 
static Register getVM512Upper (Register reg)
 
static Register getVM512Lower (Register reg)
 
static void expandPseudoLogM (MachineInstr &MI, const MCInstrDesc &MCID)
 
static void addOperandsForVFMK (MachineInstrBuilder &MIB, MachineInstr &MI, bool Upper)
 
static void expandPseudoVFMK (const TargetInstrInfo &TI, MachineInstr &MI)
 

Macro Definition Documentation

◆ BRKIND [1/3]

#define BRKIND (   NAME)    (Opc == NAME##a || Opc == NAME##a_nt || Opc == NAME##a_t)

◆ BRKIND [2/3]

#define BRKIND (   NAME)
Value:
(Opc == NAME##rr || Opc == NAME##rr_nt || Opc == NAME##rr_t || \
Opc == NAME##ir || Opc == NAME##ir_nt || Opc == NAME##ir_t)
verify safepoint ir

◆ BRKIND [3/3]

#define BRKIND (   NAME)    (Opc == NAME##ari || Opc == NAME##ari_nt || Opc == NAME##ari_t)

◆ DEBUG_TYPE

#define DEBUG_TYPE   "ve-instr-info"

Definition at line 28 of file VEInstrInfo.cpp.

◆ GET_INSTRINFO_CTOR_DTOR

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 32 of file VEInstrInfo.cpp.

◆ INSTRKIND

#define INSTRKIND (   NAME)
Value:
case NAME##rr: \
NewUseOpcSImm7 = NAME##ri; \
NewUseOpcMImm = NAME##rm; \
InstType = rr2ri_rm; \
break

◆ NCINSTRKIND

#define NCINSTRKIND (   NAME)
Value:
case NAME##rr: \
NewUseOpcSImm7 = NAME##ir; \
NewUseOpcMImm = NAME##rm; \
InstType = rr2ir_rm; \
break
verify safepoint ir

Function Documentation

◆ addOperandsForVFMK()

static void addOperandsForVFMK ( MachineInstrBuilder MIB,
MachineInstr MI,
bool  Upper 
)
static

◆ copyPhysSubRegs()

static void copyPhysSubRegs ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I,
const DebugLoc DL,
MCRegister  DestReg,
MCRegister  SrcReg,
bool  KillSrc,
const MCInstrDesc MCID,
unsigned int  NumSubRegs,
const unsigned SubRegIdx,
const TargetRegisterInfo TRI 
)
static

◆ expandPseudoLogM()

static void expandPseudoLogM ( MachineInstr MI,
const MCInstrDesc MCID 
)
static

◆ expandPseudoVFMK()

static void expandPseudoVFMK ( const TargetInstrInfo TI,
MachineInstr MI 
)
static

◆ GetOppositeBranchCondition()

static VECC::CondCode GetOppositeBranchCondition ( VECC::CondCode  CC)
static

◆ getVM512Lower()

static Register getVM512Lower ( Register  reg)
static

◆ getVM512Upper()

static Register getVM512Upper ( Register  reg)
static

◆ IsAliasOfSX()

static bool IsAliasOfSX ( Register  Reg)
static

Definition at line 321 of file VEInstrInfo.cpp.

References Reg.

Referenced by llvm::VEInstrInfo::copyPhysReg().

◆ isCondBranchOpcode()

static bool isCondBranchOpcode ( int  Opc)
static

Definition at line 112 of file VEInstrInfo.cpp.

References BRKIND.

◆ isIndirectBranchOpcode()

static bool isIndirectBranchOpcode ( int  Opc)
static

Definition at line 124 of file VEInstrInfo.cpp.

References assert(), and BRKIND.

◆ IsIntegerCC()

static bool IsIntegerCC ( unsigned  CC)
static

Definition at line 41 of file VEInstrInfo.cpp.

References llvm::VECC::CC_AF.

Referenced by llvm::VEInstrInfo::insertBranch().

◆ isUncondBranchOpcode()

static bool isUncondBranchOpcode ( int  Opc)
static

Definition at line 97 of file VEInstrInfo.cpp.

References assert(), and BRKIND.

◆ parseCondBranch()

static void parseCondBranch ( MachineInstr LastInst,
MachineBasicBlock *&  Target,
SmallVectorImpl< MachineOperand > &  Cond 
)
static