14#ifndef LLVM_LIB_TARGET_VE_VE_H
15#define LLVM_LIB_TARGET_VE_VE_H
302 return static_cast<unsigned>(R);
361 if (Val & (UINT64_C(1) << 63))
370 if ((Val & 0x40) == 0)
371 return (
uint64_t)((INT64_C(1) << 63) >> (Val & 0x3f));
372 return ((
uint64_t)INT64_C(-1) >> (Val & 0x3f));
375inline unsigned M0(
unsigned Val) {
return Val + 64; }
376inline unsigned M1(
unsigned Val) {
return Val; }
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
This class is intended to be used as a driving class for all asm writers.
Instances of this class represent a single low-level machine instruction.
Representation of each machine instruction.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
StringRef - Represent a constant reference to a string, i.e.
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
static bool isIntVECondCode(VECC::CondCode CC)
void initializeVEDAGToDAGISelLegacyPass(PassRegistry &)
constexpr bool isMask_32(uint32_t Value)
Return true if the argument is a non-empty sequence of ones starting at the least significant bit wit...
FunctionPass * createLVLGenPass()
FunctionPass * createVEISelDag(VETargetMachine &TM)
createVEISelDag - This pass converts a legalized DAG into a VE-specific DAG, ready for instruction sc...
void LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)
constexpr bool isShiftedMask_32(uint32_t Value)
Return true if the argument contains a non-empty sequence of ones with the remainder zero (32 bit ver...
constexpr bool isShiftedMask_64(uint64_t Value)
Return true if the argument contains a non-empty sequence of ones with the remainder zero (64 bit ver...
unsigned M1(unsigned Val)
static const unsigned StandardVectorWidth
int countl_zero(T Val)
Count number of 0's from the most significant bit to the least stopping at the first 1.
static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger)
static const unsigned PackedVectorWidth
static VECC::CondCode stringToVEFCondCode(StringRef S)
static const char * VECondCodeToString(VECC::CondCode CC)
static unsigned VECondCodeToVal(VECC::CondCode CC)
constexpr bool isMask_64(uint64_t Value)
Return true if the argument is a non-empty sequence of ones starting at the least significant bit wit...
static uint64_t val2MImm(uint64_t Val)
val2MImm - Convert an integer immediate value to target MImm immediate.
int countl_one(T Value)
Count the number of ones from the most significant bit to the first zero bit.
static unsigned VERDToVal(VERD::RoundingMode R)
static uint64_t mimm2Val(uint64_t Val)
mimm2Val - Convert a target MImm immediate to an integer immediate value.
unsigned M0(unsigned Val)
static VERD::RoundingMode VEValToRD(unsigned Val)
static bool isMImmVal(uint64_t Val)
static const char * VERDToString(VERD::RoundingMode R)
static VERD::RoundingMode stringToVERD(StringRef S)
static bool isMImm32Val(uint32_t Val)
static VECC::CondCode stringToVEICondCode(StringRef S)