Go to the documentation of this file.
19 #define DEBUG_TYPE "lvl-gen"
32 int getVLIndex(
unsigned Opcode);
40 int LVLGen::getVLIndex(
unsigned Opcode) {
53 int Index = getVLIndex(
MI.getOpcode());
55 return MI.getOperand(
Index).getReg();
57 return VE::NoRegister;
62 (MBB.getParent()->getSubtarget<VESubtarget>().getRegisterInfo()->getName(no))
65 bool HasRegForVL =
false;
77 unsigned Reg = getVL(*
MI);
78 if (
Reg != VE::NoRegister) {
83 << (HasRegForVL ?
RegName(RegForVL) :
"unknown")
86 if (!HasRegForVL || RegForVL !=
Reg) {
102 if (
MI->definesRegister(RegForVL,
TRI) ||
103 MI->modifiesRegister(RegForVL,
TRI) ||
104 MI->killsRegister(RegForVL,
TRI) ||
MI->isCall()) {
122 bool Changed =
false;
129 Changed |= runOnMachineBasicBlock(*FI);
This class represents lattice values for constants.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const VERegisterInfo * getRegisterInfo() const override
unsigned const TargetRegisterInfo * TRI
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
TargetInstrInfo - Interface to description of machine instruction set.
const HexagonInstrInfo * TII
Describe properties that are true of each instruction in the target description file.
Representation of each machine instruction.
FunctionPass * createLVLGenPass()
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const VEInstrInfo * getInstrInfo() const override
Iterator for intrusive lists based on ilist_node.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass class - This class is used to implement most global optimizations.