LLVM 19.0.0git
Classes | Macros | Typedefs | Functions | Variables
AMDGPUAsmParser.cpp File Reference
#include "AMDKernelCodeT.h"
#include "MCTargetDesc/AMDGPUMCExpr.h"
#include "MCTargetDesc/AMDGPUMCKernelDescriptor.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "MCTargetDesc/AMDGPUTargetStreamer.h"
#include "SIDefines.h"
#include "SIInstrInfo.h"
#include "SIRegisterInfo.h"
#include "TargetInfo/AMDGPUTargetInfo.h"
#include "Utils/AMDGPUAsmUtils.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "Utils/AMDKernelCodeTUtils.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/Twine.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCParser/MCTargetAsmParser.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/AMDGPUMetadata.h"
#include "llvm/Support/AMDHSAKernelDescriptor.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/TargetParser/TargetParser.h"
#include <optional>
#include "AMDGPUGenAsmMatcher.inc"

Go to the source code of this file.

Classes

struct  RegInfo
 

Macros

#define PARSE_BITS_ENTRY(FIELD, ENTRY, VALUE, RANGE)
 
#define EXPR_RESOLVE_OR_ERROR(RESOLVED)
 
#define GET_REGISTER_MATCHER
 
#define GET_MATCHER_IMPLEMENTATION
 
#define GET_MNEMONIC_SPELL_CHECKER
 
#define GET_MNEMONIC_CHECKER
 
Auto-generated Match Functions

{

#define GET_ASSEMBLER_HEADER
 

Typedefs

using OperandIndices = SmallVector< int16_t, MAX_SRC_OPERANDS_NUM >
 

Functions

static const fltSemanticsgetFltSemantics (unsigned Size)
 
static const fltSemanticsgetFltSemantics (MVT VT)
 
static const fltSemanticsgetOpFltSemantics (uint8_t OperandType)
 
static bool canLosslesslyConvertToFPType (APFloat &FPLiteral, MVT VT)
 
static bool isSafeTruncation (int64_t Val, unsigned Size)
 
static bool isInlineableLiteralOp16 (int64_t Val, MVT VT, bool HasInv2Pi)
 
static int getRegClass (RegisterKind Is, unsigned RegWidth)
 
static unsigned getSpecialRegForName (StringRef RegName)
 
static bool isRegularReg (RegisterKind Kind)
 
static const RegInfogetRegularRegInfo (StringRef Str)
 
static bool getRegNum (StringRef Str, unsigned &Num)
 
static ArrayRef< unsignedgetAllVariants ()
 
static OperandIndices getSrcOperandIndices (unsigned Opcode, bool AddMandatoryLiterals=false)
 
static bool checkWriteLane (const MCInst &Inst)
 
static bool IsMovrelsSDWAOpcode (const unsigned Opcode)
 
static bool IsRevOpcode (const unsigned Opcode)
 
static int IsAGPROperand (const MCInst &Inst, uint16_t NameIdx, const MCRegisterInfo *MRI)
 
static std::string AMDGPUMnemonicSpellCheck (StringRef S, const FeatureBitset &FBS, unsigned VariantID=0)
 
static bool AMDGPUCheckMnemonic (StringRef Mnemonic, const FeatureBitset &AvailableFeatures, unsigned VariantID)
 
static bool isInvalidVOPDY (const OperandVector &Operands, uint64_t InvalidOprIdx)
 
static void applyMnemonicAliases (StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID)
 
static void addOptionalImmOperand (MCInst &Inst, const OperandVector &Operands, AMDGPUAsmParser::OptionalImmIndexMap &OptionalIdx, AMDGPUOperand::ImmTy ImmT, int64_t Default=0)
 
static bool encodeCnt (const AMDGPU::IsaVersion ISA, int64_t &IntVal, int64_t CntVal, bool Saturate, unsigned(*encode)(const IsaVersion &Version, unsigned, unsigned), unsigned(*decode)(const IsaVersion &Version, unsigned))
 
static LLVM_READNONE unsigned encodeBitmaskPerm (const unsigned AndMask, const unsigned OrMask, const unsigned XorMask)
 
static bool ConvertOmodMul (int64_t &Mul)
 
static bool ConvertOmodDiv (int64_t &Div)
 
static void cvtVOP3DstOpSelOnly (MCInst &Inst, const MCRegisterInfo &MRI)
 
static bool isRegOrImmWithInputMods (const MCInstrDesc &Desc, unsigned OpNum)
 
static void addSrcModifiersAndSrc (MCInst &Inst, const OperandVector &Operands, unsigned i, unsigned Opc, unsigned OpName)
 
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser ()
 Force static initialization.
 

Variables

static constexpr RegInfo RegularRegisters []
 
constexpr unsigned MAX_SRC_OPERANDS_NUM = 6
 
constexpr uint64_t MIMGFlags
 

Macro Definition Documentation

◆ EXPR_RESOLVE_OR_ERROR

#define EXPR_RESOLVE_OR_ERROR (   RESOLVED)
Value:
if (!(RESOLVED)) \
return Error(IDRange.Start, "directive should have resolvable expression", \
IDRange);
Lightweight error class with error context and mandatory checking.
Definition: Error.h:160

◆ GET_ASSEMBLER_HEADER

#define GET_ASSEMBLER_HEADER

Definition at line 1311 of file AMDGPUAsmParser.cpp.

◆ GET_MATCHER_IMPLEMENTATION

#define GET_MATCHER_IMPLEMENTATION

Definition at line 9513 of file AMDGPUAsmParser.cpp.

◆ GET_MNEMONIC_CHECKER

#define GET_MNEMONIC_CHECKER

Definition at line 9515 of file AMDGPUAsmParser.cpp.

◆ GET_MNEMONIC_SPELL_CHECKER

#define GET_MNEMONIC_SPELL_CHECKER

Definition at line 9514 of file AMDGPUAsmParser.cpp.

◆ GET_REGISTER_MATCHER

#define GET_REGISTER_MATCHER

Definition at line 9512 of file AMDGPUAsmParser.cpp.

◆ PARSE_BITS_ENTRY

#define PARSE_BITS_ENTRY (   FIELD,
  ENTRY,
  VALUE,
  RANGE 
)
Value:
if (!isUInt<ENTRY##_WIDTH>(Val)) \
return OutOfRangeError(RANGE); \
AMDGPU::MCKernelDescriptor::bits_set(FIELD, VALUE, ENTRY##_SHIFT, ENTRY, \
getContext());
#define FIELD(name)
#define ENTRY(ASMNAME, ENUM)

Typedef Documentation

◆ OperandIndices

Definition at line 3644 of file AMDGPUAsmParser.cpp.

Function Documentation

◆ addOptionalImmOperand()

static void addOptionalImmOperand ( MCInst Inst,
const OperandVector Operands,
AMDGPUAsmParser::OptionalImmIndexMap &  OptionalIdx,
AMDGPUOperand::ImmTy  ImmT,
int64_t  Default = 0 
)
static

◆ addSrcModifiersAndSrc()

static void addSrcModifiersAndSrc ( MCInst Inst,
const OperandVector Operands,
unsigned  i,
unsigned  Opc,
unsigned  OpName 
)
static

Definition at line 8763 of file AMDGPUAsmParser.cpp.

References llvm::AMDGPU::getNamedOperandIdx(), and Operands.

◆ AMDGPUCheckMnemonic()

static bool AMDGPUCheckMnemonic ( StringRef  Mnemonic,
const FeatureBitset AvailableFeatures,
unsigned  VariantID 
)
static

◆ AMDGPUMnemonicSpellCheck()

static std::string AMDGPUMnemonicSpellCheck ( StringRef  S,
const FeatureBitset FBS,
unsigned  VariantID = 0 
)
static

◆ applyMnemonicAliases()

static void applyMnemonicAliases ( StringRef Mnemonic,
const FeatureBitset Features,
unsigned  VariantID 
)
static

◆ canLosslesslyConvertToFPType()

static bool canLosslesslyConvertToFPType ( APFloat FPLiteral,
MVT  VT 
)
static

Definition at line 1966 of file AMDGPUAsmParser.cpp.

References llvm::APFloat::convert(), and getFltSemantics().

◆ checkWriteLane()

static bool checkWriteLane ( const MCInst Inst)
static

◆ ConvertOmodDiv()

static bool ConvertOmodDiv ( int64_t &  Div)
static

Definition at line 8315 of file AMDGPUAsmParser.cpp.

◆ ConvertOmodMul()

static bool ConvertOmodMul ( int64_t &  Mul)
static

Definition at line 8307 of file AMDGPUAsmParser.cpp.

References Mul.

◆ cvtVOP3DstOpSelOnly()

static void cvtVOP3DstOpSelOnly ( MCInst Inst,
const MCRegisterInfo MRI 
)
static

◆ encodeBitmaskPerm()

static LLVM_READNONE unsigned encodeBitmaskPerm ( const unsigned  AndMask,
const unsigned  OrMask,
const unsigned  XorMask 
)
static

Definition at line 7868 of file AMDGPUAsmParser.cpp.

◆ encodeCnt()

static bool encodeCnt ( const AMDGPU::IsaVersion  ISA,
int64_t &  IntVal,
int64_t  CntVal,
bool  Saturate,
unsigned(*)(const IsaVersion &Version, unsigned, unsigned encode,
unsigned(*)(const IsaVersion &Version, unsigned decode 
)
static

Definition at line 7030 of file AMDGPUAsmParser.cpp.

References decode(), llvm::encode(), and llvm::Failed().

◆ getAllVariants()

static ArrayRef< unsigned > getAllVariants ( )
static

◆ getFltSemantics() [1/2]

static const fltSemantics * getFltSemantics ( MVT  VT)
static

Definition at line 1906 of file AMDGPUAsmParser.cpp.

References getFltSemantics(), and llvm::MVT::getSizeInBits().

◆ getFltSemantics() [2/2]

static const fltSemantics * getFltSemantics ( unsigned  Size)
static

Definition at line 1893 of file AMDGPUAsmParser.cpp.

References llvm_unreachable, and Size.

Referenced by canLosslesslyConvertToFPType(), and getFltSemantics().

◆ getOpFltSemantics()

static const fltSemantics * getOpFltSemantics ( uint8_t  OperandType)
static

Definition at line 1910 of file AMDGPUAsmParser.cpp.

References llvm_unreachable, llvm::AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32, llvm::AMDGPU::OPERAND_KIMM16, llvm::AMDGPU::OPERAND_KIMM32, llvm::AMDGPU::OPERAND_REG_IMM_BF16, llvm::AMDGPU::OPERAND_REG_IMM_BF16_DEFERRED, llvm::AMDGPU::OPERAND_REG_IMM_FP16, llvm::AMDGPU::OPERAND_REG_IMM_FP16_DEFERRED, llvm::AMDGPU::OPERAND_REG_IMM_FP32, llvm::AMDGPU::OPERAND_REG_IMM_FP32_DEFERRED, llvm::AMDGPU::OPERAND_REG_IMM_FP64, llvm::AMDGPU::OPERAND_REG_IMM_INT16, llvm::AMDGPU::OPERAND_REG_IMM_INT32, llvm::AMDGPU::OPERAND_REG_IMM_INT64, llvm::AMDGPU::OPERAND_REG_IMM_V2BF16, llvm::AMDGPU::OPERAND_REG_IMM_V2FP16, llvm::AMDGPU::OPERAND_REG_IMM_V2FP32, llvm::AMDGPU::OPERAND_REG_IMM_V2INT16, llvm::AMDGPU::OPERAND_REG_IMM_V2INT32, llvm::AMDGPU::OPERAND_REG_INLINE_AC_BF16, llvm::AMDGPU::OPERAND_REG_INLINE_AC_FP16, llvm::AMDGPU::OPERAND_REG_INLINE_AC_FP32, llvm::AMDGPU::OPERAND_REG_INLINE_AC_FP64, llvm::AMDGPU::OPERAND_REG_INLINE_AC_INT16, llvm::AMDGPU::OPERAND_REG_INLINE_AC_INT32, llvm::AMDGPU::OPERAND_REG_INLINE_AC_V2BF16, llvm::AMDGPU::OPERAND_REG_INLINE_AC_V2FP16, llvm::AMDGPU::OPERAND_REG_INLINE_AC_V2INT16, llvm::AMDGPU::OPERAND_REG_INLINE_C_BF16, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP16, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP32, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP64, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT16, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT32, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT64, llvm::AMDGPU::OPERAND_REG_INLINE_C_V2BF16, llvm::AMDGPU::OPERAND_REG_INLINE_C_V2FP16, llvm::AMDGPU::OPERAND_REG_INLINE_C_V2FP32, llvm::AMDGPU::OPERAND_REG_INLINE_C_V2INT16, and llvm::AMDGPU::OPERAND_REG_INLINE_C_V2INT32.

◆ getRegClass()

static int getRegClass ( RegisterKind  Is,
unsigned  RegWidth 
)
static

Definition at line 2493 of file AMDGPUAsmParser.cpp.

◆ getRegNum()

static bool getRegNum ( StringRef  Str,
unsigned Num 
)
static

Definition at line 2757 of file AMDGPUAsmParser.cpp.

◆ getRegularRegInfo()

static const RegInfo * getRegularRegInfo ( StringRef  Str)
static

Definition at line 2750 of file AMDGPUAsmParser.cpp.

References RegularRegisters.

◆ getSpecialRegForName()

static unsigned getSpecialRegForName ( StringRef  RegName)
static

◆ getSrcOperandIndices()

static OperandIndices getSrcOperandIndices ( unsigned  Opcode,
bool  AddMandatoryLiterals = false 
)
static

◆ IsAGPROperand()

static int IsAGPROperand ( const MCInst Inst,
uint16_t  NameIdx,
const MCRegisterInfo MRI 
)
static

◆ isInlineableLiteralOp16()

static bool isInlineableLiteralOp16 ( int64_t  Val,
MVT  VT,
bool  HasInv2Pi 
)
static

◆ isInvalidVOPDY()

static bool isInvalidVOPDY ( const OperandVector Operands,
uint64_t  InvalidOprIdx 
)
static

Definition at line 5242 of file AMDGPUAsmParser.cpp.

References assert(), and Operands.

◆ IsMovrelsSDWAOpcode()

static bool IsMovrelsSDWAOpcode ( const unsigned  Opcode)
static

Definition at line 4032 of file AMDGPUAsmParser.cpp.

◆ isRegOrImmWithInputMods()

static bool isRegOrImmWithInputMods ( const MCInstrDesc Desc,
unsigned  OpNum 
)
static

Definition at line 8475 of file AMDGPUAsmParser.cpp.

References llvm::AMDGPU::OPERAND_INPUT_MODS.

◆ isRegularReg()

static bool isRegularReg ( RegisterKind  Kind)
static

Definition at line 2743 of file AMDGPUAsmParser.cpp.

◆ IsRevOpcode()

static bool IsRevOpcode ( const unsigned  Opcode)
static

Definition at line 4202 of file AMDGPUAsmParser.cpp.

◆ isSafeTruncation()

static bool isSafeTruncation ( int64_t  Val,
unsigned  Size 
)
static

Definition at line 1984 of file AMDGPUAsmParser.cpp.

References llvm::isIntN(), llvm::isUIntN(), and Size.

◆ LLVMInitializeAMDGPUAsmParser()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser ( )

Force static initialization.

Definition at line 9507 of file AMDGPUAsmParser.cpp.

References A, B, llvm::getTheGCNTarget(), and llvm::getTheR600Target().

Variable Documentation

◆ MAX_SRC_OPERANDS_NUM

constexpr unsigned MAX_SRC_OPERANDS_NUM = 6
constexpr

Definition at line 3643 of file AMDGPUAsmParser.cpp.

◆ MIMGFlags

constexpr uint64_t MIMGFlags
constexpr

◆ RegularRegisters

constexpr RegInfo RegularRegisters[]
staticconstexpr
Initial value:
= {
{{"v"}, IS_VGPR},
{{"s"}, IS_SGPR},
{{"ttmp"}, IS_TTMP},
{{"acc"}, IS_AGPR},
{{"a"}, IS_AGPR},
}

Definition at line 2735 of file AMDGPUAsmParser.cpp.

Referenced by getRegularRegInfo().