#include "AMDKernelCodeT.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "MCTargetDesc/AMDGPUTargetStreamer.h"
#include "SIDefines.h"
#include "SIInstrInfo.h"
#include "SIRegisterInfo.h"
#include "TargetInfo/AMDGPUTargetInfo.h"
#include "Utils/AMDGPUAsmUtils.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "Utils/AMDKernelCodeTUtils.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCParser/MCTargetAsmParser.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/AMDGPUMetadata.h"
#include "llvm/Support/AMDHSAKernelDescriptor.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/MachineValueType.h"
#include "llvm/Support/TargetParser.h"
#include "llvm/Support/TargetRegistry.h"
#include "AMDGPUGenAsmMatcher.inc"

Include dependency graph for AMDGPUAsmParser.cpp:

Classes
struct	RegInfo

Macros
#define	PARSE_BITS_ENTRY(FIELD, ENTRY, VALUE, RANGE)

#define	GET_REGISTER_MATCHER

#define	GET_MATCHER_IMPLEMENTATION

#define	GET_MNEMONIC_SPELL_CHECKER

#define	GET_MNEMONIC_CHECKER

Auto-generated Match Functions
{
#define	GET_ASSEMBLER_HEADER

Functions
static const fltSemantics *	getFltSemantics (unsigned Size)

static const fltSemantics *	getFltSemantics (MVT VT)

static const fltSemantics *	getOpFltSemantics (uint8_t OperandType)

static bool	canLosslesslyConvertToFPType (APFloat &FPLiteral, MVT VT)

static bool	isSafeTruncation (int64_t Val, unsigned Size)

static bool	isInlineableLiteralOp16 (int64_t Val, MVT VT, bool HasInv2Pi)

static bool	isInlineValue (unsigned Reg)

static int	getRegClass (RegisterKind Is, unsigned RegWidth)

static unsigned	getSpecialRegForName (StringRef RegName)

static bool	isRegularReg (RegisterKind Kind)

static const RegInfo *	getRegularRegInfo (StringRef Str)

static bool	getRegNum (StringRef Str, unsigned &Num)

static ArrayRef< unsigned >	getAllVariants ()

static bool	IsMovrelsSDWAOpcode (const unsigned Opcode)

static bool	IsRevOpcode (const unsigned Opcode)

static int	IsAGPROperand (const MCInst &Inst, uint16_t NameIdx, const MCRegisterInfo *MRI)

static std::string	AMDGPUMnemonicSpellCheck (StringRef S, const FeatureBitset &FBS, unsigned VariantID=0)

static bool	AMDGPUCheckMnemonic (StringRef Mnemonic, const FeatureBitset &AvailableFeatures, unsigned VariantID)

static void	addOptionalImmOperand (MCInst &Inst, const OperandVector &Operands, AMDGPUAsmParser::OptionalImmIndexMap &OptionalIdx, AMDGPUOperand::ImmTy ImmT, int64_t Default=0)

static bool	encodeCnt (const AMDGPU::IsaVersion ISA, int64_t &IntVal, int64_t CntVal, bool Saturate, unsigned(encode)(const IsaVersion &Version, unsigned, unsigned), unsigned(decode)(const IsaVersion &Version, unsigned))

static LLVM_READNONE unsigned	encodeBitmaskPerm (const unsigned AndMask, const unsigned OrMask, const unsigned XorMask)

static bool	ConvertOmodMul (int64_t &Mul)

static bool	ConvertOmodDiv (int64_t &Div)

static bool	ConvertBoundCtrl (int64_t &BoundCtrl)

static bool	isRegOrImmWithInputMods (const MCInstrDesc &Desc, unsigned OpNum)

LLVM_EXTERNAL_VISIBILITY void	LLVMInitializeAMDGPUAsmParser ()
	Force static initialization. More...

Variables
static constexpr RegInfo	RegularRegisters []

static const OptionalOperand	AMDGPUOptionalOperandTable []

Macro Definition Documentation

◆ GET_ASSEMBLER_HEADER

#define GET_ASSEMBLER_HEADER

Definition at line 1179 of file AMDGPUAsmParser.cpp.

◆ GET_MATCHER_IMPLEMENTATION

#define GET_MATCHER_IMPLEMENTATION

Definition at line 8269 of file AMDGPUAsmParser.cpp.

◆ GET_MNEMONIC_CHECKER

#define GET_MNEMONIC_CHECKER

Definition at line 8271 of file AMDGPUAsmParser.cpp.

◆ GET_MNEMONIC_SPELL_CHECKER

#define GET_MNEMONIC_SPELL_CHECKER

Definition at line 8270 of file AMDGPUAsmParser.cpp.

◆ GET_REGISTER_MATCHER

#define GET_REGISTER_MATCHER

Definition at line 8268 of file AMDGPUAsmParser.cpp.

◆ PARSE_BITS_ENTRY

#define PARSE_BITS_ENTRY	(	FIELD,
		ENTRY,
		VALUE,
		RANGE
	)

Value:

  if (!isUInt<ENTRY##_WIDTH>(VALUE))                                           \
    return OutOfRangeError(RANGE);                                             \
  AMDHSA_BITS_SET(FIELD, ENTRY, VALUE);

Function Documentation

◆ addOptionalImmOperand()

static void addOptionalImmOperand	(	MCInst &	Inst,
		const OperandVector &	Operands,
		AMDGPUAsmParser::OptionalImmIndexMap &	OptionalIdx,
		AMDGPUOperand::ImmTy	ImmT,
		int64_t	Default = `0`
	)

static

Definition at line 5575 of file AMDGPUAsmParser.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), i, and Operands.

◆ AMDGPUCheckMnemonic()

static bool AMDGPUCheckMnemonic	(	StringRef	Mnemonic,
		const FeatureBitset &	AvailableFeatures,
		unsigned	VariantID
	)

static

◆ AMDGPUMnemonicSpellCheck()

static std::string AMDGPUMnemonicSpellCheck	(	StringRef	S,
		const FeatureBitset &	FBS,
		unsigned	VariantID = `0`
	)

static

◆ canLosslesslyConvertToFPType()

static bool canLosslesslyConvertToFPType	(	APFloat &	FPLiteral,
		MVT	VT
	)

static

Definition at line 1755 of file AMDGPUAsmParser.cpp.

◆ ConvertBoundCtrl()

static bool ConvertBoundCtrl ( int64_t & BoundCtrl )

static

Definition at line 7303 of file AMDGPUAsmParser.cpp.

◆ ConvertOmodDiv()

static bool ConvertOmodDiv ( int64_t & Div )

static

Definition at line 7286 of file AMDGPUAsmParser.cpp.

◆ ConvertOmodMul()

static bool ConvertOmodMul ( int64_t & Mul )

static

Definition at line 7278 of file AMDGPUAsmParser.cpp.

References llvm::Mul.

◆ encodeBitmaskPerm()

static LLVM_READNONE unsigned encodeBitmaskPerm	(	const unsigned	AndMask,
		const unsigned	OrMask,
		const unsigned	XorMask
	)

static

Definition at line 6614 of file AMDGPUAsmParser.cpp.

References llvm::AMDGPU::Swizzle::BITMASK_AND_SHIFT, llvm::AMDGPU::Swizzle::BITMASK_OR_SHIFT, llvm::AMDGPU::Swizzle::BITMASK_PERM_ENC, and llvm::AMDGPU::Swizzle::BITMASK_XOR_SHIFT.

◆ encodeCnt()

static bool encodeCnt	(	const AMDGPU::IsaVersion	ISA,
		int64_t &	IntVal,
		int64_t	CntVal,
		bool	Saturate,
		unsigned(*)(const IsaVersion &Version, unsigned, unsigned)	encode,
		unsigned(*)(const IsaVersion &Version, unsigned)	decode
	)

static

Definition at line 5990 of file AMDGPUAsmParser.cpp.

References decode(), llvm::encode(), llvm::Failed(), and llvm::tgtok::IntVal.

◆ getAllVariants()

static ArrayRef<unsigned> getAllVariants ( )

static

Definition at line 3085 of file AMDGPUAsmParser.cpp.

References llvm::AMDGPUAsmVariants::DEFAULT, llvm::AMDGPUAsmVariants::DPP, llvm::makeArrayRef(), llvm::AMDGPUAsmVariants::SDWA, llvm::AMDGPUAsmVariants::SDWA9, and llvm::AMDGPUAsmVariants::VOP3.

◆ getFltSemantics() [1/2]

static const fltSemantics* getFltSemantics ( MVT VT )

static

Definition at line 1710 of file AMDGPUAsmParser.cpp.

◆ getFltSemantics() [2/2]

static const fltSemantics* getFltSemantics ( unsigned Size )

static

Definition at line 1697 of file AMDGPUAsmParser.cpp.

◆ getOpFltSemantics()

static const fltSemantics* getOpFltSemantics ( uint8_t OperandType )

static

Definition at line 1714 of file AMDGPUAsmParser.cpp.

◆ getRegClass()

static int getRegClass	(	RegisterKind	Is,
		unsigned	RegWidth
	)

static

Definition at line 2185 of file AMDGPUAsmParser.cpp.

Referenced by llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::SIRegisterInfo::getRegClass(), llvm::M68kRegisterInfo::getSpillRegisterOrder(), llvm::AVRRegisterInfo::shouldCoalesce(), and llvm::X86InstrInfo::unfoldMemoryOperand().

◆ getRegNum()

static bool getRegNum	(	StringRef	Str,
		unsigned &	Num
	)

static

Definition at line 2393 of file AMDGPUAsmParser.cpp.

◆ getRegularRegInfo()

static const RegInfo* getRegularRegInfo ( StringRef Str )

static

Definition at line 2386 of file AMDGPUAsmParser.cpp.

References Reg, and RegularRegisters.

◆ getSpecialRegForName()

static unsigned getSpecialRegForName ( StringRef RegName )

static

Definition at line 2240 of file AMDGPUAsmParser.cpp.

References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Default(), llvm::M0(), and RegName.

◆ IsAGPROperand()

static int IsAGPROperand	(	const MCInst &	Inst,
		uint16_t	NameIdx,
		const MCRegisterInfo *	MRI
	)

static

Definition at line 4047 of file AMDGPUAsmParser.cpp.

References llvm::MCRegisterClass::contains(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MachineRegisterInfo::getRegClass(), MRI, and Reg.

◆ isInlineableLiteralOp16()

static bool isInlineableLiteralOp16	(	int64_t	Val,
		MVT	VT,
		bool	HasInv2Pi
	)

static

Definition at line 1777 of file AMDGPUAsmParser.cpp.

References llvm::Literal.

◆ isInlineValue()

static bool isInlineValue ( unsigned Reg )

static

Definition at line 2158 of file AMDGPUAsmParser.cpp.

References Reg.

◆ IsMovrelsSDWAOpcode()

static bool IsMovrelsSDWAOpcode ( const unsigned Opcode )

static

Definition at line 3524 of file AMDGPUAsmParser.cpp.

◆ isRegOrImmWithInputMods()

static bool isRegOrImmWithInputMods	(	const MCInstrDesc &	Desc,
		unsigned	OpNum
	)

static

Definition at line 7468 of file AMDGPUAsmParser.cpp.

References llvm::MCInstrDesc::getOperandConstraint(), llvm::MCInstrDesc::NumOperands, llvm::AMDGPU::OPERAND_INPUT_MODS, llvm::MCOperandInfo::OperandType, llvm::MCInstrDesc::OpInfo, llvm::MCOperandInfo::RegClass, and llvm::MCOI::TIED_TO.

◆ isRegularReg()

static bool isRegularReg ( RegisterKind Kind )

static

Definition at line 2379 of file AMDGPUAsmParser.cpp.

◆ IsRevOpcode()

static bool IsRevOpcode ( const unsigned Opcode )

static

Definition at line 3656 of file AMDGPUAsmParser.cpp.

◆ isSafeTruncation()

static bool isSafeTruncation	(	int64_t	Val,
		unsigned	Size
	)

static

Definition at line 1773 of file AMDGPUAsmParser.cpp.

◆ LLVMInitializeAMDGPUAsmParser()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser ( )

Force static initialization.

Definition at line 8263 of file AMDGPUAsmParser.cpp.

References B, llvm::getTheAMDGPUTarget(), and llvm::getTheGCNTarget().

Variable Documentation

◆ AMDGPUOptionalOperandTable

const OptionalOperand AMDGPUOptionalOperandTable[]

static

Definition at line 7312 of file AMDGPUAsmParser.cpp.

◆ RegularRegisters

constexpr RegInfo RegularRegisters[]

staticconstexpr

Initial value:

= {
  {{"v"},    IS_VGPR},
  {{"s"},    IS_SGPR},
  {{"ttmp"}, IS_TTMP},
  {{"acc"},  IS_AGPR},
  {{"a"},    IS_AGPR},
}

Definition at line 2371 of file AMDGPUAsmParser.cpp.

Referenced by getRegularRegInfo().

Classes

Macros

Functions

Variables

Macro Definition Documentation

◆ GET_ASSEMBLER_HEADER

◆ GET_MATCHER_IMPLEMENTATION

◆ GET_MNEMONIC_CHECKER

◆ GET_MNEMONIC_SPELL_CHECKER

◆ GET_REGISTER_MATCHER

◆ PARSE_BITS_ENTRY

Function Documentation

◆ addOptionalImmOperand()

◆ AMDGPUCheckMnemonic()

◆ AMDGPUMnemonicSpellCheck()

◆ canLosslesslyConvertToFPType()

◆ ConvertBoundCtrl()

◆ ConvertOmodDiv()

◆ ConvertOmodMul()

◆ encodeBitmaskPerm()

◆ encodeCnt()

◆ getAllVariants()

◆ getFltSemantics() [1/2]

◆ getFltSemantics() [2/2]

◆ getOpFltSemantics()

◆ getRegClass()

◆ getRegNum()

◆ getRegularRegInfo()

◆ getSpecialRegForName()

◆ IsAGPROperand()

◆ isInlineableLiteralOp16()

◆ isInlineValue()

◆ IsMovrelsSDWAOpcode()

◆ isRegOrImmWithInputMods()

◆ isRegularReg()

◆ IsRevOpcode()

◆ isSafeTruncation()

◆ LLVMInitializeAMDGPUAsmParser()

Variable Documentation

◆ AMDGPUOptionalOperandTable

◆ RegularRegisters