15#ifndef LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H
16#define LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H
23#define offsetof(TYPE, MEMBER) ((size_t)&((TYPE*)0)->MEMBER)
28#ifndef AMDHSA_BITS_ENUM_ENTRY
29#define AMDHSA_BITS_ENUM_ENTRY(NAME, SHIFT, WIDTH) \
30 NAME ## _SHIFT = (SHIFT), \
31 NAME ## _WIDTH = (WIDTH), \
32 NAME = (((1 << (WIDTH)) - 1) << (SHIFT))
36#ifndef AMDHSA_BITS_GET
37#define AMDHSA_BITS_GET(SRC, MSK) ((SRC & MSK) >> MSK ## _SHIFT)
41#ifndef AMDHSA_BITS_SET
42#define AMDHSA_BITS_SET(DST, MSK, VAL) \
44 DST |= ((VAL << MSK ## _SHIFT) & MSK)
75#define COMPUTE_PGM_RSRC1(NAME, SHIFT, WIDTH) \
76 AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC1_ ## NAME, SHIFT, WIDTH)
97#undef COMPUTE_PGM_RSRC1
100#define COMPUTE_PGM_RSRC2(NAME, SHIFT, WIDTH) \
101 AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC2_ ## NAME, SHIFT, WIDTH)
123#undef COMPUTE_PGM_RSRC2
127#define COMPUTE_PGM_RSRC3_GFX90A(NAME, SHIFT, WIDTH) \
128 AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC3_GFX90A_ ## NAME, SHIFT, WIDTH)
135#undef COMPUTE_PGM_RSRC3_GFX90A
139#define COMPUTE_PGM_RSRC3_GFX10_PLUS(NAME, SHIFT, WIDTH) \
140 AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC3_GFX10_PLUS_ ## NAME, SHIFT, WIDTH)
149#undef COMPUTE_PGM_RSRC3_GFX10_PLUS
152#define KERNEL_CODE_PROPERTY(NAME, SHIFT, WIDTH) \
153 AMDHSA_BITS_ENUM_ENTRY(KERNEL_CODE_PROPERTY_ ## NAME, SHIFT, WIDTH)
167#undef KERNEL_CODE_PROPERTY
199 sizeof(kernel_descriptor_t) == 64,
200 "invalid size for kernel_descriptor_t");
201static_assert(
offsetof(kernel_descriptor_t, group_segment_fixed_size) ==
203 "invalid offset for group_segment_fixed_size");
204static_assert(
offsetof(kernel_descriptor_t, private_segment_fixed_size) ==
206 "invalid offset for private_segment_fixed_size");
207static_assert(
offsetof(kernel_descriptor_t, kernarg_size) ==
209 "invalid offset for kernarg_size");
211 "invalid offset for reserved0");
212static_assert(
offsetof(kernel_descriptor_t, kernel_code_entry_byte_offset) ==
214 "invalid offset for kernel_code_entry_byte_offset");
216 "invalid offset for reserved1");
217static_assert(
offsetof(kernel_descriptor_t, compute_pgm_rsrc3) ==
219 "invalid offset for compute_pgm_rsrc3");
220static_assert(
offsetof(kernel_descriptor_t, compute_pgm_rsrc1) ==
222 "invalid offset for compute_pgm_rsrc1");
223static_assert(
offsetof(kernel_descriptor_t, compute_pgm_rsrc2) ==
225 "invalid offset for compute_pgm_rsrc2");
226static_assert(
offsetof(kernel_descriptor_t, kernel_code_properties) ==
228 "invalid offset for kernel_code_properties");
230 "invalid offset for reserved2");
#define offsetof(TYPE, MEMBER)
@ FLOAT_DENORM_MODE_FLUSH_SRC
@ FLOAT_DENORM_MODE_FLUSH_DST
@ FLOAT_DENORM_MODE_FLUSH_SRC_DST
@ FLOAT_DENORM_MODE_FLUSH_NONE
@ COMPUTE_PGM_RSRC3_GFX90A
@ FLOAT_ROUND_MODE_PLUS_INFINITY
@ FLOAT_ROUND_MODE_NEAR_EVEN
@ FLOAT_ROUND_MODE_MINUS_INFINITY
@ KERNEL_CODE_PROPERTIES_OFFSET
@ GROUP_SEGMENT_FIXED_SIZE_OFFSET
@ COMPUTE_PGM_RSRC3_OFFSET
@ KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET
@ COMPUTE_PGM_RSRC1_OFFSET
@ COMPUTE_PGM_RSRC2_OFFSET
@ PRIVATE_SEGMENT_FIXED_SIZE_OFFSET
@ COMPUTE_PGM_RSRC3_GFX10_PLUS
@ SYSTEM_VGPR_WORKITEM_ID_UNDEFINED
@ SYSTEM_VGPR_WORKITEM_ID_X
@ SYSTEM_VGPR_WORKITEM_ID_X_Y
@ SYSTEM_VGPR_WORKITEM_ID_X_Y_Z
This is an optimization pass for GlobalISel generic memory operations.
uint32_t group_segment_fixed_size
uint32_t compute_pgm_rsrc1
uint32_t private_segment_fixed_size
uint32_t compute_pgm_rsrc2
uint16_t kernel_code_properties
uint32_t compute_pgm_rsrc3
int64_t kernel_code_entry_byte_offset