12#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUINSTPRINTER_H
13#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUINSTPRINTER_H
39 void printU4ImmOperand(
const MCInst *
MI,
unsigned OpNo,
41 void printU16ImmOperand(
const MCInst *
MI,
unsigned OpNo,
46 void printU32ImmOperand(
const MCInst *
MI,
unsigned OpNo,
62 void printSMRDOffset8(
const MCInst *
MI,
unsigned OpNo,
64 void printSMEMOffset(
const MCInst *
MI,
unsigned OpNo,
66 void printSMEMOffsetMod(
const MCInst *
MI,
unsigned OpNo,
68 void printSMRDLiteralOffset(
const MCInst *
MI,
unsigned OpNo,
72 void printCPol(
const MCInst *
MI,
unsigned OpNo,
90 void printLWE(
const MCInst *
MI,
unsigned OpNo,
92 void printD16(
const MCInst *
MI,
unsigned OpNo,
94 void printExpCompr(
const MCInst *
MI,
unsigned OpNo,
96 void printExpVM(
const MCInst *
MI,
unsigned OpNo,
98 void printFORMAT(
const MCInst *
MI,
unsigned OpNo,
100 void printSymbolicFormat(
const MCInst *
MI,
120 void printRegularOperand(
const MCInst *
MI,
unsigned OpNo,
124 printOperand(
MI, OpNum, STI, O);
126 void printOperandAndFPInputMods(
const MCInst *
MI,
unsigned OpNo,
128 void printOperandAndIntInputMods(
const MCInst *
MI,
unsigned OpNo,
136 void printBankMask(
const MCInst *
MI,
unsigned OpNo,
138 void printDppBoundCtrl(
const MCInst *
MI,
unsigned OpNo,
140 void printFI(
const MCInst *
MI,
unsigned OpNo,
143 void printSDWADstSel(
const MCInst *
MI,
unsigned OpNo,
145 void printSDWASrc0Sel(
const MCInst *
MI,
unsigned OpNo,
147 void printSDWASrc1Sel(
const MCInst *
MI,
unsigned OpNo,
149 void printSDWADstUnused(
const MCInst *
MI,
unsigned OpNo,
153 void printOpSel(
const MCInst *
MI,
unsigned OpNo,
155 void printOpSelHi(
const MCInst *
MI,
unsigned OpNo,
157 void printNegLo(
const MCInst *
MI,
unsigned OpNo,
159 void printNegHi(
const MCInst *
MI,
unsigned OpNo,
161 void printInterpSlot(
const MCInst *
MI,
unsigned OpNo,
163 void printInterpAttr(
const MCInst *
MI,
unsigned OpNo,
165 void printInterpAttrChan(
const MCInst *
MI,
unsigned OpNo,
168 void printVGPRIndexMode(
const MCInst *
MI,
unsigned OpNo,
170 void printMemOperand(
const MCInst *
MI,
unsigned OpNo,
178 bool needsImpliedVcc(
const MCInstrDesc &Desc,
unsigned OpNo)
const;
179 void printDefaultVccOperand(
bool FirstOperand,
const MCSubtargetInfo &STI,
188 void printExpSrc0(
const MCInst *
MI,
unsigned OpNo,
190 void printExpSrc1(
const MCInst *
MI,
unsigned OpNo,
192 void printExpSrc2(
const MCInst *
MI,
unsigned OpNo,
194 void printExpSrc3(
const MCInst *
MI,
unsigned OpNo,
196 void printExpTgt(
const MCInst *
MI,
unsigned OpNo,
void printSwizzle(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printClampSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printDelayFlag(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printAbs(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printEndpgm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
static const char * getRegisterName(MCRegister Reg)
AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O, StringRef Asm, StringRef Default="")
void printBankSwizzle(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printDepCtr(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printLiteral(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printRSel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printHwreg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printKCache(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printSendMsg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printUpdateExecMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printWrite(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printRegName(raw_ostream &OS, MCRegister Reg) const override
Print the assembler register name.
static void printRegOperand(unsigned RegNo, raw_ostream &O, const MCRegisterInfo &MRI)
void printNeg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printWaitFlag(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
void printClamp(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
std::pair< const char *, uint64_t > getMnemonic(const MCInst *MI) override
Returns a pair containing the mnemonic for MI and the number of bits left for further processing by p...
void printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
void printUpdatePred(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printCT(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printRel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printLast(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printOModSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printOMOD(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printHigh(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
This class is intended to be used as a base class for asm properties and features specific to the tar...
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
const MCRegisterInfo & MRI
Instances of this class represent a single low-level machine instruction.
Describe properties that are true of each instruction in the target description file.
Interface to description of machine instruction set.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Generic base class for all target subtargets.
StringRef - Represent a constant reference to a string, i.e.
This class implements an extremely fast bulk output stream that can only output to a stream.
This is an optimization pass for GlobalISel generic memory operations.
@ Mod
The access may modify the value stored in memory.
@ Default
The result values are uniform if and only if all operands are uniform.