9#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUTARGETSTREAMER_H
10#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUTARGETSTREAMER_H
22class formatted_raw_ostream;
31struct kernel_descriptor_t;
39 std::optional<AMDGPU::IsaInfo::AMDGPUTargetID>
TargetID;
96 uint64_t NextSGPR,
bool ReserveVCC,
bool ReserveFlatScr,
97 unsigned CodeObjectVersion){};
102 const std::optional<AMDGPU::IsaInfo::AMDGPUTargetID> &
getTargetID()
const {
109 unsigned CodeObjectVersion) {
110 assert(
TargetID == std::nullopt &&
"TargetID can only be initialized once");
112 getTargetID()->setCodeObjectVersion(CodeObjectVersion);
115 unsigned CodeObjectVersion) {
119 getTargetID()->setTargetIDFromFeaturesString(FeatureString);
160 uint64_t NextSGPR,
bool ReserveVCC,
bool ReserveFlatScr,
161 unsigned CodeObjectVersion)
override;
171 unsigned getEFlags();
173 unsigned getEFlagsR600();
174 unsigned getEFlagsAMDGCN();
176 unsigned getEFlagsUnknownOS();
177 unsigned getEFlagsAMDHSA();
178 unsigned getEFlagsAMDPAL();
179 unsigned getEFlagsMesa3D();
181 unsigned getEFlagsV3();
182 unsigned getEFlagsV4();
221 uint64_t NextSGPR,
bool ReserveVCC,
bool ReserveFlatScr,
222 unsigned CodeObjectVersion)
override;
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) override
void EmitAmdhsaKernelDescriptor(const MCSubtargetInfo &STI, StringRef KernelName, const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR, uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr, unsigned CodeObjectVersion) override
bool EmitHSAMetadata(msgpack::Document &HSAMetadata, bool Strict) override
void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) override
bool EmitISAVersion() override
void EmitDirectiveAMDGCNTarget() override
void EmitDirectiveHSACodeObjectISAV2(uint32_t Major, uint32_t Minor, uint32_t Stepping, StringRef VendorName, StringRef ArchName) override
void EmitDirectiveHSACodeObjectVersion(uint32_t Major, uint32_t Minor) override
bool EmitCodeEnd(const MCSubtargetInfo &STI) override
void emitAMDGPULDS(MCSymbol *Sym, unsigned Size, Align Alignment) override
void EmitDirectiveAMDGCNTarget() override
bool EmitCodeEnd(const MCSubtargetInfo &STI) override
void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) override
bool EmitHSAMetadata(msgpack::Document &HSAMetadata, bool Strict) override
void EmitDirectiveHSACodeObjectVersion(uint32_t Major, uint32_t Minor) override
void EmitDirectiveHSACodeObjectISAV2(uint32_t Major, uint32_t Minor, uint32_t Stepping, StringRef VendorName, StringRef ArchName) override
void emitAMDGPULDS(MCSymbol *Sym, unsigned Size, Align Alignment) override
MCELFStreamer & getStreamer()
void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) override
void EmitAmdhsaKernelDescriptor(const MCSubtargetInfo &STI, StringRef KernelName, const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR, uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr, unsigned CodeObjectVersion) override
bool EmitISAVersion() override
virtual bool EmitHSAMetadata(msgpack::Document &HSAMetadata, bool Strict)
Emit HSA Metadata.
AMDGPUPALMetadata * getPALMetadata()
AMDGPUTargetStreamer(MCStreamer &S)
virtual bool EmitISAVersion()
virtual void emitAMDGPULDS(MCSymbol *Symbol, unsigned Size, Align Alignment)
virtual bool EmitHSAMetadataV3(StringRef HSAMetadataString)
std::optional< AMDGPU::IsaInfo::AMDGPUTargetID > & getTargetID()
virtual void EmitAMDKernelCodeT(const amd_kernel_code_t &Header)
virtual bool EmitCodeEnd(const MCSubtargetInfo &STI)
virtual void EmitDirectiveHSACodeObjectVersion(uint32_t Major, uint32_t Minor)
static unsigned getElfMach(StringRef GPU)
void initializeTargetID(const MCSubtargetInfo &STI, StringRef FeatureString, unsigned CodeObjectVersion)
virtual void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type)
virtual void EmitAmdhsaKernelDescriptor(const MCSubtargetInfo &STI, StringRef KernelName, const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR, uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr, unsigned CodeObjectVersion)
virtual void EmitDirectiveAMDGCNTarget()
virtual bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata)
MCContext & getContext() const
static StringRef getArchNameFromElfMach(unsigned ElfMach)
virtual void EmitDirectiveHSACodeObjectISAV2(uint32_t Major, uint32_t Minor, uint32_t Stepping, StringRef VendorName, StringRef ArchName)
const std::optional< AMDGPU::IsaInfo::AMDGPUTargetID > & getTargetID() const
std::optional< AMDGPU::IsaInfo::AMDGPUTargetID > TargetID
virtual bool EmitHSAMetadataV2(StringRef HSAMetadataString)
void initializeTargetID(const MCSubtargetInfo &STI, unsigned CodeObjectVersion)
Context object for machine code objects.
Base class for the full range of assembler expressions which are needed for parsing.
Streaming machine code generation interface.
MCContext & getContext() const
Generic base class for all target subtargets.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Target specific streamer interface.
StringRef - Represent a constant reference to a string, i.e.
The instances of the Type class are immutable: once they are created, they are never changed.
An efficient, type-erasing, non-owning reference to a callable.
Simple in-memory representation of a document of msgpack objects with ability to find and create arra...
This is an optimization pass for GlobalISel generic memory operations.
AMD Kernel Code Object (amd_kernel_code_t).
This struct is a compact representation of a valid (non-zero power of two) alignment.