LLVM
17.0.0git
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#include "AArch64InstrInfo.h"
#include "AArch64MachineFunctionInfo.h"
#include "AArch64Subtarget.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Pass.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/DebugCounter.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <functional>
#include <iterator>
#include <limits>
#include <optional>
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "aarch64-ldst-opt" |
#define | AARCH64_LOAD_STORE_OPT_NAME "AArch64 load / store optimization pass" |
Functions | |
STATISTIC (NumPairCreated, "Number of load/store pair instructions generated") | |
STATISTIC (NumPostFolded, "Number of post-index updates folded") | |
STATISTIC (NumPreFolded, "Number of pre-index updates folded") | |
STATISTIC (NumUnscaledPairCreated, "Number of load/store from unscaled generated") | |
STATISTIC (NumZeroStoresPromoted, "Number of narrow zero stores promoted") | |
STATISTIC (NumLoadsFromStoresPromoted, "Number of loads from stores promoted") | |
DEBUG_COUNTER (RegRenamingCounter, DEBUG_TYPE "-reg-renaming", "Controls which pairs are considered for renaming") | |
INITIALIZE_PASS (AArch64LoadStoreOpt, "aarch64-ldst-opt", AARCH64_LOAD_STORE_OPT_NAME, false, false) static bool isNarrowStore(unsigned Opc) | |
static bool | isTagStore (const MachineInstr &MI) |
static unsigned | getMatchingNonSExtOpcode (unsigned Opc, bool *IsValidLdStrOpc=nullptr) |
static unsigned | getMatchingWideOpcode (unsigned Opc) |
static unsigned | getMatchingPairOpcode (unsigned Opc) |
static unsigned | isMatchingStore (MachineInstr &LoadInst, MachineInstr &StoreInst) |
static unsigned | getPreIndexedOpcode (unsigned Opc) |
static unsigned | getPostIndexedOpcode (unsigned Opc) |
static bool | isPreLdStPairCandidate (MachineInstr &FirstMI, MachineInstr &MI) |
static void | getPrePostIndexedMemOpInfo (const MachineInstr &MI, int &Scale, int &MinOffset, int &MaxOffset) |
static MachineOperand & | getLdStRegOp (MachineInstr &MI, unsigned PairedRegOp=0) |
static bool | isLdOffsetInRangeOfSt (MachineInstr &LoadInst, MachineInstr &StoreInst, const AArch64InstrInfo *TII) |
static bool | isPromotableZeroStoreInst (MachineInstr &MI) |
static bool | isPromotableLoadFromStore (MachineInstr &MI) |
static bool | isMergeableLdStUpdate (MachineInstr &MI) |
static bool | forAllMIsUntilDef (MachineInstr &MI, MCPhysReg DefReg, const TargetRegisterInfo *TRI, unsigned Limit, std::function< bool(MachineInstr &, bool)> &Fn) |
static void | updateDefinedRegisters (MachineInstr &MI, LiveRegUnits &Units, const TargetRegisterInfo *TRI) |
static bool | inBoundsForPair (bool IsUnscaled, int Offset, int OffsetStride) |
static int | alignTo (int Num, int PowOf2) |
static bool | mayAlias (MachineInstr &MIa, SmallVectorImpl< MachineInstr * > &MemInsns, AliasAnalysis *AA) |
static bool | needsWinCFI (const MachineFunction *MF) |
static bool | areCandidatesToMergeOrPair (MachineInstr &FirstMI, MachineInstr &MI, LdStPairFlags &Flags, const AArch64InstrInfo *TII) |
static bool | canRenameUpToDef (MachineInstr &FirstMI, LiveRegUnits &UsedInBetween, SmallPtrSetImpl< const TargetRegisterClass * > &RequiredClasses, const TargetRegisterInfo *TRI) |
static std::optional< MCPhysReg > | tryToFindRegisterToRename (const MachineFunction &MF, Register Reg, LiveRegUnits &DefinedInBB, LiveRegUnits &UsedInBetween, SmallPtrSetImpl< const TargetRegisterClass * > &RequiredClasses, const TargetRegisterInfo *TRI) |
static MachineBasicBlock::iterator | maybeMoveCFI (MachineInstr &MI, MachineBasicBlock::iterator MaybeCFI) |
Variables | |
static cl::opt< unsigned > | LdStLimit ("aarch64-load-store-scan-limit", cl::init(20), cl::Hidden) |
static cl::opt< unsigned > | UpdateLimit ("aarch64-update-scan-limit", cl::init(100), cl::Hidden) |
static cl::opt< bool > | EnableRenaming ("aarch64-load-store-renaming", cl::init(true), cl::Hidden) |
#define AARCH64_LOAD_STORE_OPT_NAME "AArch64 load / store optimization pass" |
Definition at line 83 of file AArch64LoadStoreOptimizer.cpp.
#define DEBUG_TYPE "aarch64-ldst-opt" |
Definition at line 57 of file AArch64LoadStoreOptimizer.cpp.
Definition at line 1204 of file AArch64LoadStoreOptimizer.cpp.
Referenced by buildFrameType().
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Definition at line 1286 of file AArch64LoadStoreOptimizer.cpp.
References assert(), llvm::MachineInstr::FrameDestroy, llvm::MachineInstr::FrameSetup, getMatchingNonSExtOpcode(), getMatchingPairOpcode(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::hasOrderedMemoryRef(), llvm::AArch64InstrInfo::isPreLdSt(), isPreLdStPairCandidate(), MI, needsWinCFI(), and TII.
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Definition at line 1344 of file AArch64LoadStoreOptimizer.cpp.
References llvm::LiveRegUnits::accumulate(), llvm::any_of(), llvm::dbgs(), forAllMIsUntilDef(), llvm::MachineInstr::FrameSetup, function, getLdStRegOp(), llvm::TargetRegisterInfo::getMinimalPhysRegClass(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), getReg(), llvm::MachineFunction::getRegInfo(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::MachineOperand::isDebug(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isEarlyClobber(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRenamable(), llvm::MachineOperand::isTied(), LdStLimit, LLVM_DEBUG, llvm::MachineInstr::mayStore(), MI, llvm::MachineInstr::operands(), llvm::TargetRegisterInfo::regsOverlap(), llvm::MachineRegisterInfo::tracksLiveness(), and TRI.
DEBUG_COUNTER | ( | RegRenamingCounter | , |
DEBUG_TYPE "-reg-renaming" | , | ||
"Controls which pairs are considered for renaming" | |||
) |
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Definition at line 794 of file AArch64LoadStoreOptimizer.cpp.
References llvm::any_of(), I, llvm::MachineBasicBlock::instr_rend(), llvm::instructionsWithoutDebug(), MBB, MI, and TRI.
Referenced by canRenameUpToDef().
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Definition at line 610 of file AArch64LoadStoreOptimizer.cpp.
References assert(), llvm::AArch64InstrInfo::isPairedLdSt(), llvm::AArch64InstrInfo::isPreLdSt(), and MI.
Referenced by canRenameUpToDef(), and isPromotableZeroStoreInst().
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Definition at line 248 of file AArch64LoadStoreOptimizer.cpp.
References llvm::max().
Referenced by areCandidatesToMergeOrPair().
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Definition at line 318 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
Referenced by areCandidatesToMergeOrPair().
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Definition at line 299 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
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Definition at line 481 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
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Definition at line 408 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
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Definition at line 592 of file AArch64LoadStoreOptimizer.cpp.
References llvm::AArch64InstrInfo::getMemScale(), llvm::AArch64InstrInfo::isPairedLdSt(), isTagStore(), and MI.
Definition at line 1187 of file AArch64LoadStoreOptimizer.cpp.
References llvm::Offset.
INITIALIZE_PASS | ( | AArch64LoadStoreOpt | , |
"aarch64-ldst-opt" | , | ||
AARCH64_LOAD_STORE_OPT_NAME | , | ||
false | , | ||
false | |||
) |
Definition at line 219 of file AArch64LoadStoreOptimizer.cpp.
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Definition at line 621 of file AArch64LoadStoreOptimizer.cpp.
References assert(), llvm::MachineOperand::getImm(), llvm::AArch64InstrInfo::getLdStOffsetOp(), isMatchingStore(), and TII.
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Definition at line 378 of file AArch64LoadStoreOptimizer.cpp.
References llvm::Instruction::getOpcode(), and llvm_unreachable.
Referenced by isLdOffsetInRangeOfSt().
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Definition at line 664 of file AArch64LoadStoreOptimizer.cpp.
References llvm::AArch64InstrInfo::getLdStOffsetOp(), isImm(), and MI.
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Definition at line 560 of file AArch64LoadStoreOptimizer.cpp.
References llvm::MachineInstr::getOpcode(), and MI.
Referenced by areCandidatesToMergeOrPair().
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Definition at line 646 of file AArch64LoadStoreOptimizer.cpp.
References MI.
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Definition at line 639 of file AArch64LoadStoreOptimizer.cpp.
References getLdStRegOp(), llvm::MachineOperand::getReg(), and MI.
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Definition at line 236 of file AArch64LoadStoreOptimizer.cpp.
References MI.
Referenced by getPrePostIndexedMemOpInfo().
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Definition at line 1208 of file AArch64LoadStoreOptimizer.cpp.
References llvm::MachineInstr::mayAlias().
Referenced by llvm::HexagonInstrInfo::expandPostRAPseudo().
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Definition at line 1763 of file AArch64LoadStoreOptimizer.cpp.
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Definition at line 1279 of file AArch64LoadStoreOptimizer.cpp.
References llvm::MachineFunction::getFunction(), llvm::TargetMachine::getMCAsmInfo(), llvm::MachineFunction::getTarget(), llvm::Function::needsUnwindTableEntry(), and llvm::MCAsmInfo::usesWindowsCFI().
Referenced by areCandidatesToMergeOrPair().
STATISTIC | ( | NumPairCreated | , |
"Number of load/store pair instructions generated" | |||
) |
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Definition at line 1473 of file AArch64LoadStoreOptimizer.cpp.
References llvm::LiveRegUnits::addReg(), llvm::all_of(), llvm::any_of(), llvm::LiveRegUnits::available(), llvm::dbgs(), llvm::TargetRegisterInfo::getMinimalPhysRegClass(), llvm::TargetRegisterInfo::getRegClassName(), llvm::MachineFunction::getRegInfo(), llvm::MachineRegisterInfo::isReserved(), LLVM_DEBUG, llvm::printReg(), llvm::MCRegisterInfo::sub_and_superregs_inclusive(), and TRI.
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Definition at line 816 of file AArch64LoadStoreOptimizer.cpp.
References llvm::LiveRegUnits::addReg(), MI, llvm::phys_regs_and_masks(), and llvm::LiveRegUnits::removeReg().
Referenced by canRenameUpToDef().