The AMDGPUAsmPrinter is used to print both assembly string and also binary code. More...
#include "AMDGPUAsmPrinter.h"#include "AMDGPU.h"#include "AMDGPUSubtarget.h"#include "AMDGPUTargetMachine.h"#include "MCTargetDesc/AMDGPUInstPrinter.h"#include "MCTargetDesc/AMDGPUMCTargetDesc.h"#include "MCTargetDesc/AMDGPUTargetStreamer.h"#include "R600AsmPrinter.h"#include "R600Defines.h"#include "R600MachineFunctionInfo.h"#include "R600RegisterInfo.h"#include "SIDefines.h"#include "SIInstrInfo.h"#include "SIMachineFunctionInfo.h"#include "SIRegisterInfo.h"#include "TargetInfo/AMDGPUTargetInfo.h"#include "Utils/AMDGPUBaseInfo.h"#include "llvm/BinaryFormat/ELF.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/IR/DiagnosticInfo.h"#include "llvm/MC/MCAssembler.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCSectionELF.h"#include "llvm/MC/MCStreamer.h"#include "llvm/Support/AMDGPUMetadata.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/TargetParser.h"#include "llvm/Support/TargetRegistry.h"#include "llvm/Target/TargetLoweringObjectFile.h"
Go to the source code of this file.
Functions | |
| static uint32_t | getFPMode (const MachineFunction &F) |
| static AsmPrinter * | createAMDGPUAsmPrinterPass (TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer) |
| void | LLVMInitializeAMDGPUAsmPrinter () |
| static bool | hasAnyNonFlatUseOfReg (const MachineRegisterInfo &MRI, const SIInstrInfo &TII, unsigned Reg) |
| static unsigned | getRsrcReg (CallingConv::ID CallConv) |
| static amd_element_byte_size_t | getElementByteSizeValue (unsigned Size) |
Detailed Description
The AMDGPUAsmPrinter is used to print both assembly string and also binary code.
When passed an MCAsmStreamer it prints assembly and when passed an MCObjectStreamer it outputs binary code.
Definition in file AMDGPUAsmPrinter.cpp.
Function Documentation
◆ createAMDGPUAsmPrinterPass()
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Definition at line 89 of file AMDGPUAsmPrinter.cpp.
Referenced by LLVMInitializeAMDGPUAsmPrinter().
◆ getElementByteSizeValue()
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Definition at line 1201 of file AMDGPUAsmPrinter.cpp.
References llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID, AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR, AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT, AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR, AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR, AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK, AMD_CODE_PROPERTY_IS_PTR64, AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED, AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE, AMD_ELEMENT_16_BYTES, AMD_ELEMENT_4_BYTES, AMD_ELEMENT_8_BYTES, AMD_HSA_BITS_SET, llvm::CallingConv::AMDGPU_KERNEL, assert(), amd_kernel_code_s::code_properties, amd_kernel_code_s::compute_pgm_resource_registers, llvm::SIProgramInfo::ComputePGMRSrc1, llvm::SIProgramInfo::ComputePGMRSrc2, llvm::SIProgramInfo::DynamicCallStack, F(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), if(), llvm::AMDGPU::initDefaultAMDKernelCodeT(), amd_kernel_code_s::kernarg_segment_alignment, amd_kernel_code_s::kernarg_segment_byte_size, llvm::SIProgramInfo::LDSSize, llvm_unreachable, llvm::Log2(), llvm::max(), llvm::SIProgramInfo::NumSGPR, llvm::SIProgramInfo::NumVGPR, llvm::SIProgramInfo::ScratchSize, llvm::CallingConv::SPIR_KERNEL, amd_kernel_code_s::wavefront_sgpr_count, amd_kernel_code_s::workgroup_group_segment_byte_size, amd_kernel_code_s::workitem_private_segment_byte_size, and amd_kernel_code_s::workitem_vgpr_count.
◆ getFPMode()
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Definition at line 72 of file AMDGPUAsmPrinter.cpp.
References FP_DENORM_FLUSH_IN_FLUSH_OUT, FP_DENORM_FLUSH_NONE, FP_DENORM_MODE_DP, FP_DENORM_MODE_SP, FP_ROUND_MODE_DP, FP_ROUND_MODE_SP, FP_ROUND_ROUND_TO_NEAREST, llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::hasFP32Denormals(), llvm::GCNSubtarget::hasFP64Denormals(), and llvm::ARM_MB::ST.
Referenced by hasAnyNonFlatUseOfReg().
◆ getRsrcReg()
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Definition at line 1109 of file AMDGPUAsmPrinter.cpp.
References llvm::alignTo(), llvm::CallingConv::AMDGPU_CS, llvm::CallingConv::AMDGPU_ES, llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_LS, llvm::CallingConv::AMDGPU_PS, llvm::CallingConv::AMDGPU_VS, llvm::SIProgramInfo::ComputePGMRSrc1, llvm::SIProgramInfo::ComputePGMRSrc2, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::Value::getName(), llvm::SIMachineFunctionInfo::getNumSpilledSGPRs(), llvm::SIMachineFunctionInfo::getNumSpilledVGPRs(), llvm::AMDGPUTargetStreamer::getPALMetadata(), llvm::SIMachineFunctionInfo::getPSInputAddr(), llvm::SIMachineFunctionInfo::getPSInputEnable(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUAsmPrinter::getTargetStreamer(), llvm::AMDGPU::isCompute(), llvm::GCNSubtarget::isWave32(), llvm::SIProgramInfo::LDSBlocks, LLVM_FALLTHROUGH, llvm::SIProgramInfo::NumSGPRsForWavesPerEU, llvm::SIProgramInfo::NumVGPRsForWavesPerEU, llvm::AsmPrinter::OutStreamer, R_00B028_SPI_SHADER_PGM_RSRC1_PS, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, R_00B128_SPI_SHADER_PGM_RSRC1_VS, R_00B228_SPI_SHADER_PGM_RSRC1_GS, R_00B328_SPI_SHADER_PGM_RSRC1_ES, R_00B428_SPI_SHADER_PGM_RSRC1_HS, R_00B528_SPI_SHADER_PGM_RSRC1_LS, R_00B848_COMPUTE_PGM_RSRC1, R_00B84C_COMPUTE_PGM_RSRC2, R_00B860_COMPUTE_TMPRING_SIZE, R_0286CC_SPI_PS_INPUT_ENA, R_0286D0_SPI_PS_INPUT_ADDR, R_0286E8_SPI_TMPRING_SIZE, R_SPILLED_SGPRS, R_SPILLED_VGPRS, S_00B028_SGPRS, S_00B028_VGPRS, S_00B02C_EXTRA_LDS_SIZE, S_00B84C_SCRATCH_EN, S_00B860_WAVESIZE, S_0286E8_WAVESIZE, llvm::SIProgramInfo::ScratchBlocks, llvm::SIProgramInfo::ScratchSize, llvm::AMDGPUPALMetadata::setEntryPoint(), llvm::SIProgramInfo::SGPRBlocks, and llvm::SIProgramInfo::VGPRBlocks.
◆ hasAnyNonFlatUseOfReg()
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Definition at line 591 of file AMDGPUAsmPrinter.cpp.
References llvm::alignTo(), Arg, llvm::Function::args(), assert(), Callee, llvm::GCNSubtarget::computeOccupancy(), llvm::SIProgramInfo::ComputePGMRSrc1, llvm::SIProgramInfo::ComputePGMRSrc2, contains(), llvm::SIProgramInfo::DebugMode, llvm::LLVMContext::diagnose(), llvm::DK_ResourceLimit, llvm::Function::doesNotRecurse(), llvm::DS_Error, llvm::SIProgramInfo::DX10Clamp, llvm::AMDGPU::SIModeRegisterDefaults::DX10Clamp, llvm::SIProgramInfo::DynamicCallStack, llvm::AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, llvm::SIProgramInfo::FlatUsed, llvm::SIProgramInfo::FloatMode, llvm::GCNSubtarget::getAddressableNumSGPRs(), llvm::Function::getCallingConv(), llvm::Function::getContext(), llvm::getCPU(), getFPMode(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::GCNSubtarget::getGeneration(), llvm::MachineOperand::getGlobal(), llvm::AMDGPUAsmPrinter::getGlobalSTI(), llvm::SIRegisterInfo::getHWRegIndex(), llvm::MachineFunction::getInfo(), llvm::AMDGPU::getIsaVersion(), llvm::AMDGPUMachineFunction::getLDSSize(), llvm::SIMachineFunctionInfo::getLDSWaveSpillSize(), llvm::AMDGPUSubtarget::getLocalMemorySize(), llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize(), llvm::GCNSubtarget::getMaxNumUserSGPRs(), llvm::SIMachineFunctionInfo::getMaxWavesPerEU(), llvm::GCNSubtarget::getMinNumSGPRs(), llvm::GCNSubtarget::getMinNumVGPRs(), llvm::SIMachineFunctionInfo::getMode(), llvm::SIInstrInfo::getNamedOperand(), llvm::AMDGPU::IsaInfo::getNumExtraSGPRs(), llvm::AMDGPU::IsaInfo::getNumSGPRBlocks(), llvm::SIMachineFunctionInfo::getNumUserSGPRs(), llvm::AMDGPU::IsaInfo::getNumVGPRBlocks(), llvm::MachineFunction::getRegInfo(), llvm::SIInstrInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPU::IsaInfo::getTotalNumSGPRs(), llvm::AMDGPU::IsaInfo::getTotalNumVGPRs(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::SIMachineFunctionInfo::hasFlatScratchInit(), llvm::GCNSubtarget::hasSGPRInitBug(), llvm::SIMachineFunctionInfo::hasWorkGroupIDX(), llvm::SIMachineFunctionInfo::hasWorkGroupIDY(), llvm::SIMachineFunctionInfo::hasWorkGroupIDZ(), llvm::SIMachineFunctionInfo::hasWorkGroupInfo(), llvm::SIMachineFunctionInfo::hasWorkItemIDY(), llvm::SIMachineFunctionInfo::hasWorkItemIDZ(), I, llvm::AMDGPU::SIModeRegisterDefaults::IEEE, llvm::SIProgramInfo::IEEEMode, Info, llvm::AMDGPUSubtarget::isAmdHsaOS(), llvm::GCNSubtarget::isCuModeEnabled(), llvm::GlobalValue::isDeclaration(), llvm::AMDGPU::isEntryFunctionCC(), llvm::SIInstrInfo::isFLAT(), llvm::MachineRegisterInfo::isPhysRegUsed(), llvm::SIMachineFunctionInfo::isStackRealigned(), llvm::GCNSubtarget::isTrapHandlerEnabled(), llvm::isUInt< 32 >(), llvm::SIProgramInfo::LDSBlocks, llvm::SIProgramInfo::LDSSize, llvm_unreachable, llvm::max(), llvm::SIProgramInfo::MemOrdered, MI, Mode, MRI, llvm::SIProgramInfo::NumAccVGPR, llvm::SIProgramInfo::NumArchVGPR, llvm::SIProgramInfo::NumSGPR, llvm::SIProgramInfo::NumSGPRsForWavesPerEU, llvm::SIProgramInfo::NumVGPR, llvm::SIProgramInfo::NumVGPRsForWavesPerEU, llvm::SIProgramInfo::Occupancy, llvm::SIProgramInfo::Priority, llvm::SIProgramInfo::Priv, Reg, llvm::MachineRegisterInfo::reg_operands(), llvm::report_fatal_error(), llvm::reverse(), S_00B848_DEBUG_MODE, S_00B848_DX10_CLAMP, S_00B848_FLOAT_MODE, S_00B848_IEEE_MODE, S_00B848_MEM_ORDERED, S_00B848_PRIORITY, S_00B848_PRIV, S_00B848_SGPRS, S_00B848_VGPRS, S_00B848_WGP_MODE, S_00B84C_EXCP_EN, S_00B84C_EXCP_EN_MSB, S_00B84C_LDS_SIZE, S_00B84C_SCRATCH_EN, S_00B84C_TG_SIZE_EN, S_00B84C_TGID_X_EN, S_00B84C_TGID_Y_EN, S_00B84C_TGID_Z_EN, S_00B84C_TIDIG_COMP_CNT, S_00B84C_TRAP_HANDLER, S_00B84C_USER_SGPR, llvm::SIProgramInfo::ScratchBlocks, llvm::SIProgramInfo::ScratchSize, llvm::AMDGPUSubtarget::SEA_ISLANDS, llvm::SIProgramInfo::SGPRBlocks, llvm::ARM_MB::ST, TII, TRI, llvm::SIProgramInfo::VCCUsed, llvm::SIProgramInfo::VGPRBlocks, llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS, and llvm::SIProgramInfo::WgpMode.
◆ LLVMInitializeAMDGPUAsmPrinter()
| void LLVMInitializeAMDGPUAsmPrinter | ( | ) |
Definition at line 94 of file AMDGPUAsmPrinter.cpp.
References createAMDGPUAsmPrinterPass(), llvm::createR600AsmPrinterPass(), llvm::getTheAMDGPUTarget(), llvm::getTheGCNTarget(), and llvm::TargetRegistry::RegisterAsmPrinter().
