#include "Target/AMDGPU/GCNSubtarget.h"

Inheritance diagram for llvm::GCNSubtarget:

Collaboration diagram for llvm::GCNSubtarget:

[legend]

Public Types
enum	TrapHandlerAbi { TrapHandlerAbi::NONE = 0x00, TrapHandlerAbi::AMDHSA = 0x01 }

enum	TrapID { TrapID::LLVMAMDHSATrap = 0x02, TrapID::LLVMAMDHSADebugTrap = 0x03 }

Public Types inherited from llvm::AMDGPUSubtarget
enum	Generation { INVALID = 0, R600 = 1, R700 = 2, EVERGREEN = 3, NORTHERN_ISLANDS = 4, SOUTHERN_ISLANDS = 5, SEA_ISLANDS = 6, VOLCANIC_ISLANDS = 7, GFX9 = 8, GFX10 = 9 }

Public Member Functions
	GCNSubtarget (const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM)

	~GCNSubtarget () override

GCNSubtarget &	initializeSubtargetDependencies (const Triple &TT, StringRef GPU, StringRef FS)

const SIInstrInfo *	getInstrInfo () const override

const SIFrameLowering *	getFrameLowering () const override

const SITargetLowering *	getTargetLowering () const override

const SIRegisterInfo *	getRegisterInfo () const override

const CallLowering *	getCallLowering () const override

const InlineAsmLowering *	getInlineAsmLowering () const override

InstructionSelector *	getInstructionSelector () const override

const LegalizerInfo *	getLegalizerInfo () const override

const RegisterBankInfo *	getRegBankInfo () const override

const AMDGPU::IsaInfo::AMDGPUTargetID &	getTargetID () const

const SelectionDAGTargetInfo *	getSelectionDAGInfo () const override

const InstrItineraryData *	getInstrItineraryData () const override

void	ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)

Generation	getGeneration () const

unsigned	getKnownHighZeroBitsForFrameIndex () const
	Return the number of high bits known to be zero for a frame index. More...

int	getLDSBankCount () const

unsigned	getMaxPrivateElementSize (bool ForBufferRSrc=false) const

unsigned	getConstantBusLimit (unsigned Opcode) const

bool	zeroesHigh16BitsOfDest (unsigned Opcode) const
	Returns if the result of this instruction with a 16-bit result returned in a 32-bit register implicitly zeroes the high 16-bits, rather than preserve the original value. More...

bool	hasIntClamp () const

bool	hasFP64 () const

bool	hasMIMG_R128 () const

bool	hasHWFP64 () const

bool	hasFastFMAF32 () const

bool	hasHalfRate64Ops () const

bool	hasFullRate64Ops () const

bool	hasAddr64 () const

bool	hasFlat () const

bool	hasOnlyRevVALUShifts () const

bool	hasFractBug () const

bool	hasBFE () const

bool	hasBFI () const

bool	hasBFM () const

bool	hasBCNT (unsigned Size) const

bool	hasFFBL () const

bool	hasFFBH () const

bool	hasMed3_16 () const

bool	hasMin3Max3_16 () const

bool	hasFmaMixInsts () const

bool	hasCARRY () const

bool	hasFMA () const

bool	hasSwap () const

bool	hasScalarPackInsts () const

bool	hasScalarMulHiInsts () const

TrapHandlerAbi	getTrapHandlerAbi () const

bool	supportsGetDoorbellID () const

bool	hasUsableDSOffset () const
	True if the offset field of DS instructions works as expected. More...

bool	unsafeDSOffsetFoldingEnabled () const

bool	hasUsableDivScaleConditionOutput () const
	Condition output from div_scale is usable. More...

bool	hasReadVCCZBug () const
	Extra wait hazard is needed in some cases before s_cbranch_vccnz/s_cbranch_vccz. More...

bool	partialVCCWritesUpdateVCCZ () const
	Writes to VCC_LO/VCC_HI update the VCCZ flag. More...

bool	hasSMRDReadVALUDefHazard () const
	A read of an SGPR by SMRD instruction requires 4 wait states when the SGPR was written by a VALU instruction. More...

bool	hasVMEMReadSGPRVALUDefHazard () const
	A read of an SGPR by a VMEM instruction requires 5 wait states when the SGPR was written by a VALU Instruction. More...

bool	hasRFEHazards () const

unsigned	getSetRegWaitStates () const
	Number of hazard wait states for s_setreg_b32/s_setreg_imm32_b32. More...

bool	dumpCode () const

unsigned	getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
	Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount. More...

bool	supportsMinMaxDenormModes () const

bool	hasDenormModeInst () const

bool	useFlatForGlobal () const

bool	useDS128 () const

bool	hasDS96AndDS128 () const

bool	haveRoundOpsF64 () const
	Have v_trunc_f64, v_ceil_f64, v_rndne_f64. More...

bool	privateMemoryResourceIsRangeChecked () const

bool	usePRTStrictNull () const

bool	hasAutoWaitcntBeforeBarrier () const

bool	hasUnalignedBufferAccess () const

bool	hasUnalignedBufferAccessEnabled () const

bool	hasUnalignedDSAccess () const

bool	hasUnalignedDSAccessEnabled () const

bool	hasUnalignedScratchAccess () const

bool	hasUnalignedAccessMode () const

bool	hasApertureRegs () const

bool	isTrapHandlerEnabled () const

bool	isXNACKEnabled () const

bool	isTgSplitEnabled () const

bool	isCuModeEnabled () const

bool	hasFlatAddressSpace () const

bool	hasFlatScrRegister () const

bool	hasFlatInstOffsets () const

bool	hasFlatGlobalInsts () const

bool	hasFlatScratchInsts () const

bool	hasFlatScratchSTMode () const

bool	hasScalarFlatScratchInsts () const

bool	hasGlobalAddTidInsts () const

bool	hasAtomicCSub () const

bool	hasMultiDwordFlatScratchAddressing () const

bool	hasFlatSegmentOffsetBug () const

bool	hasFlatLgkmVMemCountInOrder () const

bool	hasD16LoadStore () const

bool	d16PreservesUnusedBits () const

bool	hasD16Images () const

bool	ldsRequiresM0Init () const
	Return if most LDS instructions have an m0 use that require m0 to be initialized. More...

bool	hasGWSAutoReplay () const

bool	hasGWSSemaReleaseAll () const

bool	hasAddNoCarry () const

bool	hasUnpackedD16VMem () const

bool	isMesaGfxShader (const Function &F) const

bool	hasMad64_32 () const

bool	hasSDWAOmod () const

bool	hasSDWAScalar () const

bool	hasSDWASdst () const

bool	hasSDWAMac () const

bool	hasSDWAOutModsVOPC () const

bool	hasDLInsts () const

bool	hasDot1Insts () const

bool	hasDot2Insts () const

bool	hasDot3Insts () const

bool	hasDot4Insts () const

bool	hasDot5Insts () const

bool	hasDot6Insts () const

bool	hasDot7Insts () const

bool	hasMAIInsts () const

bool	hasPkFmacF16Inst () const

bool	hasAtomicFaddInsts () const

bool	hasNoSdstCMPX () const

bool	hasVscnt () const

bool	hasGetWaveIdInst () const

bool	hasSMemTimeInst () const

bool	hasShaderCyclesRegister () const

bool	hasRegisterBanking () const

bool	hasVOP3Literal () const

bool	hasNoDataDepHazard () const

bool	vmemWriteNeedsExpWaitcnt () const

Align	getStackAlignment () const

bool	enableMachineScheduler () const override

bool	useAA () const override

bool	enableSubRegLiveness () const override

void	setScalarizeGlobalBehavior (bool b)

bool	getScalarizeGlobalBehavior () const

bool	enableEarlyIfConversion () const override

bool	enableFlatScratch () const

void	overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override

unsigned	getMaxNumUserSGPRs () const

bool	hasSMemRealTime () const

bool	hasMovrel () const

bool	hasVGPRIndexMode () const

bool	useVGPRIndexMode () const

bool	hasScalarCompareEq64 () const

bool	hasScalarStores () const

bool	hasScalarAtomics () const

bool	hasLDSFPAtomicAdd () const

bool	hasPermLaneX16 () const

bool	hasDPP () const

bool	hasDPPBroadcasts () const

bool	hasDPPWavefrontShifts () const

bool	hasDPP8 () const

bool	has64BitDPP () const

bool	hasPackedFP32Ops () const

bool	hasFmaakFmamkF32Insts () const

bool	hasExtendedImageInsts () const

bool	hasR128A16 () const

bool	hasGFX10A16 () const

bool	hasA16 () const

bool	hasG16 () const

bool	hasOffset3fBug () const

bool	hasImageStoreD16Bug () const

bool	hasImageGather4D16Bug () const

bool	hasNSAEncoding () const

unsigned	getNSAMaxSize () const

bool	hasGFX10_AEncoding () const

bool	hasGFX10_BEncoding () const

bool	hasGFX10_3Insts () const

bool	hasMadF16 () const

bool	enableSIScheduler () const

bool	loadStoreOptEnabled () const

bool	hasSGPRInitBug () const

bool	hasNegativeScratchOffsetBug () const

bool	hasNegativeUnalignedScratchOffsetBug () const

bool	hasMFMAInlineLiteralBug () const

bool	has12DWordStoreHazard () const

bool	hasDwordx3LoadStores () const

bool	hasReadM0MovRelInterpHazard () const

bool	hasReadM0SendMsgHazard () const

bool	hasVcmpxPermlaneHazard () const

bool	hasVMEMtoScalarWriteHazard () const

bool	hasSMEMtoVectorWriteHazard () const

bool	hasLDSMisalignedBug () const

bool	hasInstFwdPrefetchBug () const

bool	hasVcmpxExecWARHazard () const

bool	hasLdsBranchVmemWARHazard () const

bool	hasNSAtoVMEMBug () const

bool	hasNSAClauseBug () const

bool	hasHardClauses () const

bool	hasGFX90AInsts () const

bool	needsAlignedVGPRs () const
	Return if operations acting on VGPR tuples require even alignment. More...

bool	hasPackedTID () const

unsigned	getOccupancyWithNumSGPRs (unsigned SGPRs) const
	Return the maximum number of waves per SIMD for kernels using `SGPRs` SGPRs. More...

unsigned	getOccupancyWithNumVGPRs (unsigned VGPRs) const
	Return the maximum number of waves per SIMD for kernels using `VGPRs` VGPRs. More...

unsigned	computeOccupancy (const Function &F, unsigned LDSSize=0, unsigned NumSGPRs=0, unsigned NumVGPRs=0) const
	Return occupancy for the given function. More...

bool	flatScratchIsPointer () const

bool	flatScratchIsArchitected () const

bool	hasMergedShaders () const

unsigned	getSGPRAllocGranule () const

unsigned	getSGPREncodingGranule () const

unsigned	getTotalNumSGPRs () const

unsigned	getAddressableNumSGPRs () const

unsigned	getMinNumSGPRs (unsigned WavesPerEU) const

unsigned	getMaxNumSGPRs (unsigned WavesPerEU, bool Addressable) const

unsigned	getBaseReservedNumSGPRs (const bool HasFlatScratchInit) const

unsigned	getReservedNumSGPRs (const MachineFunction &MF) const

unsigned	getReservedNumSGPRs (const Function &F) const

unsigned	getBaseMaxNumSGPRs (const Function &F, std::pair< unsigned, unsigned > WavesPerEU, unsigned PreloadedSGPRs, unsigned ReservedNumSGPRs) const

unsigned	getMaxNumSGPRs (const MachineFunction &MF) const

unsigned	getMaxNumSGPRs (const Function &F) const

unsigned	getVGPRAllocGranule () const

unsigned	getVGPREncodingGranule () const

unsigned	getTotalNumVGPRs () const

unsigned	getAddressableNumVGPRs () const

unsigned	getMinNumVGPRs (unsigned WavesPerEU) const

unsigned	getMaxNumVGPRs (unsigned WavesPerEU) const

unsigned	getBaseMaxNumVGPRs (const Function &F, std::pair< unsigned, unsigned > WavesPerEU) const

unsigned	getMaxNumVGPRs (const Function &F) const

unsigned	getMaxNumVGPRs (const MachineFunction &MF) const

void	getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override

std::unique_ptr< ScheduleDAGMutation >	createFillMFMAShadowMutation (const TargetInstrInfo *TII) const

bool	isWave32 () const

bool	isWave64 () const

const TargetRegisterClass *	getBoolRC () const

unsigned	getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const override

unsigned	getMinFlatWorkGroupSize () const override

unsigned	getMaxFlatWorkGroupSize () const override

unsigned	getWavesPerEUForWorkGroup (unsigned FlatWorkGroupSize) const override

unsigned	getMinWavesPerEU () const override

void	adjustSchedDependency (SUnit Def, int DefOpIdx, SUnit Use, int UseOpIdx, SDep &Dep) const override

Public Member Functions inherited from llvm::AMDGPUSubtarget
	AMDGPUSubtarget (const Triple &TT)

std::pair< unsigned, unsigned >	getDefaultFlatWorkGroupSize (CallingConv::ID CC) const

std::pair< unsigned, unsigned >	getFlatWorkGroupSizes (const Function &F) const

std::pair< unsigned, unsigned >	getWavesPerEU (const Function &F) const

unsigned	getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
	Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount. More...

unsigned	getOccupancyWithLocalMemSize (uint32_t Bytes, const Function &) const
	Inverse of getMaxLocalMemWithWaveCount. More...

unsigned	getOccupancyWithLocalMemSize (const MachineFunction &MF) const

bool	isAmdHsaOS () const

bool	isAmdPalOS () const

bool	isMesa3DOS () const

bool	isMesaKernel (const Function &F) const

bool	isAmdHsaOrMesa (const Function &F) const

bool	isGCN () const

bool	isGCN3Encoding () const

bool	has16BitInsts () const

bool	hasMadMixInsts () const

bool	hasMadMacF32Insts () const

bool	hasDsSrc2Insts () const

bool	hasSDWA () const

bool	hasVOP3PInsts () const

bool	hasMulI24 () const

bool	hasMulU24 () const

bool	hasSMulHi () const

bool	hasInv2PiInlineImm () const

bool	hasFminFmaxLegacy () const

bool	hasTrigReducedRange () const

bool	isPromoteAllocaEnabled () const

unsigned	getWavefrontSize () const

unsigned	getWavefrontSizeLog2 () const

unsigned	getLocalMemorySize () const

Align	getAlignmentForImplicitArgPtr () const

unsigned	getExplicitKernelArgOffset (const Function &F) const
	Returns the offset in bytes from the start of the input buffer of the first explicit kernel argument. More...

unsigned	getMaxWavesPerEU () const

unsigned	getMaxWorkitemID (const Function &Kernel, unsigned Dimension) const
	Return the maximum workitem ID value in the function, for the given (0, 1, 2) dimension. More...

bool	makeLIDRangeMetadata (Instruction *I) const
	Creates value range metadata on an workitemid.* intrinsic call or load. More...

unsigned	getImplicitArgNumBytes (const Function &F) const

uint64_t	getExplicitKernArgSize (const Function &F, Align &MaxAlign) const

unsigned	getKernArgSegmentSize (const Function &F, Align &MaxAlign) const

AMDGPUDwarfFlavour	getAMDGPUDwarfFlavour () const

virtual	~AMDGPUSubtarget ()

Static Public Member Functions
static bool	hasHalfRate64Ops (const TargetSubtargetInfo &STI)

Static Public Member Functions inherited from llvm::AMDGPUSubtarget
static const AMDGPUSubtarget &	get (const MachineFunction &MF)

static const AMDGPUSubtarget &	get (const TargetMachine &TM, const Function &F)

Static Public Attributes
static const unsigned	MaxWaveScratchSize = (256 * 4) * ((1 << 13) - 1)

Protected Attributes
Triple	TargetTriple

AMDGPU::IsaInfo::AMDGPUTargetID	TargetID

unsigned	Gen

InstrItineraryData	InstrItins

int	LDSBankCount

unsigned	MaxPrivateElementSize

bool	FastFMAF32

bool	FastDenormalF32

bool	HalfRate64Ops

bool	FullRate64Ops

bool	FlatForGlobal

bool	AutoWaitcntBeforeBarrier

bool	UnalignedScratchAccess

bool	UnalignedAccessMode

bool	HasApertureRegs

bool	SupportsXNACK

bool	EnableXNACK

bool	EnableTgSplit

bool	EnableCuMode

bool	TrapHandler

bool	EnableLoadStoreOpt

bool	EnableUnsafeDSOffsetFolding

bool	EnableSIScheduler

bool	EnableDS128

bool	EnablePRTStrictNull

bool	DumpCode

bool	FP64

bool	FMA

bool	MIMG_R128

bool	IsGCN

bool	CIInsts

bool	GFX8Insts

bool	GFX9Insts

bool	GFX90AInsts

bool	GFX10Insts

bool	GFX10_3Insts

bool	GFX7GFX8GFX9Insts

bool	SGPRInitBug

bool	NegativeScratchOffsetBug

bool	NegativeUnalignedScratchOffsetBug

bool	HasSMemRealTime

bool	HasIntClamp

bool	HasFmaMixInsts

bool	HasMovrel

bool	HasVGPRIndexMode

bool	HasScalarStores

bool	HasScalarAtomics

bool	HasSDWAOmod

bool	HasSDWAScalar

bool	HasSDWASdst

bool	HasSDWAMac

bool	HasSDWAOutModsVOPC

bool	HasDPP

bool	HasDPP8

bool	Has64BitDPP

bool	HasPackedFP32Ops

bool	HasExtendedImageInsts

bool	HasR128A16

bool	HasGFX10A16

bool	HasG16

bool	HasNSAEncoding

unsigned	NSAMaxSize

bool	GFX10_AEncoding

bool	GFX10_BEncoding

bool	HasDLInsts

bool	HasDot1Insts

bool	HasDot2Insts

bool	HasDot3Insts

bool	HasDot4Insts

bool	HasDot5Insts

bool	HasDot6Insts

bool	HasDot7Insts

bool	HasMAIInsts

bool	HasPkFmacF16Inst

bool	HasAtomicFaddInsts

bool	SupportsSRAMECC

bool	EnableSRAMECC

bool	HasNoSdstCMPX

bool	HasVscnt

bool	HasGetWaveIdInst

bool	HasSMemTimeInst

bool	HasShaderCyclesRegister

bool	HasRegisterBanking

bool	HasVOP3Literal

bool	HasNoDataDepHazard

bool	FlatAddressSpace

bool	FlatInstOffsets

bool	FlatGlobalInsts

bool	FlatScratchInsts

bool	ScalarFlatScratchInsts

bool	HasArchitectedFlatScratch

bool	AddNoCarryInsts

bool	HasUnpackedD16VMem

bool	R600ALUInst

bool	CaymanISA

bool	CFALUBug

bool	LDSMisalignedBug

bool	HasMFMAInlineLiteralBug

bool	HasVertexCache

short	TexVTXClauseSize

bool	UnalignedBufferAccess

bool	UnalignedDSAccess

bool	HasPackedTID

bool	ScalarizeGlobal

bool	HasVcmpxPermlaneHazard

bool	HasVMEMtoScalarWriteHazard

bool	HasSMEMtoVectorWriteHazard

bool	HasInstFwdPrefetchBug

bool	HasVcmpxExecWARHazard

bool	HasLdsBranchVmemWARHazard

bool	HasNSAtoVMEMBug

bool	HasNSAClauseBug

bool	HasOffset3fBug

bool	HasFlatSegmentOffsetBug

bool	HasImageStoreD16Bug

bool	HasImageGather4D16Bug

bool	FeatureDisable

SelectionDAGTargetInfo	TSInfo

Protected Attributes inherited from llvm::AMDGPUSubtarget
bool	GCN3Encoding

bool	Has16BitInsts

bool	HasMadMixInsts

bool	HasMadMacF32Insts

bool	HasDsSrc2Insts

bool	HasSDWA

bool	HasVOP3PInsts

bool	HasMulI24

bool	HasMulU24

bool	HasSMulHi

bool	HasInv2PiInlineImm

bool	HasFminFmaxLegacy

bool	EnablePromoteAlloca

bool	HasTrigReducedRange

unsigned	MaxWavesPerEU

unsigned	LocalMemorySize

char	WavefrontSizeLog2

Detailed Description

Definition at line 31 of file GCNSubtarget.h.

Member Enumeration Documentation

◆ TrapHandlerAbi

enum llvm::GCNSubtarget::TrapHandlerAbi

strong

Enumerator
NONE
AMDHSA

Definition at line 39 of file GCNSubtarget.h.

◆ TrapID

enum llvm::GCNSubtarget::TrapID

strong

Enumerator
LLVMAMDHSATrap
LLVMAMDHSADebugTrap

Definition at line 44 of file GCNSubtarget.h.

Constructor & Destructor Documentation

◆ GCNSubtarget()

GCNSubtarget::GCNSubtarget	(	const Triple &	TT,
		StringRef	GPU,
		StringRef	FS,
		const GCNTargetMachine &	TM
	)

Definition at line 183 of file AMDGPUSubtarget.cpp.

References llvm::AMDGPU::IsaInfo::getMaxWavesPerEU(), getTargetLowering(), llvm::AMDGPUSubtarget::MaxWavesPerEU, and TM.

◆ ~GCNSubtarget()

GCNSubtarget::~GCNSubtarget ( )

overridedefault

Member Function Documentation

◆ adjustSchedDependency()

void GCNSubtarget::adjustSchedDependency	(	SUnit *	Def,
		int	DefOpIdx,
		SUnit *	Use,
		int	UseOpIdx,
		SDep &	Dep
	)		const

override

Definition at line 939 of file AMDGPUSubtarget.cpp.

References llvm::Data, llvm::tgtok::Def, E, getInstrItineraryData(), llvm::SIInstrInfo::getInstrLatency(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::SDep::getKind(), llvm::MachineInstr::getParent(), llvm::SDep::getReg(), getRegisterInfo(), I, llvm::MachineBasicBlock::instr_end(), llvm::MachineInstr::isBundle(), Reg, llvm::SDep::setLatency(), and TRI.

◆ computeOccupancy()

unsigned GCNSubtarget::computeOccupancy	(	const Function &	F,
		unsigned	LDSSize = `0`,
		unsigned	NumSGPRs = `0`,
		unsigned	NumVGPRs = `0`
	)		const

Return occupancy for the given function.

Used LDS and a number of registers if provided. Note, occupancy can be affected by the scratch allocation as well, but we do not have enough information to compute it.

Definition at line 809 of file AMDGPUSubtarget.cpp.

References F, llvm::AMDGPUSubtarget::getMaxWavesPerEU(), llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize(), getOccupancyWithNumSGPRs(), getOccupancyWithNumVGPRs(), llvm::min(), llvm::AMDGPU::HSAMD::Kernel::CodeProps::Key::NumSGPRs, and llvm::AMDGPU::HSAMD::Kernel::CodeProps::Key::NumVGPRs.

◆ createFillMFMAShadowMutation()

std::unique_ptr< ScheduleDAGMutation > GCNSubtarget::createFillMFMAShadowMutation ( const TargetInstrInfo * TII ) const

Definition at line 1107 of file AMDGPUSubtarget.cpp.

◆ d16PreservesUnusedBits()

bool llvm::GCNSubtarget::d16PreservesUnusedBits ( ) const

inline

Definition at line 599 of file GCNSubtarget.h.

References hasD16LoadStore(), llvm::AMDGPU::IsaInfo::AMDGPUTargetID::isSramEccOnOrAny(), and TargetID.

◆ dumpCode()

bool llvm::GCNSubtarget::dumpCode ( ) const

inline

Definition at line 446 of file GCNSubtarget.h.

References DumpCode.

Referenced by llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ enableEarlyIfConversion()

bool llvm::GCNSubtarget::enableEarlyIfConversion ( ) const

inlineoverride

Definition at line 775 of file GCNSubtarget.h.

◆ enableFlatScratch()

bool GCNSubtarget::enableFlatScratch ( ) const

Definition at line 318 of file AMDGPUSubtarget.cpp.

References EnableFlatScratch, flatScratchIsArchitected(), and hasFlatScratchInsts().

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), llvm::SIRegisterInfo::buildVGPRSpillLoadStore(), llvm::SIRegisterInfo::eliminateFrameIndex(), getMaxPrivateElementSize(), getReservedNumSGPRs(), llvm::SITargetLowering::LowerCall(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SIRegisterInfo::materializeFrameBaseRegister().

◆ enableMachineScheduler()

bool llvm::GCNSubtarget::enableMachineScheduler ( ) const

inlineoverride

Definition at line 758 of file GCNSubtarget.h.

◆ enableSIScheduler()

bool llvm::GCNSubtarget::enableSIScheduler ( ) const

inline

Definition at line 889 of file GCNSubtarget.h.

References EnableSIScheduler.

Referenced by overrideSchedPolicy().

◆ enableSubRegLiveness()

bool llvm::GCNSubtarget::enableSubRegLiveness ( ) const

inlineoverride

Definition at line 764 of file GCNSubtarget.h.

◆ flatScratchIsArchitected()

bool llvm::GCNSubtarget::flatScratchIsArchitected ( ) const

inline

Returns: true if the flat_scratch register is initialized by the HW. In this case it is readonly.

Definition at line 995 of file GCNSubtarget.h.

References HasArchitectedFlatScratch.

Referenced by enableFlatScratch(), and getReservedNumSGPRs().

◆ flatScratchIsPointer()

bool llvm::GCNSubtarget::flatScratchIsPointer ( ) const

inline

Returns: true if the flat_scratch register should be initialized with the pointer to the wave's scratch memory rather than a size and offset.

Definition at line 989 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ getAddressableNumSGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumSGPRs ( ) const

inline

Returns: Addressable number of SGPRs supported by the subtarget.

Definition at line 1019 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs().

◆ getAddressableNumVGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumVGPRs ( ) const

inline

Returns: Addressable number of VGPRs supported by the subtarget.

Definition at line 1089 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs().

◆ getBaseMaxNumSGPRs()

unsigned GCNSubtarget::getBaseMaxNumSGPRs	(	const Function &	F,
		std::pair< unsigned, unsigned >	WavesPerEU,
		unsigned	PreloadedSGPRs,
		unsigned	ReservedNumSGPRs
	)		const

Returns: max num SGPRs. This is the common utility function called by MachineFunction and Function variants of getMaxNumSGPRs.

Definition at line 822 of file AMDGPUSubtarget.cpp.

References F, llvm::AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, llvm::AMDGPU::getIntegerAttribute(), getMaxNumSGPRs(), getMinNumSGPRs(), hasSGPRInitBug(), and llvm::min().

Referenced by getMaxNumSGPRs().

◆ getBaseMaxNumVGPRs()

unsigned GCNSubtarget::getBaseMaxNumVGPRs	(	const Function &	F,
		std::pair< unsigned, unsigned >	WavesPerEU
	)		const

Returns: max num VGPRs. This is the common utility function called by MachineFunction and Function variants of getMaxNumVGPRs.

Definition at line 899 of file AMDGPUSubtarget.cpp.

References F, llvm::AMDGPU::getIntegerAttribute(), getMaxNumVGPRs(), getMinNumVGPRs(), and hasGFX90AInsts().

Referenced by getMaxNumVGPRs().

◆ getBaseReservedNumSGPRs()

unsigned GCNSubtarget::getBaseReservedNumSGPRs ( const bool HasFlatScratchInit ) const

Returns: Reserved number of SGPRs. This is common utility function called by MachineFunction and Function variants of getReservedNumSGPRs.

Definition at line 771 of file AMDGPUSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, isXNACKEnabled(), llvm::AMDGPUSubtarget::SEA_ISLANDS, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by getReservedNumSGPRs().

◆ getBoolRC()

const TargetRegisterClass* llvm::GCNSubtarget::getBoolRC ( ) const

inline

Definition at line 1144 of file GCNSubtarget.h.

References llvm::SIRegisterInfo::getBoolRC(), and getRegisterInfo().

◆ getCallLowering()

const CallLowering* llvm::GCNSubtarget::getCallLowering ( ) const

inlineoverride

Definition at line 229 of file GCNSubtarget.h.

◆ getConstantBusLimit()

unsigned GCNSubtarget::getConstantBusLimit ( unsigned Opcode ) const

Definition at line 323 of file AMDGPUSubtarget.cpp.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

Referenced by llvm::SIInstrInfo::convertToThreeAddress(), llvm::SIInstrInfo::FoldImmediate(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), and llvm::SIInstrInfo::verifyInstruction().

◆ getFrameLowering()

const SIFrameLowering* llvm::GCNSubtarget::getFrameLowering ( ) const

inlineoverride

Definition at line 217 of file GCNSubtarget.h.

◆ getGeneration()

Generation llvm::GCNSubtarget::getGeneration ( ) const

inline

Definition at line 264 of file GCNSubtarget.h.

References Gen.

Referenced by flatScratchIsPointer(), getBaseReservedNumSGPRs(), getConstantBusLimit(), llvm::SIInstrInfo::getDefaultRsrcDataFormat(), getOccupancyWithNumSGPRs(), llvm::SIInstrInfo::getScratchRsrcWords23(), getSetRegWaitStates(), has12DWordStoreHazard(), hasAddr64(), hasD16Images(), hasD16LoadStore(), hasDenormModeInst(), hasDPPBroadcasts(), hasDPPWavefrontShifts(), hasFlat(), hasFlatLgkmVMemCountInOrder(), hasFmaakFmamkF32Insts(), hasFractBug(), hasGWSAutoReplay(), hasHardClauses(), hasMad64_32(), hasMed3_16(), hasMergedShaders(), hasMin3Max3_16(), hasMultiDwordFlatScratchAddressing(), hasOnlyRevVALUShifts(), hasPermLaneX16(), hasReadM0MovRelInterpHazard(), hasReadM0SendMsgHazard(), hasReadVCCZBug(), hasRFEHazards(), hasScalarCompareEq64(), hasSMRDReadVALUDefHazard(), hasUsableDivScaleConditionOutput(), hasUsableDSOffset(), hasVMEMReadSGPRVALUDefHazard(), initializeSubtargetDependencies(), llvm::SITargetLowering::isLegalAddressingMode(), ldsRequiresM0Init(), llvm::AMDGPULegalizerInfo::legalizeRsqClampIntrinsic(), llvm::SITargetLowering::LowerFormalArguments(), partialVCCWritesUpdateVCCZ(), privateMemoryResourceIsRangeChecked(), llvm::SIInstrInfo::pseudoToMCOpcode(), llvm::AMDGPU::splitMUBUFOffset(), supportsGetDoorbellID(), supportsMinMaxDenormModes(), vmemWriteNeedsExpWaitcnt(), and zeroesHigh16BitsOfDest().

◆ getInlineAsmLowering()

const InlineAsmLowering* llvm::GCNSubtarget::getInlineAsmLowering ( ) const

inlineoverride

Definition at line 233 of file GCNSubtarget.h.

◆ getInstrInfo()

const SIInstrInfo* llvm::GCNSubtarget::getInstrInfo ( ) const

inlineoverride

Definition at line 213 of file GCNSubtarget.h.

◆ getInstrItineraryData()

const InstrItineraryData* llvm::GCNSubtarget::getInstrItineraryData ( ) const

inlineoverride

Definition at line 258 of file GCNSubtarget.h.

References InstrItins.

Referenced by adjustSchedDependency().

◆ getInstructionSelector()

InstructionSelector* llvm::GCNSubtarget::getInstructionSelector ( ) const

inlineoverride

Definition at line 237 of file GCNSubtarget.h.

◆ getKnownHighZeroBitsForFrameIndex()

unsigned llvm::GCNSubtarget::getKnownHighZeroBitsForFrameIndex ( ) const

inline

Return the number of high bits known to be zero for a frame index.

Definition at line 269 of file GCNSubtarget.h.

References llvm::countLeadingZeros(), llvm::AMDGPUSubtarget::getWavefrontSizeLog2(), and MaxWaveScratchSize.

Referenced by llvm::SITargetLowering::LowerFormalArguments().

◆ getLDSBankCount()

int llvm::GCNSubtarget::getLDSBankCount ( ) const

inline

Definition at line 273 of file GCNSubtarget.h.

References LDSBankCount.

◆ getLegalizerInfo()

const LegalizerInfo* llvm::GCNSubtarget::getLegalizerInfo ( ) const

inlineoverride

Definition at line 241 of file GCNSubtarget.h.

◆ getMaxFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMaxFlatWorkGroupSize ( ) const

inlineoverridevirtual

Returns: Maximum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1160 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize().

◆ getMaxLocalMemSizeWithWaveCount()

unsigned llvm::GCNSubtarget::getMaxLocalMemSizeWithWaveCount	(	unsigned	WaveCount,
		const Function &
	)		const

Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.

◆ getMaxNumSGPRs() [1/3]

unsigned GCNSubtarget::getMaxNumSGPRs ( const Function & F ) const

Returns: Maximum number of SGPRs that meets number of waves per execution unit requirement for function F, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function F.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 894 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumSGPRs(), getMaxNumPreloadedSGPRs(), getReservedNumSGPRs(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxNumSGPRs() [2/3]

unsigned GCNSubtarget::getMaxNumSGPRs ( const MachineFunction & MF ) const

Returns: Maximum number of SGPRs that meets number of waves per execution unit requirement for function MF, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function MF.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 869 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumSGPRs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs(), getReservedNumSGPRs(), and llvm::SIMachineFunctionInfo::getWavesPerEU().

◆ getMaxNumSGPRs() [3/3]

unsigned llvm::GCNSubtarget::getMaxNumSGPRs	(	unsigned	WavesPerEU,
		bool	Addressable
	)		const

inline

Returns: Maximum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1031 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumSGPRs().

Referenced by llvm::SIRegisterInfo::getAllSGPR128(), llvm::SIRegisterInfo::getAllSGPR32(), llvm::SIRegisterInfo::getAllSGPR64(), getBaseMaxNumSGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIRegisterInfo::reservedPrivateSegmentBufferReg(), and llvm::GCNScheduleDAGMILive::schedule().

◆ getMaxNumUserSGPRs()

unsigned llvm::GCNSubtarget::getMaxNumUserSGPRs ( ) const

inline

Definition at line 784 of file GCNSubtarget.h.

◆ getMaxNumVGPRs() [1/3]

unsigned GCNSubtarget::getMaxNumVGPRs ( const Function & F ) const

Returns: Maximum number of VGPRs that meets number of waves per execution unit requirement for function F, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function F.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 929 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumVGPRs(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxNumVGPRs() [2/3]

unsigned GCNSubtarget::getMaxNumVGPRs ( const MachineFunction & MF ) const

Returns: Maximum number of VGPRs that meets number of waves per execution unit requirement for function MF, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function MF.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 933 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumVGPRs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), and llvm::SIMachineFunctionInfo::getWavesPerEU().

◆ getMaxNumVGPRs() [3/3]

unsigned llvm::GCNSubtarget::getMaxNumVGPRs ( unsigned WavesPerEU ) const

inline

Returns: Maximum number of VGPRs that meets given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1101 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumVGPRs().

Referenced by getBaseMaxNumVGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::GCNScheduleDAGMILive::schedule().

◆ getMaxPrivateElementSize()

unsigned llvm::GCNSubtarget::getMaxPrivateElementSize ( bool ForBufferRSrc = false ) const

inline

Definition at line 277 of file GCNSubtarget.h.

References enableFlatScratch(), and MaxPrivateElementSize.

Referenced by llvm::SITargetLowering::canMergeStoresTo(), llvm::GCNTTIImpl::getLoadStoreVecRegBitWidth(), llvm::SIInstrInfo::getScratchRsrcWords23(), and llvm::GCNTTIImpl::isLegalToVectorizeMemChain().

◆ getMaxWorkGroupsPerCU()

unsigned llvm::GCNSubtarget::getMaxWorkGroupsPerCU ( unsigned FlatWorkGroupSize ) const

inlineoverridevirtual

Returns: Maximum number of work groups per compute unit supported by the subtarget and limited by given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 1150 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU().

◆ getMinFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMinFlatWorkGroupSize ( ) const

inlineoverridevirtual

Returns: Minimum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1155 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize().

◆ getMinNumSGPRs()

unsigned llvm::GCNSubtarget::getMinNumSGPRs ( unsigned WavesPerEU ) const

inline

Returns: Minimum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1025 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumSGPRs().

Referenced by getBaseMaxNumSGPRs().

◆ getMinNumVGPRs()

unsigned llvm::GCNSubtarget::getMinNumVGPRs ( unsigned WavesPerEU ) const

inline

Returns: Minimum number of VGPRs that meets given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1095 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumVGPRs().

Referenced by getBaseMaxNumVGPRs().

◆ getMinWavesPerEU()

unsigned llvm::GCNSubtarget::getMinWavesPerEU ( ) const

inlineoverridevirtual

Returns: Minimum number of waves per execution unit supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1173 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinWavesPerEU().

◆ getNSAMaxSize()

unsigned llvm::GCNSubtarget::getNSAMaxSize ( ) const

inline

Definition at line 873 of file GCNSubtarget.h.

References NSAMaxSize.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ getOccupancyWithNumSGPRs()

unsigned GCNSubtarget::getOccupancyWithNumSGPRs ( unsigned SGPRs ) const

Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.

Definition at line 735 of file AMDGPUSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::getMaxWavesPerEU(), llvm::AMDGPUSubtarget::GFX10, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by computeOccupancy().

◆ getOccupancyWithNumVGPRs()

unsigned GCNSubtarget::getOccupancyWithNumVGPRs ( unsigned VGPRs ) const

Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.

Definition at line 761 of file AMDGPUSubtarget.cpp.

References llvm::AMDGPUSubtarget::getMaxWavesPerEU(), getTotalNumVGPRs(), getVGPRAllocGranule(), llvm::max(), and llvm::min().

Referenced by computeOccupancy().

◆ getPostRAMutations()

void GCNSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> & Mutations ) const

override

Definition at line 1101 of file AMDGPUSubtarget.cpp.

◆ getRegBankInfo()

const RegisterBankInfo* llvm::GCNSubtarget::getRegBankInfo ( ) const

inlineoverride

Definition at line 245 of file GCNSubtarget.h.

◆ getRegisterInfo()

const SIRegisterInfo* llvm::GCNSubtarget::getRegisterInfo ( ) const

inlineoverride

Definition at line 225 of file GCNSubtarget.h.

References llvm::SIInstrInfo::getRegisterInfo().

◆ getReservedNumSGPRs() [1/2]

unsigned GCNSubtarget::getReservedNumSGPRs ( const Function & F ) const

Returns: Reserved number of SGPRs for given function F.

Definition at line 792 of file AMDGPUSubtarget.cpp.

References enableFlatScratch(), F, flatScratchIsArchitected(), getBaseReservedNumSGPRs(), hasFlatAddressSpace(), and llvm::AMDGPU::isEntryFunctionCC().

◆ getReservedNumSGPRs() [2/2]

unsigned GCNSubtarget::getReservedNumSGPRs ( const MachineFunction & MF ) const

Returns: Reserved number of SGPRs for given machine function MF.

Definition at line 787 of file AMDGPUSubtarget.cpp.

References getBaseReservedNumSGPRs(), llvm::MachineFunction::getInfo(), and llvm::SIMachineFunctionInfo::hasFlatScratchInit().

Referenced by getMaxNumSGPRs().

◆ getScalarizeGlobalBehavior()

bool llvm::GCNSubtarget::getScalarizeGlobalBehavior ( ) const

inline

Definition at line 769 of file GCNSubtarget.h.

References ScalarizeGlobal.

◆ getSelectionDAGInfo()

const SelectionDAGTargetInfo* llvm::GCNSubtarget::getSelectionDAGInfo ( ) const

inlineoverride

Definition at line 254 of file GCNSubtarget.h.

References TSInfo.

◆ getSetRegWaitStates()

unsigned llvm::GCNSubtarget::getSetRegWaitStates ( ) const

inline

Number of hazard wait states for s_setreg_b32/s_setreg_imm32_b32.

Definition at line 442 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ getSGPRAllocGranule()

unsigned llvm::GCNSubtarget::getSGPRAllocGranule ( ) const

inline

Returns: SGPR allocation granularity supported by the subtarget.

Definition at line 1004 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPRAllocGranule().

◆ getSGPREncodingGranule()

unsigned llvm::GCNSubtarget::getSGPREncodingGranule ( ) const

inline

Returns: SGPR encoding granularity supported by the subtarget.

Definition at line 1009 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPREncodingGranule().

◆ getStackAlignment()

Align llvm::GCNSubtarget::getStackAlignment ( ) const

inline

Definition at line 756 of file GCNSubtarget.h.

References Align.

Referenced by llvm::SITargetLowering::LowerCall().

◆ getTargetID()

const AMDGPU::IsaInfo::AMDGPUTargetID& llvm::GCNSubtarget::getTargetID ( ) const

inline

Definition at line 249 of file GCNSubtarget.h.

References TargetID.

◆ getTargetLowering()

const SITargetLowering* llvm::GCNSubtarget::getTargetLowering ( ) const

inlineoverride

Definition at line 221 of file GCNSubtarget.h.

Referenced by GCNSubtarget(), llvm::AMDGPULegalizerInfo::getImplicitArgPtr(), and llvm::AMDGPULegalizerInfo::legalizeGlobalValue().

◆ getTotalNumSGPRs()

unsigned llvm::GCNSubtarget::getTotalNumSGPRs ( ) const

inline

Returns: Total number of SGPRs supported by the subtarget.

Definition at line 1014 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::GCNSubtarget::getTotalNumVGPRs ( ) const

inline

Returns: Total number of VGPRs supported by the subtarget.

Definition at line 1084 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumVGPRs().

Referenced by getOccupancyWithNumVGPRs().

◆ getTrapHandlerAbi()

TrapHandlerAbi llvm::GCNSubtarget::getTrapHandlerAbi ( ) const

inline

Definition at line 390 of file GCNSubtarget.h.

References AMDHSA, llvm::AMDGPUSubtarget::isAmdHsaOS(), and NONE.

Referenced by llvm::AMDGPULegalizerInfo::legalizeDebugTrapIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeTrapIntrinsic().

◆ getVGPRAllocGranule()

unsigned llvm::GCNSubtarget::getVGPRAllocGranule ( ) const

inline

Returns: VGPR allocation granularity supported by the subtarget.

Definition at line 1074 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPRAllocGranule().

Referenced by getOccupancyWithNumVGPRs().

◆ getVGPREncodingGranule()

unsigned llvm::GCNSubtarget::getVGPREncodingGranule ( ) const

inline

Returns: VGPR encoding granularity supported by the subtarget.

Definition at line 1079 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPREncodingGranule().

◆ getWavesPerEUForWorkGroup()

unsigned llvm::GCNSubtarget::getWavesPerEUForWorkGroup ( unsigned FlatWorkGroupSize ) const

inlineoverridevirtual

Returns: Number of waves per execution unit required to support the given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 1167 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup().

◆ has12DWordStoreHazard()

bool llvm::GCNSubtarget::has12DWordStoreHazard ( ) const

inline

Definition at line 911 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

◆ has64BitDPP()

bool llvm::GCNSubtarget::has64BitDPP ( ) const

inline

Definition at line 835 of file GCNSubtarget.h.

References Has64BitDPP.

◆ hasA16()

bool llvm::GCNSubtarget::hasA16 ( ) const

inline

Definition at line 859 of file GCNSubtarget.h.

References hasGFX10A16(), and hasR128A16().

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ hasAddNoCarry()

bool llvm::GCNSubtarget::hasAddNoCarry ( ) const

inline

Returns: true if the target has integer add/sub instructions that do not produce a carry-out. This includes v_add_[iu]32, v_sub_[iu]32, v_add_[iu]16, and v_sub_[iu]16, all of which support the clamp modifier for saturation.

Definition at line 631 of file GCNSubtarget.h.

References AddNoCarryInsts.

Referenced by llvm::SIInstrInfo::getAddNoCarry(), llvm::SIInstrInfo::getVALUOp(), and llvm::SITargetLowering::SITargetLowering().

◆ hasAddr64()

bool llvm::GCNSubtarget::hasAddr64 ( ) const

inline

Definition at line 316 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by initializeSubtargetDependencies(), and llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ hasApertureRegs()

bool llvm::GCNSubtarget::hasApertureRegs ( ) const

inline

Definition at line 524 of file GCNSubtarget.h.

References HasApertureRegs.

◆ hasAtomicCSub()

bool llvm::GCNSubtarget::hasAtomicCSub ( ) const

inline

Definition at line 579 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasAtomicFaddInsts()

bool llvm::GCNSubtarget::hasAtomicFaddInsts ( ) const

inline

Definition at line 708 of file GCNSubtarget.h.

References HasAtomicFaddInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAutoWaitcntBeforeBarrier()

bool llvm::GCNSubtarget::hasAutoWaitcntBeforeBarrier ( ) const

inline

Definition at line 496 of file GCNSubtarget.h.

References AutoWaitcntBeforeBarrier.

◆ hasBCNT()

bool llvm::GCNSubtarget::hasBCNT ( unsigned Size ) const

inline

Definition at line 346 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFE()

bool llvm::GCNSubtarget::hasBFE ( ) const

inline

Definition at line 334 of file GCNSubtarget.h.

Referenced by hasBFM(), and llvm::SITargetLowering::SITargetLowering().

◆ hasBFI()

bool llvm::GCNSubtarget::hasBFI ( ) const

inline

Definition at line 338 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFM()

bool llvm::GCNSubtarget::hasBFM ( ) const

inline

Definition at line 342 of file GCNSubtarget.h.

References hasBFE().

◆ hasCARRY()

bool llvm::GCNSubtarget::hasCARRY ( ) const

inline

Definition at line 370 of file GCNSubtarget.h.

◆ hasD16Images()

bool llvm::GCNSubtarget::hasD16Images ( ) const

inline

Definition at line 603 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasD16LoadStore()

bool llvm::GCNSubtarget::hasD16LoadStore ( ) const

inline

Definition at line 595 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by d16PreservesUnusedBits().

◆ hasDenormModeInst()

bool llvm::GCNSubtarget::hasDenormModeInst ( ) const

inline

Returns: If target supports S_DENORM_MODE.

Definition at line 460 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasDLInsts()

bool llvm::GCNSubtarget::hasDLInsts ( ) const

inline

Definition at line 668 of file GCNSubtarget.h.

References HasDLInsts.

Referenced by llvm::SIInstrInfo::getVALUOp(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), and llvm::SIInstrInfo::moveToVALU().

◆ hasDot1Insts()

bool llvm::GCNSubtarget::hasDot1Insts ( ) const

inline

Definition at line 672 of file GCNSubtarget.h.

References HasDot1Insts.

◆ hasDot2Insts()

bool llvm::GCNSubtarget::hasDot2Insts ( ) const

inline

Definition at line 676 of file GCNSubtarget.h.

References HasDot2Insts.

◆ hasDot3Insts()

bool llvm::GCNSubtarget::hasDot3Insts ( ) const

inline

Definition at line 680 of file GCNSubtarget.h.

References HasDot3Insts.

◆ hasDot4Insts()

bool llvm::GCNSubtarget::hasDot4Insts ( ) const

inline

Definition at line 684 of file GCNSubtarget.h.

References HasDot4Insts.

◆ hasDot5Insts()

bool llvm::GCNSubtarget::hasDot5Insts ( ) const

inline

Definition at line 688 of file GCNSubtarget.h.

References HasDot5Insts.

◆ hasDot6Insts()

bool llvm::GCNSubtarget::hasDot6Insts ( ) const

inline

Definition at line 692 of file GCNSubtarget.h.

References HasDot6Insts.

◆ hasDot7Insts()

bool llvm::GCNSubtarget::hasDot7Insts ( ) const

inline

Definition at line 696 of file GCNSubtarget.h.

References HasDot7Insts.

◆ hasDPP()

bool llvm::GCNSubtarget::hasDPP ( ) const

inline

Definition at line 819 of file GCNSubtarget.h.

References HasDPP.

◆ hasDPP8()

bool llvm::GCNSubtarget::hasDPP8 ( ) const

inline

Definition at line 831 of file GCNSubtarget.h.

References HasDPP8.

◆ hasDPPBroadcasts()

bool llvm::GCNSubtarget::hasDPPBroadcasts ( ) const

inline

Definition at line 823 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and HasDPP.

◆ hasDPPWavefrontShifts()

bool llvm::GCNSubtarget::hasDPPWavefrontShifts ( ) const

inline

Definition at line 827 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and HasDPP.

◆ hasDS96AndDS128()

bool llvm::GCNSubtarget::hasDS96AndDS128 ( ) const

inline

Returns: If target supports ds_read/write_b96/128.

Definition at line 475 of file GCNSubtarget.h.

References CIInsts.

◆ hasDwordx3LoadStores()

bool llvm::GCNSubtarget::hasDwordx3LoadStores ( ) const

inline

Definition at line 916 of file GCNSubtarget.h.

References CIInsts.

◆ hasExtendedImageInsts()

bool llvm::GCNSubtarget::hasExtendedImageInsts ( ) const

inline

Definition at line 847 of file GCNSubtarget.h.

References HasExtendedImageInsts.

◆ hasFastFMAF32()

bool llvm::GCNSubtarget::hasFastFMAF32 ( ) const

inline

Definition at line 304 of file GCNSubtarget.h.

References FastFMAF32.

Referenced by llvm::GCNTTIImpl::getIntrinsicInstrCost(), and llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd().

◆ hasFFBH()

bool llvm::GCNSubtarget::hasFFBH ( ) const

inline

Definition at line 354 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFFBL()

bool llvm::GCNSubtarget::hasFFBL ( ) const

inline

Definition at line 350 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFlat()

bool llvm::GCNSubtarget::hasFlat ( ) const

inline

Definition at line 320 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by initializeSubtargetDependencies().

◆ hasFlatAddressSpace()

bool llvm::GCNSubtarget::hasFlatAddressSpace ( ) const

inline

Definition at line 544 of file GCNSubtarget.h.

References FlatAddressSpace.

Referenced by getReservedNumSGPRs(), hasFlatScrRegister(), llvm::AMDGPULegalizerInfo::legalizeAddrSpaceCast(), and llvm::SITargetLowering::SITargetLowering().

◆ hasFlatGlobalInsts()

bool llvm::GCNSubtarget::hasFlatGlobalInsts ( ) const

inline

Definition at line 556 of file GCNSubtarget.h.

References FlatGlobalInsts.

Referenced by llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ hasFlatInstOffsets()

bool llvm::GCNSubtarget::hasFlatInstOffsets ( ) const

inline

Definition at line 552 of file GCNSubtarget.h.

References FlatInstOffsets.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasFlatLgkmVMemCountInOrder()

bool llvm::GCNSubtarget::hasFlatLgkmVMemCountInOrder ( ) const

inline

Definition at line 591 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasFlatScratchInsts()

bool llvm::GCNSubtarget::hasFlatScratchInsts ( ) const

inline

Definition at line 560 of file GCNSubtarget.h.

References FlatScratchInsts.

Referenced by enableFlatScratch(), and hasFlatScratchSTMode().

◆ hasFlatScratchSTMode()

bool llvm::GCNSubtarget::hasFlatScratchSTMode ( ) const

inline

Definition at line 567 of file GCNSubtarget.h.

References hasFlatScratchInsts(), and hasGFX10_3Insts().

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), and llvm::SIRegisterInfo::eliminateFrameIndex().

◆ hasFlatScrRegister()

bool llvm::GCNSubtarget::hasFlatScrRegister ( ) const

inline

Definition at line 548 of file GCNSubtarget.h.

References hasFlatAddressSpace().

Referenced by llvm::SITargetLowering::getRegisterByName().

◆ hasFlatSegmentOffsetBug()

bool llvm::GCNSubtarget::hasFlatSegmentOffsetBug ( ) const

inline

Definition at line 587 of file GCNSubtarget.h.

References HasFlatSegmentOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset().

◆ hasFMA()

bool llvm::GCNSubtarget::hasFMA ( ) const

inline

Definition at line 374 of file GCNSubtarget.h.

References FMA.

◆ hasFmaakFmamkF32Insts()

bool llvm::GCNSubtarget::hasFmaakFmamkF32Insts ( ) const

inline

Definition at line 843 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasFmaMixInsts()

bool llvm::GCNSubtarget::hasFmaMixInsts ( ) const

inline

Definition at line 366 of file GCNSubtarget.h.

References HasFmaMixInsts.

Referenced by llvm::SITargetLowering::isFPExtFoldable().

◆ hasFP64()

bool llvm::GCNSubtarget::hasFP64 ( ) const

inline

Definition at line 292 of file GCNSubtarget.h.

References FP64.

Referenced by initializeSubtargetDependencies().

◆ hasFractBug()

bool llvm::GCNSubtarget::hasFractBug ( ) const

inline

Definition at line 330 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by llvm::AMDGPULegalizerInfo::legalizeFFloor().

◆ hasFullRate64Ops()

bool llvm::GCNSubtarget::hasFullRate64Ops ( ) const

inline

Definition at line 312 of file GCNSubtarget.h.

References FullRate64Ops.

◆ hasG16()

bool llvm::GCNSubtarget::hasG16 ( ) const

inline

Definition at line 861 of file GCNSubtarget.h.

References HasG16.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGetWaveIdInst()

bool llvm::GCNSubtarget::hasGetWaveIdInst ( ) const

inline

Definition at line 720 of file GCNSubtarget.h.

References HasGetWaveIdInst.

◆ hasGFX10_3Insts()

bool llvm::GCNSubtarget::hasGFX10_3Insts ( ) const

inline

Definition at line 883 of file GCNSubtarget.h.

References GFX10_3Insts.

Referenced by hasFlatScratchSTMode().

◆ hasGFX10_AEncoding()

bool llvm::GCNSubtarget::hasGFX10_AEncoding ( ) const

inline

Definition at line 875 of file GCNSubtarget.h.

References GFX10_AEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic().

◆ hasGFX10_BEncoding()

bool llvm::GCNSubtarget::hasGFX10_BEncoding ( ) const

inline

Definition at line 879 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasGFX10A16()

bool llvm::GCNSubtarget::hasGFX10A16 ( ) const

inline

Definition at line 855 of file GCNSubtarget.h.

References HasGFX10A16.

Referenced by hasA16(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGFX90AInsts()

bool llvm::GCNSubtarget::hasGFX90AInsts ( ) const

inline

Definition at line 965 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIInstrInfo::copyPhysReg(), getBaseMaxNumVGPRs(), llvm::SIRegisterInfo::getCrossCopyRegClass(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::hasVALU32BitEncoding(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::pseudoToMCOpcode(), llvm::AMDGPUAsmPrinter::runOnMachineFunction(), llvm::GCNScheduleDAGMILive::schedule(), llvm::SITargetLowering::shouldExpandAtomicRMWInIR(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGlobalAddTidInsts()

bool llvm::GCNSubtarget::hasGlobalAddTidInsts ( ) const

inline

Definition at line 575 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasGWSAutoReplay()

bool llvm::GCNSubtarget::hasGWSAutoReplay ( ) const

inline

Definition at line 618 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasGWSSemaReleaseAll()

bool llvm::GCNSubtarget::hasGWSSemaReleaseAll ( ) const

inline

Returns: if target has ds_gws_sema_release_all instruction.

Definition at line 623 of file GCNSubtarget.h.

References CIInsts.

◆ hasHalfRate64Ops() [1/2]

bool llvm::GCNSubtarget::hasHalfRate64Ops ( ) const

inline

Definition at line 308 of file GCNSubtarget.h.

References HalfRate64Ops.

◆ hasHalfRate64Ops() [2/2]

static bool llvm::GCNSubtarget::hasHalfRate64Ops ( const TargetSubtargetInfo & STI )

static

◆ hasHardClauses()

bool llvm::GCNSubtarget::hasHardClauses ( ) const

inline

Definition at line 963 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasHWFP64()

bool llvm::GCNSubtarget::hasHWFP64 ( ) const

inline

Definition at line 300 of file GCNSubtarget.h.

References FP64.

◆ hasImageGather4D16Bug()

bool llvm::GCNSubtarget::hasImageGather4D16Bug ( ) const

inline

Definition at line 869 of file GCNSubtarget.h.

References HasImageGather4D16Bug.

◆ hasImageStoreD16Bug()

bool llvm::GCNSubtarget::hasImageStoreD16Bug ( ) const

inline

Definition at line 867 of file GCNSubtarget.h.

References HasImageStoreD16Bug.

Referenced by llvm::AMDGPULegalizerInfo::handleD16VData().

◆ hasInstFwdPrefetchBug()

bool llvm::GCNSubtarget::hasInstFwdPrefetchBug ( ) const

inline

Definition at line 945 of file GCNSubtarget.h.

References HasInstFwdPrefetchBug.

◆ hasIntClamp()

bool llvm::GCNSubtarget::hasIntClamp ( ) const

inline

Definition at line 288 of file GCNSubtarget.h.

References HasIntClamp.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasLdsBranchVmemWARHazard()

bool llvm::GCNSubtarget::hasLdsBranchVmemWARHazard ( ) const

inline

Definition at line 953 of file GCNSubtarget.h.

References HasLdsBranchVmemWARHazard.

◆ hasLDSFPAtomicAdd()

bool llvm::GCNSubtarget::hasLDSFPAtomicAdd ( ) const

inline

Definition at line 814 of file GCNSubtarget.h.

References GFX8Insts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasLDSMisalignedBug()

bool llvm::GCNSubtarget::hasLDSMisalignedBug ( ) const

inline

Definition at line 941 of file GCNSubtarget.h.

References EnableCuMode, and LDSMisalignedBug.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasMad64_32()

bool llvm::GCNSubtarget::hasMad64_32 ( ) const

inline

Definition at line 644 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ hasMadF16()

bool GCNSubtarget::hasMadF16 ( ) const

Definition at line 725 of file AMDGPUSubtarget.cpp.

References llvm::SIInstrInfo::pseudoToMCOpcode().

Referenced by llvm::SITargetLowering::isFMADLegal(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMAIInsts()

bool llvm::GCNSubtarget::hasMAIInsts ( ) const

inline

Definition at line 700 of file GCNSubtarget.h.

References HasMAIInsts.

Referenced by llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::isOperandLegal(), and llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ hasMed3_16()

bool llvm::GCNSubtarget::hasMed3_16 ( ) const

inline

Definition at line 358 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasMergedShaders()

bool llvm::GCNSubtarget::hasMergedShaders ( ) const

inline

Returns: true if the machine has merged shaders in which s0-s7 are reserved by the hardware and user SGPRs start at s8

Definition at line 999 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasMFMAInlineLiteralBug()

bool llvm::GCNSubtarget::hasMFMAInlineLiteralBug ( ) const

inline

Definition at line 907 of file GCNSubtarget.h.

References HasMFMAInlineLiteralBug.

Referenced by llvm::SIInstrInfo::isImmOperandLegal(), and llvm::SIRegisterInfo::opCanUseInlineConstant().

◆ hasMIMG_R128()

bool llvm::GCNSubtarget::hasMIMG_R128 ( ) const

inline

Definition at line 296 of file GCNSubtarget.h.

References MIMG_R128.

◆ hasMin3Max3_16()

bool llvm::GCNSubtarget::hasMin3Max3_16 ( ) const

inline

Definition at line 362 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasMovrel()

bool llvm::GCNSubtarget::hasMovrel ( ) const

inline

Definition at line 792 of file GCNSubtarget.h.

References HasMovrel.

Referenced by useVGPRIndexMode().

◆ hasMultiDwordFlatScratchAddressing()

bool llvm::GCNSubtarget::hasMultiDwordFlatScratchAddressing ( ) const

inline

Definition at line 583 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasNegativeScratchOffsetBug()

bool llvm::GCNSubtarget::hasNegativeScratchOffsetBug ( ) const

inline

Definition at line 901 of file GCNSubtarget.h.

References NegativeScratchOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::splitFlatOffset().

◆ hasNegativeUnalignedScratchOffsetBug()

bool llvm::GCNSubtarget::hasNegativeUnalignedScratchOffsetBug ( ) const

inline

Definition at line 903 of file GCNSubtarget.h.

References NegativeUnalignedScratchOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::splitFlatOffset().

◆ hasNoDataDepHazard()

bool llvm::GCNSubtarget::hasNoDataDepHazard ( ) const

inline

Definition at line 740 of file GCNSubtarget.h.

References HasNoDataDepHazard.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasNoSdstCMPX()

bool llvm::GCNSubtarget::hasNoSdstCMPX ( ) const

inline

Definition at line 712 of file GCNSubtarget.h.

References HasNoSdstCMPX.

◆ hasNSAClauseBug()

bool llvm::GCNSubtarget::hasNSAClauseBug ( ) const

inline

Definition at line 961 of file GCNSubtarget.h.

References HasNSAClauseBug.

◆ hasNSAEncoding()

bool llvm::GCNSubtarget::hasNSAEncoding ( ) const

inline

Definition at line 871 of file GCNSubtarget.h.

References HasNSAEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ hasNSAtoVMEMBug()

bool llvm::GCNSubtarget::hasNSAtoVMEMBug ( ) const

inline

Definition at line 957 of file GCNSubtarget.h.

References HasNSAtoVMEMBug.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasOffset3fBug()

bool llvm::GCNSubtarget::hasOffset3fBug ( ) const

inline

Definition at line 863 of file GCNSubtarget.h.

References HasOffset3fBug.

Referenced by llvm::SIInstrInfo::getInstSizeInBytes(), and llvm::SIInstrInfo::insertBranch().

◆ hasOnlyRevVALUShifts()

bool llvm::GCNSubtarget::hasOnlyRevVALUShifts ( ) const

inline

Definition at line 326 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SIInstrInfo::moveToVALU().

◆ hasPackedFP32Ops()

bool llvm::GCNSubtarget::hasPackedFP32Ops ( ) const

inline

Definition at line 839 of file GCNSubtarget.h.

References HasPackedFP32Ops.

Referenced by llvm::SIInstrInfo::copyPhysReg(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::GCNTTIImpl::getArithmeticInstrCost(), llvm::GCNTTIImpl::getIntrinsicInstrCost(), llvm::GCNTTIImpl::getMaximumVF(), llvm::GCNTTIImpl::getRegisterBitWidth(), and llvm::SITargetLowering::SITargetLowering().

◆ hasPackedTID()

bool llvm::GCNSubtarget::hasPackedTID ( ) const

inline

Definition at line 970 of file GCNSubtarget.h.

References HasPackedTID.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs().

◆ hasPermLaneX16()

bool llvm::GCNSubtarget::hasPermLaneX16 ( ) const

inline

Returns: true if the subtarget has the v_permlanex16_b32 instruction.

Definition at line 817 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasPkFmacF16Inst()

bool llvm::GCNSubtarget::hasPkFmacF16Inst ( ) const

inline

Definition at line 704 of file GCNSubtarget.h.

References HasPkFmacF16Inst.

◆ hasR128A16()

bool llvm::GCNSubtarget::hasR128A16 ( ) const

inline

Definition at line 851 of file GCNSubtarget.h.

References HasR128A16.

Referenced by hasA16(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasReadM0MovRelInterpHazard()

bool llvm::GCNSubtarget::hasReadM0MovRelInterpHazard ( ) const

inline

Definition at line 920 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0SendMsgHazard()

bool llvm::GCNSubtarget::hasReadM0SendMsgHazard ( ) const

inline

Definition at line 924 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX9, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadVCCZBug()

bool llvm::GCNSubtarget::hasReadVCCZBug ( ) const

inline

Extra wait hazard is needed in some cases before s_cbranch_vccnz/s_cbranch_vccz.

Definition at line 416 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ hasRegisterBanking()

bool llvm::GCNSubtarget::hasRegisterBanking ( ) const

inline

Definition at line 732 of file GCNSubtarget.h.

References HasRegisterBanking.

◆ hasRFEHazards()

bool llvm::GCNSubtarget::hasRFEHazards ( ) const

inline

Definition at line 437 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasScalarAtomics()

bool llvm::GCNSubtarget::hasScalarAtomics ( ) const

inline

Definition at line 810 of file GCNSubtarget.h.

References HasScalarAtomics.

◆ hasScalarCompareEq64()

bool llvm::GCNSubtarget::hasScalarCompareEq64 ( ) const

inline

Definition at line 802 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarFlatScratchInsts()

bool llvm::GCNSubtarget::hasScalarFlatScratchInsts ( ) const

inline

Definition at line 571 of file GCNSubtarget.h.

References ScalarFlatScratchInsts.

◆ hasScalarMulHiInsts()

bool llvm::GCNSubtarget::hasScalarMulHiInsts ( ) const

inline

Definition at line 386 of file GCNSubtarget.h.

References GFX9Insts.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarPackInsts()

bool llvm::GCNSubtarget::hasScalarPackInsts ( ) const

inline

Definition at line 382 of file GCNSubtarget.h.

References GFX9Insts.

◆ hasScalarStores()

bool llvm::GCNSubtarget::hasScalarStores ( ) const

inline

Definition at line 806 of file GCNSubtarget.h.

References HasScalarStores.

◆ hasSDWAMac()

bool llvm::GCNSubtarget::hasSDWAMac ( ) const

inline

Definition at line 660 of file GCNSubtarget.h.

References HasSDWAMac.

◆ hasSDWAOmod()

bool llvm::GCNSubtarget::hasSDWAOmod ( ) const

inline

Definition at line 648 of file GCNSubtarget.h.

References HasSDWAOmod.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAOutModsVOPC()

bool llvm::GCNSubtarget::hasSDWAOutModsVOPC ( ) const

inline

Definition at line 664 of file GCNSubtarget.h.

References HasSDWAOutModsVOPC.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAScalar()

bool llvm::GCNSubtarget::hasSDWAScalar ( ) const

inline

Definition at line 652 of file GCNSubtarget.h.

References HasSDWAScalar.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWASdst()

bool llvm::GCNSubtarget::hasSDWASdst ( ) const

inline

Definition at line 656 of file GCNSubtarget.h.

References HasSDWASdst.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSGPRInitBug()

bool llvm::GCNSubtarget::hasSGPRInitBug ( ) const

inline

Definition at line 897 of file GCNSubtarget.h.

References SGPRInitBug.

Referenced by getBaseMaxNumSGPRs().

◆ hasShaderCyclesRegister()

bool llvm::GCNSubtarget::hasShaderCyclesRegister ( ) const

inline

Definition at line 728 of file GCNSubtarget.h.

References HasShaderCyclesRegister.

◆ hasSMemRealTime()

bool llvm::GCNSubtarget::hasSMemRealTime ( ) const

inline

Definition at line 788 of file GCNSubtarget.h.

References HasSMemRealTime.

◆ hasSMemTimeInst()

bool llvm::GCNSubtarget::hasSMemTimeInst ( ) const

inline

Definition at line 724 of file GCNSubtarget.h.

References HasSMemTimeInst.

◆ hasSMEMtoVectorWriteHazard()

bool llvm::GCNSubtarget::hasSMEMtoVectorWriteHazard ( ) const

inline

Definition at line 937 of file GCNSubtarget.h.

References HasSMEMtoVectorWriteHazard.

◆ hasSMRDReadVALUDefHazard()

bool llvm::GCNSubtarget::hasSMRDReadVALUDefHazard ( ) const

inline

A read of an SGPR by SMRD instruction requires 4 wait states when the SGPR was written by a VALU instruction.

Definition at line 427 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

◆ hasSwap()

bool llvm::GCNSubtarget::hasSwap ( ) const

inline

Definition at line 378 of file GCNSubtarget.h.

References GFX9Insts.

◆ hasUnalignedAccessMode()

bool llvm::GCNSubtarget::hasUnalignedAccessMode ( ) const

inline

Definition at line 520 of file GCNSubtarget.h.

References UnalignedAccessMode.

◆ hasUnalignedBufferAccess()

bool llvm::GCNSubtarget::hasUnalignedBufferAccess ( ) const

inline

Definition at line 500 of file GCNSubtarget.h.

References UnalignedBufferAccess.

◆ hasUnalignedBufferAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedBufferAccessEnabled ( ) const

inline

Definition at line 504 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedBufferAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUnalignedDSAccess()

bool llvm::GCNSubtarget::hasUnalignedDSAccess ( ) const

inline

Definition at line 508 of file GCNSubtarget.h.

References UnalignedDSAccess.

◆ hasUnalignedDSAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedDSAccessEnabled ( ) const

inline

Definition at line 512 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedDSAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUnalignedScratchAccess()

bool llvm::GCNSubtarget::hasUnalignedScratchAccess ( ) const

inline

Definition at line 516 of file GCNSubtarget.h.

References UnalignedScratchAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), and llvm::GCNTTIImpl::isLegalToVectorizeMemChain().

◆ hasUnpackedD16VMem()

bool llvm::GCNSubtarget::hasUnpackedD16VMem ( ) const

inline

Definition at line 635 of file GCNSubtarget.h.

References HasUnpackedD16VMem.

Referenced by llvm::SITargetLowering::AddIMGInit(), llvm::AMDGPURegisterBankInfo::handleD16VData(), llvm::AMDGPULegalizerInfo::handleD16VData(), llvm::AMDGPULegalizerInfo::legalizeBufferLoad(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), llvm::SIInstrInfo::pseudoToMCOpcode(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasUsableDivScaleConditionOutput()

bool llvm::GCNSubtarget::hasUsableDivScaleConditionOutput ( ) const

inline

Condition output from div_scale is usable.

Definition at line 410 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by llvm::GCNTTIImpl::getArithmeticInstrCost(), and llvm::AMDGPULegalizerInfo::legalizeFDIV64().

◆ hasUsableDSOffset()

bool llvm::GCNSubtarget::hasUsableDSOffset ( ) const

inline

True if the offset field of DS instructions works as expected.

On SI, the offset uses a 16-bit adder and does not always wrap properly.

Definition at line 401 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ hasVcmpxExecWARHazard()

bool llvm::GCNSubtarget::hasVcmpxExecWARHazard ( ) const

inline

Definition at line 949 of file GCNSubtarget.h.

References HasVcmpxExecWARHazard.

◆ hasVcmpxPermlaneHazard()

bool llvm::GCNSubtarget::hasVcmpxPermlaneHazard ( ) const

inline

Definition at line 929 of file GCNSubtarget.h.

References HasVcmpxPermlaneHazard.

◆ hasVGPRIndexMode()

bool llvm::GCNSubtarget::hasVGPRIndexMode ( ) const

inline

Definition at line 796 of file GCNSubtarget.h.

References HasVGPRIndexMode.

Referenced by useVGPRIndexMode().

◆ hasVMEMReadSGPRVALUDefHazard()

bool llvm::GCNSubtarget::hasVMEMReadSGPRVALUDefHazard ( ) const

inline

A read of an SGPR by a VMEM instruction requires 5 wait states when the SGPR was written by a VALU Instruction.

Definition at line 433 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasVMEMtoScalarWriteHazard()

bool llvm::GCNSubtarget::hasVMEMtoScalarWriteHazard ( ) const

inline

Definition at line 933 of file GCNSubtarget.h.

References HasVMEMtoScalarWriteHazard.

◆ hasVOP3Literal()

bool llvm::GCNSubtarget::hasVOP3Literal ( ) const

inline

Definition at line 736 of file GCNSubtarget.h.

References HasVOP3Literal.

Referenced by llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::legalizeOperandsVOP3(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasVscnt()

bool llvm::GCNSubtarget::hasVscnt ( ) const

inline

Definition at line 716 of file GCNSubtarget.h.

References HasVscnt.

◆ haveRoundOpsF64()

bool llvm::GCNSubtarget::haveRoundOpsF64 ( ) const

inline

Have v_trunc_f64, v_ceil_f64, v_rndne_f64.

Definition at line 480 of file GCNSubtarget.h.

References CIInsts.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ initializeSubtargetDependencies()

GCNSubtarget & GCNSubtarget::initializeSubtargetDependencies	(	const Triple &	TT,
		StringRef	GPU,
		StringRef	FS
	)

Definition at line 65 of file AMDGPUSubtarget.cpp.

◆ isCuModeEnabled()

bool llvm::GCNSubtarget::isCuModeEnabled ( ) const

inline

Definition at line 540 of file GCNSubtarget.h.

References EnableCuMode.

◆ isMesaGfxShader()

bool llvm::GCNSubtarget::isMesaGfxShader ( const Function & F ) const

inline

Definition at line 640 of file GCNSubtarget.h.

References F, llvm::AMDGPUSubtarget::isMesa3DOS(), and llvm::AMDGPU::isShader().

◆ isTgSplitEnabled()

bool llvm::GCNSubtarget::isTgSplitEnabled ( ) const

inline

Definition at line 536 of file GCNSubtarget.h.

References EnableTgSplit.

◆ isTrapHandlerEnabled()

bool llvm::GCNSubtarget::isTrapHandlerEnabled ( ) const

inline

Definition at line 528 of file GCNSubtarget.h.

References TrapHandler.

Referenced by llvm::AMDGPULegalizerInfo::legalizeDebugTrapIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeTrapIntrinsic().

◆ isWave32()

bool llvm::GCNSubtarget::isWave32 ( ) const

inline

Definition at line 1136 of file GCNSubtarget.h.

References llvm::AMDGPUSubtarget::getWavefrontSize().

Referenced by llvm::SIInstrInfo::createPHISourceCopy(), llvm::AMDGPURegisterBankInfo::executeInWaterfallLoop(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::SIInstrInfo::fixImplicitOperands(), llvm::SIInstrInfo::insertVectorSelect(), llvm::SIInstrInfo::isWave32(), and llvm::SIInstrInfo::moveToVALU().

◆ isWave64()

bool llvm::GCNSubtarget::isWave64 ( ) const

inline

Definition at line 1140 of file GCNSubtarget.h.

References llvm::AMDGPUSubtarget::getWavefrontSize().

◆ isXNACKEnabled()

bool llvm::GCNSubtarget::isXNACKEnabled ( ) const

inline

Definition at line 532 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::AMDGPUTargetID::isXnackOnOrAny(), and TargetID.

Referenced by getBaseReservedNumSGPRs().

◆ ldsRequiresM0Init()

bool llvm::GCNSubtarget::ldsRequiresM0Init ( ) const

inline

Return if most LDS instructions have an m0 use that require m0 to be initialized.

Definition at line 609 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ loadStoreOptEnabled()

bool llvm::GCNSubtarget::loadStoreOptEnabled ( ) const

inline

Definition at line 893 of file GCNSubtarget.h.

References EnableLoadStoreOpt.

◆ needsAlignedVGPRs()

bool llvm::GCNSubtarget::needsAlignedVGPRs ( ) const

inline

Return if operations acting on VGPR tuples require even alignment.

Definition at line 968 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SIRegisterInfo::getAGPRClassForBitWidth(), llvm::SIRegisterInfo::getVGPR64Class(), llvm::SIRegisterInfo::getVGPRClassForBitWidth(), llvm::SIRegisterInfo::isProperlyAlignedRC(), and llvm::SIInstrInfo::verifyInstruction().

◆ overrideSchedPolicy()

void GCNSubtarget::overrideSchedPolicy	(	MachineSchedPolicy &	Policy,
		unsigned	NumRegionInstrs
	)		const

override

Definition at line 708 of file AMDGPUSubtarget.cpp.

References enableSIScheduler(), llvm::MachineSchedPolicy::OnlyBottomUp, llvm::MachineSchedPolicy::OnlyTopDown, llvm::MachineSchedPolicy::ShouldTrackLaneMasks, and llvm::MachineSchedPolicy::ShouldTrackPressure.

◆ ParseSubtargetFeatures()

void llvm::GCNSubtarget::ParseSubtargetFeatures	(	StringRef	CPU,
		StringRef	TuneCPU,
		StringRef	FS
	)

Referenced by initializeSubtargetDependencies().

◆ partialVCCWritesUpdateVCCZ()

bool llvm::GCNSubtarget::partialVCCWritesUpdateVCCZ ( ) const

inline

Writes to VCC_LO/VCC_HI update the VCCZ flag.

Definition at line 421 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ privateMemoryResourceIsRangeChecked()

bool llvm::GCNSubtarget::privateMemoryResourceIsRangeChecked ( ) const

inline

Returns: If MUBUF instructions always perform range checking, even for buffer resources used for private memory access.

Definition at line 486 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ setScalarizeGlobalBehavior()

void llvm::GCNSubtarget::setScalarizeGlobalBehavior ( bool b )

inline

Definition at line 768 of file GCNSubtarget.h.

References b, and ScalarizeGlobal.

◆ supportsGetDoorbellID()

bool llvm::GCNSubtarget::supportsGetDoorbellID ( ) const

inline

Definition at line 394 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::AMDGPULegalizerInfo::legalizeTrapIntrinsic().

◆ supportsMinMaxDenormModes()

bool llvm::GCNSubtarget::supportsMinMaxDenormModes ( ) const

inline

Definition at line 455 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SITargetLowering::isCanonicalized().

◆ unsafeDSOffsetFoldingEnabled()

bool llvm::GCNSubtarget::unsafeDSOffsetFoldingEnabled ( ) const

inline

Definition at line 405 of file GCNSubtarget.h.

References EnableUnsafeDSOffsetFolding.

◆ useAA()

bool GCNSubtarget::useAA ( ) const

override

Definition at line 733 of file AMDGPUSubtarget.cpp.

References UseAA.

◆ useDS128()

bool llvm::GCNSubtarget::useDS128 ( ) const

inline

Returns: If target supports ds_read/write_b128 and user enables generation of ds_read/write_b128.

Definition at line 470 of file GCNSubtarget.h.

References CIInsts, and EnableDS128.

◆ useFlatForGlobal()

bool llvm::GCNSubtarget::useFlatForGlobal ( ) const

inline

Definition at line 464 of file GCNSubtarget.h.

References FlatForGlobal.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), llvm::AMDGPURegisterBankInfo::getValueMappingForPtr(), and llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ usePRTStrictNull()

bool llvm::GCNSubtarget::usePRTStrictNull ( ) const

inline

Returns: If target requires PRT Struct NULL support (zero result registers for sparse texture support).

Definition at line 492 of file GCNSubtarget.h.

References EnablePRTStrictNull.

Referenced by llvm::SITargetLowering::AddIMGInit().

◆ useVGPRIndexMode()

bool GCNSubtarget::useVGPRIndexMode ( ) const

Definition at line 729 of file AMDGPUSubtarget.cpp.

References EnableVGPRIndexMode, hasMovrel(), and hasVGPRIndexMode().

Referenced by llvm::SIInstrInfo::expandPostRAPseudo().

◆ vmemWriteNeedsExpWaitcnt()

bool llvm::GCNSubtarget::vmemWriteNeedsExpWaitcnt ( ) const

inline

Definition at line 744 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ zeroesHigh16BitsOfDest()

bool GCNSubtarget::zeroesHigh16BitsOfDest ( unsigned Opcode ) const

Returns if the result of this instruction with a 16-bit result returned in a 32-bit register implicitly zeroes the high 16-bits, rather than preserve the original value.

This list was mostly derived from experimentation.

Definition at line 344 of file AMDGPUSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::GFX9, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Member Data Documentation

◆ AddNoCarryInsts

bool llvm::GCNSubtarget::AddNoCarryInsts

protected

Definition at line 166 of file GCNSubtarget.h.

Referenced by hasAddNoCarry().

◆ AutoWaitcntBeforeBarrier

bool llvm::GCNSubtarget::AutoWaitcntBeforeBarrier

protected

Definition at line 74 of file GCNSubtarget.h.

Referenced by hasAutoWaitcntBeforeBarrier().

◆ CaymanISA

bool llvm::GCNSubtarget::CaymanISA

protected

Definition at line 169 of file GCNSubtarget.h.

◆ CFALUBug

bool llvm::GCNSubtarget::CFALUBug

protected

Definition at line 170 of file GCNSubtarget.h.

◆ CIInsts

bool llvm::GCNSubtarget::CIInsts

protected

Definition at line 101 of file GCNSubtarget.h.

Referenced by hasDS96AndDS128(), hasDwordx3LoadStores(), hasGWSSemaReleaseAll(), haveRoundOpsF64(), and useDS128().

◆ DumpCode

bool llvm::GCNSubtarget::DumpCode

protected

Definition at line 94 of file GCNSubtarget.h.

Referenced by dumpCode().

◆ EnableCuMode

bool llvm::GCNSubtarget::EnableCuMode

protected

Definition at line 85 of file GCNSubtarget.h.

Referenced by hasLDSMisalignedBug(), and isCuModeEnabled().

◆ EnableDS128

bool llvm::GCNSubtarget::EnableDS128

protected

Definition at line 92 of file GCNSubtarget.h.

Referenced by useDS128().

◆ EnableLoadStoreOpt

bool llvm::GCNSubtarget::EnableLoadStoreOpt

protected

Definition at line 89 of file GCNSubtarget.h.

Referenced by loadStoreOptEnabled().

◆ EnablePRTStrictNull

bool llvm::GCNSubtarget::EnablePRTStrictNull

protected

Definition at line 93 of file GCNSubtarget.h.

Referenced by usePRTStrictNull().

◆ EnableSIScheduler

bool llvm::GCNSubtarget::EnableSIScheduler

protected

Definition at line 91 of file GCNSubtarget.h.

Referenced by enableSIScheduler().

◆ EnableSRAMECC

bool llvm::GCNSubtarget::EnableSRAMECC

protected

Definition at line 150 of file GCNSubtarget.h.

◆ EnableTgSplit

bool llvm::GCNSubtarget::EnableTgSplit

protected

Definition at line 84 of file GCNSubtarget.h.

Referenced by isTgSplitEnabled().

◆ EnableUnsafeDSOffsetFolding

bool llvm::GCNSubtarget::EnableUnsafeDSOffsetFolding

protected

Definition at line 90 of file GCNSubtarget.h.

Referenced by unsafeDSOffsetFoldingEnabled().

◆ EnableXNACK

bool llvm::GCNSubtarget::EnableXNACK

protected

Definition at line 82 of file GCNSubtarget.h.

◆ FastDenormalF32

bool llvm::GCNSubtarget::FastDenormalF32

protected

Definition at line 68 of file GCNSubtarget.h.

◆ FastFMAF32

bool llvm::GCNSubtarget::FastFMAF32

protected

Definition at line 67 of file GCNSubtarget.h.

Referenced by hasFastFMAF32().

◆ FeatureDisable

bool llvm::GCNSubtarget::FeatureDisable

protected

Definition at line 194 of file GCNSubtarget.h.

◆ FlatAddressSpace

bool llvm::GCNSubtarget::FlatAddressSpace

protected

Definition at line 160 of file GCNSubtarget.h.

Referenced by hasFlatAddressSpace().

◆ FlatForGlobal

bool llvm::GCNSubtarget::FlatForGlobal

protected

Definition at line 73 of file GCNSubtarget.h.

Referenced by initializeSubtargetDependencies(), and useFlatForGlobal().

◆ FlatGlobalInsts

bool llvm::GCNSubtarget::FlatGlobalInsts

protected

Definition at line 162 of file GCNSubtarget.h.

Referenced by hasFlatGlobalInsts().

◆ FlatInstOffsets

bool llvm::GCNSubtarget::FlatInstOffsets

protected

Definition at line 161 of file GCNSubtarget.h.

Referenced by hasFlatInstOffsets().

◆ FlatScratchInsts

bool llvm::GCNSubtarget::FlatScratchInsts

protected

Definition at line 163 of file GCNSubtarget.h.

Referenced by hasFlatScratchInsts().

◆ FMA

bool llvm::GCNSubtarget::FMA

protected

Definition at line 98 of file GCNSubtarget.h.

Referenced by hasFMA().

◆ FP64

bool llvm::GCNSubtarget::FP64

protected

Definition at line 97 of file GCNSubtarget.h.

Referenced by hasFP64(), and hasHWFP64().

◆ FullRate64Ops

bool llvm::GCNSubtarget::FullRate64Ops

protected

Definition at line 70 of file GCNSubtarget.h.

Referenced by hasFullRate64Ops().

◆ Gen

unsigned llvm::GCNSubtarget::Gen

protected

Definition at line 61 of file GCNSubtarget.h.

Referenced by getGeneration(), and initializeSubtargetDependencies().

◆ GFX10_3Insts

bool llvm::GCNSubtarget::GFX10_3Insts

protected

Definition at line 106 of file GCNSubtarget.h.

Referenced by hasGFX10_3Insts().

◆ GFX10_AEncoding

bool llvm::GCNSubtarget::GFX10_AEncoding

protected

Definition at line 133 of file GCNSubtarget.h.

Referenced by hasGFX10_AEncoding().

◆ GFX10_BEncoding

bool llvm::GCNSubtarget::GFX10_BEncoding

protected

Definition at line 134 of file GCNSubtarget.h.

Referenced by hasAtomicCSub(), hasGFX10_BEncoding(), and hasGlobalAddTidInsts().

◆ GFX10Insts

bool llvm::GCNSubtarget::GFX10Insts

protected

Definition at line 105 of file GCNSubtarget.h.

◆ GFX7GFX8GFX9Insts

bool llvm::GCNSubtarget::GFX7GFX8GFX9Insts

protected

Definition at line 107 of file GCNSubtarget.h.

◆ GFX8Insts

bool llvm::GCNSubtarget::GFX8Insts

protected

Definition at line 102 of file GCNSubtarget.h.

Referenced by hasLDSFPAtomicAdd().

◆ GFX90AInsts

bool llvm::GCNSubtarget::GFX90AInsts

protected

Definition at line 104 of file GCNSubtarget.h.

Referenced by hasGFX90AInsts(), and needsAlignedVGPRs().

◆ GFX9Insts

bool llvm::GCNSubtarget::GFX9Insts

protected

Definition at line 103 of file GCNSubtarget.h.

Referenced by hasScalarMulHiInsts(), hasScalarPackInsts(), and hasSwap().

◆ HalfRate64Ops

bool llvm::GCNSubtarget::HalfRate64Ops

protected

Definition at line 69 of file GCNSubtarget.h.

Referenced by hasHalfRate64Ops().

◆ Has64BitDPP

bool llvm::GCNSubtarget::Has64BitDPP

protected

Definition at line 125 of file GCNSubtarget.h.

Referenced by has64BitDPP().

◆ HasApertureRegs

bool llvm::GCNSubtarget::HasApertureRegs

protected

Definition at line 77 of file GCNSubtarget.h.

Referenced by hasApertureRegs().

◆ HasArchitectedFlatScratch

bool llvm::GCNSubtarget::HasArchitectedFlatScratch

protected

Definition at line 165 of file GCNSubtarget.h.

Referenced by flatScratchIsArchitected().

◆ HasAtomicFaddInsts

bool llvm::GCNSubtarget::HasAtomicFaddInsts

protected

Definition at line 145 of file GCNSubtarget.h.

Referenced by hasAtomicFaddInsts().

◆ HasDLInsts

bool llvm::GCNSubtarget::HasDLInsts

protected

Definition at line 135 of file GCNSubtarget.h.

Referenced by hasDLInsts().

◆ HasDot1Insts

bool llvm::GCNSubtarget::HasDot1Insts

protected

Definition at line 136 of file GCNSubtarget.h.

Referenced by hasDot1Insts().

◆ HasDot2Insts

bool llvm::GCNSubtarget::HasDot2Insts

protected

Definition at line 137 of file GCNSubtarget.h.

Referenced by hasDot2Insts().

◆ HasDot3Insts

bool llvm::GCNSubtarget::HasDot3Insts

protected

Definition at line 138 of file GCNSubtarget.h.

Referenced by hasDot3Insts().

◆ HasDot4Insts

bool llvm::GCNSubtarget::HasDot4Insts

protected

Definition at line 139 of file GCNSubtarget.h.

Referenced by hasDot4Insts().

◆ HasDot5Insts

bool llvm::GCNSubtarget::HasDot5Insts

protected

Definition at line 140 of file GCNSubtarget.h.

Referenced by hasDot5Insts().

◆ HasDot6Insts

bool llvm::GCNSubtarget::HasDot6Insts

protected

Definition at line 141 of file GCNSubtarget.h.

Referenced by hasDot6Insts().

◆ HasDot7Insts

bool llvm::GCNSubtarget::HasDot7Insts

protected

Definition at line 142 of file GCNSubtarget.h.

Referenced by hasDot7Insts().

◆ HasDPP

bool llvm::GCNSubtarget::HasDPP

protected

Definition at line 123 of file GCNSubtarget.h.

Referenced by hasDPP(), hasDPPBroadcasts(), and hasDPPWavefrontShifts().

◆ HasDPP8

bool llvm::GCNSubtarget::HasDPP8

protected

Definition at line 124 of file GCNSubtarget.h.

Referenced by hasDPP8().

◆ HasExtendedImageInsts

bool llvm::GCNSubtarget::HasExtendedImageInsts

protected

Definition at line 127 of file GCNSubtarget.h.

Referenced by hasExtendedImageInsts().

◆ HasFlatSegmentOffsetBug

bool llvm::GCNSubtarget::HasFlatSegmentOffsetBug

protected

Definition at line 189 of file GCNSubtarget.h.

Referenced by hasFlatSegmentOffsetBug().

◆ HasFmaMixInsts

bool llvm::GCNSubtarget::HasFmaMixInsts

protected

Definition at line 113 of file GCNSubtarget.h.

Referenced by hasFmaMixInsts().

◆ HasG16

bool llvm::GCNSubtarget::HasG16

protected

Definition at line 130 of file GCNSubtarget.h.

Referenced by hasG16().

◆ HasGetWaveIdInst

bool llvm::GCNSubtarget::HasGetWaveIdInst

protected

Definition at line 154 of file GCNSubtarget.h.

Referenced by hasGetWaveIdInst().

◆ HasGFX10A16

bool llvm::GCNSubtarget::HasGFX10A16

protected

Definition at line 129 of file GCNSubtarget.h.

Referenced by hasGFX10A16().

◆ HasImageGather4D16Bug

bool llvm::GCNSubtarget::HasImageGather4D16Bug

protected

Definition at line 191 of file GCNSubtarget.h.

Referenced by hasImageGather4D16Bug().

◆ HasImageStoreD16Bug

bool llvm::GCNSubtarget::HasImageStoreD16Bug

protected

Definition at line 190 of file GCNSubtarget.h.

Referenced by hasImageStoreD16Bug().

◆ HasInstFwdPrefetchBug

bool llvm::GCNSubtarget::HasInstFwdPrefetchBug

protected

Definition at line 183 of file GCNSubtarget.h.

Referenced by hasInstFwdPrefetchBug().

◆ HasIntClamp

bool llvm::GCNSubtarget::HasIntClamp

protected

Definition at line 112 of file GCNSubtarget.h.

Referenced by hasIntClamp().

◆ HasLdsBranchVmemWARHazard

bool llvm::GCNSubtarget::HasLdsBranchVmemWARHazard

protected

Definition at line 185 of file GCNSubtarget.h.

Referenced by hasLdsBranchVmemWARHazard().

◆ HasMAIInsts

bool llvm::GCNSubtarget::HasMAIInsts

protected

Definition at line 143 of file GCNSubtarget.h.

Referenced by hasMAIInsts().

◆ HasMFMAInlineLiteralBug

bool llvm::GCNSubtarget::HasMFMAInlineLiteralBug

protected

Definition at line 172 of file GCNSubtarget.h.

Referenced by hasMFMAInlineLiteralBug().

◆ HasMovrel

bool llvm::GCNSubtarget::HasMovrel

protected

Definition at line 114 of file GCNSubtarget.h.

Referenced by hasMovrel(), and initializeSubtargetDependencies().

◆ HasNoDataDepHazard

bool llvm::GCNSubtarget::HasNoDataDepHazard

protected

Definition at line 159 of file GCNSubtarget.h.

Referenced by hasNoDataDepHazard().

◆ HasNoSdstCMPX

bool llvm::GCNSubtarget::HasNoSdstCMPX

protected

Definition at line 152 of file GCNSubtarget.h.

Referenced by hasNoSdstCMPX().

◆ HasNSAClauseBug

bool llvm::GCNSubtarget::HasNSAClauseBug

protected

Definition at line 187 of file GCNSubtarget.h.

Referenced by hasNSAClauseBug().

◆ HasNSAEncoding

bool llvm::GCNSubtarget::HasNSAEncoding

protected

Definition at line 131 of file GCNSubtarget.h.

Referenced by hasNSAEncoding().

◆ HasNSAtoVMEMBug

bool llvm::GCNSubtarget::HasNSAtoVMEMBug

protected

Definition at line 186 of file GCNSubtarget.h.

Referenced by hasNSAtoVMEMBug().

◆ HasOffset3fBug

bool llvm::GCNSubtarget::HasOffset3fBug

protected

Definition at line 188 of file GCNSubtarget.h.

Referenced by hasOffset3fBug().

◆ HasPackedFP32Ops

bool llvm::GCNSubtarget::HasPackedFP32Ops

protected

Definition at line 126 of file GCNSubtarget.h.

Referenced by hasPackedFP32Ops().

◆ HasPackedTID

bool llvm::GCNSubtarget::HasPackedTID

protected

Definition at line 177 of file GCNSubtarget.h.

Referenced by hasPackedTID().

◆ HasPkFmacF16Inst

bool llvm::GCNSubtarget::HasPkFmacF16Inst

protected

Definition at line 144 of file GCNSubtarget.h.

Referenced by hasPkFmacF16Inst().

◆ HasR128A16

bool llvm::GCNSubtarget::HasR128A16

protected

Definition at line 128 of file GCNSubtarget.h.

Referenced by hasR128A16().

◆ HasRegisterBanking

bool llvm::GCNSubtarget::HasRegisterBanking

protected

Definition at line 157 of file GCNSubtarget.h.

Referenced by hasRegisterBanking().

◆ HasScalarAtomics

bool llvm::GCNSubtarget::HasScalarAtomics

protected

Definition at line 117 of file GCNSubtarget.h.

Referenced by hasScalarAtomics().

◆ HasScalarStores

bool llvm::GCNSubtarget::HasScalarStores

protected

Definition at line 116 of file GCNSubtarget.h.

Referenced by hasScalarStores().

◆ HasSDWAMac

bool llvm::GCNSubtarget::HasSDWAMac

protected

Definition at line 121 of file GCNSubtarget.h.

Referenced by hasSDWAMac().

◆ HasSDWAOmod

bool llvm::GCNSubtarget::HasSDWAOmod

protected

Definition at line 118 of file GCNSubtarget.h.

Referenced by hasSDWAOmod().

◆ HasSDWAOutModsVOPC

bool llvm::GCNSubtarget::HasSDWAOutModsVOPC

protected

Definition at line 122 of file GCNSubtarget.h.

Referenced by hasSDWAOutModsVOPC().

◆ HasSDWAScalar

bool llvm::GCNSubtarget::HasSDWAScalar

protected

Definition at line 119 of file GCNSubtarget.h.

Referenced by hasSDWAScalar().

◆ HasSDWASdst

bool llvm::GCNSubtarget::HasSDWASdst

protected

Definition at line 120 of file GCNSubtarget.h.

Referenced by hasSDWASdst().

◆ HasShaderCyclesRegister

bool llvm::GCNSubtarget::HasShaderCyclesRegister

protected

Definition at line 156 of file GCNSubtarget.h.

Referenced by hasShaderCyclesRegister().

◆ HasSMemRealTime

bool llvm::GCNSubtarget::HasSMemRealTime

protected

Definition at line 111 of file GCNSubtarget.h.

Referenced by hasSMemRealTime().

◆ HasSMemTimeInst

bool llvm::GCNSubtarget::HasSMemTimeInst

protected

Definition at line 155 of file GCNSubtarget.h.

Referenced by hasSMemTimeInst().

◆ HasSMEMtoVectorWriteHazard

bool llvm::GCNSubtarget::HasSMEMtoVectorWriteHazard

protected

Definition at line 182 of file GCNSubtarget.h.

Referenced by hasSMEMtoVectorWriteHazard().

◆ HasUnpackedD16VMem

bool llvm::GCNSubtarget::HasUnpackedD16VMem

protected

Definition at line 167 of file GCNSubtarget.h.

Referenced by hasUnpackedD16VMem().

◆ HasVcmpxExecWARHazard

bool llvm::GCNSubtarget::HasVcmpxExecWARHazard

protected

Definition at line 184 of file GCNSubtarget.h.

Referenced by hasVcmpxExecWARHazard().

◆ HasVcmpxPermlaneHazard

bool llvm::GCNSubtarget::HasVcmpxPermlaneHazard

protected

Definition at line 180 of file GCNSubtarget.h.

Referenced by hasVcmpxPermlaneHazard().

◆ HasVertexCache

bool llvm::GCNSubtarget::HasVertexCache

protected

Definition at line 173 of file GCNSubtarget.h.

◆ HasVGPRIndexMode

bool llvm::GCNSubtarget::HasVGPRIndexMode

protected

Definition at line 115 of file GCNSubtarget.h.

Referenced by hasVGPRIndexMode(), and initializeSubtargetDependencies().

◆ HasVMEMtoScalarWriteHazard

bool llvm::GCNSubtarget::HasVMEMtoScalarWriteHazard

protected

Definition at line 181 of file GCNSubtarget.h.

Referenced by hasVMEMtoScalarWriteHazard().

◆ HasVOP3Literal

bool llvm::GCNSubtarget::HasVOP3Literal

protected

Definition at line 158 of file GCNSubtarget.h.

Referenced by hasVOP3Literal().

◆ HasVscnt

bool llvm::GCNSubtarget::HasVscnt

protected

Definition at line 153 of file GCNSubtarget.h.

Referenced by hasVscnt().

◆ InstrItins

InstrItineraryData llvm::GCNSubtarget::InstrItins

protected

Definition at line 62 of file GCNSubtarget.h.

Referenced by getInstrItineraryData().

◆ IsGCN

bool llvm::GCNSubtarget::IsGCN

protected

Definition at line 100 of file GCNSubtarget.h.

◆ LDSBankCount

int llvm::GCNSubtarget::LDSBankCount

protected

Definition at line 63 of file GCNSubtarget.h.

Referenced by getLDSBankCount(), and initializeSubtargetDependencies().

◆ LDSMisalignedBug

bool llvm::GCNSubtarget::LDSMisalignedBug

protected

Definition at line 171 of file GCNSubtarget.h.

Referenced by hasLDSMisalignedBug().

◆ MaxPrivateElementSize

unsigned llvm::GCNSubtarget::MaxPrivateElementSize

protected

Definition at line 64 of file GCNSubtarget.h.

Referenced by getMaxPrivateElementSize(), and initializeSubtargetDependencies().

◆ MaxWaveScratchSize

const unsigned llvm::GCNSubtarget::MaxWaveScratchSize = (256 * 4) * ((1 << 13) - 1)

static

Definition at line 204 of file GCNSubtarget.h.

Referenced by getKnownHighZeroBitsForFrameIndex().

◆ MIMG_R128

bool llvm::GCNSubtarget::MIMG_R128

protected

Definition at line 99 of file GCNSubtarget.h.

Referenced by hasMIMG_R128().

◆ NegativeScratchOffsetBug

bool llvm::GCNSubtarget::NegativeScratchOffsetBug

protected

Definition at line 109 of file GCNSubtarget.h.

Referenced by hasNegativeScratchOffsetBug().

◆ NegativeUnalignedScratchOffsetBug

bool llvm::GCNSubtarget::NegativeUnalignedScratchOffsetBug

protected

Definition at line 110 of file GCNSubtarget.h.

Referenced by hasNegativeUnalignedScratchOffsetBug().

◆ NSAMaxSize

unsigned llvm::GCNSubtarget::NSAMaxSize

protected

Definition at line 132 of file GCNSubtarget.h.

Referenced by getNSAMaxSize().

◆ R600ALUInst

bool llvm::GCNSubtarget::R600ALUInst

protected

Definition at line 168 of file GCNSubtarget.h.

◆ ScalarFlatScratchInsts

bool llvm::GCNSubtarget::ScalarFlatScratchInsts

protected

Definition at line 164 of file GCNSubtarget.h.

Referenced by hasScalarFlatScratchInsts().

◆ ScalarizeGlobal

bool llvm::GCNSubtarget::ScalarizeGlobal

protected

Definition at line 178 of file GCNSubtarget.h.

Referenced by getScalarizeGlobalBehavior(), and setScalarizeGlobalBehavior().

◆ SGPRInitBug

bool llvm::GCNSubtarget::SGPRInitBug

protected

Definition at line 108 of file GCNSubtarget.h.

Referenced by hasSGPRInitBug().

◆ SupportsSRAMECC

bool llvm::GCNSubtarget::SupportsSRAMECC

protected

Definition at line 146 of file GCNSubtarget.h.

◆ SupportsXNACK

bool llvm::GCNSubtarget::SupportsXNACK

protected

Definition at line 78 of file GCNSubtarget.h.

◆ TargetID

AMDGPU::IsaInfo::AMDGPUTargetID llvm::GCNSubtarget::TargetID

protected

Definition at line 60 of file GCNSubtarget.h.

Referenced by d16PreservesUnusedBits(), getTargetID(), initializeSubtargetDependencies(), and isXNACKEnabled().

◆ TargetTriple

Triple llvm::GCNSubtarget::TargetTriple

protected

Definition at line 59 of file GCNSubtarget.h.

◆ TexVTXClauseSize

short llvm::GCNSubtarget::TexVTXClauseSize

protected

Definition at line 174 of file GCNSubtarget.h.

◆ TrapHandler

bool llvm::GCNSubtarget::TrapHandler

protected

Definition at line 86 of file GCNSubtarget.h.

Referenced by isTrapHandlerEnabled().

◆ TSInfo

SelectionDAGTargetInfo llvm::GCNSubtarget::TSInfo

protected

Definition at line 196 of file GCNSubtarget.h.

Referenced by getSelectionDAGInfo().

◆ UnalignedAccessMode

bool llvm::GCNSubtarget::UnalignedAccessMode

protected

Definition at line 76 of file GCNSubtarget.h.

Referenced by hasUnalignedAccessMode(), hasUnalignedBufferAccessEnabled(), and hasUnalignedDSAccessEnabled().

◆ UnalignedBufferAccess

bool llvm::GCNSubtarget::UnalignedBufferAccess

protected

Definition at line 175 of file GCNSubtarget.h.

Referenced by hasUnalignedBufferAccess(), and hasUnalignedBufferAccessEnabled().

◆ UnalignedDSAccess

bool llvm::GCNSubtarget::UnalignedDSAccess

protected

Definition at line 176 of file GCNSubtarget.h.

Referenced by hasUnalignedDSAccess(), and hasUnalignedDSAccessEnabled().

◆ UnalignedScratchAccess

bool llvm::GCNSubtarget::UnalignedScratchAccess

protected

Definition at line 75 of file GCNSubtarget.h.

Referenced by hasUnalignedScratchAccess().

The documentation for this class was generated from the following files:

lib/Target/AMDGPU/GCNSubtarget.h
lib/Target/AMDGPU/AMDGPUSubtarget.cpp

Public Types

Public Member Functions

Static Public Member Functions

Static Public Attributes

Protected Attributes

Detailed Description

Member Enumeration Documentation

◆ TrapHandlerAbi

◆ TrapID

Constructor & Destructor Documentation

◆ GCNSubtarget()

◆ ~GCNSubtarget()

Member Function Documentation

◆ adjustSchedDependency()

◆ computeOccupancy()

◆ createFillMFMAShadowMutation()

◆ d16PreservesUnusedBits()

◆ dumpCode()

◆ enableEarlyIfConversion()

◆ enableFlatScratch()

◆ enableMachineScheduler()

◆ enableSIScheduler()

◆ enableSubRegLiveness()

◆ flatScratchIsArchitected()

◆ flatScratchIsPointer()

◆ getAddressableNumSGPRs()

◆ getAddressableNumVGPRs()

◆ getBaseMaxNumSGPRs()

◆ getBaseMaxNumVGPRs()

◆ getBaseReservedNumSGPRs()

◆ getBoolRC()

◆ getCallLowering()

◆ getConstantBusLimit()

◆ getFrameLowering()

◆ getGeneration()

◆ getInlineAsmLowering()

◆ getInstrInfo()

◆ getInstrItineraryData()

◆ getInstructionSelector()

◆ getKnownHighZeroBitsForFrameIndex()

◆ getLDSBankCount()

◆ getLegalizerInfo()

◆ getMaxFlatWorkGroupSize()

◆ getMaxLocalMemSizeWithWaveCount()

◆ getMaxNumSGPRs() [1/3]

◆ getMaxNumSGPRs() [2/3]

◆ getMaxNumSGPRs() [3/3]

◆ getMaxNumUserSGPRs()

◆ getMaxNumVGPRs() [1/3]

◆ getMaxNumVGPRs() [2/3]

◆ getMaxNumVGPRs() [3/3]

◆ getMaxPrivateElementSize()

◆ getMaxWorkGroupsPerCU()

◆ getMinFlatWorkGroupSize()

◆ getMinNumSGPRs()

◆ getMinNumVGPRs()

◆ getMinWavesPerEU()

◆ getNSAMaxSize()

◆ getOccupancyWithNumSGPRs()

◆ getOccupancyWithNumVGPRs()

◆ getPostRAMutations()

◆ getRegBankInfo()

◆ getRegisterInfo()

◆ getReservedNumSGPRs() [1/2]

◆ getReservedNumSGPRs() [2/2]

◆ getScalarizeGlobalBehavior()

◆ getSelectionDAGInfo()

◆ getSetRegWaitStates()

◆ getSGPRAllocGranule()

◆ getSGPREncodingGranule()

◆ getStackAlignment()

◆ getTargetID()

◆ getTargetLowering()

◆ getTotalNumSGPRs()

◆ getTotalNumVGPRs()

◆ getTrapHandlerAbi()

◆ getVGPRAllocGranule()

◆ getVGPREncodingGranule()

◆ getWavesPerEUForWorkGroup()

◆ has12DWordStoreHazard()