LLVM 20.0.0git
Public Types | Public Member Functions | Static Public Member Functions | Protected Attributes | List of all members
llvm::GCNSubtarget Class Referencefinal

#include "Target/AMDGPU/GCNSubtarget.h"

Inheritance diagram for llvm::GCNSubtarget:
Inheritance graph
[legend]

Public Types

enum class  TrapHandlerAbi { NONE = 0x00 , AMDHSA = 0x01 }
 
enum class  TrapID { LLVMAMDHSATrap = 0x02 , LLVMAMDHSADebugTrap = 0x03 }
 
- Public Types inherited from llvm::AMDGPUSubtarget
enum  Generation {
  INVALID = 0 , R600 = 1 , R700 = 2 , EVERGREEN = 3 ,
  NORTHERN_ISLANDS = 4 , SOUTHERN_ISLANDS = 5 , SEA_ISLANDS = 6 , VOLCANIC_ISLANDS = 7 ,
  GFX9 = 8 , GFX10 = 9 , GFX11 = 10 , GFX12 = 11
}
 

Public Member Functions

 GCNSubtarget (const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM)
 
 ~GCNSubtarget () override
 
GCNSubtarget & initializeSubtargetDependencies (const Triple &TT, StringRef GPU, StringRef FS)
 
void checkSubtargetFeatures (const Function &F) const
 Diagnose inconsistent subtarget features before attempting to codegen function F.
 
const SIInstrInfo * getInstrInfo () const override
 
const SIFrameLowering * getFrameLowering () const override
 
const SITargetLowering * getTargetLowering () const override
 
const SIRegisterInfo * getRegisterInfo () const override
 
const SelectionDAGTargetInfo * getSelectionDAGInfo () const override
 
const CallLowering * getCallLowering () const override
 
const InlineAsmLowering * getInlineAsmLowering () const override
 
InstructionSelector * getInstructionSelector () const override
 
const LegalizerInfo * getLegalizerInfo () const override
 
const AMDGPURegisterBankInfo * getRegBankInfo () const override
 
const AMDGPU::IsaInfo::AMDGPUTargetID & getTargetID () const
 
const InstrItineraryData * getInstrItineraryData () const override
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 
Generation getGeneration () const
 
unsigned getMaxWaveScratchSize () const
 
unsigned getKnownHighZeroBitsForFrameIndex () const
 Return the number of high bits known to be zero for a frame index.
 
int getLDSBankCount () const
 
unsigned getMaxPrivateElementSize (bool ForBufferRSrc=false) const
 
unsigned getConstantBusLimit (unsigned Opcode) const
 
bool zeroesHigh16BitsOfDest (unsigned Opcode) const
 Returns if the result of this instruction with a 16-bit result returned in a 32-bit register implicitly zeroes the high 16-bits, rather than preserve the original value.
 
bool supportsWGP () const
 
bool hasIntClamp () const
 
bool hasFP64 () const
 
bool hasMIMG_R128 () const
 
bool hasHWFP64 () const
 
bool hasHalfRate64Ops () const
 
bool hasFullRate64Ops () const
 
bool hasAddr64 () const
 
bool hasFlat () const
 
bool hasOnlyRevVALUShifts () const
 
bool hasFractBug () const
 
bool hasBFE () const
 
bool hasBFI () const
 
bool hasBFM () const
 
bool hasBCNT (unsigned Size) const
 
bool hasFFBL () const
 
bool hasFFBH () const
 
bool hasMed3_16 () const
 
bool hasMin3Max3_16 () const
 
bool hasFmaMixInsts () const
 
bool hasCARRY () const
 
bool hasFMA () const
 
bool hasSwap () const
 
bool hasScalarPackInsts () const
 
bool hasScalarMulHiInsts () const
 
bool hasScalarSubwordLoads () const
 
TrapHandlerAbi getTrapHandlerAbi () const
 
bool supportsGetDoorbellID () const
 
bool hasUsableDSOffset () const
 True if the offset field of DS instructions works as expected.
 
bool unsafeDSOffsetFoldingEnabled () const
 
bool hasUsableDivScaleConditionOutput () const
 Condition output from div_scale is usable.
 
bool hasReadVCCZBug () const
 Extra wait hazard is needed in some cases before s_cbranch_vccnz/s_cbranch_vccz.
 
bool partialVCCWritesUpdateVCCZ () const
 Writes to VCC_LO/VCC_HI update the VCCZ flag.
 
bool hasSMRDReadVALUDefHazard () const
 A read of an SGPR by SMRD instruction requires 4 wait states when the SGPR was written by a VALU instruction.
 
bool hasVMEMReadSGPRVALUDefHazard () const
 A read of an SGPR by a VMEM instruction requires 5 wait states when the SGPR was written by a VALU Instruction.
 
bool hasRFEHazards () const
 
unsigned getSetRegWaitStates () const
 Number of hazard wait states for s_setreg_b32/s_setreg_imm32_b32.
 
bool dumpCode () const
 
unsigned getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
 Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.
 
bool supportsMinMaxDenormModes () const
 
bool hasDenormModeInst () const
 
bool useFlatForGlobal () const
 
bool useDS128 () const
 
bool hasDS96AndDS128 () const
 
bool haveRoundOpsF64 () const
 Have v_trunc_f64, v_ceil_f64, v_rndne_f64.
 
bool privateMemoryResourceIsRangeChecked () const
 
bool usePRTStrictNull () const
 
bool hasAutoWaitcntBeforeBarrier () const
 
bool supportsBackOffBarrier () const
 
bool hasUnalignedBufferAccess () const
 
bool hasUnalignedBufferAccessEnabled () const
 
bool hasUnalignedDSAccess () const
 
bool hasUnalignedDSAccessEnabled () const
 
bool hasUnalignedScratchAccess () const
 
bool hasUnalignedScratchAccessEnabled () const
 
bool hasUnalignedAccessMode () const
 
bool hasApertureRegs () const
 
bool isTrapHandlerEnabled () const
 
bool isXNACKEnabled () const
 
bool isTgSplitEnabled () const
 
bool isCuModeEnabled () const
 
bool isPreciseMemoryEnabled () const
 
bool hasFlatAddressSpace () const
 
bool hasFlatScrRegister () const
 
bool hasFlatInstOffsets () const
 
bool hasFlatGlobalInsts () const
 
bool hasFlatScratchInsts () const
 
bool hasFlatScratchSTMode () const
 
bool hasFlatScratchSVSMode () const
 
bool hasScalarFlatScratchInsts () const
 
bool enableFlatScratch () const
 
bool hasGlobalAddTidInsts () const
 
bool hasAtomicCSub () const
 
bool hasExportInsts () const
 
bool hasVINTERPEncoding () const
 
bool hasLdsAtomicAddF64 () const
 
bool hasMultiDwordFlatScratchAddressing () const
 
bool hasFlatSegmentOffsetBug () const
 
bool hasFlatLgkmVMemCountInOrder () const
 
bool hasD16LoadStore () const
 
bool d16PreservesUnusedBits () const
 
bool hasD16Images () const
 
bool ldsRequiresM0Init () const
 Return if most LDS instructions have an m0 use that require m0 to be initialized.
 
bool hasGWSAutoReplay () const
 
bool hasGWSSemaReleaseAll () const
 
bool hasAddNoCarry () const
 
bool hasScalarAddSub64 () const
 
bool hasScalarSMulU64 () const
 
bool hasUnpackedD16VMem () const
 
bool isMesaGfxShader (const Function &F) const
 
bool hasMad64_32 () const
 
bool hasSDWAOmod () const
 
bool hasSDWAScalar () const
 
bool hasSDWASdst () const
 
bool hasSDWAMac () const
 
bool hasSDWAOutModsVOPC () const
 
bool hasDLInsts () const
 
bool hasFmacF64Inst () const
 
bool hasDot1Insts () const
 
bool hasDot2Insts () const
 
bool hasDot3Insts () const
 
bool hasDot4Insts () const
 
bool hasDot5Insts () const
 
bool hasDot6Insts () const
 
bool hasDot7Insts () const
 
bool hasDot8Insts () const
 
bool hasDot9Insts () const
 
bool hasDot10Insts () const
 
bool hasDot11Insts () const
 
bool hasDot12Insts () const
 
bool hasDot13Insts () const
 
bool hasMAIInsts () const
 
bool hasFP8Insts () const
 
bool hasFP8ConversionInsts () const
 
bool hasPkFmacF16Inst () const
 
bool hasAtomicFMinFMaxF32GlobalInsts () const
 
bool hasAtomicFMinFMaxF64GlobalInsts () const
 
bool hasAtomicFMinFMaxF32FlatInsts () const
 
bool hasAtomicFMinFMaxF64FlatInsts () const
 
bool hasAtomicDsPkAdd16Insts () const
 
bool hasAtomicFlatPkAdd16Insts () const
 
bool hasAtomicFaddInsts () const
 
bool hasAtomicFaddRtnInsts () const
 
bool hasAtomicFaddNoRtnInsts () const
 
bool hasAtomicBufferGlobalPkAddF16NoRtnInsts () const
 
bool hasAtomicBufferGlobalPkAddF16Insts () const
 
bool hasAtomicGlobalPkAddBF16Inst () const
 
bool hasAtomicBufferPkAddBF16Inst () const
 
bool hasFlatAtomicFaddF32Inst () const
 
bool hasFlatBufferGlobalAtomicFaddF64Inst () const
 
bool hasMemoryAtomicFaddF32DenormalSupport () const
 
bool supportsAgentScopeFineGrainedRemoteMemoryAtomics () const
 
bool hasDefaultComponentZero () const
 
bool hasDefaultComponentBroadcast () const
 
bool hasNoSdstCMPX () const
 
bool hasVscnt () const
 
bool hasGetWaveIdInst () const
 
bool hasSMemTimeInst () const
 
bool hasShaderCyclesRegister () const
 
bool hasShaderCyclesHiLoRegisters () const
 
bool hasVOP3Literal () const
 
bool hasNoDataDepHazard () const
 
bool vmemWriteNeedsExpWaitcnt () const
 
bool hasInstPrefetch () const
 
bool hasPrefetch () const
 
bool hasSCmpK () const
 
Align getStackAlignment () const
 
bool enableMachineScheduler () const override
 
bool useAA () const override
 
bool enableSubRegLiveness () const override
 
void setScalarizeGlobalBehavior (bool b)
 
bool getScalarizeGlobalBehavior () const
 
bool enableEarlyIfConversion () const override
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
void mirFileLoaded (MachineFunction &MF) const override
 
unsigned getMaxNumUserSGPRs () const
 
bool hasSMemRealTime () const
 
bool hasMovrel () const
 
bool hasVGPRIndexMode () const
 
bool useVGPRIndexMode () const
 
bool hasScalarCompareEq64 () const
 
bool hasScalarDwordx3Loads () const
 
bool hasScalarStores () const
 
bool hasScalarAtomics () const
 
bool hasLDSFPAtomicAddF32 () const
 
bool hasLDSFPAtomicAddF64 () const
 
bool hasPermLaneX16 () const
 
bool hasPermLane64 () const
 
bool hasDPP () const
 
bool hasDPPBroadcasts () const
 
bool hasDPPWavefrontShifts () const
 
bool hasDPP8 () const
 
bool hasDPALU_DPP () const
 
bool hasDPPSrc1SGPR () const
 
bool hasPackedFP32Ops () const
 
bool hasPkMovB32 () const
 
bool hasFmaakFmamkF32Insts () const
 
bool hasImageInsts () const
 
bool hasExtendedImageInsts () const
 
bool hasR128A16 () const
 
bool hasA16 () const
 
bool hasG16 () const
 
bool hasOffset3fBug () const
 
bool hasImageStoreD16Bug () const
 
bool hasImageGather4D16Bug () const
 
bool hasMADIntraFwdBug () const
 
bool hasMSAALoadDstSelBug () const
 
bool hasPrivEnabledTrap2NopBug () const
 
bool hasNSAEncoding () const
 
bool hasNonNSAEncoding () const
 
bool hasPartialNSAEncoding () const
 
unsigned getNSAMaxSize (bool HasSampler=false) const
 
bool hasGFX10_AEncoding () const
 
bool hasGFX10_BEncoding () const
 
bool hasGFX10_3Insts () const
 
bool hasMadF16 () const
 
bool hasMovB64 () const
 
bool hasLshlAddB64 () const
 
bool enableSIScheduler () const
 
bool loadStoreOptEnabled () const
 
bool hasSGPRInitBug () const
 
bool hasUserSGPRInit16Bug () const
 
bool hasNegativeScratchOffsetBug () const
 
bool hasNegativeUnalignedScratchOffsetBug () const
 
bool hasMFMAInlineLiteralBug () const
 
bool has12DWordStoreHazard () const
 
bool hasDwordx3LoadStores () const
 
bool hasReadM0MovRelInterpHazard () const
 
bool hasReadM0SendMsgHazard () const
 
bool hasReadM0LdsDmaHazard () const
 
bool hasReadM0LdsDirectHazard () const
 
bool hasVcmpxPermlaneHazard () const
 
bool hasVMEMtoScalarWriteHazard () const
 
bool hasSMEMtoVectorWriteHazard () const
 
bool hasLDSMisalignedBug () const
 
bool hasInstFwdPrefetchBug () const
 
bool hasVcmpxExecWARHazard () const
 
bool hasLdsBranchVmemWARHazard () const
 
bool hasShift64HighRegBug () const
 
bool hasTransForwardingHazard () const
 
bool hasDstSelForwardingHazard () const
 
bool hasDOTOpSelHazard () const
 
bool hasVDecCoExecHazard () const
 
bool hasNSAtoVMEMBug () const
 
bool hasNSAClauseBug () const
 
bool hasHardClauses () const
 
bool hasGFX90AInsts () const
 
bool hasFPAtomicToDenormModeHazard () const
 
bool hasVOP3DPP () const
 
bool hasLdsDirect () const
 
bool hasLdsWaitVMSRC () const
 
bool hasVALUPartialForwardingHazard () const
 
bool hasVALUTransUseHazard () const
 
bool hasCvtScaleForwardingHazard () const
 
bool hasForceStoreSC0SC1 () const
 
bool requiresCodeObjectV6 () const
 
bool hasVALUMaskWriteHazard () const
 
bool hasVALUReadSGPRHazard () const
 
bool needsAlignedVGPRs () const
 Return if operations acting on VGPR tuples require even alignment.
 
bool hasSPackHL () const
 Return true if the target has the S_PACK_HL_B32_B16 instruction.
 
bool hasCompressedExport () const
 Return true if the target's EXP instruction has the COMPR flag, which affects the meaning of the EN (enable) bits.
 
bool hasNullExportTarget () const
 Return true if the target's EXP instruction supports the NULL export target.
 
bool has1_5xVGPRs () const
 
bool hasVOPDInsts () const
 
bool hasFlatScratchSVSSwizzleBug () const
 
bool hasDelayAlu () const
 Return true if the target has the S_DELAY_ALU instruction.
 
bool hasPackedTID () const
 
bool hasGFX940Insts () const
 
bool hasGFX950Insts () const
 
bool hasLDSLoadB96_B128 () const
 Returns true if the target supports global_load_lds_dwordx3/global_load_lds_dwordx4 or buffer_load_dwordx3/buffer_load_dwordx4 with the lds bit.
 
bool hasSALUFloatInsts () const
 
bool hasPseudoScalarTrans () const
 
bool hasRestrictedSOffset () const
 
bool hasRequiredExportPriority () const
 
bool hasVmemWriteVgprInOrder () const
 
bool hasExtendedWaitCounts () const
 
bool hasNoF16PseudoScalarTransInlineConstants () const
 
bool hasXF32Insts () const
 
bool hasBitOp3Insts () const
 
bool hasPermlane16Swap () const
 
bool hasPermlane32Swap () const
 
bool hasAshrPkInsts () const
 
bool hasMinimum3Maximum3F32 () const
 
bool hasMinimum3Maximum3F16 () const
 
bool hasMinimum3Maximum3PKF16 () const
 
unsigned maxHardClauseLength () const
 
bool hasPrngInst () const
 
unsigned getOccupancyWithNumSGPRs (unsigned SGPRs) const
 Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.
 
unsigned getOccupancyWithNumVGPRs (unsigned VGPRs) const
 Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.
 
unsigned computeOccupancy (const Function &F, unsigned LDSSize=0, unsigned NumSGPRs=0, unsigned NumVGPRs=0) const
 Return occupancy for the given function.
 
bool flatScratchIsPointer () const
 
bool flatScratchIsArchitected () const
 
bool hasArchitectedSGPRs () const
 
bool hasGDS () const
 
bool hasGWS () const
 
bool hasMergedShaders () const
 
bool hasLegacyGeometry () const
 
bool hasKernargPreload () const
 
bool hasSplitBarriers () const
 
bool hasCvtFP8VOP1Bug () const
 
bool hasAtomicCSubNoRtnInsts () const
 
bool hasDX10ClampMode () const
 
bool hasIEEEMode () const
 
bool hasIEEEMinMax () const
 
bool hasIEEEMinMax3 () const
 
bool hasRrWGMode () const
 
bool hasSignedScratchOffsets () const
 
bool hasGetPCZeroExtension () const
 
unsigned getSGPRAllocGranule () const
 
unsigned getSGPREncodingGranule () const
 
unsigned getTotalNumSGPRs () const
 
unsigned getAddressableNumSGPRs () const
 
unsigned getMinNumSGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumSGPRs (unsigned WavesPerEU, bool Addressable) const
 
unsigned getBaseReservedNumSGPRs (const bool HasFlatScratch) const
 
unsigned getReservedNumSGPRs (const MachineFunction &MF) const
 
unsigned getReservedNumSGPRs (const Function &F) const
 
unsigned getBaseMaxNumSGPRs (const Function &F, std::pair< unsigned, unsigned > WavesPerEU, unsigned PreloadedSGPRs, unsigned ReservedNumSGPRs) const
 
unsigned getMaxNumSGPRs (const MachineFunction &MF) const
 
unsigned getMaxNumSGPRs (const Function &F) const
 
unsigned getVGPRAllocGranule () const
 
unsigned getVGPREncodingGranule () const
 
unsigned getTotalNumVGPRs () const
 
unsigned getAddressableNumArchVGPRs () const
 
unsigned getAddressableNumVGPRs () const
 
unsigned getMinNumVGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumVGPRs (unsigned WavesPerEU) const
 
unsigned getBaseMaxNumVGPRs (const Function &F, std::pair< unsigned, unsigned > WavesPerEU) const
 
unsigned getMaxNumVGPRs (const Function &F) const
 
unsigned getMaxNumAGPRs (const Function &F) const
 
unsigned getMaxNumVGPRs (const MachineFunction &MF) const
 
void getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override
 
std::unique_ptr< ScheduleDAGMutation > createFillMFMAShadowMutation (const TargetInstrInfo *TII) const
 
bool isWave32 () const
 
bool isWave64 () const
 
bool isWaveSizeKnown () const
 Returns if the wavesize of this subtarget is known reliable.
 
const TargetRegisterClass * getBoolRC () const
 
unsigned getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const override
 
unsigned getMinFlatWorkGroupSize () const override
 
unsigned getMaxFlatWorkGroupSize () const override
 
unsigned getWavesPerEUForWorkGroup (unsigned FlatWorkGroupSize) const override
 
unsigned getMinWavesPerEU () const override
 
void adjustSchedDependency (SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, const TargetSchedModel *SchedModel) const override
 
bool shouldClusterStores () const
 
unsigned getNSAThreshold (const MachineFunction &MF) const
 
bool requiresNopBeforeDeallocVGPRs () const
 
bool requiresDisjointEarlyClobberAndUndef () const override
 
unsigned getMaxWavesPerEU () const
 
- Public Member Functions inherited from llvm::AMDGPUSubtarget
 AMDGPUSubtarget (Triple TT)
 
std::pair< unsigned, unsigned > getDefaultFlatWorkGroupSize (CallingConv::ID CC) const
 
std::pair< unsigned, unsigned > getFlatWorkGroupSizes (const Function &F) const
 
std::pair< unsigned, unsigned > getWavesPerEU (const Function &F) const
 
std::pair< unsigned, unsigned > getWavesPerEU (const Function &F, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const
 Overload which uses the specified values for the flat work group sizes, rather than querying the function itself.
 
std::pair< unsigned, unsigned > getEffectiveWavesPerEU (std::pair< unsigned, unsigned > WavesPerEU, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const
 
unsigned getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
 Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.
 
unsigned getOccupancyWithLocalMemSize (uint32_t Bytes, const Function &) const
 Inverse of getMaxLocalMemWithWaveCount.
 
unsigned getOccupancyWithLocalMemSize (const MachineFunction &MF) const
 
bool isAmdHsaOS () const
 
bool isAmdPalOS () const
 
bool isMesa3DOS () const
 
bool isMesaKernel (const Function &F) const
 
bool isAmdHsaOrMesa (const Function &F) const
 
bool isGCN () const
 
bool isGCN3Encoding () const
 
bool has16BitInsts () const
 
bool hasTrue16BitInsts () const
 Return true if the subtarget supports True16 instructions.
 
bool useRealTrue16Insts () const
 Return true if real (non-fake) variants of True16 instructions using 16-bit registers should be code-generated.
 
bool hasBF16ConversionInsts () const
 
bool hasMadMixInsts () const
 
bool hasFP8ConversionScaleInsts () const
 
bool hasBF8ConversionScaleInsts () const
 
bool hasFP4ConversionScaleInsts () const
 
bool hasFP6BF6ConversionScaleInsts () const
 
bool hasF16BF16ToFP6BF6ConversionScaleInsts () const
 
bool hasCvtPkF16F32Inst () const
 
bool hasF32ToF16BF16ConversionSRInsts () const
 
bool hasMadMacF32Insts () const
 
bool hasDsSrc2Insts () const
 
bool hasSDWA () const
 
bool hasVOP3PInsts () const
 
bool hasMulI24 () const
 
bool hasMulU24 () const
 
bool hasSMulHi () const
 
bool hasInv2PiInlineImm () const
 
bool hasFminFmaxLegacy () const
 
bool hasTrigReducedRange () const
 
bool hasFastFMAF32 () const
 
bool isPromoteAllocaEnabled () const
 
unsigned getWavefrontSize () const
 
unsigned getWavefrontSizeLog2 () const
 
unsigned getLocalMemorySize () const
 Return the maximum number of bytes of LDS available for all workgroups running on the same WGP or CU.
 
unsigned getAddressableLocalMemorySize () const
 Return the maximum number of bytes of LDS that can be allocated to a single workgroup.
 
unsigned getEUsPerCU () const
 Number of SIMDs/EUs (execution units) per "CU" ("compute unit"), where the "CU" is the unit onto which workgroups are mapped.
 
Align getAlignmentForImplicitArgPtr () const
 
unsigned getExplicitKernelArgOffset () const
 Returns the offset in bytes from the start of the input buffer of the first explicit kernel argument.
 
virtual unsigned getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const =0
 
virtual unsigned getMinFlatWorkGroupSize () const =0
 
virtual unsigned getMaxFlatWorkGroupSize () const =0
 
virtual unsigned getWavesPerEUForWorkGroup (unsigned FlatWorkGroupSize) const =0
 
virtual unsigned getMinWavesPerEU () const =0
 
unsigned getMaxWavesPerEU () const
 
unsigned getMaxWorkitemID (const Function &Kernel, unsigned Dimension) const
 Return the maximum workitem ID value in the function, for the given (0, 1, 2) dimension.
 
SmallVector< unsigned > getMaxNumWorkGroups (const Function &F) const
 Return the number of work groups for the function.
 
bool isSingleLaneExecution (const Function &Kernel) const
 Return true if only a single workitem can be active in a wave.
 
bool makeLIDRangeMetadata (Instruction *I) const
 Creates value range metadata on an workitemid.* intrinsic call or load.
 
unsigned getImplicitArgNumBytes (const Function &F) const
 
uint64_t getExplicitKernArgSize (const Function &F, Align &MaxAlign) const
 
unsigned getKernArgSegmentSize (const Function &F, Align &MaxAlign) const
 
AMDGPUDwarfFlavour getAMDGPUDwarfFlavour () const
 
virtual ~AMDGPUSubtarget ()=default
 

Static Public Member Functions

static bool hasHalfRate64Ops (const TargetSubtargetInfo &STI)
 
- Static Public Member Functions inherited from llvm::AMDGPUSubtarget
static const AMDGPUSubtarget & get (const MachineFunction &MF)
 
static const AMDGPUSubtarget & get (const TargetMachine &TM, const Function &F)
 

Protected Attributes

Triple TargetTriple
 
AMDGPU::IsaInfo::AMDGPUTargetID TargetID
 
unsigned Gen = INVALID
 
InstrItineraryData InstrItins
 
int LDSBankCount = 0
 
unsigned MaxPrivateElementSize = 0
 
bool FastDenormalF32 = false
 
bool HalfRate64Ops = false
 
bool FullRate64Ops = false
 
bool FlatForGlobal = false
 
bool AutoWaitcntBeforeBarrier = false
 
bool BackOffBarrier = false
 
bool UnalignedScratchAccess = false
 
bool UnalignedAccessMode = false
 
bool HasApertureRegs = false
 
bool SupportsXNACK = false
 
bool KernargPreload = false
 
bool EnableXNACK = false
 
bool EnableTgSplit = false
 
bool EnableCuMode = false
 
bool TrapHandler = false
 
bool EnablePreciseMemory = false
 
bool EnableLoadStoreOpt = false
 
bool EnableUnsafeDSOffsetFolding = false
 
bool EnableSIScheduler = false
 
bool EnableDS128 = false
 
bool EnablePRTStrictNull = false
 
bool DumpCode = false
 
bool FP64 = false
 
bool FMA = false
 
bool MIMG_R128 = false
 
bool CIInsts = false
 
bool GFX8Insts = false
 
bool GFX9Insts = false
 
bool GFX90AInsts = false
 
bool GFX940Insts = false
 
bool GFX950Insts = false
 
bool GFX10Insts = false
 
bool GFX11Insts = false
 
bool GFX12Insts = false
 
bool GFX10_3Insts = false
 
bool GFX7GFX8GFX9Insts = false
 
bool SGPRInitBug = false
 
bool UserSGPRInit16Bug = false
 
bool NegativeScratchOffsetBug = false
 
bool NegativeUnalignedScratchOffsetBug = false
 
bool HasSMemRealTime = false
 
bool HasIntClamp = false
 
bool HasFmaMixInsts = false
 
bool HasMovrel = false
 
bool HasVGPRIndexMode = false
 
bool HasScalarDwordx3Loads = false
 
bool HasScalarStores = false
 
bool HasScalarAtomics = false
 
bool HasSDWAOmod = false
 
bool HasSDWAScalar = false
 
bool HasSDWASdst = false
 
bool HasSDWAMac = false
 
bool HasSDWAOutModsVOPC = false
 
bool HasDPP = false
 
bool HasDPP8 = false
 
bool HasDPALU_DPP = false
 
bool HasDPPSrc1SGPR = false
 
bool HasPackedFP32Ops = false
 
bool HasImageInsts = false
 
bool HasExtendedImageInsts = false
 
bool HasR128A16 = false
 
bool HasA16 = false
 
bool HasG16 = false
 
bool HasNSAEncoding = false
 
bool HasPartialNSAEncoding = false
 
bool GFX10_AEncoding = false
 
bool GFX10_BEncoding = false
 
bool HasDLInsts = false
 
bool HasFmacF64Inst = false
 
bool HasDot1Insts = false
 
bool HasDot2Insts = false
 
bool HasDot3Insts = false
 
bool HasDot4Insts = false
 
bool HasDot5Insts = false
 
bool HasDot6Insts = false
 
bool HasDot7Insts = false
 
bool HasDot8Insts = false
 
bool HasDot9Insts = false
 
bool HasDot10Insts = false
 
bool HasDot11Insts = false
 
bool HasDot12Insts = false
 
bool HasDot13Insts = false
 
bool HasMAIInsts = false
 
bool HasFP8Insts = false
 
bool HasFP8ConversionInsts = false
 
bool HasCvtFP8Vop1Bug = false
 
bool HasPkFmacF16Inst = false
 
bool HasAtomicFMinFMaxF32GlobalInsts = false
 
bool HasAtomicFMinFMaxF64GlobalInsts = false
 
bool HasAtomicFMinFMaxF32FlatInsts = false
 
bool HasAtomicFMinFMaxF64FlatInsts = false
 
bool HasAtomicDsPkAdd16Insts = false
 
bool HasAtomicFlatPkAdd16Insts = false
 
bool HasAtomicFaddRtnInsts = false
 
bool HasAtomicFaddNoRtnInsts = false
 
bool HasMemoryAtomicFaddF32DenormalSupport = false
 
bool HasAtomicBufferGlobalPkAddF16NoRtnInsts = false
 
bool HasAtomicBufferGlobalPkAddF16Insts = false
 
bool HasAtomicCSubNoRtnInsts = false
 
bool HasAtomicGlobalPkAddBF16Inst = false
 
bool HasAtomicBufferPkAddBF16Inst = false
 
bool HasFlatAtomicFaddF32Inst = false
 
bool HasFlatBufferGlobalAtomicFaddF64Inst = false
 
bool HasDefaultComponentZero = false
 
bool HasAgentScopeFineGrainedRemoteMemoryAtomics = false
 
bool HasDefaultComponentBroadcast = false
 
bool HasXF32Insts = false
 
unsigned MaxHardClauseLength = 0
 The maximum number of instructions that may be placed within an S_CLAUSE, which is one greater than the maximum argument to S_CLAUSE.
 
bool SupportsSRAMECC = false
 
bool EnableSRAMECC = false
 
bool HasNoSdstCMPX = false
 
bool HasVscnt = false
 
bool HasGetWaveIdInst = false
 
bool HasSMemTimeInst = false
 
bool HasShaderCyclesRegister = false
 
bool HasShaderCyclesHiLoRegisters = false
 
bool HasVOP3Literal = false
 
bool HasNoDataDepHazard = false
 
bool FlatAddressSpace = false
 
bool FlatInstOffsets = false
 
bool FlatGlobalInsts = false
 
bool FlatScratchInsts = false
 
bool ScalarFlatScratchInsts = false
 
bool HasArchitectedFlatScratch = false
 
bool EnableFlatScratch = false
 
bool HasArchitectedSGPRs = false
 
bool HasGDS = false
 
bool HasGWS = false
 
bool AddNoCarryInsts = false
 
bool HasUnpackedD16VMem = false
 
bool LDSMisalignedBug = false
 
bool HasMFMAInlineLiteralBug = false
 
bool UnalignedBufferAccess = false
 
bool UnalignedDSAccess = false
 
bool HasPackedTID = false
 
bool ScalarizeGlobal = false
 
bool HasSALUFloatInsts = false
 
bool HasPseudoScalarTrans = false
 
bool HasRestrictedSOffset = false
 
bool HasBitOp3Insts = false
 
bool HasPrngInst = false
 
bool HasPermlane16Swap = false
 
bool HasPermlane32Swap = false
 
bool HasVcmpxPermlaneHazard = false
 
bool HasVMEMtoScalarWriteHazard = false
 
bool HasSMEMtoVectorWriteHazard = false
 
bool HasInstFwdPrefetchBug = false
 
bool HasVcmpxExecWARHazard = false
 
bool HasLdsBranchVmemWARHazard = false
 
bool HasNSAtoVMEMBug = false
 
bool HasNSAClauseBug = false
 
bool HasOffset3fBug = false
 
bool HasFlatSegmentOffsetBug = false
 
bool HasImageStoreD16Bug = false
 
bool HasImageGather4D16Bug = false
 
bool HasMSAALoadDstSelBug = false
 
bool HasPrivEnabledTrap2NopBug = false
 
bool Has1_5xVGPRs = false
 
bool HasMADIntraFwdBug = false
 
bool HasVOPDInsts = false
 
bool HasVALUTransUseHazard = false
 
bool HasForceStoreSC0SC1 = false
 
bool HasRequiredExportPriority = false
 
bool HasVmemWriteVgprInOrder = false
 
bool HasAshrPkInsts = false
 
bool HasMinimum3Maximum3F32 = false
 
bool HasMinimum3Maximum3F16 = false
 
bool HasMinimum3Maximum3PKF16 = false
 
bool RequiresCOV6 = false
 
bool FeatureDisable = false
 
- Protected Attributes inherited from llvm::AMDGPUSubtarget
bool GCN3Encoding = false
 
bool Has16BitInsts = false
 
bool HasTrue16BitInsts = false
 
bool HasFP8ConversionScaleInsts = false
 
bool HasBF8ConversionScaleInsts = false
 
bool HasFP4ConversionScaleInsts = false
 
bool HasFP6BF6ConversionScaleInsts = false
 
bool HasF16BF16ToFP6BF6ConversionScaleInsts = false
 
bool HasCvtPkF16F32Inst = false
 
bool HasF32ToF16BF16ConversionSRInsts = false
 
bool EnableRealTrue16Insts = false
 
bool HasBF16ConversionInsts = false
 
bool HasMadMixInsts = false
 
bool HasMadMacF32Insts = false
 
bool HasDsSrc2Insts = false
 
bool HasSDWA = false
 
bool HasVOP3PInsts = false
 
bool HasMulI24 = true
 
bool HasMulU24 = true
 
bool HasSMulHi = false
 
bool HasInv2PiInlineImm = false
 
bool HasFminFmaxLegacy = true
 
bool EnablePromoteAlloca = false
 
bool HasTrigReducedRange = false
 
bool FastFMAF32 = false
 
unsigned EUsPerCU = 4
 
unsigned MaxWavesPerEU = 10
 
unsigned LocalMemorySize = 0
 
unsigned AddressableLocalMemorySize = 0
 
char WavefrontSizeLog2 = 0
 

Detailed Description

Definition at line 33 of file GCNSubtarget.h.

Member Enumeration Documentation

◆ TrapHandlerAbi

enum class llvm::GCNSubtarget::TrapHandlerAbi
strong
Enumerator
NONE 
AMDHSA 

Definition at line 40 of file GCNSubtarget.h.

◆ TrapID

enum class llvm::GCNSubtarget::TrapID
strong
Enumerator
LLVMAMDHSATrap 
LLVMAMDHSADebugTrap 

Definition at line 45 of file GCNSubtarget.h.

Constructor & Destructor Documentation

◆ GCNSubtarget()

GCNSubtarget::GCNSubtarget ( const Triple &  TT,
StringRef  GPU,
StringRef  FS,
const GCNTargetMachine &  TM 
)

Definition at line 175 of file GCNSubtarget.cpp.

References llvm::AMDGPUSubtarget::EUsPerCU, llvm::AMDGPU::IsaInfo::getEUsPerCU(), llvm::AMDGPU::IsaInfo::getMaxWavesPerEU(), getTargetLowering(), and llvm::AMDGPUSubtarget::MaxWavesPerEU.

◆ ~GCNSubtarget()

GCNSubtarget::~GCNSubtarget ( )
overridedefault

Member Function Documentation

◆ adjustSchedDependency()

void GCNSubtarget::adjustSchedDependency ( SUnit *  Def,
int  DefOpIdx,
SUnit *  Use,
int  UseOpIdx,
SDep &  Dep,
const TargetSchedModel *  SchedModel 
) const
override

Definition at line 544 of file GCNSubtarget.cpp.

References llvm::TargetSchedModel::computeOperandLatency(), llvm::SDep::Data, getInstrItineraryData(), llvm::SIInstrInfo::getInstrLatency(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::SDep::getKind(), llvm::SDep::getLatency(), llvm::MachineInstr::getParent(), llvm::SDep::getReg(), getRegisterInfo(), llvm::SIInstrInfo::getSchedModel(), I, llvm::MachineBasicBlock::instr_end(), llvm::MachineInstr::isBundle(), llvm::SDep::setLatency(), and TRI.

◆ checkSubtargetFeatures()

void GCNSubtarget::checkSubtargetFeatures ( const Function &  F) const

Diagnose inconsistent subtarget features before attempting to codegen function F.

Definition at line 166 of file GCNSubtarget.cpp.

References llvm::LLVMContext::diagnose(), and F.

Referenced by llvm::AMDGPUDAGToDAGISel::runOnMachineFunction(), and llvm::AMDGPUInstructionSelector::setupMF().

◆ computeOccupancy()

unsigned GCNSubtarget::computeOccupancy ( const Function &  F,
unsigned  LDSSize = 0,
unsigned  NumSGPRs = 0,
unsigned  NumVGPRs = 0 
) const

Return occupancy for the given function.

Used LDS and a number of registers if provided. Note, occupancy can be affected by the scratch allocation as well, but we do not have enough information to compute it.

Definition at line 408 of file GCNSubtarget.cpp.

References F, getMaxWavesPerEU(), llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize(), getOccupancyWithNumSGPRs(), and getOccupancyWithNumVGPRs().

Referenced by llvm::PreRARematStage::initGCNSchedStage().

◆ createFillMFMAShadowMutation()

std::unique_ptr< ScheduleDAGMutation > GCNSubtarget::createFillMFMAShadowMutation ( const TargetInstrInfo *  TII) const

Definition at line 695 of file GCNSubtarget.cpp.

References EnablePowerSched.

◆ d16PreservesUnusedBits()

bool llvm::GCNSubtarget::d16PreservesUnusedBits ( ) const
inline

Definition at line 706 of file GCNSubtarget.h.

References hasD16LoadStore(), llvm::AMDGPU::IsaInfo::AMDGPUTargetID::isSramEccOnOrAny(), and TargetID.

Referenced by llvm::AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(), and llvm::AMDGPUDAGToDAGISel::PreprocessISelDAG().

◆ dumpCode()

bool llvm::GCNSubtarget::dumpCode ( ) const
inline

Definition at line 523 of file GCNSubtarget.h.

References DumpCode.

Referenced by llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ enableEarlyIfConversion()

bool llvm::GCNSubtarget::enableEarlyIfConversion ( ) const
inlineoverride

Definition at line 994 of file GCNSubtarget.h.

◆ enableFlatScratch()

bool llvm::GCNSubtarget::enableFlatScratch ( ) const
inline

Definition at line 666 of file GCNSubtarget.h.

References EnableFlatScratch, flatScratchIsArchitected(), and hasFlatScratchInsts().

Referenced by llvm::SIRegisterInfo::buildVGPRSpillLoadStore(), llvm::SIRegisterInfo::eliminateFrameIndex(), getMaxPrivateElementSize(), llvm::SITargetLowering::isLegalAddressingMode(), llvm::SITargetLowering::LowerCall(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), and llvm::SIRegisterInfo::needsFrameBaseReg().

◆ enableMachineScheduler()

bool llvm::GCNSubtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 977 of file GCNSubtarget.h.

◆ enableSIScheduler()

bool llvm::GCNSubtarget::enableSIScheduler ( ) const
inline

Definition at line 1137 of file GCNSubtarget.h.

References EnableSIScheduler.

Referenced by overrideSchedPolicy().

◆ enableSubRegLiveness()

bool llvm::GCNSubtarget::enableSubRegLiveness ( ) const
inlineoverride

Definition at line 983 of file GCNSubtarget.h.

◆ flatScratchIsArchitected()

bool llvm::GCNSubtarget::flatScratchIsArchitected ( ) const
inline
Returns
true if the flat_scratch register is initialized by the HW. In this case it is readonly.

Definition at line 1386 of file GCNSubtarget.h.

References HasArchitectedFlatScratch.

Referenced by enableFlatScratch().

◆ flatScratchIsPointer()

bool llvm::GCNSubtarget::flatScratchIsPointer ( ) const
inline
Returns
true if the flat_scratch register should be initialized with the pointer to the wave's scratch memory rather than a size and offset.

Definition at line 1380 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ getAddressableNumArchVGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumArchVGPRs ( ) const
inline
Returns
Addressable number of architectural VGPRs supported by the subtarget.

Definition at line 1529 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumArchVGPRs().

Referenced by llvm::GCNSchedStage::checkScheduling().

◆ getAddressableNumSGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumSGPRs ( ) const
inline
Returns
Addressable number of SGPRs supported by the subtarget.

Definition at line 1458 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs().

◆ getAddressableNumVGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumVGPRs ( ) const
inline
Returns
Addressable number of VGPRs supported by the subtarget.

Definition at line 1534 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs().

◆ getBaseMaxNumSGPRs()

unsigned GCNSubtarget::getBaseMaxNumSGPRs ( const Function &  F,
std::pair< unsigned, unsigned >  WavesPerEU,
unsigned  PreloadedSGPRs,
unsigned  ReservedNumSGPRs 
) const
Returns
max num SGPRs. This is the common utility function called by MachineFunction and Function variants of getMaxNumSGPRs.

Definition at line 420 of file GCNSubtarget.cpp.

References F, llvm::AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, getMaxNumSGPRs(), getMinNumSGPRs(), and hasSGPRInitBug().

Referenced by getMaxNumSGPRs().

◆ getBaseMaxNumVGPRs()

unsigned GCNSubtarget::getBaseMaxNumVGPRs ( const Function &  F,
std::pair< unsigned, unsigned >  WavesPerEU 
) const
Returns
max num VGPRs. This is the common utility function called by MachineFunction and Function variants of getMaxNumVGPRs.

Definition at line 504 of file GCNSubtarget.cpp.

References F, getMaxNumVGPRs(), getMinNumVGPRs(), and hasGFX90AInsts().

Referenced by getMaxNumVGPRs().

◆ getBaseReservedNumSGPRs()

unsigned GCNSubtarget::getBaseReservedNumSGPRs ( const bool  HasFlatScratch) const
Returns
Reserved number of SGPRs. This is common utility function called by MachineFunction and Function variants of getReservedNumSGPRs.

Definition at line 379 of file GCNSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, HasArchitectedFlatScratch, isXNACKEnabled(), llvm::AMDGPUSubtarget::SEA_ISLANDS, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by getReservedNumSGPRs().

◆ getBoolRC()

const TargetRegisterClass * llvm::GCNSubtarget::getBoolRC ( ) const
inline

Definition at line 1601 of file GCNSubtarget.h.

References llvm::SIRegisterInfo::getBoolRC(), and getRegisterInfo().

◆ getCallLowering()

const CallLowering * llvm::GCNSubtarget::getCallLowering ( ) const
inlineoverride

Definition at line 297 of file GCNSubtarget.h.

◆ getConstantBusLimit()

unsigned GCNSubtarget::getConstantBusLimit ( unsigned  Opcode) const

Definition at line 205 of file GCNSubtarget.cpp.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::SIInstrInfo::foldImmediate(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::SIRegisterInfo::needsFrameBaseReg(), and llvm::SIInstrInfo::verifyInstruction().

◆ getFrameLowering()

const SIFrameLowering * llvm::GCNSubtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 283 of file GCNSubtarget.h.

Referenced by llvm::SIRegisterInfo::getFrameRegister(), and llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC().

◆ getGeneration()

Generation llvm::GCNSubtarget::getGeneration ( ) const
inline

Definition at line 327 of file GCNSubtarget.h.

References Gen.

Referenced by llvm::AMDGPURegisterBankInfo::applyMappingLoad(), llvm::AMDGPUMCExpr::createOccupancy(), flatScratchIsPointer(), getBaseReservedNumSGPRs(), getConstantBusLimit(), llvm::SIInstrInfo::getDefaultRsrcDataFormat(), getMaxWaveScratchSize(), getNSAThreshold(), getOccupancyWithNumSGPRs(), llvm::SIInstrInfo::getScratchRsrcWords23(), getSetRegWaitStates(), llvm::GCNTTIImpl::getShuffleCost(), has12DWordStoreHazard(), hasAddr64(), hasD16Images(), hasD16LoadStore(), hasDenormModeInst(), hasDPPBroadcasts(), hasDPPWavefrontShifts(), hasDX10ClampMode(), hasExtendedWaitCounts(), hasFlat(), hasFlatLgkmVMemCountInOrder(), hasFlatScratchSVSSwizzleBug(), hasFmaakFmamkF32Insts(), hasFPAtomicToDenormModeHazard(), hasFractBug(), hasGWSAutoReplay(), hasIEEEMinMax(), hasIEEEMode(), hasInstPrefetch(), hasLdsDirect(), hasLdsWaitVMSRC(), hasLegacyGeometry(), hasMad64_32(), hasMed3_16(), hasMergedShaders(), hasMin3Max3_16(), hasMultiDwordFlatScratchAddressing(), hasNoF16PseudoScalarTransInlineConstants(), hasNonNSAEncoding(), hasOnlyRevVALUShifts(), hasPermLane64(), hasPermLaneX16(), hasReadM0LdsDirectHazard(), hasReadM0LdsDmaHazard(), hasReadM0MovRelInterpHazard(), hasReadM0SendMsgHazard(), hasReadVCCZBug(), hasRFEHazards(), hasRrWGMode(), hasScalarAddSub64(), hasScalarCompareEq64(), hasScalarSMulU64(), hasScalarSubwordLoads(), hasSCmpK(), hasSignedScratchOffsets(), hasSMRDReadVALUDefHazard(), hasSplitBarriers(), hasUsableDivScaleConditionOutput(), hasUsableDSOffset(), hasVALUMaskWriteHazard(), hasVALUPartialForwardingHazard(), hasVALUReadSGPRHazard(), hasVMEMReadSGPRVALUDefHazard(), hasVOP3DPP(), initializeSubtargetDependencies(), llvm::SITargetLowering::isLegalAddressingMode(), ldsRequiresM0Init(), llvm::AMDGPULegalizerInfo::legalizeMul(), llvm::SIInstrInfo::legalizeOperands(), llvm::AMDGPULegalizerInfo::legalizeRsqClampIntrinsic(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SIInstrInfo::moveToVALUImpl(), partialVCCWritesUpdateVCCZ(), privateMemoryResourceIsRangeChecked(), llvm::SIInstrInfo::pseudoToMCOpcode(), shouldClusterStores(), llvm::SITargetLowering::SITargetLowering(), llvm::SIInstrInfo::splitMUBUFOffset(), supportsGetDoorbellID(), supportsMinMaxDenormModes(), supportsWGP(), llvm::SIInstrInfo::verifyInstruction(), vmemWriteNeedsExpWaitcnt(), and zeroesHigh16BitsOfDest().

◆ getInlineAsmLowering()

const InlineAsmLowering * llvm::GCNSubtarget::getInlineAsmLowering ( ) const
inlineoverride

Definition at line 301 of file GCNSubtarget.h.

◆ getInstrInfo()

const SIInstrInfo * llvm::GCNSubtarget::getInstrInfo ( ) const
inlineoverride

Definition at line 279 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::AddMemOpInit(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SITargetLowering::bundleInstWithWaitcnt(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SITargetLowering::emitGWSMemViolTestLoop(), llvm::AMDGPUAsmPrinter::emitInstruction(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::getPrefLoopAlignment(), llvm::GCNSchedStage::getScheduleMetrics(), llvm::SITargetLowering::insertCopiesSplitCSR(), llvm::SIRegisterInfo::isFrameOffsetLegal(), llvm::SITargetLowering::isLegalFlatAddressingMode(), llvm::AMDGPULegalizerInfo::legalizeTrapHsa(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), llvm::SIRegisterInfo::needsFrameBaseReg(), llvm::SITargetLowering::PerformDAGCombine(), llvm::PhiLoweringHelper::PhiLoweringHelper(), llvm::SITargetLowering::PostISelFolding(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::SIRegisterInfo::restoreSGPR(), llvm::SIRegisterInfo::spillEmergencySGPR(), llvm::SIRegisterInfo::spillSGPR(), llvm::SITargetLowering::splitKillBlock(), and llvm::SITargetLowering::wrapAddr64Rsrc().

◆ getInstrItineraryData()

const InstrItineraryData * llvm::GCNSubtarget::getInstrItineraryData ( ) const
inlineoverride

Definition at line 321 of file GCNSubtarget.h.

References InstrItins.

Referenced by adjustSchedDependency().

◆ getInstructionSelector()

InstructionSelector * llvm::GCNSubtarget::getInstructionSelector ( ) const
inlineoverride

Definition at line 305 of file GCNSubtarget.h.

◆ getKnownHighZeroBitsForFrameIndex()

unsigned llvm::GCNSubtarget::getKnownHighZeroBitsForFrameIndex ( ) const
inline

Return the number of high bits known to be zero for a frame index.

Definition at line 346 of file GCNSubtarget.h.

References llvm::countl_zero(), getMaxWaveScratchSize(), and llvm::AMDGPUSubtarget::getWavefrontSizeLog2().

Referenced by llvm::SITargetLowering::LowerFormalArguments().

◆ getLDSBankCount()

int llvm::GCNSubtarget::getLDSBankCount ( ) const
inline

Definition at line 350 of file GCNSubtarget.h.

References LDSBankCount.

◆ getLegalizerInfo()

const LegalizerInfo * llvm::GCNSubtarget::getLegalizerInfo ( ) const
inlineoverride

Definition at line 309 of file GCNSubtarget.h.

◆ getMaxFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMaxFlatWorkGroupSize ( ) const
inlineoverridevirtual
Returns
Maximum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1617 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize().

◆ getMaxLocalMemSizeWithWaveCount()

unsigned llvm::GCNSubtarget::getMaxLocalMemSizeWithWaveCount ( unsigned  WaveCount,
const Function &   
) const

Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.

◆ getMaxNumAGPRs()

unsigned llvm::GCNSubtarget::getMaxNumAGPRs ( const Function &  F) const
inline

Definition at line 1564 of file GCNSubtarget.h.

References F, and getMaxNumVGPRs().

◆ getMaxNumSGPRs() [1/3]

unsigned GCNSubtarget::getMaxNumSGPRs ( const Function &  F) const
Returns
Maximum number of SGPRs that meets number of waves per execution unit requirement for function F, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function F.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 499 of file GCNSubtarget.cpp.

References F, getBaseMaxNumSGPRs(), getMaxNumPreloadedSGPRs(), getReservedNumSGPRs(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxNumSGPRs() [2/3]

unsigned GCNSubtarget::getMaxNumSGPRs ( const MachineFunction &  MF) const
Returns
Maximum number of SGPRs that meets number of waves per execution unit requirement for function MF, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function MF.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 467 of file GCNSubtarget.cpp.

References F, getBaseMaxNumSGPRs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs(), getReservedNumSGPRs(), and llvm::SIMachineFunctionInfo::getWavesPerEU().

◆ getMaxNumSGPRs() [3/3]

unsigned llvm::GCNSubtarget::getMaxNumSGPRs ( unsigned  WavesPerEU,
bool  Addressable 
) const
inline
Returns
Maximum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1470 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumSGPRs().

Referenced by llvm::GCNSchedStage::checkScheduling(), llvm::SIRegisterInfo::getAlignedHighSGPRForRC(), llvm::SIRegisterInfo::getAllSGPR128(), llvm::SIRegisterInfo::getAllSGPR32(), llvm::SIRegisterInfo::getAllSGPR64(), getBaseMaxNumSGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), and llvm::SIRegisterInfo::getReservedRegs().

◆ getMaxNumUserSGPRs()

unsigned llvm::GCNSubtarget::getMaxNumUserSGPRs ( ) const
inline

Definition at line 1003 of file GCNSubtarget.h.

References llvm::AMDGPU::getMaxNumUserSGPRs().

◆ getMaxNumVGPRs() [1/3]

unsigned GCNSubtarget::getMaxNumVGPRs ( const Function &  F) const
Returns
Maximum number of VGPRs that meets number of waves per execution unit requirement for function F, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function F.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 534 of file GCNSubtarget.cpp.

References F, getBaseMaxNumVGPRs(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxNumVGPRs() [2/3]

unsigned GCNSubtarget::getMaxNumVGPRs ( const MachineFunction &  MF) const
Returns
Maximum number of VGPRs that meets number of waves per execution unit requirement for function MF, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function MF.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 538 of file GCNSubtarget.cpp.

References F, getBaseMaxNumVGPRs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), and llvm::SIMachineFunctionInfo::getWavesPerEU().

◆ getMaxNumVGPRs() [3/3]

unsigned llvm::GCNSubtarget::getMaxNumVGPRs ( unsigned  WavesPerEU) const
inline
Returns
the maximum number of VGPRs that can be used and still achieved at least the specified number of waves WavesPerEU.

Definition at line 1546 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumVGPRs().

Referenced by llvm::SITargetLowering::CanLowerReturn(), llvm::GCNSchedStage::checkScheduling(), getBaseMaxNumVGPRs(), getMaxNumAGPRs(), llvm::SIRegisterInfo::getMaxNumVectorRegs(), and llvm::SIRegisterInfo::getRegPressureLimit().

◆ getMaxPrivateElementSize()

unsigned llvm::GCNSubtarget::getMaxPrivateElementSize ( bool  ForBufferRSrc = false) const
inline

Definition at line 354 of file GCNSubtarget.h.

References enableFlatScratch(), and MaxPrivateElementSize.

Referenced by llvm::SITargetLowering::canMergeStoresTo(), llvm::GCNTTIImpl::getLoadStoreVecRegBitWidth(), llvm::SIInstrInfo::getScratchRsrcWords23(), and llvm::GCNTTIImpl::isLegalToVectorizeMemChain().

◆ getMaxWaveScratchSize()

unsigned llvm::GCNSubtarget::getMaxWaveScratchSize ( ) const
inline

Definition at line 331 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX11, and llvm::AMDGPUSubtarget::GFX12.

Referenced by llvm::SIRegisterInfo::eliminateFrameIndex(), and getKnownHighZeroBitsForFrameIndex().

◆ getMaxWavesPerEU()

unsigned llvm::AMDGPUSubtarget::getMaxWavesPerEU ( ) const
inline
Returns
Maximum number of waves per execution unit supported by the subtarget without any kind of limitation.

Definition at line 321 of file AMDGPUSubtarget.h.

Referenced by computeOccupancy(), and getOccupancyWithNumSGPRs().

◆ getMaxWorkGroupsPerCU()

unsigned llvm::GCNSubtarget::getMaxWorkGroupsPerCU ( unsigned  FlatWorkGroupSize) const
inlineoverridevirtual
Returns
Maximum number of work groups per compute unit supported by the subtarget and limited by given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 1607 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU().

◆ getMinFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMinFlatWorkGroupSize ( ) const
inlineoverridevirtual
Returns
Minimum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1612 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize().

◆ getMinNumSGPRs()

unsigned llvm::GCNSubtarget::getMinNumSGPRs ( unsigned  WavesPerEU) const
inline
Returns
Minimum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1464 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumSGPRs().

Referenced by getBaseMaxNumSGPRs().

◆ getMinNumVGPRs()

unsigned llvm::GCNSubtarget::getMinNumVGPRs ( unsigned  WavesPerEU) const
inline
Returns
the minimum number of VGPRs that will prevent achieving more than the specified number of waves WavesPerEU.

Definition at line 1540 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumVGPRs().

Referenced by getBaseMaxNumVGPRs().

◆ getMinWavesPerEU()

unsigned llvm::GCNSubtarget::getMinWavesPerEU ( ) const
inlineoverridevirtual
Returns
Minimum number of waves per execution unit supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1630 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinWavesPerEU().

◆ getNSAMaxSize()

unsigned llvm::GCNSubtarget::getNSAMaxSize ( bool  HasSampler = false) const
inline

Definition at line 1115 of file GCNSubtarget.h.

References llvm::AMDGPU::getNSAMaxSize().

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ getNSAThreshold()

unsigned GCNSubtarget::getNSAThreshold ( const MachineFunction &  MF) const

Definition at line 700 of file GCNSubtarget.cpp.

References llvm::Function::getFnAttributeAsParsedInteger(), llvm::MachineFunction::getFunction(), getGeneration(), llvm::AMDGPUSubtarget::GFX12, and NSAThreshold.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ getOccupancyWithNumSGPRs()

unsigned GCNSubtarget::getOccupancyWithNumSGPRs ( unsigned  SGPRs) const

Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.

Definition at line 369 of file GCNSubtarget.cpp.

References getGeneration(), getMaxWavesPerEU(), and llvm::AMDGPU::IsaInfo::getOccupancyWithNumSGPRs().

Referenced by computeOccupancy().

◆ getOccupancyWithNumVGPRs()

unsigned GCNSubtarget::getOccupancyWithNumVGPRs ( unsigned  VGPRs) const

Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.

Definition at line 374 of file GCNSubtarget.cpp.

References llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs().

Referenced by computeOccupancy().

◆ getPostRAMutations()

void GCNSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation > > &  Mutations) const
override

Definition at line 689 of file GCNSubtarget.cpp.

◆ getRegBankInfo()

const AMDGPURegisterBankInfo * llvm::GCNSubtarget::getRegBankInfo ( ) const
inlineoverride

Definition at line 313 of file GCNSubtarget.h.

Referenced by llvm::SIInstrInfo::getInstructionUniformity().

◆ getRegisterInfo()

const SIRegisterInfo * llvm::GCNSubtarget::getRegisterInfo ( ) const
inlineoverride

Definition at line 291 of file GCNSubtarget.h.

References llvm::SIInstrInfo::getRegisterInfo().

Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), adjustSchedDependency(), llvm::GCNTargetMachine::convertFuncInfoToYAML(), llvm::AMDGPUAsmPrinter::emitInstruction(), llvm::SITargetLowering::finalizeLowering(), getBoolRC(), llvm::SITargetLowering::getRegClassFor(), llvm::SITargetLowering::getRegisterByName(), llvm::SITargetLowering::insertCopiesSplitCSR(), llvm::SITargetLowering::isEligibleForTailCallOptimization(), llvm::GCNTTIImpl::isInlineAsmSourceOfDivergence(), llvm::SITargetLowering::isSDNodeSourceOfDivergence(), llvm::SITargetLowering::LowerCall(), llvm::SITargetLowering::LowerFormalArguments(), llvm::AMDGPUCallLowering::lowerFormalArgumentsKernel(), llvm::SITargetLowering::LowerReturn(), llvm::SITargetLowering::passSpecialInputs(), llvm::SITargetLowering::requiresUniformRegister(), and llvm::SITargetLowering::SITargetLowering().

◆ getReservedNumSGPRs() [1/2]

unsigned GCNSubtarget::getReservedNumSGPRs ( const Function &  F) const
Returns
Reserved number of SGPRs for given function F.

Definition at line 400 of file GCNSubtarget.cpp.

References getBaseReservedNumSGPRs(), and hasFlatAddressSpace().

◆ getReservedNumSGPRs() [2/2]

unsigned GCNSubtarget::getReservedNumSGPRs ( const MachineFunction &  MF) const
Returns
Reserved number of SGPRs for given machine function MF.

Definition at line 395 of file GCNSubtarget.cpp.

References getBaseReservedNumSGPRs(), llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getUserSGPRInfo(), and llvm::GCNUserSGPRUsageInfo::hasFlatScratchInit().

Referenced by getMaxNumSGPRs().

◆ getScalarizeGlobalBehavior()

bool llvm::GCNSubtarget::getScalarizeGlobalBehavior ( ) const
inline

Definition at line 988 of file GCNSubtarget.h.

References ScalarizeGlobal.

◆ getSelectionDAGInfo()

const SelectionDAGTargetInfo * GCNSubtarget::getSelectionDAGInfo ( ) const
override

Definition at line 201 of file GCNSubtarget.cpp.

◆ getSetRegWaitStates()

unsigned llvm::GCNSubtarget::getSetRegWaitStates ( ) const
inline

Number of hazard wait states for s_setreg_b32/s_setreg_imm32_b32.

Definition at line 519 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ getSGPRAllocGranule()

unsigned llvm::GCNSubtarget::getSGPRAllocGranule ( ) const
inline
Returns
SGPR allocation granularity supported by the subtarget.

Definition at line 1443 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPRAllocGranule().

◆ getSGPREncodingGranule()

unsigned llvm::GCNSubtarget::getSGPREncodingGranule ( ) const
inline
Returns
SGPR encoding granularity supported by the subtarget.

Definition at line 1448 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPREncodingGranule().

◆ getStackAlignment()

Align llvm::GCNSubtarget::getStackAlignment ( ) const
inline

Definition at line 975 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::LowerCall().

◆ getTargetID()

const AMDGPU::IsaInfo::AMDGPUTargetID & llvm::GCNSubtarget::getTargetID ( ) const
inline

Definition at line 317 of file GCNSubtarget.h.

References TargetID.

Referenced by llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ getTargetLowering()

const SITargetLowering * llvm::GCNSubtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 287 of file GCNSubtarget.h.

Referenced by GCNSubtarget(), llvm::AMDGPULegalizerInfo::getImplicitArgPtr(), getTM(), llvm::AMDGPULegalizerInfo::legalizeGlobalValue(), llvm::AMDGPULegalizerInfo::legalizeStackSave(), and llvm::AMDGPULegalizerInfo::legalizeTrapHsaQueuePtr().

◆ getTotalNumSGPRs()

unsigned llvm::GCNSubtarget::getTotalNumSGPRs ( ) const
inline
Returns
Total number of SGPRs supported by the subtarget.

Definition at line 1453 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::GCNSubtarget::getTotalNumVGPRs ( ) const
inline
Returns
Total number of VGPRs supported by the subtarget.

Definition at line 1523 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumVGPRs().

◆ getTrapHandlerAbi()

TrapHandlerAbi llvm::GCNSubtarget::getTrapHandlerAbi ( ) const
inline

Definition at line 467 of file GCNSubtarget.h.

References AMDHSA, llvm::AMDGPUSubtarget::isAmdHsaOS(), and NONE.

Referenced by llvm::AMDGPULegalizerInfo::legalizeDebugTrap(), and llvm::AMDGPULegalizerInfo::legalizeTrap().

◆ getVGPRAllocGranule()

unsigned llvm::GCNSubtarget::getVGPRAllocGranule ( ) const
inline
Returns
VGPR allocation granularity supported by the subtarget.

Definition at line 1513 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPRAllocGranule().

◆ getVGPREncodingGranule()

unsigned llvm::GCNSubtarget::getVGPREncodingGranule ( ) const
inline
Returns
VGPR encoding granularity supported by the subtarget.

Definition at line 1518 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPREncodingGranule().

◆ getWavesPerEUForWorkGroup()

unsigned llvm::GCNSubtarget::getWavesPerEUForWorkGroup ( unsigned  FlatWorkGroupSize) const
inlineoverridevirtual
Returns
Number of waves per execution unit required to support the given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 1624 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup().

◆ has12DWordStoreHazard()

bool llvm::GCNSubtarget::has12DWordStoreHazard ( ) const
inline

Definition at line 1163 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

◆ has1_5xVGPRs()

bool llvm::GCNSubtarget::has1_5xVGPRs ( ) const
inline

Definition at line 1289 of file GCNSubtarget.h.

References Has1_5xVGPRs.

◆ hasA16()

bool llvm::GCNSubtarget::hasA16 ( ) const
inline

Definition at line 1091 of file GCNSubtarget.h.

References HasA16.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasAddNoCarry()

bool llvm::GCNSubtarget::hasAddNoCarry ( ) const
inline
Returns
true if the target has integer add/sub instructions that do not produce a carry-out. This includes v_add_[iu]32, v_sub_[iu]32, v_add_[iu]16, and v_sub_[iu]16, all of which support the clamp modifier for saturation.

Definition at line 738 of file GCNSubtarget.h.

References AddNoCarryInsts.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::SIInstrInfo::getAddNoCarry(), llvm::SIInstrInfo::getVALUOp(), and llvm::SITargetLowering::SITargetLowering().

◆ hasAddr64()

bool llvm::GCNSubtarget::hasAddr64 ( ) const
inline

Definition at line 391 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by initializeSubtargetDependencies(), llvm::SITargetLowering::isLegalGlobalAddressingMode(), and llvm::SIInstrInfo::legalizeOperands().

◆ hasApertureRegs()

bool llvm::GCNSubtarget::hasApertureRegs ( ) const
inline

Definition at line 611 of file GCNSubtarget.h.

References HasApertureRegs.

◆ hasArchitectedSGPRs()

bool llvm::GCNSubtarget::hasArchitectedSGPRs ( ) const
inline
Returns
true if the architected SGPRs are enabled.

Definition at line 1389 of file GCNSubtarget.h.

References HasArchitectedSGPRs.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs(), llvm::AMDGPULegalizerInfo::legalizeWaveID(), llvm::AMDGPULegalizerInfo::loadInputValue(), and llvm::SITargetLowering::LowerFormalArguments().

◆ hasAshrPkInsts()

bool llvm::GCNSubtarget::hasAshrPkInsts ( ) const
inline

Definition at line 1342 of file GCNSubtarget.h.

References HasAshrPkInsts.

◆ hasAtomicBufferGlobalPkAddF16Insts()

bool llvm::GCNSubtarget::hasAtomicBufferGlobalPkAddF16Insts ( ) const
inline

Definition at line 883 of file GCNSubtarget.h.

References HasAtomicBufferGlobalPkAddF16Insts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicBufferGlobalPkAddF16NoRtnInsts()

bool llvm::GCNSubtarget::hasAtomicBufferGlobalPkAddF16NoRtnInsts ( ) const
inline

Definition at line 879 of file GCNSubtarget.h.

References HasAtomicBufferGlobalPkAddF16NoRtnInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicBufferPkAddBF16Inst()

bool llvm::GCNSubtarget::hasAtomicBufferPkAddBF16Inst ( ) const
inline

Definition at line 891 of file GCNSubtarget.h.

References HasAtomicBufferPkAddBF16Inst.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicCSub()

bool llvm::GCNSubtarget::hasAtomicCSub ( ) const
inline

Definition at line 675 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasAtomicCSubNoRtnInsts()

bool llvm::GCNSubtarget::hasAtomicCSubNoRtnInsts ( ) const
inline

Definition at line 1417 of file GCNSubtarget.h.

References HasAtomicCSubNoRtnInsts.

◆ hasAtomicDsPkAdd16Insts()

bool llvm::GCNSubtarget::hasAtomicDsPkAdd16Insts ( ) const
inline

Definition at line 867 of file GCNSubtarget.h.

References HasAtomicDsPkAdd16Insts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFaddInsts()

bool llvm::GCNSubtarget::hasAtomicFaddInsts ( ) const
inline

Definition at line 871 of file GCNSubtarget.h.

References HasAtomicFaddNoRtnInsts, and HasAtomicFaddRtnInsts.

Referenced by llvm::SITargetLowering::emitExpandAtomicAddrSpacePredicate().

◆ hasAtomicFaddNoRtnInsts()

bool llvm::GCNSubtarget::hasAtomicFaddNoRtnInsts ( ) const
inline

Definition at line 877 of file GCNSubtarget.h.

References HasAtomicFaddNoRtnInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFaddRtnInsts()

bool llvm::GCNSubtarget::hasAtomicFaddRtnInsts ( ) const
inline

Definition at line 875 of file GCNSubtarget.h.

References HasAtomicFaddRtnInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFlatPkAdd16Insts()

bool llvm::GCNSubtarget::hasAtomicFlatPkAdd16Insts ( ) const
inline

Definition at line 869 of file GCNSubtarget.h.

References HasAtomicFlatPkAdd16Insts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFMinFMaxF32FlatInsts()

bool llvm::GCNSubtarget::hasAtomicFMinFMaxF32FlatInsts ( ) const
inline

Definition at line 859 of file GCNSubtarget.h.

References HasAtomicFMinFMaxF32FlatInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFMinFMaxF32GlobalInsts()

bool llvm::GCNSubtarget::hasAtomicFMinFMaxF32GlobalInsts ( ) const
inline

Definition at line 851 of file GCNSubtarget.h.

References HasAtomicFMinFMaxF32GlobalInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFMinFMaxF64FlatInsts()

bool llvm::GCNSubtarget::hasAtomicFMinFMaxF64FlatInsts ( ) const
inline

Definition at line 863 of file GCNSubtarget.h.

References HasAtomicFMinFMaxF64FlatInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFMinFMaxF64GlobalInsts()

bool llvm::GCNSubtarget::hasAtomicFMinFMaxF64GlobalInsts ( ) const
inline

Definition at line 855 of file GCNSubtarget.h.

References HasAtomicFMinFMaxF64GlobalInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicGlobalPkAddBF16Inst()

bool llvm::GCNSubtarget::hasAtomicGlobalPkAddBF16Inst ( ) const
inline

Definition at line 887 of file GCNSubtarget.h.

References HasAtomicGlobalPkAddBF16Inst.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAutoWaitcntBeforeBarrier()

bool llvm::GCNSubtarget::hasAutoWaitcntBeforeBarrier ( ) const
inline

Definition at line 573 of file GCNSubtarget.h.

References AutoWaitcntBeforeBarrier.

◆ hasBCNT()

bool llvm::GCNSubtarget::hasBCNT ( unsigned  Size) const
inline

Definition at line 421 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFE()

bool llvm::GCNSubtarget::hasBFE ( ) const
inline

Definition at line 409 of file GCNSubtarget.h.

Referenced by hasBFM(), and llvm::SITargetLowering::SITargetLowering().

◆ hasBFI()

bool llvm::GCNSubtarget::hasBFI ( ) const
inline

Definition at line 413 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFM()

bool llvm::GCNSubtarget::hasBFM ( ) const
inline

Definition at line 417 of file GCNSubtarget.h.

References hasBFE().

◆ hasBitOp3Insts()

bool llvm::GCNSubtarget::hasBitOp3Insts ( ) const
inline

Definition at line 1338 of file GCNSubtarget.h.

References HasBitOp3Insts.

◆ hasCARRY()

bool llvm::GCNSubtarget::hasCARRY ( ) const
inline

Definition at line 445 of file GCNSubtarget.h.

◆ hasCompressedExport()

bool llvm::GCNSubtarget::hasCompressedExport ( ) const
inline

Return true if the target's EXP instruction has the COMPR flag, which affects the meaning of the EN (enable) bits.

Definition at line 1283 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasCvtFP8VOP1Bug()

bool llvm::GCNSubtarget::hasCvtFP8VOP1Bug ( ) const
inline

Definition at line 1413 of file GCNSubtarget.h.

References HasCvtFP8Vop1Bug.

◆ hasCvtScaleForwardingHazard()

bool llvm::GCNSubtarget::hasCvtScaleForwardingHazard ( ) const
inline

Definition at line 1265 of file GCNSubtarget.h.

References GFX950Insts.

◆ hasD16Images()

bool llvm::GCNSubtarget::hasD16Images ( ) const
inline

Definition at line 710 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasD16LoadStore()

bool llvm::GCNSubtarget::hasD16LoadStore ( ) const
inline

Definition at line 702 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by d16PreservesUnusedBits().

◆ hasDefaultComponentBroadcast()

bool llvm::GCNSubtarget::hasDefaultComponentBroadcast ( ) const
inline

Definition at line 918 of file GCNSubtarget.h.

References HasDefaultComponentBroadcast.

Referenced by llvm::GCNTTIImpl::instCombineIntrinsic().

◆ hasDefaultComponentZero()

bool llvm::GCNSubtarget::hasDefaultComponentZero ( ) const
inline

Definition at line 916 of file GCNSubtarget.h.

References HasDefaultComponentZero.

Referenced by llvm::GCNTTIImpl::instCombineIntrinsic().

◆ hasDelayAlu()

bool llvm::GCNSubtarget::hasDelayAlu ( ) const
inline

Return true if the target has the S_DELAY_ALU instruction.

Definition at line 1296 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasDenormModeInst()

bool llvm::GCNSubtarget::hasDenormModeInst ( ) const
inline
Returns
If target supports S_DENORM_MODE.

Definition at line 537 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasDLInsts()

bool llvm::GCNSubtarget::hasDLInsts ( ) const
inline

Definition at line 779 of file GCNSubtarget.h.

References HasDLInsts.

Referenced by llvm::SIInstrInfo::getVALUOp(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), and llvm::SIInstrInfo::moveToVALUImpl().

◆ hasDot10Insts()

bool llvm::GCNSubtarget::hasDot10Insts ( ) const
inline

Definition at line 821 of file GCNSubtarget.h.

References HasDot10Insts.

◆ hasDot11Insts()

bool llvm::GCNSubtarget::hasDot11Insts ( ) const
inline

Definition at line 825 of file GCNSubtarget.h.

References HasDot11Insts.

◆ hasDot12Insts()

bool llvm::GCNSubtarget::hasDot12Insts ( ) const
inline

Definition at line 829 of file GCNSubtarget.h.

References HasDot12Insts.

◆ hasDot13Insts()

bool llvm::GCNSubtarget::hasDot13Insts ( ) const
inline

Definition at line 833 of file GCNSubtarget.h.

References HasDot13Insts.

◆ hasDot1Insts()

bool llvm::GCNSubtarget::hasDot1Insts ( ) const
inline

Definition at line 785 of file GCNSubtarget.h.

References HasDot1Insts.

◆ hasDot2Insts()

bool llvm::GCNSubtarget::hasDot2Insts ( ) const
inline

Definition at line 789 of file GCNSubtarget.h.

References HasDot2Insts.

◆ hasDot3Insts()

bool llvm::GCNSubtarget::hasDot3Insts ( ) const
inline

Definition at line 793 of file GCNSubtarget.h.

References HasDot3Insts.

◆ hasDot4Insts()

bool llvm::GCNSubtarget::hasDot4Insts ( ) const
inline

Definition at line 797 of file GCNSubtarget.h.

References HasDot4Insts.

◆ hasDot5Insts()

bool llvm::GCNSubtarget::hasDot5Insts ( ) const
inline

Definition at line 801 of file GCNSubtarget.h.

References HasDot5Insts.

◆ hasDot6Insts()

bool llvm::GCNSubtarget::hasDot6Insts ( ) const
inline

Definition at line 805 of file GCNSubtarget.h.

References HasDot6Insts.

◆ hasDot7Insts()

bool llvm::GCNSubtarget::hasDot7Insts ( ) const
inline

Definition at line 809 of file GCNSubtarget.h.

References HasDot7Insts.

◆ hasDot8Insts()

bool llvm::GCNSubtarget::hasDot8Insts ( ) const
inline

Definition at line 813 of file GCNSubtarget.h.

References HasDot8Insts.

◆ hasDot9Insts()

bool llvm::GCNSubtarget::hasDot9Insts ( ) const
inline

Definition at line 817 of file GCNSubtarget.h.

References HasDot9Insts.

◆ hasDOTOpSelHazard()

bool llvm::GCNSubtarget::hasDOTOpSelHazard ( ) const
inline

Definition at line 1232 of file GCNSubtarget.h.

References GFX11Insts, and GFX940Insts.

◆ hasDPALU_DPP()

bool llvm::GCNSubtarget::hasDPALU_DPP ( ) const
inline

Definition at line 1060 of file GCNSubtarget.h.

References HasDPALU_DPP.

Referenced by llvm::AMDGPULegalizerInfo::legalizeLaneOp().

◆ hasDPP()

bool llvm::GCNSubtarget::hasDPP ( ) const
inline

Definition at line 1044 of file GCNSubtarget.h.

References HasDPP.

◆ hasDPP8()

bool llvm::GCNSubtarget::hasDPP8 ( ) const
inline

Definition at line 1056 of file GCNSubtarget.h.

References HasDPP8.

◆ hasDPPBroadcasts()

bool llvm::GCNSubtarget::hasDPPBroadcasts ( ) const
inline

Definition at line 1048 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and HasDPP.

◆ hasDPPSrc1SGPR()

bool llvm::GCNSubtarget::hasDPPSrc1SGPR ( ) const
inline

Definition at line 1064 of file GCNSubtarget.h.

References HasDPPSrc1SGPR.

◆ hasDPPWavefrontShifts()

bool llvm::GCNSubtarget::hasDPPWavefrontShifts ( ) const
inline

Definition at line 1052 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and HasDPP.

◆ hasDS96AndDS128()

bool llvm::GCNSubtarget::hasDS96AndDS128 ( ) const
inline
Returns
If target supports ds_read/write_b96/128.

Definition at line 552 of file GCNSubtarget.h.

References CIInsts.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasDstSelForwardingHazard()

bool llvm::GCNSubtarget::hasDstSelForwardingHazard ( ) const
inline

Definition at line 1229 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasDwordx3LoadStores()

bool llvm::GCNSubtarget::hasDwordx3LoadStores ( ) const
inline

Definition at line 1168 of file GCNSubtarget.h.

References CIInsts.

◆ hasDX10ClampMode()

bool llvm::GCNSubtarget::hasDX10ClampMode ( ) const
inline

Definition at line 1420 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasExportInsts()

bool llvm::GCNSubtarget::hasExportInsts ( ) const
inline

Definition at line 679 of file GCNSubtarget.h.

References hasGFX940Insts().

◆ hasExtendedImageInsts()

bool llvm::GCNSubtarget::hasExtendedImageInsts ( ) const
inline

Definition at line 1083 of file GCNSubtarget.h.

References HasExtendedImageInsts.

◆ hasExtendedWaitCounts()

bool llvm::GCNSubtarget::hasExtendedWaitCounts ( ) const
inline
Returns
true if the target uses LOADcnt/SAMPLEcnt/BVHcnt, DScnt/KMcnt and STOREcnt rather than VMcnt, LGKMcnt and VScnt respectively.

Definition at line 1327 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasFFBH()

bool llvm::GCNSubtarget::hasFFBH ( ) const
inline

Definition at line 429 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFFBL()

bool llvm::GCNSubtarget::hasFFBL ( ) const
inline

Definition at line 425 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFlat()

bool llvm::GCNSubtarget::hasFlat ( ) const
inline

Definition at line 395 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by initializeSubtargetDependencies().

◆ hasFlatAddressSpace()

bool llvm::GCNSubtarget::hasFlatAddressSpace ( ) const
inline

Definition at line 633 of file GCNSubtarget.h.

References FlatAddressSpace.

Referenced by getReservedNumSGPRs(), and hasFlatScrRegister().

◆ hasFlatAtomicFaddF32Inst()

bool llvm::GCNSubtarget::hasFlatAtomicFaddF32Inst ( ) const
inline

Definition at line 895 of file GCNSubtarget.h.

References HasFlatAtomicFaddF32Inst.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasFlatBufferGlobalAtomicFaddF64Inst()

bool llvm::GCNSubtarget::hasFlatBufferGlobalAtomicFaddF64Inst ( ) const
inline
Returns
true if the target has flat, global, and buffer atomic fadd for double.

Definition at line 899 of file GCNSubtarget.h.

References HasFlatBufferGlobalAtomicFaddF64Inst.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasFlatGlobalInsts()

bool llvm::GCNSubtarget::hasFlatGlobalInsts ( ) const
inline

Definition at line 645 of file GCNSubtarget.h.

References FlatGlobalInsts.

Referenced by llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ hasFlatInstOffsets()

bool llvm::GCNSubtarget::hasFlatInstOffsets ( ) const
inline

Definition at line 641 of file GCNSubtarget.h.

References FlatInstOffsets.

Referenced by llvm::SITargetLowering::isLegalFlatAddressingMode(), llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasFlatLgkmVMemCountInOrder()

bool llvm::GCNSubtarget::hasFlatLgkmVMemCountInOrder ( ) const
inline

Definition at line 698 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasFlatScratchInsts()

bool llvm::GCNSubtarget::hasFlatScratchInsts ( ) const
inline

Definition at line 649 of file GCNSubtarget.h.

References FlatScratchInsts.

Referenced by enableFlatScratch(), and hasFlatScratchSTMode().

◆ hasFlatScratchSTMode()

bool llvm::GCNSubtarget::hasFlatScratchSTMode ( ) const
inline

Definition at line 656 of file GCNSubtarget.h.

References hasFlatScratchInsts(), hasGFX10_3Insts(), and hasGFX940Insts().

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), and llvm::SIRegisterInfo::eliminateFrameIndex().

◆ hasFlatScratchSVSMode()

bool llvm::GCNSubtarget::hasFlatScratchSVSMode ( ) const
inline

Definition at line 660 of file GCNSubtarget.h.

References GFX11Insts, and GFX940Insts.

◆ hasFlatScratchSVSSwizzleBug()

bool llvm::GCNSubtarget::hasFlatScratchSVSSwizzleBug ( ) const
inline

Definition at line 1293 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasFlatScrRegister()

bool llvm::GCNSubtarget::hasFlatScrRegister ( ) const
inline

Definition at line 637 of file GCNSubtarget.h.

References hasFlatAddressSpace().

Referenced by llvm::SITargetLowering::getRegisterByName().

◆ hasFlatSegmentOffsetBug()

bool llvm::GCNSubtarget::hasFlatSegmentOffsetBug ( ) const
inline

Definition at line 694 of file GCNSubtarget.h.

References HasFlatSegmentOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset().

◆ hasFMA()

bool llvm::GCNSubtarget::hasFMA ( ) const
inline

Definition at line 449 of file GCNSubtarget.h.

References FMA.

◆ hasFmaakFmamkF32Insts()

bool llvm::GCNSubtarget::hasFmaakFmamkF32Insts ( ) const
inline

Definition at line 1075 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and hasGFX940Insts().

◆ hasFmacF64Inst()

bool llvm::GCNSubtarget::hasFmacF64Inst ( ) const
inline

Definition at line 783 of file GCNSubtarget.h.

References HasFmacF64Inst.

◆ hasFmaMixInsts()

bool llvm::GCNSubtarget::hasFmaMixInsts ( ) const
inline

Definition at line 441 of file GCNSubtarget.h.

References HasFmaMixInsts.

Referenced by llvm::SITargetLowering::isFPExtFoldable().

◆ hasForceStoreSC0SC1()

bool llvm::GCNSubtarget::hasForceStoreSC0SC1 ( ) const
inline

Definition at line 1267 of file GCNSubtarget.h.

References HasForceStoreSC0SC1.

◆ hasFP64()

bool llvm::GCNSubtarget::hasFP64 ( ) const
inline

Definition at line 371 of file GCNSubtarget.h.

References FP64.

Referenced by initializeSubtargetDependencies().

◆ hasFP8ConversionInsts()

bool llvm::GCNSubtarget::hasFP8ConversionInsts ( ) const
inline

Definition at line 845 of file GCNSubtarget.h.

References HasFP8ConversionInsts.

◆ hasFP8Insts()

bool llvm::GCNSubtarget::hasFP8Insts ( ) const
inline

Definition at line 841 of file GCNSubtarget.h.

References HasFP8Insts.

◆ hasFPAtomicToDenormModeHazard()

bool llvm::GCNSubtarget::hasFPAtomicToDenormModeHazard ( ) const
inline

Definition at line 1249 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasFractBug()

bool llvm::GCNSubtarget::hasFractBug ( ) const
inline

Definition at line 405 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::AMDGPULegalizerInfo::legalizeFFloor(), and llvm::AMDGPULegalizerInfo::legalizeFFREXP().

◆ hasFullRate64Ops()

bool llvm::GCNSubtarget::hasFullRate64Ops ( ) const
inline

Definition at line 387 of file GCNSubtarget.h.

References FullRate64Ops.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping(), and llvm::AMDGPULegalizerInfo::legalizeMul().

◆ hasG16()

bool llvm::GCNSubtarget::hasG16 ( ) const
inline

Definition at line 1093 of file GCNSubtarget.h.

References HasG16.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGDS()

bool llvm::GCNSubtarget::hasGDS ( ) const
inline
Returns
true if Global Data Share is supported.

Definition at line 1392 of file GCNSubtarget.h.

References HasGDS.

Referenced by llvm::SITargetLowering::isLegalAddressingMode(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGetPCZeroExtension()

bool llvm::GCNSubtarget::hasGetPCZeroExtension ( ) const
inline

Definition at line 1440 of file GCNSubtarget.h.

References GFX12Insts.

Referenced by llvm::SIInstrInfo::expandPostRAPseudo().

◆ hasGetWaveIdInst()

bool llvm::GCNSubtarget::hasGetWaveIdInst ( ) const
inline

Definition at line 930 of file GCNSubtarget.h.

References HasGetWaveIdInst.

◆ hasGFX10_3Insts()

bool llvm::GCNSubtarget::hasGFX10_3Insts ( ) const
inline

Definition at line 1127 of file GCNSubtarget.h.

References GFX10_3Insts.

Referenced by hasFlatScratchSTMode().

◆ hasGFX10_AEncoding()

bool llvm::GCNSubtarget::hasGFX10_AEncoding ( ) const
inline

Definition at line 1119 of file GCNSubtarget.h.

References GFX10_AEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic().

◆ hasGFX10_BEncoding()

bool llvm::GCNSubtarget::hasGFX10_BEncoding ( ) const
inline

Definition at line 1123 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasGFX90AInsts()

bool llvm::GCNSubtarget::hasGFX90AInsts ( ) const
inline

Definition at line 1247 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::GCNSchedStage::checkScheduling(), llvm::SIInstrInfo::copyPhysReg(), getBaseMaxNumVGPRs(), llvm::SIRegisterInfo::getCalleeSavedRegs(), llvm::SIRegisterInfo::getCallPreservedMask(), llvm::SIRegisterInfo::getCrossCopyRegClass(), llvm::SIRegisterInfo::getMaxNumVectorRegs(), llvm::SIRegisterInfo::getReservedRegs(), hasLdsAtomicAddF64(), llvm::SIInstrInfo::hasVALU32BitEncoding(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::pseudoToMCOpcode(), llvm::AMDGPUAsmPrinter::runOnMachineFunction(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGFX940Insts()

bool llvm::GCNSubtarget::hasGFX940Insts ( ) const
inline

Definition at line 1302 of file GCNSubtarget.h.

References GFX940Insts.

Referenced by hasExportInsts(), hasFlatScratchSTMode(), hasFmaakFmamkF32Insts(), and llvm::SIInstrInfo::pseudoToMCOpcode().

◆ hasGFX950Insts()

bool llvm::GCNSubtarget::hasGFX950Insts ( ) const
inline

Definition at line 1306 of file GCNSubtarget.h.

References GFX950Insts.

Referenced by hasLDSLoadB96_B128(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasGlobalAddTidInsts()

bool llvm::GCNSubtarget::hasGlobalAddTidInsts ( ) const
inline

Definition at line 671 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasGWS()

bool llvm::GCNSubtarget::hasGWS ( ) const
inline
Returns
true if Global Wave Sync is supported.

Definition at line 1395 of file GCNSubtarget.h.

References HasGWS.

◆ hasGWSAutoReplay()

bool llvm::GCNSubtarget::hasGWSAutoReplay ( ) const
inline

Definition at line 725 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter().

◆ hasGWSSemaReleaseAll()

bool llvm::GCNSubtarget::hasGWSSemaReleaseAll ( ) const
inline
Returns
if target has ds_gws_sema_release_all instruction.

Definition at line 730 of file GCNSubtarget.h.

References CIInsts.

◆ hasHalfRate64Ops() [1/2]

bool llvm::GCNSubtarget::hasHalfRate64Ops ( ) const
inline

Definition at line 383 of file GCNSubtarget.h.

References HalfRate64Ops.

◆ hasHalfRate64Ops() [2/2]

static bool llvm::GCNSubtarget::hasHalfRate64Ops ( const TargetSubtargetInfo &  STI)
static

◆ hasHardClauses()

bool llvm::GCNSubtarget::hasHardClauses ( ) const
inline

Definition at line 1245 of file GCNSubtarget.h.

References MaxHardClauseLength.

◆ hasHWFP64()

bool llvm::GCNSubtarget::hasHWFP64 ( ) const
inline

Definition at line 379 of file GCNSubtarget.h.

References FP64.

◆ hasIEEEMinMax()

bool llvm::GCNSubtarget::hasIEEEMinMax ( ) const
inline

Definition at line 1426 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

Referenced by hasIEEEMinMax3(), and llvm::SITargetLowering::SITargetLowering().

◆ hasIEEEMinMax3()

bool llvm::GCNSubtarget::hasIEEEMinMax3 ( ) const
inline

Definition at line 1429 of file GCNSubtarget.h.

References hasIEEEMinMax().

◆ hasIEEEMode()

bool llvm::GCNSubtarget::hasIEEEMode ( ) const
inline

Definition at line 1423 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasImageGather4D16Bug()

bool llvm::GCNSubtarget::hasImageGather4D16Bug ( ) const
inline

Definition at line 1101 of file GCNSubtarget.h.

References HasImageGather4D16Bug.

◆ hasImageInsts()

bool llvm::GCNSubtarget::hasImageInsts ( ) const
inline

Definition at line 1079 of file GCNSubtarget.h.

References HasImageInsts.

◆ hasImageStoreD16Bug()

bool llvm::GCNSubtarget::hasImageStoreD16Bug ( ) const
inline

Definition at line 1099 of file GCNSubtarget.h.

References HasImageStoreD16Bug.

Referenced by llvm::AMDGPULegalizerInfo::handleD16VData().

◆ hasInstFwdPrefetchBug()

bool llvm::GCNSubtarget::hasInstFwdPrefetchBug ( ) const
inline

Definition at line 1205 of file GCNSubtarget.h.

References HasInstFwdPrefetchBug.

◆ hasInstPrefetch()

bool llvm::GCNSubtarget::hasInstPrefetch ( ) const
inline

Definition at line 958 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and llvm::AMDGPUSubtarget::GFX11.

◆ hasIntClamp()

bool llvm::GCNSubtarget::hasIntClamp ( ) const
inline

Definition at line 367 of file GCNSubtarget.h.

References HasIntClamp.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), and llvm::SITargetLowering::SITargetLowering().

◆ hasKernargPreload()

bool llvm::GCNSubtarget::hasKernargPreload ( ) const
inline

Definition at line 1407 of file GCNSubtarget.h.

References KernargPreload.

Referenced by llvm::SITargetLowering::LowerFormalArguments().

◆ hasLdsAtomicAddF64()

bool llvm::GCNSubtarget::hasLdsAtomicAddF64 ( ) const
inline

Definition at line 688 of file GCNSubtarget.h.

References hasGFX90AInsts().

◆ hasLdsBranchVmemWARHazard()

bool llvm::GCNSubtarget::hasLdsBranchVmemWARHazard ( ) const
inline

Definition at line 1213 of file GCNSubtarget.h.

References HasLdsBranchVmemWARHazard.

◆ hasLdsDirect()

bool llvm::GCNSubtarget::hasLdsDirect ( ) const
inline

Definition at line 1255 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasLDSFPAtomicAddF32()

bool llvm::GCNSubtarget::hasLDSFPAtomicAddF32 ( ) const
inline

Definition at line 1035 of file GCNSubtarget.h.

References GFX8Insts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasLDSFPAtomicAddF64()

bool llvm::GCNSubtarget::hasLDSFPAtomicAddF64 ( ) const
inline

Definition at line 1036 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasLDSLoadB96_B128()

bool llvm::GCNSubtarget::hasLDSLoadB96_B128 ( ) const
inline

Returns true if the target supports global_load_lds_dwordx3/global_load_lds_dwordx4 or buffer_load_dwordx3/buffer_load_dwordx4 with the lds bit.

Definition at line 1311 of file GCNSubtarget.h.

References hasGFX950Insts().

◆ hasLDSMisalignedBug()

bool llvm::GCNSubtarget::hasLDSMisalignedBug ( ) const
inline

Definition at line 1201 of file GCNSubtarget.h.

References EnableCuMode, and LDSMisalignedBug.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasLdsWaitVMSRC()

bool llvm::GCNSubtarget::hasLdsWaitVMSRC ( ) const
inline

Definition at line 1257 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasLegacyGeometry()

bool llvm::GCNSubtarget::hasLegacyGeometry ( ) const
inline

Definition at line 1404 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasLshlAddB64()

bool llvm::GCNSubtarget::hasLshlAddB64 ( ) const
inline

Definition at line 1135 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasMad64_32()

bool llvm::GCNSubtarget::hasMad64_32 ( ) const
inline

Definition at line 755 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::AMDGPULegalizerInfo::legalizeMul(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMadF16()

bool GCNSubtarget::hasMadF16 ( ) const

Definition at line 359 of file GCNSubtarget.cpp.

References llvm::SIInstrInfo::pseudoToMCOpcode().

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::SITargetLowering::isFMADLegal(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMADIntraFwdBug()

bool llvm::GCNSubtarget::hasMADIntraFwdBug ( ) const
inline

Definition at line 1103 of file GCNSubtarget.h.

References HasMADIntraFwdBug.

◆ hasMAIInsts()

bool llvm::GCNSubtarget::hasMAIInsts ( ) const
inline

Definition at line 837 of file GCNSubtarget.h.

References HasMAIInsts.

Referenced by llvm::AMDGPU::HSAMD::MetadataStreamerMsgPackV4::getHSAKernelProps(), llvm::SIRegisterInfo::getLargestLegalSuperClass(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::isOperandLegal(), and llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ hasMed3_16()

bool llvm::GCNSubtarget::hasMed3_16 ( ) const
inline

Definition at line 433 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNTTIImpl::instCombineIntrinsic(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMemoryAtomicFaddF32DenormalSupport()

bool llvm::GCNSubtarget::hasMemoryAtomicFaddF32DenormalSupport ( ) const
inline
Returns
true if the target's flat, global, and buffer atomic fadd for float supports denormal handling.

Definition at line 905 of file GCNSubtarget.h.

References HasMemoryAtomicFaddF32DenormalSupport.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasMergedShaders()

bool llvm::GCNSubtarget::hasMergedShaders ( ) const
inline
Returns
true if the machine has merged shaders in which s0-s7 are reserved by the hardware and user SGPRs start at s8

Definition at line 1399 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasMFMAInlineLiteralBug()

bool llvm::GCNSubtarget::hasMFMAInlineLiteralBug ( ) const
inline

Definition at line 1159 of file GCNSubtarget.h.

References HasMFMAInlineLiteralBug.

Referenced by llvm::SIInstrInfo::isImmOperandLegal(), and llvm::SIRegisterInfo::opCanUseInlineConstant().

◆ hasMIMG_R128()

bool llvm::GCNSubtarget::hasMIMG_R128 ( ) const
inline

Definition at line 375 of file GCNSubtarget.h.

References MIMG_R128.

◆ hasMin3Max3_16()

bool llvm::GCNSubtarget::hasMin3Max3_16 ( ) const
inline

Definition at line 437 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by supportsMin3Max3().

◆ hasMinimum3Maximum3F16()

bool llvm::GCNSubtarget::hasMinimum3Maximum3F16 ( ) const
inline

Definition at line 1348 of file GCNSubtarget.h.

References HasMinimum3Maximum3F16.

Referenced by supportsMin3Max3().

◆ hasMinimum3Maximum3F32()

bool llvm::GCNSubtarget::hasMinimum3Maximum3F32 ( ) const
inline

Definition at line 1344 of file GCNSubtarget.h.

References HasMinimum3Maximum3F32.

Referenced by llvm::SITargetLowering::SITargetLowering(), and supportsMin3Max3().

◆ hasMinimum3Maximum3PKF16()

bool llvm::GCNSubtarget::hasMinimum3Maximum3PKF16 ( ) const
inline

Definition at line 1352 of file GCNSubtarget.h.

References HasMinimum3Maximum3PKF16.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasMovB64()

bool llvm::GCNSubtarget::hasMovB64 ( ) const
inline

Definition at line 1133 of file GCNSubtarget.h.

References GFX940Insts.

Referenced by llvm::SIInstrInfo::copyPhysReg(), llvm::SIInstrInfo::expandMovDPP64(), and llvm::SIInstrInfo::expandPostRAPseudo().

◆ hasMovrel()

bool llvm::GCNSubtarget::hasMovrel ( ) const
inline

Definition at line 1011 of file GCNSubtarget.h.

References HasMovrel.

Referenced by llvm::SITargetLowering::shouldExpandVectorDynExt(), and useVGPRIndexMode().

◆ hasMSAALoadDstSelBug()

bool llvm::GCNSubtarget::hasMSAALoadDstSelBug ( ) const
inline

Definition at line 1105 of file GCNSubtarget.h.

References HasMSAALoadDstSelBug.

◆ hasMultiDwordFlatScratchAddressing()

bool llvm::GCNSubtarget::hasMultiDwordFlatScratchAddressing ( ) const
inline

Definition at line 690 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasNegativeScratchOffsetBug()

bool llvm::GCNSubtarget::hasNegativeScratchOffsetBug ( ) const
inline

Definition at line 1153 of file GCNSubtarget.h.

References NegativeScratchOffsetBug.

Referenced by llvm::SIInstrInfo::allowNegativeFlatOffset().

◆ hasNegativeUnalignedScratchOffsetBug()

bool llvm::GCNSubtarget::hasNegativeUnalignedScratchOffsetBug ( ) const
inline

Definition at line 1155 of file GCNSubtarget.h.

References NegativeUnalignedScratchOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::splitFlatOffset().

◆ hasNoDataDepHazard()

bool llvm::GCNSubtarget::hasNoDataDepHazard ( ) const
inline

Definition at line 950 of file GCNSubtarget.h.

References HasNoDataDepHazard.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasNoF16PseudoScalarTransInlineConstants()

bool llvm::GCNSubtarget::hasNoF16PseudoScalarTransInlineConstants ( ) const
inline
Returns
true if inline constants are not supported for F16 pseudo scalar transcendentals.

Definition at line 1331 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

Referenced by llvm::SIInstrInfo::isOperandLegal().

◆ hasNonNSAEncoding()

bool llvm::GCNSubtarget::hasNonNSAEncoding ( ) const
inline

Definition at line 1111 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasNoSdstCMPX()

bool llvm::GCNSubtarget::hasNoSdstCMPX ( ) const
inline

Definition at line 922 of file GCNSubtarget.h.

References HasNoSdstCMPX.

◆ hasNSAClauseBug()

bool llvm::GCNSubtarget::hasNSAClauseBug ( ) const
inline

Definition at line 1243 of file GCNSubtarget.h.

References HasNSAClauseBug.

◆ hasNSAEncoding()

bool llvm::GCNSubtarget::hasNSAEncoding ( ) const
inline

Definition at line 1109 of file GCNSubtarget.h.

References HasNSAEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ hasNSAtoVMEMBug()

bool llvm::GCNSubtarget::hasNSAtoVMEMBug ( ) const
inline

Definition at line 1239 of file GCNSubtarget.h.

References HasNSAtoVMEMBug.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasNullExportTarget()

bool llvm::GCNSubtarget::hasNullExportTarget ( ) const
inline

Return true if the target's EXP instruction supports the NULL export target.

Definition at line 1287 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasOffset3fBug()

bool llvm::GCNSubtarget::hasOffset3fBug ( ) const
inline

Definition at line 1095 of file GCNSubtarget.h.

References HasOffset3fBug.

Referenced by llvm::AMDGPUAsmPrinter::emitInstruction(), llvm::SIInstrInfo::getInstSizeInBytes(), and llvm::SIInstrInfo::insertBranch().

◆ hasOnlyRevVALUShifts()

bool llvm::GCNSubtarget::hasOnlyRevVALUShifts ( ) const
inline

Definition at line 401 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SIInstrInfo::moveToVALUImpl().

◆ hasPackedFP32Ops()

bool llvm::GCNSubtarget::hasPackedFP32Ops ( ) const
inline

Definition at line 1066 of file GCNSubtarget.h.

References HasPackedFP32Ops.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::GCNTTIImpl::getArithmeticInstrCost(), llvm::GCNTTIImpl::getIntrinsicInstrCost(), llvm::GCNTTIImpl::getMaximumVF(), llvm::GCNTTIImpl::getRegisterBitWidth(), and llvm::SITargetLowering::SITargetLowering().

◆ hasPackedTID()

bool llvm::GCNSubtarget::hasPackedTID ( ) const
inline

Definition at line 1298 of file GCNSubtarget.h.

References HasPackedTID.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs().

◆ hasPartialNSAEncoding()

bool llvm::GCNSubtarget::hasPartialNSAEncoding ( ) const
inline

Definition at line 1113 of file GCNSubtarget.h.

References HasPartialNSAEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasPermlane16Swap()

bool llvm::GCNSubtarget::hasPermlane16Swap ( ) const
inline

Definition at line 1340 of file GCNSubtarget.h.

References HasPermlane16Swap.

◆ hasPermlane32Swap()

bool llvm::GCNSubtarget::hasPermlane32Swap ( ) const
inline

Definition at line 1341 of file GCNSubtarget.h.

References HasPermlane32Swap.

◆ hasPermLane64()

bool llvm::GCNSubtarget::hasPermLane64 ( ) const
inline
Returns
true if the subtarget has the v_permlane64_b32 instruction.

Definition at line 1042 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasPermLaneX16()

bool llvm::GCNSubtarget::hasPermLaneX16 ( ) const
inline
Returns
true if the subtarget has the v_permlanex16_b32 instruction.

Definition at line 1039 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasPkFmacF16Inst()

bool llvm::GCNSubtarget::hasPkFmacF16Inst ( ) const
inline

Definition at line 847 of file GCNSubtarget.h.

References HasPkFmacF16Inst.

◆ hasPkMovB32()

bool llvm::GCNSubtarget::hasPkMovB32 ( ) const
inline

Definition at line 1071 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::SIInstrInfo::expandPostRAPseudo().

◆ hasPrefetch()

bool llvm::GCNSubtarget::hasPrefetch ( ) const
inline

Definition at line 962 of file GCNSubtarget.h.

References GFX12Insts.

Referenced by llvm::AMDGPURegisterBankInfo::applyMappingImpl(), llvm::GCNTTIImpl::getPrefetchDistance(), and llvm::SITargetLowering::SITargetLowering().

◆ hasPrivEnabledTrap2NopBug()

bool llvm::GCNSubtarget::hasPrivEnabledTrap2NopBug ( ) const
inline

Definition at line 1107 of file GCNSubtarget.h.

References HasPrivEnabledTrap2NopBug.

Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter(), and llvm::AMDGPULegalizerInfo::legalizeTrapHsa().

◆ hasPrngInst()

bool llvm::GCNSubtarget::hasPrngInst ( ) const
inline

Definition at line 1361 of file GCNSubtarget.h.

References HasPrngInst.

◆ hasPseudoScalarTrans()

bool llvm::GCNSubtarget::hasPseudoScalarTrans ( ) const
inline

Definition at line 1317 of file GCNSubtarget.h.

References HasPseudoScalarTrans.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasR128A16()

bool llvm::GCNSubtarget::hasR128A16 ( ) const
inline

Definition at line 1087 of file GCNSubtarget.h.

References HasR128A16.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasReadM0LdsDirectHazard()

bool llvm::GCNSubtarget::hasReadM0LdsDirectHazard ( ) const
inline

Definition at line 1185 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0LdsDmaHazard()

bool llvm::GCNSubtarget::hasReadM0LdsDmaHazard ( ) const
inline

Definition at line 1181 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0MovRelInterpHazard()

bool llvm::GCNSubtarget::hasReadM0MovRelInterpHazard ( ) const
inline

Definition at line 1172 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0SendMsgHazard()

bool llvm::GCNSubtarget::hasReadM0SendMsgHazard ( ) const
inline

Definition at line 1176 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX9, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadVCCZBug()

bool llvm::GCNSubtarget::hasReadVCCZBug ( ) const
inline

Extra wait hazard is needed in some cases before s_cbranch_vccnz/s_cbranch_vccz.

Definition at line 493 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ hasRequiredExportPriority()

bool llvm::GCNSubtarget::hasRequiredExportPriority ( ) const
inline

Definition at line 1321 of file GCNSubtarget.h.

References HasRequiredExportPriority.

◆ hasRestrictedSOffset()

bool llvm::GCNSubtarget::hasRestrictedSOffset ( ) const
inline

Definition at line 1319 of file GCNSubtarget.h.

References HasRestrictedSOffset.

Referenced by selectSOffset(), and llvm::SIInstrInfo::splitMUBUFOffset().

◆ hasRFEHazards()

bool llvm::GCNSubtarget::hasRFEHazards ( ) const
inline

Definition at line 514 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasRrWGMode()

bool llvm::GCNSubtarget::hasRrWGMode ( ) const
inline

Definition at line 1432 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasSALUFloatInsts()

bool llvm::GCNSubtarget::hasSALUFloatInsts ( ) const
inline

Definition at line 1315 of file GCNSubtarget.h.

References HasSALUFloatInsts.

Referenced by llvm::AMDGPURegisterBankInfo::applyMappingImpl(), and llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarAddSub64()

bool llvm::GCNSubtarget::hasScalarAddSub64 ( ) const
inline

Definition at line 742 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), and llvm::SITargetLowering::EmitInstrWithCustomInserter().

◆ hasScalarAtomics()

bool llvm::GCNSubtarget::hasScalarAtomics ( ) const
inline

Definition at line 1031 of file GCNSubtarget.h.

References HasScalarAtomics.

◆ hasScalarCompareEq64()

bool llvm::GCNSubtarget::hasScalarCompareEq64 ( ) const
inline

Definition at line 1021 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarDwordx3Loads()

bool llvm::GCNSubtarget::hasScalarDwordx3Loads ( ) const
inline

Definition at line 1025 of file GCNSubtarget.h.

References HasScalarDwordx3Loads.

Referenced by llvm::AMDGPURegisterBankInfo::applyMappingLoad(), and llvm::AMDGPULegalizerInfo::legalizeSBufferLoad().

◆ hasScalarFlatScratchInsts()

bool llvm::GCNSubtarget::hasScalarFlatScratchInsts ( ) const
inline

Definition at line 662 of file GCNSubtarget.h.

References ScalarFlatScratchInsts.

◆ hasScalarMulHiInsts()

bool llvm::GCNSubtarget::hasScalarMulHiInsts ( ) const
inline

Definition at line 461 of file GCNSubtarget.h.

References GFX9Insts.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarPackInsts()

bool llvm::GCNSubtarget::hasScalarPackInsts ( ) const
inline

Definition at line 457 of file GCNSubtarget.h.

References GFX9Insts.

◆ hasScalarSMulU64()

bool llvm::GCNSubtarget::hasScalarSMulU64 ( ) const
inline

Definition at line 744 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), and llvm::SITargetLowering::SITargetLowering().

◆ hasScalarStores()

bool llvm::GCNSubtarget::hasScalarStores ( ) const
inline

Definition at line 1027 of file GCNSubtarget.h.

References HasScalarStores.

◆ hasScalarSubwordLoads()

bool llvm::GCNSubtarget::hasScalarSubwordLoads ( ) const
inline

Definition at line 465 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

Referenced by llvm::SITargetLowering::isLegalAddressingMode(), llvm::AMDGPURegisterBankInfo::isScalarLoadLegal(), llvm::AMDGPULegalizerInfo::legalizeSBufferLoad(), and llvm::SITargetLowering::ReplaceNodeResults().

◆ hasSCmpK()

bool llvm::GCNSubtarget::hasSCmpK ( ) const
inline

Definition at line 965 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasSDWAMac()

bool llvm::GCNSubtarget::hasSDWAMac ( ) const
inline

Definition at line 771 of file GCNSubtarget.h.

References HasSDWAMac.

◆ hasSDWAOmod()

bool llvm::GCNSubtarget::hasSDWAOmod ( ) const
inline

Definition at line 759 of file GCNSubtarget.h.

References HasSDWAOmod.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAOutModsVOPC()

bool llvm::GCNSubtarget::hasSDWAOutModsVOPC ( ) const
inline

Definition at line 775 of file GCNSubtarget.h.

References HasSDWAOutModsVOPC.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAScalar()

bool llvm::GCNSubtarget::hasSDWAScalar ( ) const
inline

Definition at line 763 of file GCNSubtarget.h.

References HasSDWAScalar.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWASdst()

bool llvm::GCNSubtarget::hasSDWASdst ( ) const
inline

Definition at line 767 of file GCNSubtarget.h.

References HasSDWASdst.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSGPRInitBug()

bool llvm::GCNSubtarget::hasSGPRInitBug ( ) const
inline

Definition at line 1145 of file GCNSubtarget.h.

References SGPRInitBug.

Referenced by getBaseMaxNumSGPRs().

◆ hasShaderCyclesHiLoRegisters()

bool llvm::GCNSubtarget::hasShaderCyclesHiLoRegisters ( ) const
inline

Definition at line 942 of file GCNSubtarget.h.

References HasShaderCyclesHiLoRegisters.

Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter().

◆ hasShaderCyclesRegister()

bool llvm::GCNSubtarget::hasShaderCyclesRegister ( ) const
inline

Definition at line 938 of file GCNSubtarget.h.

References HasShaderCyclesRegister.

◆ hasShift64HighRegBug()

bool llvm::GCNSubtarget::hasShift64HighRegBug ( ) const
inline

Definition at line 1219 of file GCNSubtarget.h.

References GFX90AInsts, and GFX940Insts.

◆ hasSignedScratchOffsets()

bool llvm::GCNSubtarget::hasSignedScratchOffsets ( ) const
inline
Returns
true if VADDR and SADDR fields in VSCRATCH can use negative values.

Definition at line 1436 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasSMemRealTime()

bool llvm::GCNSubtarget::hasSMemRealTime ( ) const
inline

Definition at line 1007 of file GCNSubtarget.h.

References HasSMemRealTime.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasSMemTimeInst()

bool llvm::GCNSubtarget::hasSMemTimeInst ( ) const
inline

Definition at line 934 of file GCNSubtarget.h.

References HasSMemTimeInst.

◆ hasSMEMtoVectorWriteHazard()

bool llvm::GCNSubtarget::hasSMEMtoVectorWriteHazard ( ) const
inline

Definition at line 1197 of file GCNSubtarget.h.

References HasSMEMtoVectorWriteHazard.

◆ hasSMRDReadVALUDefHazard()

bool llvm::GCNSubtarget::hasSMRDReadVALUDefHazard ( ) const
inline

A read of an SGPR by SMRD instruction requires 4 wait states when the SGPR was written by a VALU instruction.

Definition at line 504 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

◆ hasSPackHL()

bool llvm::GCNSubtarget::hasSPackHL ( ) const
inline

Return true if the target has the S_PACK_HL_B32_B16 instruction.

Definition at line 1279 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasSplitBarriers()

bool llvm::GCNSubtarget::hasSplitBarriers ( ) const
inline

Definition at line 1410 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

◆ hasSwap()

bool llvm::GCNSubtarget::hasSwap ( ) const
inline

Definition at line 453 of file GCNSubtarget.h.

References GFX9Insts.

◆ hasTransForwardingHazard()

bool llvm::GCNSubtarget::hasTransForwardingHazard ( ) const
inline

Definition at line 1225 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasUnalignedAccessMode()

bool llvm::GCNSubtarget::hasUnalignedAccessMode ( ) const
inline

Definition at line 607 of file GCNSubtarget.h.

References UnalignedAccessMode.

◆ hasUnalignedBufferAccess()

bool llvm::GCNSubtarget::hasUnalignedBufferAccess ( ) const
inline

Definition at line 583 of file GCNSubtarget.h.

References UnalignedBufferAccess.

◆ hasUnalignedBufferAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedBufferAccessEnabled ( ) const
inline

Definition at line 587 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedBufferAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUnalignedDSAccess()

bool llvm::GCNSubtarget::hasUnalignedDSAccess ( ) const
inline

Definition at line 591 of file GCNSubtarget.h.

References UnalignedDSAccess.

◆ hasUnalignedDSAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedDSAccessEnabled ( ) const
inline

Definition at line 595 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedDSAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUnalignedScratchAccess()

bool llvm::GCNSubtarget::hasUnalignedScratchAccess ( ) const
inline

Definition at line 599 of file GCNSubtarget.h.

References UnalignedScratchAccess.

◆ hasUnalignedScratchAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedScratchAccessEnabled ( ) const
inline

Definition at line 603 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedScratchAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), and llvm::GCNTTIImpl::isLegalToVectorizeMemChain().

◆ hasUnpackedD16VMem()

bool llvm::GCNSubtarget::hasUnpackedD16VMem ( ) const
inline

Definition at line 746 of file GCNSubtarget.h.

References HasUnpackedD16VMem.

Referenced by llvm::SITargetLowering::AddMemOpInit(), llvm::AMDGPURegisterBankInfo::handleD16VData(), llvm::AMDGPULegalizerInfo::handleD16VData(), llvm::AMDGPULegalizerInfo::legalizeBufferLoad(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), llvm::SIInstrInfo::pseudoToMCOpcode(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasUsableDivScaleConditionOutput()

bool llvm::GCNSubtarget::hasUsableDivScaleConditionOutput ( ) const
inline

Condition output from div_scale is usable.

Definition at line 487 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by llvm::GCNTTIImpl::getArithmeticInstrCost(), and llvm::AMDGPULegalizerInfo::legalizeFDIV64().

◆ hasUsableDSOffset()

bool llvm::GCNSubtarget::hasUsableDSOffset ( ) const
inline

True if the offset field of DS instructions works as expected.

On SI, the offset uses a 16-bit adder and does not always wrap properly.

Definition at line 478 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUserSGPRInit16Bug()

bool llvm::GCNSubtarget::hasUserSGPRInit16Bug ( ) const
inline

Definition at line 1149 of file GCNSubtarget.h.

References isWave32(), and UserSGPRInit16Bug.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

◆ hasVALUMaskWriteHazard()

bool llvm::GCNSubtarget::hasVALUMaskWriteHazard ( ) const
inline

Definition at line 1271 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

Referenced by llvm::SIInstrInfo::insertIndirectBranch().

◆ hasVALUPartialForwardingHazard()

bool llvm::GCNSubtarget::hasVALUPartialForwardingHazard ( ) const
inline

Definition at line 1259 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasVALUReadSGPRHazard()

bool llvm::GCNSubtarget::hasVALUReadSGPRHazard ( ) const
inline

Definition at line 1273 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX12.

Referenced by llvm::SIInstrInfo::insertIndirectBranch().

◆ hasVALUTransUseHazard()

bool llvm::GCNSubtarget::hasVALUTransUseHazard ( ) const
inline

Definition at line 1263 of file GCNSubtarget.h.

References HasVALUTransUseHazard.

◆ hasVcmpxExecWARHazard()

bool llvm::GCNSubtarget::hasVcmpxExecWARHazard ( ) const
inline

Definition at line 1209 of file GCNSubtarget.h.

References HasVcmpxExecWARHazard.

◆ hasVcmpxPermlaneHazard()

bool llvm::GCNSubtarget::hasVcmpxPermlaneHazard ( ) const
inline

Definition at line 1189 of file GCNSubtarget.h.

References HasVcmpxPermlaneHazard.

◆ hasVDecCoExecHazard()

bool llvm::GCNSubtarget::hasVDecCoExecHazard ( ) const
inline

Definition at line 1235 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasVGPRIndexMode()

bool llvm::GCNSubtarget::hasVGPRIndexMode ( ) const
inline

Definition at line 1015 of file GCNSubtarget.h.

References HasVGPRIndexMode.

Referenced by useVGPRIndexMode().

◆ hasVINTERPEncoding()

bool llvm::GCNSubtarget::hasVINTERPEncoding ( ) const
inline

Definition at line 683 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasVMEMReadSGPRVALUDefHazard()

bool llvm::GCNSubtarget::hasVMEMReadSGPRVALUDefHazard ( ) const
inline

A read of an SGPR by a VMEM instruction requires 5 wait states when the SGPR was written by a VALU Instruction.

Definition at line 510 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasVMEMtoScalarWriteHazard()

bool llvm::GCNSubtarget::hasVMEMtoScalarWriteHazard ( ) const
inline

Definition at line 1193 of file GCNSubtarget.h.

References HasVMEMtoScalarWriteHazard.

◆ hasVmemWriteVgprInOrder()

bool llvm::GCNSubtarget::hasVmemWriteVgprInOrder ( ) const
inline

Definition at line 1323 of file GCNSubtarget.h.

References HasVmemWriteVgprInOrder.

◆ hasVOP3DPP()

bool llvm::GCNSubtarget::hasVOP3DPP ( ) const
inline

Definition at line 1253 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasVOP3Literal()

bool llvm::GCNSubtarget::hasVOP3Literal ( ) const
inline

Definition at line 946 of file GCNSubtarget.h.

References HasVOP3Literal.

Referenced by llvm::SIInstrInfo::convertToThreeAddress(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::isFrameOffsetLegal(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::legalizeOperandsVOP3(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasVOPDInsts()

bool llvm::GCNSubtarget::hasVOPDInsts ( ) const
inline

Definition at line 1291 of file GCNSubtarget.h.

References HasVOPDInsts.

◆ hasVscnt()

bool llvm::GCNSubtarget::hasVscnt ( ) const
inline

Definition at line 926 of file GCNSubtarget.h.

References HasVscnt.

◆ hasXF32Insts()

bool llvm::GCNSubtarget::hasXF32Insts ( ) const
inline
Returns
true if the target has instructions with xf32 format support.

Definition at line 1336 of file GCNSubtarget.h.

References HasXF32Insts.

◆ haveRoundOpsF64()

bool llvm::GCNSubtarget::haveRoundOpsF64 ( ) const
inline

Have v_trunc_f64, v_ceil_f64, v_rndne_f64.

Definition at line 557 of file GCNSubtarget.h.

References CIInsts.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ initializeSubtargetDependencies()

GCNSubtarget & GCNSubtarget::initializeSubtargetDependencies ( const Triple &  TT,
StringRef  GPU,
StringRef  FS 
)

Definition at line 62 of file GCNSubtarget.cpp.

References llvm::AMDGPUSubtarget::AddressableLocalMemorySize, llvm::Triple::amdgcn, llvm::Triple::AMDHSA, assert(), llvm::dbgs(), FlatForGlobal, Gen, getGeneration(), llvm::AMDGPU::IsaInfo::AMDGPUTargetID::getSramEccSetting(), llvm::AMDGPUSubtarget::getWavefrontSizeLog2(), llvm::AMDGPU::IsaInfo::AMDGPUTargetID::getXnackSetting(), llvm::AMDGPUSubtarget::GFX10, llvm::AMDGPUSubtarget::GFX9, hasAddr64(), hasFlat(), llvm::AMDGPUSubtarget::HasFminFmaxLegacy, hasFP64(), llvm::AMDGPUSubtarget::HasSMulHi, llvm::AMDGPUSubtarget::INVALID, llvm::AMDGPUSubtarget::isAmdHsaOS(), llvm::AMDGPU::isGFX10Plus(), LDSBankCount, LLVM_DEBUG, llvm::AMDGPUSubtarget::LocalMemorySize, MaxPrivateElementSize, ParseSubtargetFeatures(), llvm::AMDGPUSubtarget::SEA_ISLANDS, llvm::AMDGPU::IsaInfo::AMDGPUTargetID::setTargetIDFromFeaturesString(), llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS, TargetID, test, llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS, and llvm::AMDGPUSubtarget::WavefrontSizeLog2.

◆ isCuModeEnabled()

bool llvm::GCNSubtarget::isCuModeEnabled ( ) const
inline

Definition at line 627 of file GCNSubtarget.h.

References EnableCuMode.

◆ isMesaGfxShader()

bool llvm::GCNSubtarget::isMesaGfxShader ( const Function &  F) const
inline

Definition at line 751 of file GCNSubtarget.h.

References F, llvm::AMDGPUSubtarget::isMesa3DOS(), and llvm::AMDGPU::isShader().

◆ isPreciseMemoryEnabled()

bool llvm::GCNSubtarget::isPreciseMemoryEnabled ( ) const
inline

Definition at line 631 of file GCNSubtarget.h.

References EnablePreciseMemory.

◆ isTgSplitEnabled()

bool llvm::GCNSubtarget::isTgSplitEnabled ( ) const
inline

Definition at line 623 of file GCNSubtarget.h.

References EnableTgSplit.

◆ isTrapHandlerEnabled()

bool llvm::GCNSubtarget::isTrapHandlerEnabled ( ) const
inline

Definition at line 615 of file GCNSubtarget.h.

References TrapHandler.

Referenced by llvm::AMDGPULegalizerInfo::legalizeDebugTrap(), and llvm::AMDGPULegalizerInfo::legalizeTrap().

◆ isWave32()

bool llvm::GCNSubtarget::isWave32 ( ) const
inline

Definition at line 1585 of file GCNSubtarget.h.

References llvm::AMDGPUSubtarget::getWavefrontSize().

Referenced by llvm::SIInstrInfo::createPHISourceCopy(), llvm::AMDGPURegisterBankInfo::executeInWaterfallLoop(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::SIInstrInfo::fixImplicitOperands(), hasUserSGPRInit16Bug(), llvm::SIInstrInfo::insertVectorSelect(), llvm::GCNTTIImpl::instCombineIntrinsic(), llvm::SIInstrInfo::isWave32(), mirFileLoaded(), llvm::SIInstrInfo::moveToVALUImpl(), and llvm::PhiLoweringHelper::PhiLoweringHelper().

◆ isWave64()

bool llvm::GCNSubtarget::isWave64 ( ) const
inline

Definition at line 1589 of file GCNSubtarget.h.

References llvm::AMDGPUSubtarget::getWavefrontSize().

Referenced by llvm::SITargetLowering::getRegClassFor(), llvm::SIInstrInfo::getScratchRsrcWords23(), and llvm::SIInstrInfo::insertIndirectBranch().

◆ isWaveSizeKnown()

bool llvm::GCNSubtarget::isWaveSizeKnown ( ) const
inline

Returns if the wavesize of this subtarget is known reliable.

This is false only for the a default target-cpu that does not have an explicit +wavefrontsize target feature.

Definition at line 1596 of file GCNSubtarget.h.

Referenced by llvm::GCNTTIImpl::instCombineIntrinsic().

◆ isXNACKEnabled()

bool llvm::GCNSubtarget::isXNACKEnabled ( ) const
inline

Definition at line 619 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::AMDGPUTargetID::isXnackOnOrAny(), and TargetID.

Referenced by getBaseReservedNumSGPRs(), and needsConstrainedOpcode().

◆ ldsRequiresM0Init()

bool llvm::GCNSubtarget::ldsRequiresM0Init ( ) const
inline

Return if most LDS instructions have an m0 use that require m0 to be initialized.

Definition at line 716 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ loadStoreOptEnabled()

bool llvm::GCNSubtarget::loadStoreOptEnabled ( ) const
inline

Definition at line 1141 of file GCNSubtarget.h.

References EnableLoadStoreOpt.

◆ maxHardClauseLength()

unsigned llvm::GCNSubtarget::maxHardClauseLength ( ) const
inline
Returns
The maximum number of instructions that can be enclosed in an S_CLAUSE on the given subtarget, or 0 for targets that do not support that instruction.

Definition at line 1359 of file GCNSubtarget.h.

References MaxHardClauseLength.

◆ mirFileLoaded()

void GCNSubtarget::mirFileLoaded ( MachineFunction &  MF) const
override

Definition at line 348 of file GCNSubtarget.cpp.

References llvm::SIInstrInfo::fixImplicitOperands(), isWave32(), MBB, and MI.

◆ needsAlignedVGPRs()

bool llvm::GCNSubtarget::needsAlignedVGPRs ( ) const
inline

Return if operations acting on VGPR tuples require even alignment.

Definition at line 1276 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIInstrInfo::enforceOperandRCAlignment(), llvm::SIRegisterInfo::getAGPRClassForBitWidth(), llvm::SIRegisterInfo::getProperlyAlignedRC(), llvm::SIRegisterInfo::getVectorSuperClassForBitWidth(), llvm::SIRegisterInfo::getVGPR64Class(), llvm::SIRegisterInfo::getVGPRClassForBitWidth(), llvm::SIRegisterInfo::isProperlyAlignedRC(), and llvm::SIInstrInfo::verifyInstruction().

◆ overrideSchedPolicy()

void GCNSubtarget::overrideSchedPolicy ( MachineSchedPolicy &  Policy,
unsigned  NumRegionInstrs 
) const
override

Definition at line 331 of file GCNSubtarget.cpp.

References enableSIScheduler(), llvm::MachineSchedPolicy::OnlyBottomUp, llvm::MachineSchedPolicy::OnlyTopDown, llvm::MachineSchedPolicy::ShouldTrackLaneMasks, and llvm::MachineSchedPolicy::ShouldTrackPressure.

◆ ParseSubtargetFeatures()

void llvm::GCNSubtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

Referenced by initializeSubtargetDependencies().

◆ partialVCCWritesUpdateVCCZ()

bool llvm::GCNSubtarget::partialVCCWritesUpdateVCCZ ( ) const
inline

Writes to VCC_LO/VCC_HI update the VCCZ flag.

Definition at line 498 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ privateMemoryResourceIsRangeChecked()

bool llvm::GCNSubtarget::privateMemoryResourceIsRangeChecked ( ) const
inline
Returns
If MUBUF instructions always perform range checking, even for buffer resources used for private memory access.

Definition at line 563 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ requiresCodeObjectV6()

bool llvm::GCNSubtarget::requiresCodeObjectV6 ( ) const
inline

Definition at line 1269 of file GCNSubtarget.h.

References RequiresCOV6.

◆ requiresDisjointEarlyClobberAndUndef()

bool llvm::GCNSubtarget::requiresDisjointEarlyClobberAndUndef ( ) const
inlineoverride

Definition at line 1654 of file GCNSubtarget.h.

◆ requiresNopBeforeDeallocVGPRs()

bool llvm::GCNSubtarget::requiresNopBeforeDeallocVGPRs ( ) const
inline

Definition at line 1648 of file GCNSubtarget.h.

◆ setScalarizeGlobalBehavior()

void llvm::GCNSubtarget::setScalarizeGlobalBehavior ( bool  b)
inline

Definition at line 987 of file GCNSubtarget.h.

References ScalarizeGlobal.

◆ shouldClusterStores()

bool llvm::GCNSubtarget::shouldClusterStores ( ) const
inline

Definition at line 1640 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ supportsAgentScopeFineGrainedRemoteMemoryAtomics()

bool llvm::GCNSubtarget::supportsAgentScopeFineGrainedRemoteMemoryAtomics ( ) const
inline
Returns
true if atomic operations targeting fine-grained memory work correctly at device scope, in allocations in host or peer PCIe device memory.

Definition at line 912 of file GCNSubtarget.h.

References HasAgentScopeFineGrainedRemoteMemoryAtomics.

Referenced by globalMemoryFPAtomicIsLegal().

◆ supportsBackOffBarrier()

bool llvm::GCNSubtarget::supportsBackOffBarrier ( ) const
inline
Returns
true if the target supports backing off of s_barrier instructions when an exception is raised.

Definition at line 579 of file GCNSubtarget.h.

References BackOffBarrier.

◆ supportsGetDoorbellID()

bool llvm::GCNSubtarget::supportsGetDoorbellID ( ) const
inline

Definition at line 471 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::AMDGPULegalizerInfo::legalizeTrap().

◆ supportsMinMaxDenormModes()

bool llvm::GCNSubtarget::supportsMinMaxDenormModes ( ) const
inline

Definition at line 532 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SITargetLowering::isCanonicalized().

◆ supportsWGP()

bool llvm::GCNSubtarget::supportsWGP ( ) const
inline

Definition at line 365 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

Referenced by llvm::AMDGPU::HSAMD::MetadataStreamerMsgPackV4::getHSAKernelProps().

◆ unsafeDSOffsetFoldingEnabled()

bool llvm::GCNSubtarget::unsafeDSOffsetFoldingEnabled ( ) const
inline

Definition at line 482 of file GCNSubtarget.h.

References EnableUnsafeDSOffsetFolding.

◆ useAA()

bool GCNSubtarget::useAA ( ) const
override

Definition at line 367 of file GCNSubtarget.cpp.

References UseAA.

◆ useDS128()

bool llvm::GCNSubtarget::useDS128 ( ) const
inline
Returns
If target supports ds_read/write_b128 and user enables generation of ds_read/write_b128.

Definition at line 547 of file GCNSubtarget.h.

References CIInsts, and EnableDS128.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ useFlatForGlobal()

bool llvm::GCNSubtarget::useFlatForGlobal ( ) const
inline

Definition at line 541 of file GCNSubtarget.h.

References FlatForGlobal.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), llvm::AMDGPURegisterBankInfo::getValueMappingForPtr(), and llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ usePRTStrictNull()

bool llvm::GCNSubtarget::usePRTStrictNull ( ) const
inline
Returns
If target requires PRT Struct NULL support (zero result registers for sparse texture support).

Definition at line 569 of file GCNSubtarget.h.

References EnablePRTStrictNull.

Referenced by llvm::SITargetLowering::AddMemOpInit().

◆ useVGPRIndexMode()

bool GCNSubtarget::useVGPRIndexMode ( ) const

Definition at line 363 of file GCNSubtarget.cpp.

References EnableVGPRIndexMode, hasMovrel(), and hasVGPRIndexMode().

Referenced by llvm::SIInstrInfo::expandPostRAPseudo(), and llvm::SITargetLowering::shouldExpandVectorDynExt().

◆ vmemWriteNeedsExpWaitcnt()

bool llvm::GCNSubtarget::vmemWriteNeedsExpWaitcnt ( ) const
inline

Definition at line 954 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ zeroesHigh16BitsOfDest()

bool GCNSubtarget::zeroesHigh16BitsOfDest ( unsigned  Opcode) const

Returns if the result of this instruction with a 16-bit result returned in a 32-bit register implicitly zeroes the high 16-bits, rather than preserve the original value.

This list was mostly derived from experimentation.

Definition at line 233 of file GCNSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::GFX9, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Member Data Documentation

◆ AddNoCarryInsts

bool llvm::GCNSubtarget::AddNoCarryInsts = false
protected

Definition at line 216 of file GCNSubtarget.h.

Referenced by hasAddNoCarry().

◆ AutoWaitcntBeforeBarrier

bool llvm::GCNSubtarget::AutoWaitcntBeforeBarrier = false
protected

Definition at line 77 of file GCNSubtarget.h.

Referenced by hasAutoWaitcntBeforeBarrier().

◆ BackOffBarrier

bool llvm::GCNSubtarget::BackOffBarrier = false
protected

Definition at line 78 of file GCNSubtarget.h.

Referenced by supportsBackOffBarrier().

◆ CIInsts

bool llvm::GCNSubtarget::CIInsts = false
protected

Definition at line 106 of file GCNSubtarget.h.

Referenced by hasDS96AndDS128(), hasDwordx3LoadStores(), hasGWSSemaReleaseAll(), haveRoundOpsF64(), and useDS128().

◆ DumpCode

bool llvm::GCNSubtarget::DumpCode = false
protected

Definition at line 100 of file GCNSubtarget.h.

Referenced by dumpCode().

◆ EnableCuMode

bool llvm::GCNSubtarget::EnableCuMode = false
protected

Definition at line 90 of file GCNSubtarget.h.

Referenced by hasLDSMisalignedBug(), and isCuModeEnabled().

◆ EnableDS128

bool llvm::GCNSubtarget::EnableDS128 = false
protected

Definition at line 98 of file GCNSubtarget.h.

Referenced by useDS128().

◆ EnableFlatScratch

bool llvm::GCNSubtarget::EnableFlatScratch = false
protected

Definition at line 212 of file GCNSubtarget.h.

Referenced by enableFlatScratch().

◆ EnableLoadStoreOpt

bool llvm::GCNSubtarget::EnableLoadStoreOpt = false
protected

Definition at line 95 of file GCNSubtarget.h.

Referenced by loadStoreOptEnabled().

◆ EnablePreciseMemory

bool llvm::GCNSubtarget::EnablePreciseMemory = false
protected

Definition at line 92 of file GCNSubtarget.h.

Referenced by isPreciseMemoryEnabled().

◆ EnablePRTStrictNull

bool llvm::GCNSubtarget::EnablePRTStrictNull = false
protected

Definition at line 99 of file GCNSubtarget.h.

Referenced by usePRTStrictNull().

◆ EnableSIScheduler

bool llvm::GCNSubtarget::EnableSIScheduler = false
protected

Definition at line 97 of file GCNSubtarget.h.

Referenced by enableSIScheduler().

◆ EnableSRAMECC

bool llvm::GCNSubtarget::EnableSRAMECC = false
protected

Definition at line 196 of file GCNSubtarget.h.

◆ EnableTgSplit

bool llvm::GCNSubtarget::EnableTgSplit = false
protected

Definition at line 89 of file GCNSubtarget.h.

Referenced by isTgSplitEnabled().

◆ EnableUnsafeDSOffsetFolding

bool llvm::GCNSubtarget::EnableUnsafeDSOffsetFolding = false
protected

Definition at line 96 of file GCNSubtarget.h.

Referenced by unsafeDSOffsetFoldingEnabled().

◆ EnableXNACK

bool llvm::GCNSubtarget::EnableXNACK = false
protected

Definition at line 87 of file GCNSubtarget.h.

◆ FastDenormalF32

bool llvm::GCNSubtarget::FastDenormalF32 = false
protected

Definition at line 71 of file GCNSubtarget.h.

◆ FeatureDisable

bool llvm::GCNSubtarget::FeatureDisable = false
protected

Definition at line 260 of file GCNSubtarget.h.

◆ FlatAddressSpace

bool llvm::GCNSubtarget::FlatAddressSpace = false
protected

Definition at line 206 of file GCNSubtarget.h.

Referenced by hasFlatAddressSpace().

◆ FlatForGlobal

bool llvm::GCNSubtarget::FlatForGlobal = false
protected

Definition at line 76 of file GCNSubtarget.h.

Referenced by initializeSubtargetDependencies(), and useFlatForGlobal().

◆ FlatGlobalInsts

bool llvm::GCNSubtarget::FlatGlobalInsts = false
protected

Definition at line 208 of file GCNSubtarget.h.

Referenced by hasFlatGlobalInsts().

◆ FlatInstOffsets

bool llvm::GCNSubtarget::FlatInstOffsets = false
protected

Definition at line 207 of file GCNSubtarget.h.

Referenced by hasFlatInstOffsets().

◆ FlatScratchInsts

bool llvm::GCNSubtarget::FlatScratchInsts = false
protected

Definition at line 209 of file GCNSubtarget.h.

Referenced by hasFlatScratchInsts().

◆ FMA

bool llvm::GCNSubtarget::FMA = false
protected

Definition at line 104 of file GCNSubtarget.h.

Referenced by hasFMA().

◆ FP64

bool llvm::GCNSubtarget::FP64 = false
protected

Definition at line 103 of file GCNSubtarget.h.

Referenced by hasFP64(), and hasHWFP64().

◆ FullRate64Ops

bool llvm::GCNSubtarget::FullRate64Ops = false
protected

Definition at line 73 of file GCNSubtarget.h.

Referenced by hasFullRate64Ops().

◆ Gen

unsigned llvm::GCNSubtarget::Gen = INVALID
protected

Definition at line 65 of file GCNSubtarget.h.

Referenced by getGeneration(), and initializeSubtargetDependencies().

◆ GFX10_3Insts

bool llvm::GCNSubtarget::GFX10_3Insts = false
protected

Definition at line 115 of file GCNSubtarget.h.

Referenced by hasGFX10_3Insts().

◆ GFX10_AEncoding

bool llvm::GCNSubtarget::GFX10_AEncoding = false
protected

Definition at line 146 of file GCNSubtarget.h.

Referenced by hasGFX10_AEncoding().

◆ GFX10_BEncoding

bool llvm::GCNSubtarget::GFX10_BEncoding = false
protected

Definition at line 147 of file GCNSubtarget.h.

Referenced by hasAtomicCSub(), hasGFX10_BEncoding(), and hasGlobalAddTidInsts().

◆ GFX10Insts

bool llvm::GCNSubtarget::GFX10Insts = false
protected

Definition at line 112 of file GCNSubtarget.h.

◆ GFX11Insts

bool llvm::GCNSubtarget::GFX11Insts = false
protected

Definition at line 113 of file GCNSubtarget.h.

Referenced by hasCompressedExport(), hasDelayAlu(), hasDOTOpSelHazard(), hasFlatScratchSVSMode(), hasNullExportTarget(), hasSPackHL(), and hasVINTERPEncoding().

◆ GFX12Insts

bool llvm::GCNSubtarget::GFX12Insts = false
protected

Definition at line 114 of file GCNSubtarget.h.

Referenced by hasGetPCZeroExtension(), and hasPrefetch().

◆ GFX7GFX8GFX9Insts

bool llvm::GCNSubtarget::GFX7GFX8GFX9Insts = false
protected

Definition at line 116 of file GCNSubtarget.h.

◆ GFX8Insts

bool llvm::GCNSubtarget::GFX8Insts = false
protected

Definition at line 107 of file GCNSubtarget.h.

Referenced by hasLDSFPAtomicAddF32().

◆ GFX90AInsts

bool llvm::GCNSubtarget::GFX90AInsts = false
protected

Definition at line 109 of file GCNSubtarget.h.

Referenced by hasGFX90AInsts(), hasLDSFPAtomicAddF64(), hasPkMovB32(), hasShift64HighRegBug(), and needsAlignedVGPRs().

◆ GFX940Insts

bool llvm::GCNSubtarget::GFX940Insts = false
protected

Definition at line 110 of file GCNSubtarget.h.

Referenced by hasDOTOpSelHazard(), hasDstSelForwardingHazard(), hasFlatScratchSVSMode(), hasGFX940Insts(), hasLshlAddB64(), hasMovB64(), hasShift64HighRegBug(), hasTransForwardingHazard(), and hasVDecCoExecHazard().

◆ GFX950Insts

bool llvm::GCNSubtarget::GFX950Insts = false
protected

Definition at line 111 of file GCNSubtarget.h.

Referenced by hasCvtScaleForwardingHazard(), and hasGFX950Insts().

◆ GFX9Insts

bool llvm::GCNSubtarget::GFX9Insts = false
protected

Definition at line 108 of file GCNSubtarget.h.

Referenced by hasScalarMulHiInsts(), hasScalarPackInsts(), and hasSwap().

◆ HalfRate64Ops

bool llvm::GCNSubtarget::HalfRate64Ops = false
protected

Definition at line 72 of file GCNSubtarget.h.

Referenced by hasHalfRate64Ops().

◆ Has1_5xVGPRs

bool llvm::GCNSubtarget::Has1_5xVGPRs = false
protected

Definition at line 245 of file GCNSubtarget.h.

Referenced by has1_5xVGPRs().

◆ HasA16

bool llvm::GCNSubtarget::HasA16 = false
protected

Definition at line 142 of file GCNSubtarget.h.

Referenced by hasA16().

◆ HasAgentScopeFineGrainedRemoteMemoryAtomics

bool llvm::GCNSubtarget::HasAgentScopeFineGrainedRemoteMemoryAtomics = false
protected

Definition at line 185 of file GCNSubtarget.h.

Referenced by supportsAgentScopeFineGrainedRemoteMemoryAtomics().

◆ HasApertureRegs

bool llvm::GCNSubtarget::HasApertureRegs = false
protected

Definition at line 81 of file GCNSubtarget.h.

Referenced by hasApertureRegs().

◆ HasArchitectedFlatScratch

bool llvm::GCNSubtarget::HasArchitectedFlatScratch = false
protected

Definition at line 211 of file GCNSubtarget.h.

Referenced by flatScratchIsArchitected(), and getBaseReservedNumSGPRs().

◆ HasArchitectedSGPRs

bool llvm::GCNSubtarget::HasArchitectedSGPRs = false
protected

Definition at line 213 of file GCNSubtarget.h.

Referenced by hasArchitectedSGPRs().

◆ HasAshrPkInsts

bool llvm::GCNSubtarget::HasAshrPkInsts = false
protected

Definition at line 252 of file GCNSubtarget.h.

Referenced by hasAshrPkInsts().

◆ HasAtomicBufferGlobalPkAddF16Insts

bool llvm::GCNSubtarget::HasAtomicBufferGlobalPkAddF16Insts = false
protected

Definition at line 178 of file GCNSubtarget.h.

Referenced by hasAtomicBufferGlobalPkAddF16Insts().

◆ HasAtomicBufferGlobalPkAddF16NoRtnInsts

bool llvm::GCNSubtarget::HasAtomicBufferGlobalPkAddF16NoRtnInsts = false
protected

Definition at line 177 of file GCNSubtarget.h.

Referenced by hasAtomicBufferGlobalPkAddF16NoRtnInsts().

◆ HasAtomicBufferPkAddBF16Inst

bool llvm::GCNSubtarget::HasAtomicBufferPkAddBF16Inst = false
protected

Definition at line 181 of file GCNSubtarget.h.

Referenced by hasAtomicBufferPkAddBF16Inst().

◆ HasAtomicCSubNoRtnInsts

bool llvm::GCNSubtarget::HasAtomicCSubNoRtnInsts = false
protected

Definition at line 179 of file GCNSubtarget.h.

Referenced by hasAtomicCSubNoRtnInsts().

◆ HasAtomicDsPkAdd16Insts

bool llvm::GCNSubtarget::HasAtomicDsPkAdd16Insts = false
protected

Definition at line 172 of file GCNSubtarget.h.

Referenced by hasAtomicDsPkAdd16Insts().

◆ HasAtomicFaddNoRtnInsts

bool llvm::GCNSubtarget::HasAtomicFaddNoRtnInsts = false
protected

Definition at line 175 of file GCNSubtarget.h.

Referenced by hasAtomicFaddInsts(), and hasAtomicFaddNoRtnInsts().

◆ HasAtomicFaddRtnInsts

bool llvm::GCNSubtarget::HasAtomicFaddRtnInsts = false
protected

Definition at line 174 of file GCNSubtarget.h.

Referenced by hasAtomicFaddInsts(), and hasAtomicFaddRtnInsts().

◆ HasAtomicFlatPkAdd16Insts

bool llvm::GCNSubtarget::HasAtomicFlatPkAdd16Insts = false
protected

Definition at line 173 of file GCNSubtarget.h.

Referenced by hasAtomicFlatPkAdd16Insts().

◆ HasAtomicFMinFMaxF32FlatInsts

bool llvm::GCNSubtarget::HasAtomicFMinFMaxF32FlatInsts = false
protected

Definition at line 170 of file GCNSubtarget.h.

Referenced by hasAtomicFMinFMaxF32FlatInsts().

◆ HasAtomicFMinFMaxF32GlobalInsts

bool llvm::GCNSubtarget::HasAtomicFMinFMaxF32GlobalInsts = false
protected

Definition at line 168 of file GCNSubtarget.h.

Referenced by hasAtomicFMinFMaxF32GlobalInsts().

◆ HasAtomicFMinFMaxF64FlatInsts

bool llvm::GCNSubtarget::HasAtomicFMinFMaxF64FlatInsts = false
protected

Definition at line 171 of file GCNSubtarget.h.

Referenced by hasAtomicFMinFMaxF64FlatInsts().

◆ HasAtomicFMinFMaxF64GlobalInsts

bool llvm::GCNSubtarget::HasAtomicFMinFMaxF64GlobalInsts = false
protected

Definition at line 169 of file GCNSubtarget.h.

Referenced by hasAtomicFMinFMaxF64GlobalInsts().

◆ HasAtomicGlobalPkAddBF16Inst

bool llvm::GCNSubtarget::HasAtomicGlobalPkAddBF16Inst = false
protected

Definition at line 180 of file GCNSubtarget.h.

Referenced by hasAtomicGlobalPkAddBF16Inst().

◆ HasBitOp3Insts

bool llvm::GCNSubtarget::HasBitOp3Insts = false
protected

Definition at line 227 of file GCNSubtarget.h.

Referenced by hasBitOp3Insts().

◆ HasCvtFP8Vop1Bug

bool llvm::GCNSubtarget::HasCvtFP8Vop1Bug = false
protected

Definition at line 166 of file GCNSubtarget.h.

Referenced by hasCvtFP8VOP1Bug().

◆ HasDefaultComponentBroadcast

bool llvm::GCNSubtarget::HasDefaultComponentBroadcast = false
protected

Definition at line 186 of file GCNSubtarget.h.

Referenced by hasDefaultComponentBroadcast().

◆ HasDefaultComponentZero

bool llvm::GCNSubtarget::HasDefaultComponentZero = false
protected

Definition at line 184 of file GCNSubtarget.h.

Referenced by hasDefaultComponentZero().

◆ HasDLInsts

bool llvm::GCNSubtarget::HasDLInsts = false
protected

Definition at line 148 of file GCNSubtarget.h.

Referenced by hasDLInsts().

◆ HasDot10Insts

bool llvm::GCNSubtarget::HasDot10Insts = false
protected

Definition at line 159 of file GCNSubtarget.h.

Referenced by hasDot10Insts().

◆ HasDot11Insts

bool llvm::GCNSubtarget::HasDot11Insts = false
protected

Definition at line 160 of file GCNSubtarget.h.

Referenced by hasDot11Insts().

◆ HasDot12Insts

bool llvm::GCNSubtarget::HasDot12Insts = false
protected

Definition at line 161 of file GCNSubtarget.h.

Referenced by hasDot12Insts().

◆ HasDot13Insts

bool llvm::GCNSubtarget::HasDot13Insts = false
protected

Definition at line 162 of file GCNSubtarget.h.

Referenced by hasDot13Insts().

◆ HasDot1Insts

bool llvm::GCNSubtarget::HasDot1Insts = false
protected

Definition at line 150 of file GCNSubtarget.h.

Referenced by hasDot1Insts().

◆ HasDot2Insts

bool llvm::GCNSubtarget::HasDot2Insts = false
protected

Definition at line 151 of file GCNSubtarget.h.

Referenced by hasDot2Insts().

◆ HasDot3Insts

bool llvm::GCNSubtarget::HasDot3Insts = false
protected

Definition at line 152 of file GCNSubtarget.h.

Referenced by hasDot3Insts().

◆ HasDot4Insts

bool llvm::GCNSubtarget::HasDot4Insts = false
protected

Definition at line 153 of file GCNSubtarget.h.

Referenced by hasDot4Insts().

◆ HasDot5Insts

bool llvm::GCNSubtarget::HasDot5Insts = false
protected

Definition at line 154 of file GCNSubtarget.h.

Referenced by hasDot5Insts().

◆ HasDot6Insts

bool llvm::GCNSubtarget::HasDot6Insts = false
protected

Definition at line 155 of file GCNSubtarget.h.

Referenced by hasDot6Insts().

◆ HasDot7Insts

bool llvm::GCNSubtarget::HasDot7Insts = false
protected

Definition at line 156 of file GCNSubtarget.h.

Referenced by hasDot7Insts().

◆ HasDot8Insts

bool llvm::GCNSubtarget::HasDot8Insts = false
protected

Definition at line 157 of file GCNSubtarget.h.

Referenced by hasDot8Insts().

◆ HasDot9Insts

bool llvm::GCNSubtarget::HasDot9Insts = false
protected

Definition at line 158 of file GCNSubtarget.h.

Referenced by hasDot9Insts().

◆ HasDPALU_DPP

bool llvm::GCNSubtarget::HasDPALU_DPP = false
protected

Definition at line 136 of file GCNSubtarget.h.

Referenced by hasDPALU_DPP().

◆ HasDPP

bool llvm::GCNSubtarget::HasDPP = false
protected

Definition at line 134 of file GCNSubtarget.h.

Referenced by hasDPP(), hasDPPBroadcasts(), and hasDPPWavefrontShifts().

◆ HasDPP8

bool llvm::GCNSubtarget::HasDPP8 = false
protected

Definition at line 135 of file GCNSubtarget.h.

Referenced by hasDPP8().

◆ HasDPPSrc1SGPR

bool llvm::GCNSubtarget::HasDPPSrc1SGPR = false
protected

Definition at line 137 of file GCNSubtarget.h.

Referenced by hasDPPSrc1SGPR().

◆ HasExtendedImageInsts

bool llvm::GCNSubtarget::HasExtendedImageInsts = false
protected

Definition at line 140 of file GCNSubtarget.h.

Referenced by hasExtendedImageInsts().

◆ HasFlatAtomicFaddF32Inst

bool llvm::GCNSubtarget::HasFlatAtomicFaddF32Inst = false
protected

Definition at line 182 of file GCNSubtarget.h.

Referenced by hasFlatAtomicFaddF32Inst().

◆ HasFlatBufferGlobalAtomicFaddF64Inst

bool llvm::GCNSubtarget::HasFlatBufferGlobalAtomicFaddF64Inst = false
protected

Definition at line 183 of file GCNSubtarget.h.

Referenced by hasFlatBufferGlobalAtomicFaddF64Inst().

◆ HasFlatSegmentOffsetBug

bool llvm::GCNSubtarget::HasFlatSegmentOffsetBug = false
protected

Definition at line 240 of file GCNSubtarget.h.

Referenced by hasFlatSegmentOffsetBug().

◆ HasFmacF64Inst

bool llvm::GCNSubtarget::HasFmacF64Inst = false
protected

Definition at line 149 of file GCNSubtarget.h.

Referenced by hasFmacF64Inst().

◆ HasFmaMixInsts

bool llvm::GCNSubtarget::HasFmaMixInsts = false
protected

Definition at line 123 of file GCNSubtarget.h.

Referenced by hasFmaMixInsts().

◆ HasForceStoreSC0SC1

bool llvm::GCNSubtarget::HasForceStoreSC0SC1 = false
protected

Definition at line 249 of file GCNSubtarget.h.

Referenced by hasForceStoreSC0SC1().

◆ HasFP8ConversionInsts

bool llvm::GCNSubtarget::HasFP8ConversionInsts = false
protected

Definition at line 165 of file GCNSubtarget.h.

Referenced by hasFP8ConversionInsts().

◆ HasFP8Insts

bool llvm::GCNSubtarget::HasFP8Insts = false
protected

Definition at line 164 of file GCNSubtarget.h.

Referenced by hasFP8Insts().

◆ HasG16

bool llvm::GCNSubtarget::HasG16 = false
protected

Definition at line 143 of file GCNSubtarget.h.

Referenced by hasG16().

◆ HasGDS

bool llvm::GCNSubtarget::HasGDS = false
protected

Definition at line 214 of file GCNSubtarget.h.

Referenced by hasGDS().

◆ HasGetWaveIdInst

bool llvm::GCNSubtarget::HasGetWaveIdInst = false
protected

Definition at line 200 of file GCNSubtarget.h.

Referenced by hasGetWaveIdInst().

◆ HasGWS

bool llvm::GCNSubtarget::HasGWS = false
protected

Definition at line 215 of file GCNSubtarget.h.

Referenced by hasGWS().

◆ HasImageGather4D16Bug

bool llvm::GCNSubtarget::HasImageGather4D16Bug = false
protected

Definition at line 242 of file GCNSubtarget.h.

Referenced by hasImageGather4D16Bug().

◆ HasImageInsts

bool llvm::GCNSubtarget::HasImageInsts = false
protected

Definition at line 139 of file GCNSubtarget.h.

Referenced by hasImageInsts().

◆ HasImageStoreD16Bug

bool llvm::GCNSubtarget::HasImageStoreD16Bug = false
protected

Definition at line 241 of file GCNSubtarget.h.

Referenced by hasImageStoreD16Bug().

◆ HasInstFwdPrefetchBug

bool llvm::GCNSubtarget::HasInstFwdPrefetchBug = false
protected

Definition at line 234 of file GCNSubtarget.h.

Referenced by hasInstFwdPrefetchBug().

◆ HasIntClamp

bool llvm::GCNSubtarget::HasIntClamp = false
protected

Definition at line 122 of file GCNSubtarget.h.

Referenced by hasIntClamp().

◆ HasLdsBranchVmemWARHazard

bool llvm::GCNSubtarget::HasLdsBranchVmemWARHazard = false
protected

Definition at line 236 of file GCNSubtarget.h.

Referenced by hasLdsBranchVmemWARHazard().

◆ HasMADIntraFwdBug

bool llvm::GCNSubtarget::HasMADIntraFwdBug = false
protected

Definition at line 246 of file GCNSubtarget.h.

Referenced by hasMADIntraFwdBug().

◆ HasMAIInsts

bool llvm::GCNSubtarget::HasMAIInsts = false
protected

Definition at line 163 of file GCNSubtarget.h.

Referenced by hasMAIInsts().

◆ HasMemoryAtomicFaddF32DenormalSupport

bool llvm::GCNSubtarget::HasMemoryAtomicFaddF32DenormalSupport = false
protected

Definition at line 176 of file GCNSubtarget.h.

Referenced by hasMemoryAtomicFaddF32DenormalSupport().

◆ HasMFMAInlineLiteralBug

bool llvm::GCNSubtarget::HasMFMAInlineLiteralBug = false
protected

Definition at line 219 of file GCNSubtarget.h.

Referenced by hasMFMAInlineLiteralBug().

◆ HasMinimum3Maximum3F16

bool llvm::GCNSubtarget::HasMinimum3Maximum3F16 = false
protected

Definition at line 254 of file GCNSubtarget.h.

Referenced by hasMinimum3Maximum3F16().

◆ HasMinimum3Maximum3F32

bool llvm::GCNSubtarget::HasMinimum3Maximum3F32 = false
protected

Definition at line 253 of file GCNSubtarget.h.

Referenced by hasMinimum3Maximum3F32().

◆ HasMinimum3Maximum3PKF16

bool llvm::GCNSubtarget::HasMinimum3Maximum3PKF16 = false
protected

Definition at line 255 of file GCNSubtarget.h.

Referenced by hasMinimum3Maximum3PKF16().

◆ HasMovrel

bool llvm::GCNSubtarget::HasMovrel = false
protected

Definition at line 124 of file GCNSubtarget.h.

Referenced by hasMovrel().

◆ HasMSAALoadDstSelBug

bool llvm::GCNSubtarget::HasMSAALoadDstSelBug = false
protected

Definition at line 243 of file GCNSubtarget.h.

Referenced by hasMSAALoadDstSelBug().

◆ HasNoDataDepHazard

bool llvm::GCNSubtarget::HasNoDataDepHazard = false
protected

Definition at line 205 of file GCNSubtarget.h.

Referenced by hasNoDataDepHazard().

◆ HasNoSdstCMPX

bool llvm::GCNSubtarget::HasNoSdstCMPX = false
protected

Definition at line 198 of file GCNSubtarget.h.

Referenced by hasNoSdstCMPX().

◆ HasNSAClauseBug

bool llvm::GCNSubtarget::HasNSAClauseBug = false
protected

Definition at line 238 of file GCNSubtarget.h.

Referenced by hasNSAClauseBug().

◆ HasNSAEncoding

bool llvm::GCNSubtarget::HasNSAEncoding = false
protected

Definition at line 144 of file GCNSubtarget.h.

Referenced by hasNSAEncoding().

◆ HasNSAtoVMEMBug

bool llvm::GCNSubtarget::HasNSAtoVMEMBug = false
protected

Definition at line 237 of file GCNSubtarget.h.

Referenced by hasNSAtoVMEMBug().

◆ HasOffset3fBug

bool llvm::GCNSubtarget::HasOffset3fBug = false
protected

Definition at line 239 of file GCNSubtarget.h.

Referenced by hasOffset3fBug().

◆ HasPackedFP32Ops

bool llvm::GCNSubtarget::HasPackedFP32Ops = false
protected

Definition at line 138 of file GCNSubtarget.h.

Referenced by hasPackedFP32Ops().

◆ HasPackedTID

bool llvm::GCNSubtarget::HasPackedTID = false
protected

Definition at line 222 of file GCNSubtarget.h.

Referenced by hasPackedTID().

◆ HasPartialNSAEncoding

bool llvm::GCNSubtarget::HasPartialNSAEncoding = false
protected

Definition at line 145 of file GCNSubtarget.h.

Referenced by hasPartialNSAEncoding().

◆ HasPermlane16Swap

bool llvm::GCNSubtarget::HasPermlane16Swap = false
protected

Definition at line 229 of file GCNSubtarget.h.

Referenced by hasPermlane16Swap().

◆ HasPermlane32Swap

bool llvm::GCNSubtarget::HasPermlane32Swap = false
protected

Definition at line 230 of file GCNSubtarget.h.

Referenced by hasPermlane32Swap().

◆ HasPkFmacF16Inst

bool llvm::GCNSubtarget::HasPkFmacF16Inst = false
protected

Definition at line 167 of file GCNSubtarget.h.

Referenced by hasPkFmacF16Inst().

◆ HasPrivEnabledTrap2NopBug

bool llvm::GCNSubtarget::HasPrivEnabledTrap2NopBug = false
protected

Definition at line 244 of file GCNSubtarget.h.

Referenced by hasPrivEnabledTrap2NopBug().

◆ HasPrngInst

bool llvm::GCNSubtarget::HasPrngInst = false
protected

Definition at line 228 of file GCNSubtarget.h.

Referenced by hasPrngInst().

◆ HasPseudoScalarTrans

bool llvm::GCNSubtarget::HasPseudoScalarTrans = false
protected

Definition at line 225 of file GCNSubtarget.h.

Referenced by hasPseudoScalarTrans().

◆ HasR128A16

bool llvm::GCNSubtarget::HasR128A16 = false
protected

Definition at line 141 of file GCNSubtarget.h.

Referenced by hasR128A16().

◆ HasRequiredExportPriority

bool llvm::GCNSubtarget::HasRequiredExportPriority = false
protected

Definition at line 250 of file GCNSubtarget.h.

Referenced by hasRequiredExportPriority().

◆ HasRestrictedSOffset

bool llvm::GCNSubtarget::HasRestrictedSOffset = false
protected

Definition at line 226 of file GCNSubtarget.h.

Referenced by hasRestrictedSOffset().

◆ HasSALUFloatInsts

bool llvm::GCNSubtarget::HasSALUFloatInsts = false
protected

Definition at line 224 of file GCNSubtarget.h.

Referenced by hasSALUFloatInsts().

◆ HasScalarAtomics

bool llvm::GCNSubtarget::HasScalarAtomics = false
protected

Definition at line 128 of file GCNSubtarget.h.

Referenced by hasScalarAtomics().

◆ HasScalarDwordx3Loads

bool llvm::GCNSubtarget::HasScalarDwordx3Loads = false
protected

Definition at line 126 of file GCNSubtarget.h.

Referenced by hasScalarDwordx3Loads().

◆ HasScalarStores

bool llvm::GCNSubtarget::HasScalarStores = false
protected

Definition at line 127 of file GCNSubtarget.h.

Referenced by hasScalarStores().

◆ HasSDWAMac

bool llvm::GCNSubtarget::HasSDWAMac = false
protected

Definition at line 132 of file GCNSubtarget.h.

Referenced by hasSDWAMac().

◆ HasSDWAOmod

bool llvm::GCNSubtarget::HasSDWAOmod = false
protected

Definition at line 129 of file GCNSubtarget.h.

Referenced by hasSDWAOmod().

◆ HasSDWAOutModsVOPC

bool llvm::GCNSubtarget::HasSDWAOutModsVOPC = false
protected

Definition at line 133 of file GCNSubtarget.h.

Referenced by hasSDWAOutModsVOPC().

◆ HasSDWAScalar

bool llvm::GCNSubtarget::HasSDWAScalar = false
protected

Definition at line 130 of file GCNSubtarget.h.

Referenced by hasSDWAScalar().

◆ HasSDWASdst

bool llvm::GCNSubtarget::HasSDWASdst = false
protected

Definition at line 131 of file GCNSubtarget.h.

Referenced by hasSDWASdst().

◆ HasShaderCyclesHiLoRegisters

bool llvm::GCNSubtarget::HasShaderCyclesHiLoRegisters = false
protected

Definition at line 203 of file GCNSubtarget.h.

Referenced by hasShaderCyclesHiLoRegisters().

◆ HasShaderCyclesRegister

bool llvm::GCNSubtarget::HasShaderCyclesRegister = false
protected

Definition at line 202 of file GCNSubtarget.h.

Referenced by hasShaderCyclesRegister().

◆ HasSMemRealTime

bool llvm::GCNSubtarget::HasSMemRealTime = false
protected

Definition at line 121 of file GCNSubtarget.h.

Referenced by hasSMemRealTime().

◆ HasSMemTimeInst

bool llvm::GCNSubtarget::HasSMemTimeInst = false
protected

Definition at line 201 of file GCNSubtarget.h.

Referenced by hasSMemTimeInst().

◆ HasSMEMtoVectorWriteHazard

bool llvm::GCNSubtarget::HasSMEMtoVectorWriteHazard = false
protected

Definition at line 233 of file GCNSubtarget.h.

Referenced by hasSMEMtoVectorWriteHazard().

◆ HasUnpackedD16VMem

bool llvm::GCNSubtarget::HasUnpackedD16VMem = false
protected

Definition at line 217 of file GCNSubtarget.h.

Referenced by hasUnpackedD16VMem().

◆ HasVALUTransUseHazard

bool llvm::GCNSubtarget::HasVALUTransUseHazard = false
protected

Definition at line 248 of file GCNSubtarget.h.

Referenced by hasVALUTransUseHazard().

◆ HasVcmpxExecWARHazard

bool llvm::GCNSubtarget::HasVcmpxExecWARHazard = false
protected

Definition at line 235 of file GCNSubtarget.h.

Referenced by hasVcmpxExecWARHazard().

◆ HasVcmpxPermlaneHazard

bool llvm::GCNSubtarget::HasVcmpxPermlaneHazard = false
protected

Definition at line 231 of file GCNSubtarget.h.

Referenced by hasVcmpxPermlaneHazard().

◆ HasVGPRIndexMode

bool llvm::GCNSubtarget::HasVGPRIndexMode = false
protected

Definition at line 125 of file GCNSubtarget.h.

Referenced by hasVGPRIndexMode().

◆ HasVMEMtoScalarWriteHazard

bool llvm::GCNSubtarget::HasVMEMtoScalarWriteHazard = false
protected

Definition at line 232 of file GCNSubtarget.h.

Referenced by hasVMEMtoScalarWriteHazard().

◆ HasVmemWriteVgprInOrder

bool llvm::GCNSubtarget::HasVmemWriteVgprInOrder = false
protected

Definition at line 251 of file GCNSubtarget.h.

Referenced by hasVmemWriteVgprInOrder().

◆ HasVOP3Literal

bool llvm::GCNSubtarget::HasVOP3Literal = false
protected

Definition at line 204 of file GCNSubtarget.h.

Referenced by hasVOP3Literal().

◆ HasVOPDInsts

bool llvm::GCNSubtarget::HasVOPDInsts = false
protected

Definition at line 247 of file GCNSubtarget.h.

Referenced by hasVOPDInsts().

◆ HasVscnt

bool llvm::GCNSubtarget::HasVscnt = false
protected

Definition at line 199 of file GCNSubtarget.h.

Referenced by hasVscnt().

◆ HasXF32Insts

bool llvm::GCNSubtarget::HasXF32Insts = false
protected

Definition at line 187 of file GCNSubtarget.h.

Referenced by hasXF32Insts().

◆ InstrItins

InstrItineraryData llvm::GCNSubtarget::InstrItins
protected

Definition at line 66 of file GCNSubtarget.h.

Referenced by getInstrItineraryData().

◆ KernargPreload

bool llvm::GCNSubtarget::KernargPreload = false
protected

Definition at line 83 of file GCNSubtarget.h.

Referenced by hasKernargPreload().

◆ LDSBankCount

int llvm::GCNSubtarget::LDSBankCount = 0
protected

Definition at line 67 of file GCNSubtarget.h.

Referenced by getLDSBankCount(), and initializeSubtargetDependencies().

◆ LDSMisalignedBug

bool llvm::GCNSubtarget::LDSMisalignedBug = false
protected

Definition at line 218 of file GCNSubtarget.h.

Referenced by hasLDSMisalignedBug().

◆ MaxHardClauseLength

unsigned llvm::GCNSubtarget::MaxHardClauseLength = 0
protected

The maximum number of instructions that may be placed within an S_CLAUSE, which is one greater than the maximum argument to S_CLAUSE.

A value of 0 indicates a lack of S_CLAUSE support.

Definition at line 191 of file GCNSubtarget.h.

Referenced by hasHardClauses(), and maxHardClauseLength().

◆ MaxPrivateElementSize

unsigned llvm::GCNSubtarget::MaxPrivateElementSize = 0
protected

Definition at line 68 of file GCNSubtarget.h.

Referenced by getMaxPrivateElementSize(), and initializeSubtargetDependencies().

◆ MIMG_R128

bool llvm::GCNSubtarget::MIMG_R128 = false
protected

Definition at line 105 of file GCNSubtarget.h.

Referenced by hasMIMG_R128().

◆ NegativeScratchOffsetBug

bool llvm::GCNSubtarget::NegativeScratchOffsetBug = false
protected

Definition at line 119 of file GCNSubtarget.h.

Referenced by hasNegativeScratchOffsetBug().

◆ NegativeUnalignedScratchOffsetBug

bool llvm::GCNSubtarget::NegativeUnalignedScratchOffsetBug = false
protected

Definition at line 120 of file GCNSubtarget.h.

Referenced by hasNegativeUnalignedScratchOffsetBug().

◆ RequiresCOV6

bool llvm::GCNSubtarget::RequiresCOV6 = false
protected

Definition at line 257 of file GCNSubtarget.h.

Referenced by requiresCodeObjectV6().

◆ ScalarFlatScratchInsts

bool llvm::GCNSubtarget::ScalarFlatScratchInsts = false
protected

Definition at line 210 of file GCNSubtarget.h.

Referenced by hasScalarFlatScratchInsts().

◆ ScalarizeGlobal

bool llvm::GCNSubtarget::ScalarizeGlobal = false
protected

Definition at line 223 of file GCNSubtarget.h.

Referenced by getScalarizeGlobalBehavior(), and setScalarizeGlobalBehavior().

◆ SGPRInitBug

bool llvm::GCNSubtarget::SGPRInitBug = false
protected

Definition at line 117 of file GCNSubtarget.h.

Referenced by hasSGPRInitBug().

◆ SupportsSRAMECC

bool llvm::GCNSubtarget::SupportsSRAMECC = false
protected

Definition at line 192 of file GCNSubtarget.h.

◆ SupportsXNACK

bool llvm::GCNSubtarget::SupportsXNACK = false
protected

Definition at line 82 of file GCNSubtarget.h.

◆ TargetID

AMDGPU::IsaInfo::AMDGPUTargetID llvm::GCNSubtarget::TargetID
protected

Definition at line 64 of file GCNSubtarget.h.

Referenced by d16PreservesUnusedBits(), getTargetID(), initializeSubtargetDependencies(), and isXNACKEnabled().

◆ TargetTriple

Triple llvm::GCNSubtarget::TargetTriple
protected

Definition at line 63 of file GCNSubtarget.h.

◆ TrapHandler

bool llvm::GCNSubtarget::TrapHandler = false
protected

Definition at line 91 of file GCNSubtarget.h.

Referenced by isTrapHandlerEnabled().

◆ UnalignedAccessMode

bool llvm::GCNSubtarget::UnalignedAccessMode = false
protected

Definition at line 80 of file GCNSubtarget.h.

Referenced by hasUnalignedAccessMode(), hasUnalignedBufferAccessEnabled(), hasUnalignedDSAccessEnabled(), and hasUnalignedScratchAccessEnabled().

◆ UnalignedBufferAccess

bool llvm::GCNSubtarget::UnalignedBufferAccess = false
protected

Definition at line 220 of file GCNSubtarget.h.

Referenced by hasUnalignedBufferAccess(), and hasUnalignedBufferAccessEnabled().

◆ UnalignedDSAccess

bool llvm::GCNSubtarget::UnalignedDSAccess = false
protected

Definition at line 221 of file GCNSubtarget.h.

Referenced by hasUnalignedDSAccess(), and hasUnalignedDSAccessEnabled().

◆ UnalignedScratchAccess

bool llvm::GCNSubtarget::UnalignedScratchAccess = false
protected

Definition at line 79 of file GCNSubtarget.h.

Referenced by hasUnalignedScratchAccess(), and hasUnalignedScratchAccessEnabled().

◆ UserSGPRInit16Bug

bool llvm::GCNSubtarget::UserSGPRInit16Bug = false
protected

Definition at line 118 of file GCNSubtarget.h.

Referenced by hasUserSGPRInit16Bug().

The documentation for this class was generated from the following files:
Generated on Tue May 13 2025 19:20:55 for LLVM by doxygen 1.9.6