21#include "llvm/IR/IntrinsicsAMDGPU.h"
27#define DEBUG_TYPE "AMDGPUtti"
31struct AMDGPUImageDMaskIntrinsic {
35#define GET_AMDGPUImageDMaskIntrinsicTable_IMPL
36#include "InstCombineTables.inc"
49 assert(Cmp0 != APFloat::cmpUnordered &&
"nans handled separately");
50 if (Cmp0 == APFloat::cmpEqual)
54 assert(Cmp1 != APFloat::cmpUnordered &&
"nans handled separately");
55 if (Cmp1 == APFloat::cmpEqual)
66 Type *VTy = V.getType();
72 if (
ConstantFP *ConstFloat = dyn_cast<ConstantFP>(&V)) {
75 APFloat FloatValue(ConstFloat->getValueAPF());
76 bool LosesInfo =
true;
77 FloatValue.
convert(APFloat::IEEEhalf(), APFloat::rmTowardZero,
82 if (
ConstantInt *ConstInt = dyn_cast<ConstantInt>(&V)) {
85 APInt IntValue(ConstInt->getValue());
104 Type *VTy = V.getType();
105 if (isa<FPExtInst>(&V) || isa<SExtInst>(&V) || isa<ZExtInst>(&V))
106 return cast<Instruction>(&V)->getOperand(0);
137 if (isa<FPMathOperator>(NewCall))
144 bool RemoveOldIntr = &OldIntr != &InstToReplace;
153static std::optional<Instruction *>
158 if (
const auto *LZMappingInfo =
159 AMDGPU::getMIMGLZMappingInfo(ImageDimIntr->
BaseOpcode)) {
160 if (
auto *ConstantLod =
162 if (ConstantLod->isZero() || ConstantLod->isNegative()) {
164 AMDGPU::getImageDimIntrinsicByBaseOpcode(LZMappingInfo->LZ,
167 II, II, NewImageDimIntr->
Intr, IC, [&](
auto &Args,
auto &ArgTys) {
168 Args.erase(Args.begin() + ImageDimIntr->LodIndex);
175 if (
const auto *MIPMappingInfo =
176 AMDGPU::getMIMGMIPMappingInfo(ImageDimIntr->
BaseOpcode)) {
177 if (
auto *ConstantMip =
179 if (ConstantMip->isZero()) {
181 AMDGPU::getImageDimIntrinsicByBaseOpcode(MIPMappingInfo->NONMIP,
184 II, II, NewImageDimIntr->
Intr, IC, [&](
auto &Args,
auto &ArgTys) {
185 Args.erase(Args.begin() + ImageDimIntr->MipIndex);
192 if (
const auto *BiasMappingInfo =
193 AMDGPU::getMIMGBiasMappingInfo(ImageDimIntr->
BaseOpcode)) {
194 if (
auto *ConstantBias =
196 if (ConstantBias->isZero()) {
198 AMDGPU::getImageDimIntrinsicByBaseOpcode(BiasMappingInfo->NoBias,
201 II, II, NewImageDimIntr->
Intr, IC, [&](
auto &Args,
auto &ArgTys) {
202 Args.erase(Args.begin() + ImageDimIntr->BiasIndex);
203 ArgTys.erase(ArgTys.begin() + ImageDimIntr->BiasTyArg);
210 if (
const auto *OffsetMappingInfo =
211 AMDGPU::getMIMGOffsetMappingInfo(ImageDimIntr->
BaseOpcode)) {
212 if (
auto *ConstantOffset =
214 if (ConstantOffset->isZero()) {
216 AMDGPU::getImageDimIntrinsicByBaseOpcode(
217 OffsetMappingInfo->NoOffset, ImageDimIntr->
Dim);
219 II, II, NewImageDimIntr->
Intr, IC, [&](
auto &Args,
auto &ArgTys) {
220 Args.erase(Args.begin() + ImageDimIntr->OffsetIndex);
227 if (ST->hasD16Images()) {
230 AMDGPU::getMIMGBaseOpcodeInfo(ImageDimIntr->
BaseOpcode);
240 if (
User->getOpcode() == Instruction::FPTrunc &&
244 [&](
auto &Args,
auto &ArgTys) {
247 ArgTys[0] = User->getType();
255 if (!ST->hasA16() && !ST->hasG16())
261 AMDGPU::getMIMGBaseOpcodeInfo(ImageDimIntr->
BaseOpcode)->Sampler;
262 bool FloatCoord =
false;
264 bool OnlyDerivatives =
false;
267 OperandIndex < ImageDimIntr->VAddrEnd; OperandIndex++) {
271 if (OperandIndex < ImageDimIntr->CoordStart ||
276 OnlyDerivatives =
true;
285 if (!OnlyDerivatives && !ST->hasA16())
286 OnlyDerivatives =
true;
289 if (!OnlyDerivatives && ImageDimIntr->
NumBiasArgs != 0) {
292 "Only image instructions with a sampler can have a bias");
294 OnlyDerivatives =
true;
297 if (OnlyDerivatives && (!ST->hasG16() || ImageDimIntr->
GradientStart ==
306 ArgTys[ImageDimIntr->GradientTyArg] = CoordType;
307 if (!OnlyDerivatives) {
308 ArgTys[ImageDimIntr->CoordTyArg] = CoordType;
311 if (ImageDimIntr->NumBiasArgs != 0)
312 ArgTys[ImageDimIntr->BiasTyArg] = Type::getHalfTy(II.getContext());
318 OperandIndex < EndIndex; OperandIndex++) {
320 convertTo16Bit(*II.getOperand(OperandIndex), IC.Builder);
325 Value *Bias = II.getOperand(ImageDimIntr->BiasIndex);
326 Args[ImageDimIntr->BiasIndex] = convertTo16Bit(*Bias, IC.Builder);
352std::optional<Instruction *>
356 case Intrinsic::amdgcn_rcp: {
360 if (isa<UndefValue>(Src)) {
369 if (
const ConstantFP *
C = dyn_cast<ConstantFP>(Src)) {
370 const APFloat &ArgVal =
C->getValueAPF();
383 case Intrinsic::amdgcn_sqrt:
384 case Intrinsic::amdgcn_rsq: {
388 if (isa<UndefValue>(Src)) {
396 case Intrinsic::amdgcn_frexp_mant:
397 case Intrinsic::amdgcn_frexp_exp: {
399 if (
const ConstantFP *
C = dyn_cast<ConstantFP>(Src)) {
404 if (IID == Intrinsic::amdgcn_frexp_mant) {
416 if (isa<UndefValue>(Src)) {
422 case Intrinsic::amdgcn_class: {
425 const ConstantInt *CMask = dyn_cast<ConstantInt>(Src1);
427 if (isa<UndefValue>(Src0)) {
431 if (isa<UndefValue>(Src1)) {
471 const ConstantFP *CVal = dyn_cast<ConstantFP>(Src0);
473 if (isa<UndefValue>(Src0)) {
481 {Src0, ConstantInt::get(Src1->getType(), Mask & fcAllFlags)});
506 case Intrinsic::amdgcn_cvt_pkrtz: {
509 if (
const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
510 if (
const ConstantFP *C1 = dyn_cast<ConstantFP>(Src1)) {
514 APFloat Val0 = C0->getValueAPF();
515 APFloat Val1 = C1->getValueAPF();
526 if (isa<UndefValue>(Src0) && isa<UndefValue>(Src1)) {
532 case Intrinsic::amdgcn_cvt_pknorm_i16:
533 case Intrinsic::amdgcn_cvt_pknorm_u16:
534 case Intrinsic::amdgcn_cvt_pk_i16:
535 case Intrinsic::amdgcn_cvt_pk_u16: {
539 if (isa<UndefValue>(Src0) && isa<UndefValue>(Src1)) {
545 case Intrinsic::amdgcn_ubfe:
546 case Intrinsic::amdgcn_sbfe: {
549 if (isa<UndefValue>(Src)) {
560 if ((Width & (IntSize - 1)) == 0) {
565 if (Width >= IntSize) {
582 bool Signed = IID == Intrinsic::amdgcn_sbfe;
584 if (!CWidth || !COffset)
594 if (
Offset + Width < IntSize) {
598 RightShift->takeName(&II);
605 RightShift->takeName(&II);
608 case Intrinsic::amdgcn_exp:
609 case Intrinsic::amdgcn_exp_row:
610 case Intrinsic::amdgcn_exp_compr: {
616 bool IsCompr = IID == Intrinsic::amdgcn_exp_compr;
617 bool Changed =
false;
618 for (
int I = 0;
I < (IsCompr ? 2 : 4); ++
I) {
619 if ((!IsCompr && (EnBits & (1 <<
I)) == 0) ||
620 (IsCompr && ((EnBits & (0x3 << (2 *
I))) == 0))) {
622 if (!isa<UndefValue>(Src)) {
635 case Intrinsic::amdgcn_fmed3: {
665 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
670 if (isa<Constant>(Src1) && !isa<Constant>(Src2)) {
675 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
687 if (
const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
688 if (
const ConstantFP *C1 = dyn_cast<ConstantFP>(Src1)) {
689 if (
const ConstantFP *C2 = dyn_cast<ConstantFP>(Src2)) {
700 case Intrinsic::amdgcn_icmp:
701 case Intrinsic::amdgcn_fcmp: {
704 int64_t CCVal =
CC->getZExtValue();
705 bool IsInteger = IID == Intrinsic::amdgcn_icmp;
715 if (
auto *CSrc0 = dyn_cast<Constant>(Src0)) {
716 if (
auto *CSrc1 = dyn_cast<Constant>(Src1)) {
734 NewCall->
addFnAttr(Attribute::Convergent);
792 ? Intrinsic::amdgcn_fcmp
793 : Intrinsic::amdgcn_icmp;
796 if (
auto *CmpType = dyn_cast<IntegerType>(Ty)) {
798 unsigned Width = CmpType->getBitWidth();
799 unsigned NewWidth = Width;
807 else if (Width <= 32)
809 else if (Width <= 64)
814 if (Width != NewWidth) {
828 II.
getModule(), NewIID, {II.getType(), SrcLHS->getType()});
829 Value *Args[] = {SrcLHS, SrcRHS,
838 case Intrinsic::amdgcn_ballot: {
839 if (
auto *Src = dyn_cast<ConstantInt>(II.
getArgOperand(0))) {
859 NewCall->
addFnAttr(Attribute::Convergent);
866 case Intrinsic::amdgcn_wqm_vote: {
873 case Intrinsic::amdgcn_kill: {
875 if (!
C || !
C->getZExtValue())
881 case Intrinsic::amdgcn_update_dpp: {
887 if (BC->isZeroValue() || RM->getZExtValue() != 0xF ||
888 BM->getZExtValue() != 0xF || isa<UndefValue>(Old))
894 case Intrinsic::amdgcn_permlane16:
895 case Intrinsic::amdgcn_permlanex16: {
898 if (isa<UndefValue>(VDstIn))
908 case Intrinsic::amdgcn_permlane64:
914 case Intrinsic::amdgcn_readfirstlane:
915 case Intrinsic::amdgcn_readlane: {
931 PatternMatch::m_Intrinsic<Intrinsic::amdgcn_readfirstlane>())) {
935 if (IID == Intrinsic::amdgcn_readfirstlane) {
937 if (
match(Src, PatternMatch::m_Intrinsic<Intrinsic::amdgcn_readlane>())) {
942 if (
match(Src, PatternMatch::m_Intrinsic<Intrinsic::amdgcn_readlane>(
951 case Intrinsic::amdgcn_ldexp: {
959 if (isa<UndefValue>(Op0)) {
975 if (
C && (
C->isZero() ||
C->isInfinity())) {
995 case Intrinsic::amdgcn_fmul_legacy: {
1010 FMul->takeName(&II);
1015 case Intrinsic::amdgcn_fma_legacy: {
1029 FAdd->takeName(&II);
1042 case Intrinsic::amdgcn_is_shared:
1043 case Intrinsic::amdgcn_is_private: {
1058 return std::nullopt;
1068 int DMaskIdx = -1) {
1070 auto *IIVTy = cast<FixedVectorType>(II.
getType());
1071 unsigned VWidth = IIVTy->getNumElements();
1074 Type *EltTy = IIVTy->getElementType();
1086 const unsigned UnusedComponentsAtFront = DemandedElts.
countr_zero();
1091 DemandedElts = (1 << ActiveBits) - 1;
1093 if (UnusedComponentsAtFront > 0) {
1094 static const unsigned InvalidOffsetIdx = 0xf;
1098 case Intrinsic::amdgcn_raw_buffer_load:
1101 case Intrinsic::amdgcn_s_buffer_load:
1105 if (ActiveBits == 4 && UnusedComponentsAtFront == 1)
1106 OffsetIdx = InvalidOffsetIdx;
1110 case Intrinsic::amdgcn_struct_buffer_load:
1115 OffsetIdx = InvalidOffsetIdx;
1119 if (OffsetIdx != InvalidOffsetIdx) {
1121 DemandedElts &= ~((1 << UnusedComponentsAtFront) - 1);
1122 auto *
Offset = Args[OffsetIdx];
1123 unsigned SingleComponentSizeInBits =
1125 unsigned OffsetAdd =
1126 UnusedComponentsAtFront * SingleComponentSizeInBits / 8;
1134 ConstantInt *DMask = cast<ConstantInt>(Args[DMaskIdx]);
1140 unsigned NewDMaskVal = 0;
1141 unsigned OrigLoadIdx = 0;
1142 for (
unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) {
1143 const unsigned Bit = 1 << SrcIdx;
1144 if (!!(DMaskVal & Bit)) {
1145 if (!!DemandedElts[OrigLoadIdx])
1151 if (DMaskVal != NewDMaskVal)
1155 unsigned NewNumElts = DemandedElts.
popcount();
1159 if (NewNumElts >= VWidth && DemandedElts.
isMask()) {
1173 OverloadTys[0] = NewTy;
1181 if (NewNumElts == 1) {
1187 unsigned NewLoadIdx = 0;
1188 for (
unsigned OrigLoadIdx = 0; OrigLoadIdx < VWidth; ++OrigLoadIdx) {
1189 if (!!DemandedElts[OrigLoadIdx])
1204 SimplifyAndSetOp)
const {
1206 case Intrinsic::amdgcn_buffer_load:
1207 case Intrinsic::amdgcn_buffer_load_format:
1208 case Intrinsic::amdgcn_raw_buffer_load:
1209 case Intrinsic::amdgcn_raw_buffer_load_format:
1210 case Intrinsic::amdgcn_raw_tbuffer_load:
1211 case Intrinsic::amdgcn_s_buffer_load:
1212 case Intrinsic::amdgcn_struct_buffer_load:
1213 case Intrinsic::amdgcn_struct_buffer_load_format:
1214 case Intrinsic::amdgcn_struct_tbuffer_load:
1215 case Intrinsic::amdgcn_tbuffer_load:
1224 return std::nullopt;
static Value * simplifyAMDGCNMemoryIntrinsicDemanded(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, int DMaskIdx=-1)
Implement SimplifyDemandedVectorElts for amdgcn buffer and image intrinsics.
static Value * convertTo16Bit(Value &V, InstCombiner::BuilderTy &Builder)
static std::optional< Instruction * > modifyIntrinsicCall(IntrinsicInst &OldIntr, Instruction &InstToReplace, unsigned NewIntr, InstCombiner &IC, std::function< void(SmallVectorImpl< Value * > &, SmallVectorImpl< Type * > &)> Func)
Applies Func(OldIntr.Args, OldIntr.ArgTys), creates intrinsic call with modified arguments (based on ...
static APFloat fmed3AMDGCN(const APFloat &Src0, const APFloat &Src1, const APFloat &Src2)
static std::optional< Instruction * > simplifyAMDGCNImageIntrinsic(const GCNSubtarget *ST, const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr, IntrinsicInst &II, InstCombiner &IC)
static bool canSafelyConvertTo16Bit(Value &V, bool IsFloat)
Contains the definition of a TargetInstrInfo class that is common to all AMD GPUs.
Utilities for dealing with flags related to floating point properties and mode controls.
AMD GCN specific subclass of TargetSubtarget.
This file provides the interface for the instcombine pass implementation.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static APFloat getQNaN(const fltSemantics &Sem, bool Negative=false, const APInt *payload=nullptr)
Factory for QNaN values.
opStatus divide(const APFloat &RHS, roundingMode RM)
opStatus convert(const fltSemantics &ToSemantics, roundingMode RM, bool *losesInfo)
const fltSemantics & getSemantics() const
cmpResult compare(const APFloat &RHS) const
Class for arbitrary precision integers.
unsigned popcount() const
Count the number of bits set.
unsigned getActiveBits() const
Compute the number of active bits in the value.
unsigned countr_zero() const
Count the number of trailing zero bits.
bool isMask(unsigned numBits) const
void addFnAttr(Attribute::AttrKind Kind)
Adds the attribute to the function.
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
bool isStrictFP() const
Determine if the call requires strict floating point semantics.
Value * getArgOperand(unsigned i) const
void setArgOperand(unsigned i, Value *v)
iterator_range< User::op_iterator > args()
Iteration adapter for range-for loops.
void setCalledOperand(Value *V)
This class represents a function call, abstracting a target machine's calling convention.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Predicate getSwappedPredicate() const
For example, EQ->EQ, SLE->SGE, ULT->UGT, OEQ->OEQ, ULE->UGE, OLT->OGT, etc.
bool isFPPredicate() const
Predicate getInversePredicate() const
For example, EQ -> NE, UGT -> ULE, SLT -> SGE, OEQ -> UNE, UGT -> OLE, OLT -> UGE,...
static Constant * getSExt(Constant *C, Type *Ty, bool OnlyIfReduced=false)
static Constant * getCompare(unsigned short pred, Constant *C1, Constant *C2, bool OnlyIfReduced=false)
Return an ICmp or FCmp comparison operator constant expression.
ConstantFP - Floating Point Values [float, double].
const APFloat & getValueAPF() const
static Constant * get(Type *Ty, double V)
This returns a ConstantFP, or a vector containing a splat of a ConstantFP, for the specified value in...
This is the shared class of boolean and integer constants.
IntegerType * getType() const
getType - Specialize the getType() method to always return an IntegerType, which reduces the amount o...
static Constant * get(Type *Ty, uint64_t V, bool IsSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
static ConstantInt * getFalse(LLVMContext &Context)
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
static Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
TypeSize getTypeSizeInBits(Type *Ty) const
Size examples:
static FixedVectorType * get(Type *ElementType, unsigned NumElts)
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
bool canSimplifyLegacyMulToMul(const Value *Op0, const Value *Op1, InstCombiner &IC) const
Value * CreateFAddFMF(Value *L, Value *R, Instruction *FMFSource, const Twine &Name="")
Copy fast-math-flags from an instruction rather than using the builder's default FMF.
CallInst * CreateMinNum(Value *LHS, Value *RHS, const Twine &Name="")
Create call to the minnum intrinsic.
Value * CreateInsertElement(Type *VecTy, Value *NewElt, Value *Idx, const Twine &Name="")
Value * CreateFMulFMF(Value *L, Value *R, Instruction *FMFSource, const Twine &Name="")
Copy fast-math-flags from an instruction rather than using the builder's default FMF.
IntegerType * getIntNTy(unsigned N)
Fetch the type representing an N-bit integer.
Value * CreateSExt(Value *V, Type *DestTy, const Twine &Name="")
Value * CreateLShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Value * CreateZExt(Value *V, Type *DestTy, const Twine &Name="")
CallInst * CreateMaxNum(Value *LHS, Value *RHS, const Twine &Name="")
Create call to the maxnum intrinsic.
Value * CreateShl(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Value * CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name="")
LLVMContext & getContext() const
Value * CreateFCmpOEQ(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
Value * CreateAdd(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Value * CreateFCmpUNO(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
CallInst * CreateCall(FunctionType *FTy, Value *Callee, ArrayRef< Value * > Args=std::nullopt, const Twine &Name="", MDNode *FPMathTag=nullptr)
Value * CreateAShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
The core instruction combiner logic.
const DataLayout & getDataLayout() const
virtual Instruction * eraseInstFromFunction(Instruction &I)=0
Combiner aware instruction erasure.
TargetLibraryInfo & getTargetLibraryInfo() const
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
void copyFastMathFlags(FastMathFlags FMF)
Convenience function for transferring all fast-math flag values to this instruction,...
const Module * getModule() const
Return the module owning the function this instruction belongs to or nullptr it the function does not...
const BasicBlock * getParent() const
Instruction * user_back()
Specialize the methods defined in Value, as we know that an instruction can only be used by other ins...
void copyMetadata(const Instruction &SrcInst, ArrayRef< unsigned > WL=ArrayRef< unsigned >())
Copy metadata from SrcInst to this instruction.
Class to represent integer types.
A wrapper class for inspecting calls to intrinsic functions.
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static MDString * get(LLVMContext &Context, StringRef Str)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static Type * getHalfTy(LLVMContext &C)
unsigned getIntegerBitWidth() const
const fltSemantics & getFltSemantics() const
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
static IntegerType * getInt16Ty(LLVMContext &C)
bool isHalfTy() const
Return true if this is 'half', a 16-bit IEEE fp type.
bool isDoubleTy() const
Return true if this is 'double', a 64-bit IEEE fp type.
bool isFloatingPointTy() const
Return true if this is one of the floating-point types.
bool isIntegerTy() const
True if this is an instance of IntegerType.
bool isVoidTy() const
Return true if this is 'void'.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
static UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
LLVMContext & getContext() const
All values hold a context through their type.
void takeName(Value *V)
Transfer the name from V to this value.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const ImageDimIntrinsicInfo * getImageDimIntrinsicInfo(unsigned Intr)
@ C
The default llvm calling convention, compatible with C.
bool getIntrinsicSignature(Function *F, SmallVectorImpl< Type * > &ArgTys)
Gets the type arguments of an intrinsic call by matching type contraints specified by the ....
Function * getDeclaration(Module *M, ID id, ArrayRef< Type * > Tys=std::nullopt)
Create or insert an LLVM Function declaration for an intrinsic, and return it.
cst_pred_ty< is_all_ones > m_AllOnes()
Match an integer or vector with all bits set.
CastClass_match< OpTy, Instruction::SExt > m_SExt(const OpTy &Op)
Matches SExt.
CastClass_match< OpTy, Instruction::ZExt > m_ZExt(const OpTy &Op)
Matches ZExt.
bool match(Val *V, const Pattern &P)
cstfp_pred_ty< is_any_zero_fp > m_AnyZeroFP()
Match a floating-point negative zero or positive zero.
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
cst_pred_ty< is_one > m_One()
Match an integer 1 or a vector with all elements equal to 1.
cst_pred_ty< is_zero_int > m_ZeroInt()
Match an integer 0 or a vector with all elements equal to 0.
class_match< CmpInst > m_Cmp()
Matches any compare instruction and ignore it.
match_combine_or< CastClass_match< OpTy, Instruction::ZExt >, CastClass_match< OpTy, Instruction::SExt > > m_ZExtOrSExt(const OpTy &Op)
CastClass_match< OpTy, Instruction::FPExt > m_FPExt(const OpTy &Op)
cstfp_pred_ty< is_finitenonzero > m_FiniteNonZero()
Match a finite non-zero FP constant.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
apfloat_match m_APFloat(const APFloat *&Res)
Match a ConstantFP or splatted ConstantVector, binding the specified pointer to the contained APFloat...
cstfp_pred_ty< is_nan > m_NaN()
Match an arbitrary NaN constant.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
This is an optimization pass for GlobalISel generic memory operations.
int popcount(T Value) noexcept
Count the number of set bits in a value.
bool isKnownNeverNaN(const Value *V, const TargetLibraryInfo *TLI, unsigned Depth=0)
Return true if the floating-point scalar value is not a NaN or if the floating-point vector value has...
APFloat frexp(const APFloat &X, int &Exp, APFloat::roundingMode RM)
Equivalent of C standard library function.
LLVM_READONLY APFloat maxnum(const APFloat &A, const APFloat &B)
Implements IEEE maxNum semantics.
bool isKnownNeverInfinity(const Value *V, const TargetLibraryInfo *TLI, unsigned Depth=0)
Return true if the floating-point scalar value is not an infinity or if the floating-point vector val...
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
cmpResult
IEEE-754R 5.11: Floating Point Comparison Relations.
static constexpr roundingMode rmNearestTiesToEven
static constexpr roundingMode rmTowardZero