LLVM 18.0.0git
VectorUtils.cpp
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1//===----------- VectorUtils.cpp - Vectorizer utility functions -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines vectorizer utilities.
10//
11//===----------------------------------------------------------------------===//
12
22#include "llvm/IR/Constants.h"
23#include "llvm/IR/IRBuilder.h"
25#include "llvm/IR/Value.h"
27
28#define DEBUG_TYPE "vectorutils"
29
30using namespace llvm;
31using namespace llvm::PatternMatch;
32
33/// Maximum factor for an interleaved memory access.
35 "max-interleave-group-factor", cl::Hidden,
36 cl::desc("Maximum factor for an interleaved access group (default = 8)"),
37 cl::init(8));
38
39/// Return true if all of the intrinsic's arguments and return type are scalars
40/// for the scalar form of the intrinsic, and vectors for the vector form of the
41/// intrinsic (except operands that are marked as always being scalar by
42/// isVectorIntrinsicWithScalarOpAtArg).
44 switch (ID) {
45 case Intrinsic::abs: // Begin integer bit-manipulation.
46 case Intrinsic::bswap:
47 case Intrinsic::bitreverse:
48 case Intrinsic::ctpop:
49 case Intrinsic::ctlz:
50 case Intrinsic::cttz:
51 case Intrinsic::fshl:
52 case Intrinsic::fshr:
53 case Intrinsic::smax:
54 case Intrinsic::smin:
55 case Intrinsic::umax:
56 case Intrinsic::umin:
57 case Intrinsic::sadd_sat:
58 case Intrinsic::ssub_sat:
59 case Intrinsic::uadd_sat:
60 case Intrinsic::usub_sat:
61 case Intrinsic::smul_fix:
62 case Intrinsic::smul_fix_sat:
63 case Intrinsic::umul_fix:
64 case Intrinsic::umul_fix_sat:
65 case Intrinsic::sqrt: // Begin floating-point.
66 case Intrinsic::sin:
67 case Intrinsic::cos:
68 case Intrinsic::exp:
69 case Intrinsic::exp2:
70 case Intrinsic::log:
71 case Intrinsic::log10:
72 case Intrinsic::log2:
73 case Intrinsic::fabs:
74 case Intrinsic::minnum:
75 case Intrinsic::maxnum:
76 case Intrinsic::minimum:
77 case Intrinsic::maximum:
78 case Intrinsic::copysign:
79 case Intrinsic::floor:
80 case Intrinsic::ceil:
81 case Intrinsic::trunc:
82 case Intrinsic::rint:
83 case Intrinsic::nearbyint:
84 case Intrinsic::round:
85 case Intrinsic::roundeven:
86 case Intrinsic::pow:
87 case Intrinsic::fma:
88 case Intrinsic::fmuladd:
89 case Intrinsic::is_fpclass:
90 case Intrinsic::powi:
91 case Intrinsic::canonicalize:
92 case Intrinsic::fptosi_sat:
93 case Intrinsic::fptoui_sat:
94 case Intrinsic::lrint:
95 case Intrinsic::llrint:
96 return true;
97 default:
98 return false;
99 }
100}
101
102/// Identifies if the vector form of the intrinsic has a scalar operand.
104 unsigned ScalarOpdIdx) {
105 switch (ID) {
106 case Intrinsic::abs:
107 case Intrinsic::ctlz:
108 case Intrinsic::cttz:
109 case Intrinsic::is_fpclass:
110 case Intrinsic::powi:
111 return (ScalarOpdIdx == 1);
112 case Intrinsic::smul_fix:
113 case Intrinsic::smul_fix_sat:
114 case Intrinsic::umul_fix:
115 case Intrinsic::umul_fix_sat:
116 return (ScalarOpdIdx == 2);
117 default:
118 return false;
119 }
120}
121
123 int OpdIdx) {
124 switch (ID) {
125 case Intrinsic::fptosi_sat:
126 case Intrinsic::fptoui_sat:
127 case Intrinsic::lrint:
128 case Intrinsic::llrint:
129 return OpdIdx == -1 || OpdIdx == 0;
130 case Intrinsic::is_fpclass:
131 return OpdIdx == 0;
132 case Intrinsic::powi:
133 return OpdIdx == -1 || OpdIdx == 1;
134 default:
135 return OpdIdx == -1;
136 }
137}
138
139/// Returns intrinsic ID for call.
140/// For the input call instruction it finds mapping intrinsic and returns
141/// its ID, in case it does not found it return not_intrinsic.
143 const TargetLibraryInfo *TLI) {
147
148 if (isTriviallyVectorizable(ID) || ID == Intrinsic::lifetime_start ||
149 ID == Intrinsic::lifetime_end || ID == Intrinsic::assume ||
150 ID == Intrinsic::experimental_noalias_scope_decl ||
151 ID == Intrinsic::sideeffect || ID == Intrinsic::pseudoprobe)
152 return ID;
154}
155
156/// Given a vector and an element number, see if the scalar value is
157/// already around as a register, for example if it were inserted then extracted
158/// from the vector.
159Value *llvm::findScalarElement(Value *V, unsigned EltNo) {
160 assert(V->getType()->isVectorTy() && "Not looking at a vector?");
161 VectorType *VTy = cast<VectorType>(V->getType());
162 // For fixed-length vector, return undef for out of range access.
163 if (auto *FVTy = dyn_cast<FixedVectorType>(VTy)) {
164 unsigned Width = FVTy->getNumElements();
165 if (EltNo >= Width)
166 return UndefValue::get(FVTy->getElementType());
167 }
168
169 if (Constant *C = dyn_cast<Constant>(V))
170 return C->getAggregateElement(EltNo);
171
172 if (InsertElementInst *III = dyn_cast<InsertElementInst>(V)) {
173 // If this is an insert to a variable element, we don't know what it is.
174 if (!isa<ConstantInt>(III->getOperand(2)))
175 return nullptr;
176 unsigned IIElt = cast<ConstantInt>(III->getOperand(2))->getZExtValue();
177
178 // If this is an insert to the element we are looking for, return the
179 // inserted value.
180 if (EltNo == IIElt)
181 return III->getOperand(1);
182
183 // Guard against infinite loop on malformed, unreachable IR.
184 if (III == III->getOperand(0))
185 return nullptr;
186
187 // Otherwise, the insertelement doesn't modify the value, recurse on its
188 // vector input.
189 return findScalarElement(III->getOperand(0), EltNo);
190 }
191
192 ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(V);
193 // Restrict the following transformation to fixed-length vector.
194 if (SVI && isa<FixedVectorType>(SVI->getType())) {
195 unsigned LHSWidth =
196 cast<FixedVectorType>(SVI->getOperand(0)->getType())->getNumElements();
197 int InEl = SVI->getMaskValue(EltNo);
198 if (InEl < 0)
199 return UndefValue::get(VTy->getElementType());
200 if (InEl < (int)LHSWidth)
201 return findScalarElement(SVI->getOperand(0), InEl);
202 return findScalarElement(SVI->getOperand(1), InEl - LHSWidth);
203 }
204
205 // Extract a value from a vector add operation with a constant zero.
206 // TODO: Use getBinOpIdentity() to generalize this.
207 Value *Val; Constant *C;
208 if (match(V, m_Add(m_Value(Val), m_Constant(C))))
209 if (Constant *Elt = C->getAggregateElement(EltNo))
210 if (Elt->isNullValue())
211 return findScalarElement(Val, EltNo);
212
213 // If the vector is a splat then we can trivially find the scalar element.
214 if (isa<ScalableVectorType>(VTy))
215 if (Value *Splat = getSplatValue(V))
216 if (EltNo < VTy->getElementCount().getKnownMinValue())
217 return Splat;
218
219 // Otherwise, we don't know.
220 return nullptr;
221}
222
224 int SplatIndex = -1;
225 for (int M : Mask) {
226 // Ignore invalid (undefined) mask elements.
227 if (M < 0)
228 continue;
229
230 // There can be only 1 non-negative mask element value if this is a splat.
231 if (SplatIndex != -1 && SplatIndex != M)
232 return -1;
233
234 // Initialize the splat index to the 1st non-negative mask element.
235 SplatIndex = M;
236 }
237 assert((SplatIndex == -1 || SplatIndex >= 0) && "Negative index?");
238 return SplatIndex;
239}
240
241/// Get splat value if the input is a splat vector or return nullptr.
242/// This function is not fully general. It checks only 2 cases:
243/// the input value is (1) a splat constant vector or (2) a sequence
244/// of instructions that broadcasts a scalar at element 0.
246 if (isa<VectorType>(V->getType()))
247 if (auto *C = dyn_cast<Constant>(V))
248 return C->getSplatValue();
249
250 // shuf (inselt ?, Splat, 0), ?, <0, undef, 0, ...>
251 Value *Splat;
252 if (match(V,
254 m_Value(), m_ZeroMask())))
255 return Splat;
256
257 return nullptr;
258}
259
260bool llvm::isSplatValue(const Value *V, int Index, unsigned Depth) {
261 assert(Depth <= MaxAnalysisRecursionDepth && "Limit Search Depth");
262
263 if (isa<VectorType>(V->getType())) {
264 if (isa<UndefValue>(V))
265 return true;
266 // FIXME: We can allow undefs, but if Index was specified, we may want to
267 // check that the constant is defined at that index.
268 if (auto *C = dyn_cast<Constant>(V))
269 return C->getSplatValue() != nullptr;
270 }
271
272 if (auto *Shuf = dyn_cast<ShuffleVectorInst>(V)) {
273 // FIXME: We can safely allow undefs here. If Index was specified, we will
274 // check that the mask elt is defined at the required index.
275 if (!all_equal(Shuf->getShuffleMask()))
276 return false;
277
278 // Match any index.
279 if (Index == -1)
280 return true;
281
282 // Match a specific element. The mask should be defined at and match the
283 // specified index.
284 return Shuf->getMaskValue(Index) == Index;
285 }
286
287 // The remaining tests are all recursive, so bail out if we hit the limit.
289 return false;
290
291 // If both operands of a binop are splats, the result is a splat.
292 Value *X, *Y, *Z;
293 if (match(V, m_BinOp(m_Value(X), m_Value(Y))))
295
296 // If all operands of a select are splats, the result is a splat.
297 if (match(V, m_Select(m_Value(X), m_Value(Y), m_Value(Z))))
298 return isSplatValue(X, Index, Depth) && isSplatValue(Y, Index, Depth) &&
300
301 // TODO: Add support for unary ops (fneg), casts, intrinsics (overflow ops).
302
303 return false;
304}
305
307 const APInt &DemandedElts, APInt &DemandedLHS,
308 APInt &DemandedRHS, bool AllowUndefElts) {
309 DemandedLHS = DemandedRHS = APInt::getZero(SrcWidth);
310
311 // Early out if we don't demand any elements.
312 if (DemandedElts.isZero())
313 return true;
314
315 // Simple case of a shuffle with zeroinitializer.
316 if (all_of(Mask, [](int Elt) { return Elt == 0; })) {
317 DemandedLHS.setBit(0);
318 return true;
319 }
320
321 for (unsigned I = 0, E = Mask.size(); I != E; ++I) {
322 int M = Mask[I];
323 assert((-1 <= M) && (M < (SrcWidth * 2)) &&
324 "Invalid shuffle mask constant");
325
326 if (!DemandedElts[I] || (AllowUndefElts && (M < 0)))
327 continue;
328
329 // For undef elements, we don't know anything about the common state of
330 // the shuffle result.
331 if (M < 0)
332 return false;
333
334 if (M < SrcWidth)
335 DemandedLHS.setBit(M);
336 else
337 DemandedRHS.setBit(M - SrcWidth);
338 }
339
340 return true;
341}
342
344 SmallVectorImpl<int> &ScaledMask) {
345 assert(Scale > 0 && "Unexpected scaling factor");
346
347 // Fast-path: if no scaling, then it is just a copy.
348 if (Scale == 1) {
349 ScaledMask.assign(Mask.begin(), Mask.end());
350 return;
351 }
352
353 ScaledMask.clear();
354 for (int MaskElt : Mask) {
355 if (MaskElt >= 0) {
356 assert(((uint64_t)Scale * MaskElt + (Scale - 1)) <= INT32_MAX &&
357 "Overflowed 32-bits");
358 }
359 for (int SliceElt = 0; SliceElt != Scale; ++SliceElt)
360 ScaledMask.push_back(MaskElt < 0 ? MaskElt : Scale * MaskElt + SliceElt);
361 }
362}
363
365 SmallVectorImpl<int> &ScaledMask) {
366 assert(Scale > 0 && "Unexpected scaling factor");
367
368 // Fast-path: if no scaling, then it is just a copy.
369 if (Scale == 1) {
370 ScaledMask.assign(Mask.begin(), Mask.end());
371 return true;
372 }
373
374 // We must map the original elements down evenly to a type with less elements.
375 int NumElts = Mask.size();
376 if (NumElts % Scale != 0)
377 return false;
378
379 ScaledMask.clear();
380 ScaledMask.reserve(NumElts / Scale);
381
382 // Step through the input mask by splitting into Scale-sized slices.
383 do {
384 ArrayRef<int> MaskSlice = Mask.take_front(Scale);
385 assert((int)MaskSlice.size() == Scale && "Expected Scale-sized slice.");
386
387 // The first element of the slice determines how we evaluate this slice.
388 int SliceFront = MaskSlice.front();
389 if (SliceFront < 0) {
390 // Negative values (undef or other "sentinel" values) must be equal across
391 // the entire slice.
392 if (!all_equal(MaskSlice))
393 return false;
394 ScaledMask.push_back(SliceFront);
395 } else {
396 // A positive mask element must be cleanly divisible.
397 if (SliceFront % Scale != 0)
398 return false;
399 // Elements of the slice must be consecutive.
400 for (int i = 1; i < Scale; ++i)
401 if (MaskSlice[i] != SliceFront + i)
402 return false;
403 ScaledMask.push_back(SliceFront / Scale);
404 }
405 Mask = Mask.drop_front(Scale);
406 } while (!Mask.empty());
407
408 assert((int)ScaledMask.size() * Scale == NumElts && "Unexpected scaled mask");
409
410 // All elements of the original mask can be scaled down to map to the elements
411 // of a mask with wider elements.
412 return true;
413}
414
416 SmallVectorImpl<int> &ScaledMask) {
417 std::array<SmallVector<int, 16>, 2> TmpMasks;
418 SmallVectorImpl<int> *Output = &TmpMasks[0], *Tmp = &TmpMasks[1];
419 ArrayRef<int> InputMask = Mask;
420 for (unsigned Scale = 2; Scale <= InputMask.size(); ++Scale) {
421 while (widenShuffleMaskElts(Scale, InputMask, *Output)) {
422 InputMask = *Output;
423 std::swap(Output, Tmp);
424 }
425 }
426 ScaledMask.assign(InputMask.begin(), InputMask.end());
427}
428
430 ArrayRef<int> Mask, unsigned NumOfSrcRegs, unsigned NumOfDestRegs,
431 unsigned NumOfUsedRegs, function_ref<void()> NoInputAction,
432 function_ref<void(ArrayRef<int>, unsigned, unsigned)> SingleInputAction,
433 function_ref<void(ArrayRef<int>, unsigned, unsigned)> ManyInputsAction) {
434 SmallVector<SmallVector<SmallVector<int>>> Res(NumOfDestRegs);
435 // Try to perform better estimation of the permutation.
436 // 1. Split the source/destination vectors into real registers.
437 // 2. Do the mask analysis to identify which real registers are
438 // permuted.
439 int Sz = Mask.size();
440 unsigned SzDest = Sz / NumOfDestRegs;
441 unsigned SzSrc = Sz / NumOfSrcRegs;
442 for (unsigned I = 0; I < NumOfDestRegs; ++I) {
443 auto &RegMasks = Res[I];
444 RegMasks.assign(NumOfSrcRegs, {});
445 // Check that the values in dest registers are in the one src
446 // register.
447 for (unsigned K = 0; K < SzDest; ++K) {
448 int Idx = I * SzDest + K;
449 if (Idx == Sz)
450 break;
451 if (Mask[Idx] >= Sz || Mask[Idx] == PoisonMaskElem)
452 continue;
453 int SrcRegIdx = Mask[Idx] / SzSrc;
454 // Add a cost of PermuteTwoSrc for each new source register permute,
455 // if we have more than one source registers.
456 if (RegMasks[SrcRegIdx].empty())
457 RegMasks[SrcRegIdx].assign(SzDest, PoisonMaskElem);
458 RegMasks[SrcRegIdx][K] = Mask[Idx] % SzSrc;
459 }
460 }
461 // Process split mask.
462 for (unsigned I = 0; I < NumOfUsedRegs; ++I) {
463 auto &Dest = Res[I];
464 int NumSrcRegs =
465 count_if(Dest, [](ArrayRef<int> Mask) { return !Mask.empty(); });
466 switch (NumSrcRegs) {
467 case 0:
468 // No input vectors were used!
469 NoInputAction();
470 break;
471 case 1: {
472 // Find the only mask with at least single undef mask elem.
473 auto *It =
474 find_if(Dest, [](ArrayRef<int> Mask) { return !Mask.empty(); });
475 unsigned SrcReg = std::distance(Dest.begin(), It);
476 SingleInputAction(*It, SrcReg, I);
477 break;
478 }
479 default: {
480 // The first mask is a permutation of a single register. Since we have >2
481 // input registers to shuffle, we merge the masks for 2 first registers
482 // and generate a shuffle of 2 registers rather than the reordering of the
483 // first register and then shuffle with the second register. Next,
484 // generate the shuffles of the resulting register + the remaining
485 // registers from the list.
486 auto &&CombineMasks = [](MutableArrayRef<int> FirstMask,
487 ArrayRef<int> SecondMask) {
488 for (int Idx = 0, VF = FirstMask.size(); Idx < VF; ++Idx) {
489 if (SecondMask[Idx] != PoisonMaskElem) {
490 assert(FirstMask[Idx] == PoisonMaskElem &&
491 "Expected undefined mask element.");
492 FirstMask[Idx] = SecondMask[Idx] + VF;
493 }
494 }
495 };
496 auto &&NormalizeMask = [](MutableArrayRef<int> Mask) {
497 for (int Idx = 0, VF = Mask.size(); Idx < VF; ++Idx) {
498 if (Mask[Idx] != PoisonMaskElem)
499 Mask[Idx] = Idx;
500 }
501 };
502 int SecondIdx;
503 do {
504 int FirstIdx = -1;
505 SecondIdx = -1;
506 MutableArrayRef<int> FirstMask, SecondMask;
507 for (unsigned I = 0; I < NumOfDestRegs; ++I) {
509 if (RegMask.empty())
510 continue;
511
512 if (FirstIdx == SecondIdx) {
513 FirstIdx = I;
514 FirstMask = RegMask;
515 continue;
516 }
517 SecondIdx = I;
518 SecondMask = RegMask;
519 CombineMasks(FirstMask, SecondMask);
520 ManyInputsAction(FirstMask, FirstIdx, SecondIdx);
521 NormalizeMask(FirstMask);
522 RegMask.clear();
523 SecondMask = FirstMask;
524 SecondIdx = FirstIdx;
525 }
526 if (FirstIdx != SecondIdx && SecondIdx >= 0) {
527 CombineMasks(SecondMask, FirstMask);
528 ManyInputsAction(SecondMask, SecondIdx, FirstIdx);
529 Dest[FirstIdx].clear();
530 NormalizeMask(SecondMask);
531 }
532 } while (SecondIdx >= 0);
533 break;
534 }
535 }
536 }
537}
538
541 const TargetTransformInfo *TTI) {
542
543 // DemandedBits will give us every value's live-out bits. But we want
544 // to ensure no extra casts would need to be inserted, so every DAG
545 // of connected values must have the same minimum bitwidth.
551 SmallPtrSet<Instruction *, 4> InstructionSet;
553
554 // Determine the roots. We work bottom-up, from truncs or icmps.
555 bool SeenExtFromIllegalType = false;
556 for (auto *BB : Blocks)
557 for (auto &I : *BB) {
558 InstructionSet.insert(&I);
559
560 if (TTI && (isa<ZExtInst>(&I) || isa<SExtInst>(&I)) &&
561 !TTI->isTypeLegal(I.getOperand(0)->getType()))
562 SeenExtFromIllegalType = true;
563
564 // Only deal with non-vector integers up to 64-bits wide.
565 if ((isa<TruncInst>(&I) || isa<ICmpInst>(&I)) &&
566 !I.getType()->isVectorTy() &&
567 I.getOperand(0)->getType()->getScalarSizeInBits() <= 64) {
568 // Don't make work for ourselves. If we know the loaded type is legal,
569 // don't add it to the worklist.
570 if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType()))
571 continue;
572
573 Worklist.push_back(&I);
574 Roots.insert(&I);
575 }
576 }
577 // Early exit.
578 if (Worklist.empty() || (TTI && !SeenExtFromIllegalType))
579 return MinBWs;
580
581 // Now proceed breadth-first, unioning values together.
582 while (!Worklist.empty()) {
583 Value *Val = Worklist.pop_back_val();
584 Value *Leader = ECs.getOrInsertLeaderValue(Val);
585
586 if (!Visited.insert(Val).second)
587 continue;
588
589 // Non-instructions terminate a chain successfully.
590 if (!isa<Instruction>(Val))
591 continue;
592 Instruction *I = cast<Instruction>(Val);
593
594 // If we encounter a type that is larger than 64 bits, we can't represent
595 // it so bail out.
596 if (DB.getDemandedBits(I).getBitWidth() > 64)
598
599 uint64_t V = DB.getDemandedBits(I).getZExtValue();
600 DBits[Leader] |= V;
601 DBits[I] = V;
602
603 // Casts, loads and instructions outside of our range terminate a chain
604 // successfully.
605 if (isa<SExtInst>(I) || isa<ZExtInst>(I) || isa<LoadInst>(I) ||
606 !InstructionSet.count(I))
607 continue;
608
609 // Unsafe casts terminate a chain unsuccessfully. We can't do anything
610 // useful with bitcasts, ptrtoints or inttoptrs and it'd be unsafe to
611 // transform anything that relies on them.
612 if (isa<BitCastInst>(I) || isa<PtrToIntInst>(I) || isa<IntToPtrInst>(I) ||
613 !I->getType()->isIntegerTy()) {
614 DBits[Leader] |= ~0ULL;
615 continue;
616 }
617
618 // We don't modify the types of PHIs. Reductions will already have been
619 // truncated if possible, and inductions' sizes will have been chosen by
620 // indvars.
621 if (isa<PHINode>(I))
622 continue;
623
624 if (DBits[Leader] == ~0ULL)
625 // All bits demanded, no point continuing.
626 continue;
627
628 for (Value *O : cast<User>(I)->operands()) {
629 ECs.unionSets(Leader, O);
630 Worklist.push_back(O);
631 }
632 }
633
634 // Now we've discovered all values, walk them to see if there are
635 // any users we didn't see. If there are, we can't optimize that
636 // chain.
637 for (auto &I : DBits)
638 for (auto *U : I.first->users())
639 if (U->getType()->isIntegerTy() && DBits.count(U) == 0)
640 DBits[ECs.getOrInsertLeaderValue(I.first)] |= ~0ULL;
641
642 for (auto I = ECs.begin(), E = ECs.end(); I != E; ++I) {
643 uint64_t LeaderDemandedBits = 0;
644 for (Value *M : llvm::make_range(ECs.member_begin(I), ECs.member_end()))
645 LeaderDemandedBits |= DBits[M];
646
647 uint64_t MinBW = llvm::bit_width(LeaderDemandedBits);
648 // Round up to a power of 2
649 MinBW = llvm::bit_ceil(MinBW);
650
651 // We don't modify the types of PHIs. Reductions will already have been
652 // truncated if possible, and inductions' sizes will have been chosen by
653 // indvars.
654 // If we are required to shrink a PHI, abandon this entire equivalence class.
655 bool Abort = false;
656 for (Value *M : llvm::make_range(ECs.member_begin(I), ECs.member_end()))
657 if (isa<PHINode>(M) && MinBW < M->getType()->getScalarSizeInBits()) {
658 Abort = true;
659 break;
660 }
661 if (Abort)
662 continue;
663
664 for (Value *M : llvm::make_range(ECs.member_begin(I), ECs.member_end())) {
665 auto *MI = dyn_cast<Instruction>(M);
666 if (!MI)
667 continue;
668 Type *Ty = M->getType();
669 if (Roots.count(M))
670 Ty = MI->getOperand(0)->getType();
671
672 if (MinBW >= Ty->getScalarSizeInBits())
673 continue;
674
675 // If any of M's operands demand more bits than MinBW then M cannot be
676 // performed safely in MinBW.
677 if (any_of(MI->operands(), [&DB, MinBW](Use &U) {
678 auto *CI = dyn_cast<ConstantInt>(U);
679 // For constants shift amounts, check if the shift would result in
680 // poison.
681 if (CI &&
682 isa<ShlOperator, LShrOperator, AShrOperator>(U.getUser()) &&
683 U.getOperandNo() == 1)
684 return CI->uge(MinBW);
685 uint64_t BW = bit_width(DB.getDemandedBits(&U).getZExtValue());
686 return bit_ceil(BW) > MinBW;
687 }))
688 continue;
689
690 MinBWs[MI] = MinBW;
691 }
692 }
693
694 return MinBWs;
695}
696
697/// Add all access groups in @p AccGroups to @p List.
698template <typename ListT>
699static void addToAccessGroupList(ListT &List, MDNode *AccGroups) {
700 // Interpret an access group as a list containing itself.
701 if (AccGroups->getNumOperands() == 0) {
702 assert(isValidAsAccessGroup(AccGroups) && "Node must be an access group");
703 List.insert(AccGroups);
704 return;
705 }
706
707 for (const auto &AccGroupListOp : AccGroups->operands()) {
708 auto *Item = cast<MDNode>(AccGroupListOp.get());
709 assert(isValidAsAccessGroup(Item) && "List item must be an access group");
710 List.insert(Item);
711 }
712}
713
714MDNode *llvm::uniteAccessGroups(MDNode *AccGroups1, MDNode *AccGroups2) {
715 if (!AccGroups1)
716 return AccGroups2;
717 if (!AccGroups2)
718 return AccGroups1;
719 if (AccGroups1 == AccGroups2)
720 return AccGroups1;
721
723 addToAccessGroupList(Union, AccGroups1);
724 addToAccessGroupList(Union, AccGroups2);
725
726 if (Union.size() == 0)
727 return nullptr;
728 if (Union.size() == 1)
729 return cast<MDNode>(Union.front());
730
731 LLVMContext &Ctx = AccGroups1->getContext();
732 return MDNode::get(Ctx, Union.getArrayRef());
733}
734
736 const Instruction *Inst2) {
737 bool MayAccessMem1 = Inst1->mayReadOrWriteMemory();
738 bool MayAccessMem2 = Inst2->mayReadOrWriteMemory();
739
740 if (!MayAccessMem1 && !MayAccessMem2)
741 return nullptr;
742 if (!MayAccessMem1)
743 return Inst2->getMetadata(LLVMContext::MD_access_group);
744 if (!MayAccessMem2)
745 return Inst1->getMetadata(LLVMContext::MD_access_group);
746
747 MDNode *MD1 = Inst1->getMetadata(LLVMContext::MD_access_group);
748 MDNode *MD2 = Inst2->getMetadata(LLVMContext::MD_access_group);
749 if (!MD1 || !MD2)
750 return nullptr;
751 if (MD1 == MD2)
752 return MD1;
753
754 // Use set for scalable 'contains' check.
755 SmallPtrSet<Metadata *, 4> AccGroupSet2;
756 addToAccessGroupList(AccGroupSet2, MD2);
757
758 SmallVector<Metadata *, 4> Intersection;
759 if (MD1->getNumOperands() == 0) {
760 assert(isValidAsAccessGroup(MD1) && "Node must be an access group");
761 if (AccGroupSet2.count(MD1))
762 Intersection.push_back(MD1);
763 } else {
764 for (const MDOperand &Node : MD1->operands()) {
765 auto *Item = cast<MDNode>(Node.get());
766 assert(isValidAsAccessGroup(Item) && "List item must be an access group");
767 if (AccGroupSet2.count(Item))
768 Intersection.push_back(Item);
769 }
770 }
771
772 if (Intersection.size() == 0)
773 return nullptr;
774 if (Intersection.size() == 1)
775 return cast<MDNode>(Intersection.front());
776
777 LLVMContext &Ctx = Inst1->getContext();
778 return MDNode::get(Ctx, Intersection);
779}
780
781/// \returns \p I after propagating metadata from \p VL.
783 if (VL.empty())
784 return Inst;
785 Instruction *I0 = cast<Instruction>(VL[0]);
788
789 for (auto Kind : {LLVMContext::MD_tbaa, LLVMContext::MD_alias_scope,
790 LLVMContext::MD_noalias, LLVMContext::MD_fpmath,
791 LLVMContext::MD_nontemporal, LLVMContext::MD_invariant_load,
792 LLVMContext::MD_access_group}) {
793 MDNode *MD = I0->getMetadata(Kind);
794
795 for (int J = 1, E = VL.size(); MD && J != E; ++J) {
796 const Instruction *IJ = cast<Instruction>(VL[J]);
797 MDNode *IMD = IJ->getMetadata(Kind);
798 switch (Kind) {
799 case LLVMContext::MD_tbaa:
800 MD = MDNode::getMostGenericTBAA(MD, IMD);
801 break;
802 case LLVMContext::MD_alias_scope:
804 break;
805 case LLVMContext::MD_fpmath:
806 MD = MDNode::getMostGenericFPMath(MD, IMD);
807 break;
808 case LLVMContext::MD_noalias:
809 case LLVMContext::MD_nontemporal:
810 case LLVMContext::MD_invariant_load:
811 MD = MDNode::intersect(MD, IMD);
812 break;
813 case LLVMContext::MD_access_group:
814 MD = intersectAccessGroups(Inst, IJ);
815 break;
816 default:
817 llvm_unreachable("unhandled metadata");
818 }
819 }
820
821 Inst->setMetadata(Kind, MD);
822 }
823
824 return Inst;
825}
826
827Constant *
829 const InterleaveGroup<Instruction> &Group) {
830 // All 1's means mask is not needed.
831 if (Group.getNumMembers() == Group.getFactor())
832 return nullptr;
833
834 // TODO: support reversed access.
835 assert(!Group.isReverse() && "Reversed group not supported.");
836
838 for (unsigned i = 0; i < VF; i++)
839 for (unsigned j = 0; j < Group.getFactor(); ++j) {
840 unsigned HasMember = Group.getMember(j) ? 1 : 0;
841 Mask.push_back(Builder.getInt1(HasMember));
842 }
843
844 return ConstantVector::get(Mask);
845}
846
848llvm::createReplicatedMask(unsigned ReplicationFactor, unsigned VF) {
849 SmallVector<int, 16> MaskVec;
850 for (unsigned i = 0; i < VF; i++)
851 for (unsigned j = 0; j < ReplicationFactor; j++)
852 MaskVec.push_back(i);
853
854 return MaskVec;
855}
856
858 unsigned NumVecs) {
860 for (unsigned i = 0; i < VF; i++)
861 for (unsigned j = 0; j < NumVecs; j++)
862 Mask.push_back(j * VF + i);
863
864 return Mask;
865}
866
868llvm::createStrideMask(unsigned Start, unsigned Stride, unsigned VF) {
870 for (unsigned i = 0; i < VF; i++)
871 Mask.push_back(Start + i * Stride);
872
873 return Mask;
874}
875
877 unsigned NumInts,
878 unsigned NumUndefs) {
880 for (unsigned i = 0; i < NumInts; i++)
881 Mask.push_back(Start + i);
882
883 for (unsigned i = 0; i < NumUndefs; i++)
884 Mask.push_back(-1);
885
886 return Mask;
887}
888
890 unsigned NumElts) {
891 // Avoid casts in the loop and make sure we have a reasonable number.
892 int NumEltsSigned = NumElts;
893 assert(NumEltsSigned > 0 && "Expected smaller or non-zero element count");
894
895 // If the mask chooses an element from operand 1, reduce it to choose from the
896 // corresponding element of operand 0. Undef mask elements are unchanged.
897 SmallVector<int, 16> UnaryMask;
898 for (int MaskElt : Mask) {
899 assert((MaskElt < NumEltsSigned * 2) && "Expected valid shuffle mask");
900 int UnaryElt = MaskElt >= NumEltsSigned ? MaskElt - NumEltsSigned : MaskElt;
901 UnaryMask.push_back(UnaryElt);
902 }
903 return UnaryMask;
904}
905
906/// A helper function for concatenating vectors. This function concatenates two
907/// vectors having the same element type. If the second vector has fewer
908/// elements than the first, it is padded with undefs.
910 Value *V2) {
911 VectorType *VecTy1 = dyn_cast<VectorType>(V1->getType());
912 VectorType *VecTy2 = dyn_cast<VectorType>(V2->getType());
913 assert(VecTy1 && VecTy2 &&
914 VecTy1->getScalarType() == VecTy2->getScalarType() &&
915 "Expect two vectors with the same element type");
916
917 unsigned NumElts1 = cast<FixedVectorType>(VecTy1)->getNumElements();
918 unsigned NumElts2 = cast<FixedVectorType>(VecTy2)->getNumElements();
919 assert(NumElts1 >= NumElts2 && "Unexpect the first vector has less elements");
920
921 if (NumElts1 > NumElts2) {
922 // Extend with UNDEFs.
923 V2 = Builder.CreateShuffleVector(
924 V2, createSequentialMask(0, NumElts2, NumElts1 - NumElts2));
925 }
926
927 return Builder.CreateShuffleVector(
928 V1, V2, createSequentialMask(0, NumElts1 + NumElts2, 0));
929}
930
932 ArrayRef<Value *> Vecs) {
933 unsigned NumVecs = Vecs.size();
934 assert(NumVecs > 1 && "Should be at least two vectors");
935
937 ResList.append(Vecs.begin(), Vecs.end());
938 do {
940 for (unsigned i = 0; i < NumVecs - 1; i += 2) {
941 Value *V0 = ResList[i], *V1 = ResList[i + 1];
942 assert((V0->getType() == V1->getType() || i == NumVecs - 2) &&
943 "Only the last vector may have a different type");
944
945 TmpList.push_back(concatenateTwoVectors(Builder, V0, V1));
946 }
947
948 // Push the last vector if the total number of vectors is odd.
949 if (NumVecs % 2 != 0)
950 TmpList.push_back(ResList[NumVecs - 1]);
951
952 ResList = TmpList;
953 NumVecs = ResList.size();
954 } while (NumVecs > 1);
955
956 return ResList[0];
957}
958
960 assert(isa<VectorType>(Mask->getType()) &&
961 isa<IntegerType>(Mask->getType()->getScalarType()) &&
962 cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==
963 1 &&
964 "Mask must be a vector of i1");
965
966 auto *ConstMask = dyn_cast<Constant>(Mask);
967 if (!ConstMask)
968 return false;
969 if (ConstMask->isNullValue() || isa<UndefValue>(ConstMask))
970 return true;
971 if (isa<ScalableVectorType>(ConstMask->getType()))
972 return false;
973 for (unsigned
974 I = 0,
975 E = cast<FixedVectorType>(ConstMask->getType())->getNumElements();
976 I != E; ++I) {
977 if (auto *MaskElt = ConstMask->getAggregateElement(I))
978 if (MaskElt->isNullValue() || isa<UndefValue>(MaskElt))
979 continue;
980 return false;
981 }
982 return true;
983}
984
986 assert(isa<VectorType>(Mask->getType()) &&
987 isa<IntegerType>(Mask->getType()->getScalarType()) &&
988 cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==
989 1 &&
990 "Mask must be a vector of i1");
991
992 auto *ConstMask = dyn_cast<Constant>(Mask);
993 if (!ConstMask)
994 return false;
995 if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))
996 return true;
997 if (isa<ScalableVectorType>(ConstMask->getType()))
998 return false;
999 for (unsigned
1000 I = 0,
1001 E = cast<FixedVectorType>(ConstMask->getType())->getNumElements();
1002 I != E; ++I) {
1003 if (auto *MaskElt = ConstMask->getAggregateElement(I))
1004 if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))
1005 continue;
1006 return false;
1007 }
1008 return true;
1009}
1010
1011/// TODO: This is a lot like known bits, but for
1012/// vectors. Is there something we can common this with?
1014 assert(isa<FixedVectorType>(Mask->getType()) &&
1015 isa<IntegerType>(Mask->getType()->getScalarType()) &&
1016 cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==
1017 1 &&
1018 "Mask must be a fixed width vector of i1");
1019
1020 const unsigned VWidth =
1021 cast<FixedVectorType>(Mask->getType())->getNumElements();
1022 APInt DemandedElts = APInt::getAllOnes(VWidth);
1023 if (auto *CV = dyn_cast<ConstantVector>(Mask))
1024 for (unsigned i = 0; i < VWidth; i++)
1025 if (CV->getAggregateElement(i)->isNullValue())
1026 DemandedElts.clearBit(i);
1027 return DemandedElts;
1028}
1029
1030bool InterleavedAccessInfo::isStrided(int Stride) {
1031 unsigned Factor = std::abs(Stride);
1032 return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
1033}
1034
1035void InterleavedAccessInfo::collectConstStrideAccesses(
1037 const DenseMap<Value*, const SCEV*> &Strides) {
1038 auto &DL = TheLoop->getHeader()->getModule()->getDataLayout();
1039
1040 // Since it's desired that the load/store instructions be maintained in
1041 // "program order" for the interleaved access analysis, we have to visit the
1042 // blocks in the loop in reverse postorder (i.e., in a topological order).
1043 // Such an ordering will ensure that any load/store that may be executed
1044 // before a second load/store will precede the second load/store in
1045 // AccessStrideInfo.
1046 LoopBlocksDFS DFS(TheLoop);
1047 DFS.perform(LI);
1048 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO()))
1049 for (auto &I : *BB) {
1051 if (!Ptr)
1052 continue;
1053 Type *ElementTy = getLoadStoreType(&I);
1054
1055 // Currently, codegen doesn't support cases where the type size doesn't
1056 // match the alloc size. Skip them for now.
1057 uint64_t Size = DL.getTypeAllocSize(ElementTy);
1058 if (Size * 8 != DL.getTypeSizeInBits(ElementTy))
1059 continue;
1060
1061 // We don't check wrapping here because we don't know yet if Ptr will be
1062 // part of a full group or a group with gaps. Checking wrapping for all
1063 // pointers (even those that end up in groups with no gaps) will be overly
1064 // conservative. For full groups, wrapping should be ok since if we would
1065 // wrap around the address space we would do a memory access at nullptr
1066 // even without the transformation. The wrapping checks are therefore
1067 // deferred until after we've formed the interleaved groups.
1068 int64_t Stride =
1069 getPtrStride(PSE, ElementTy, Ptr, TheLoop, Strides,
1070 /*Assume=*/true, /*ShouldCheckWrap=*/false).value_or(0);
1071
1072 const SCEV *Scev = replaceSymbolicStrideSCEV(PSE, Strides, Ptr);
1073 AccessStrideInfo[&I] = StrideDescriptor(Stride, Scev, Size,
1075 }
1076}
1077
1078// Analyze interleaved accesses and collect them into interleaved load and
1079// store groups.
1080//
1081// When generating code for an interleaved load group, we effectively hoist all
1082// loads in the group to the location of the first load in program order. When
1083// generating code for an interleaved store group, we sink all stores to the
1084// location of the last store. This code motion can change the order of load
1085// and store instructions and may break dependences.
1086//
1087// The code generation strategy mentioned above ensures that we won't violate
1088// any write-after-read (WAR) dependences.
1089//
1090// E.g., for the WAR dependence: a = A[i]; // (1)
1091// A[i] = b; // (2)
1092//
1093// The store group of (2) is always inserted at or below (2), and the load
1094// group of (1) is always inserted at or above (1). Thus, the instructions will
1095// never be reordered. All other dependences are checked to ensure the
1096// correctness of the instruction reordering.
1097//
1098// The algorithm visits all memory accesses in the loop in bottom-up program
1099// order. Program order is established by traversing the blocks in the loop in
1100// reverse postorder when collecting the accesses.
1101//
1102// We visit the memory accesses in bottom-up order because it can simplify the
1103// construction of store groups in the presence of write-after-write (WAW)
1104// dependences.
1105//
1106// E.g., for the WAW dependence: A[i] = a; // (1)
1107// A[i] = b; // (2)
1108// A[i + 1] = c; // (3)
1109//
1110// We will first create a store group with (3) and (2). (1) can't be added to
1111// this group because it and (2) are dependent. However, (1) can be grouped
1112// with other accesses that may precede it in program order. Note that a
1113// bottom-up order does not imply that WAW dependences should not be checked.
1115 bool EnablePredicatedInterleavedMemAccesses) {
1116 LLVM_DEBUG(dbgs() << "LV: Analyzing interleaved accesses...\n");
1117 const auto &Strides = LAI->getSymbolicStrides();
1118
1119 // Holds all accesses with a constant stride.
1121 collectConstStrideAccesses(AccessStrideInfo, Strides);
1122
1123 if (AccessStrideInfo.empty())
1124 return;
1125
1126 // Collect the dependences in the loop.
1127 collectDependences();
1128
1129 // Holds all interleaved store groups temporarily.
1131 // Holds all interleaved load groups temporarily.
1133 // Groups added to this set cannot have new members added.
1134 SmallPtrSet<InterleaveGroup<Instruction> *, 4> CompletedLoadGroups;
1135
1136 // Search in bottom-up program order for pairs of accesses (A and B) that can
1137 // form interleaved load or store groups. In the algorithm below, access A
1138 // precedes access B in program order. We initialize a group for B in the
1139 // outer loop of the algorithm, and then in the inner loop, we attempt to
1140 // insert each A into B's group if:
1141 //
1142 // 1. A and B have the same stride,
1143 // 2. A and B have the same memory object size, and
1144 // 3. A belongs in B's group according to its distance from B.
1145 //
1146 // Special care is taken to ensure group formation will not break any
1147 // dependences.
1148 for (auto BI = AccessStrideInfo.rbegin(), E = AccessStrideInfo.rend();
1149 BI != E; ++BI) {
1150 Instruction *B = BI->first;
1151 StrideDescriptor DesB = BI->second;
1152
1153 // Initialize a group for B if it has an allowable stride. Even if we don't
1154 // create a group for B, we continue with the bottom-up algorithm to ensure
1155 // we don't break any of B's dependences.
1156 InterleaveGroup<Instruction> *GroupB = nullptr;
1157 if (isStrided(DesB.Stride) &&
1158 (!isPredicated(B->getParent()) || EnablePredicatedInterleavedMemAccesses)) {
1159 GroupB = getInterleaveGroup(B);
1160 if (!GroupB) {
1161 LLVM_DEBUG(dbgs() << "LV: Creating an interleave group with:" << *B
1162 << '\n');
1163 GroupB = createInterleaveGroup(B, DesB.Stride, DesB.Alignment);
1164 if (B->mayWriteToMemory())
1165 StoreGroups.insert(GroupB);
1166 else
1167 LoadGroups.insert(GroupB);
1168 }
1169 }
1170
1171 for (auto AI = std::next(BI); AI != E; ++AI) {
1172 Instruction *A = AI->first;
1173 StrideDescriptor DesA = AI->second;
1174
1175 // Our code motion strategy implies that we can't have dependences
1176 // between accesses in an interleaved group and other accesses located
1177 // between the first and last member of the group. Note that this also
1178 // means that a group can't have more than one member at a given offset.
1179 // The accesses in a group can have dependences with other accesses, but
1180 // we must ensure we don't extend the boundaries of the group such that
1181 // we encompass those dependent accesses.
1182 //
1183 // For example, assume we have the sequence of accesses shown below in a
1184 // stride-2 loop:
1185 //
1186 // (1, 2) is a group | A[i] = a; // (1)
1187 // | A[i-1] = b; // (2) |
1188 // A[i-3] = c; // (3)
1189 // A[i] = d; // (4) | (2, 4) is not a group
1190 //
1191 // Because accesses (2) and (3) are dependent, we can group (2) with (1)
1192 // but not with (4). If we did, the dependent access (3) would be within
1193 // the boundaries of the (2, 4) group.
1194 auto DependentMember = [&](InterleaveGroup<Instruction> *Group,
1195 StrideEntry *A) -> Instruction * {
1196 for (uint32_t Index = 0; Index < Group->getFactor(); ++Index) {
1197 Instruction *MemberOfGroupB = Group->getMember(Index);
1198 if (MemberOfGroupB && !canReorderMemAccessesForInterleavedGroups(
1199 A, &*AccessStrideInfo.find(MemberOfGroupB)))
1200 return MemberOfGroupB;
1201 }
1202 return nullptr;
1203 };
1204
1205 auto GroupA = getInterleaveGroup(A);
1206 // If A is a load, dependencies are tolerable, there's nothing to do here.
1207 // If both A and B belong to the same (store) group, they are independent,
1208 // even if dependencies have not been recorded.
1209 // If both GroupA and GroupB are null, there's nothing to do here.
1210 if (A->mayWriteToMemory() && GroupA != GroupB) {
1211 Instruction *DependentInst = nullptr;
1212 // If GroupB is a load group, we have to compare AI against all
1213 // members of GroupB because if any load within GroupB has a dependency
1214 // on AI, we need to mark GroupB as complete and also release the
1215 // store GroupA (if A belongs to one). The former prevents incorrect
1216 // hoisting of load B above store A while the latter prevents incorrect
1217 // sinking of store A below load B.
1218 if (GroupB && LoadGroups.contains(GroupB))
1219 DependentInst = DependentMember(GroupB, &*AI);
1220 else if (!canReorderMemAccessesForInterleavedGroups(&*AI, &*BI))
1221 DependentInst = B;
1222
1223 if (DependentInst) {
1224 // A has a store dependence on B (or on some load within GroupB) and
1225 // is part of a store group. Release A's group to prevent illegal
1226 // sinking of A below B. A will then be free to form another group
1227 // with instructions that precede it.
1228 if (GroupA && StoreGroups.contains(GroupA)) {
1229 LLVM_DEBUG(dbgs() << "LV: Invalidated store group due to "
1230 "dependence between "
1231 << *A << " and " << *DependentInst << '\n');
1232 StoreGroups.remove(GroupA);
1233 releaseGroup(GroupA);
1234 }
1235 // If B is a load and part of an interleave group, no earlier loads
1236 // can be added to B's interleave group, because this would mean the
1237 // DependentInst would move across store A. Mark the interleave group
1238 // as complete.
1239 if (GroupB && LoadGroups.contains(GroupB)) {
1240 LLVM_DEBUG(dbgs() << "LV: Marking interleave group for " << *B
1241 << " as complete.\n");
1242 CompletedLoadGroups.insert(GroupB);
1243 }
1244 }
1245 }
1246 if (CompletedLoadGroups.contains(GroupB)) {
1247 // Skip trying to add A to B, continue to look for other conflicting A's
1248 // in groups to be released.
1249 continue;
1250 }
1251
1252 // At this point, we've checked for illegal code motion. If either A or B
1253 // isn't strided, there's nothing left to do.
1254 if (!isStrided(DesA.Stride) || !isStrided(DesB.Stride))
1255 continue;
1256
1257 // Ignore A if it's already in a group or isn't the same kind of memory
1258 // operation as B.
1259 // Note that mayReadFromMemory() isn't mutually exclusive to
1260 // mayWriteToMemory in the case of atomic loads. We shouldn't see those
1261 // here, canVectorizeMemory() should have returned false - except for the
1262 // case we asked for optimization remarks.
1263 if (isInterleaved(A) ||
1264 (A->mayReadFromMemory() != B->mayReadFromMemory()) ||
1265 (A->mayWriteToMemory() != B->mayWriteToMemory()))
1266 continue;
1267
1268 // Check rules 1 and 2. Ignore A if its stride or size is different from
1269 // that of B.
1270 if (DesA.Stride != DesB.Stride || DesA.Size != DesB.Size)
1271 continue;
1272
1273 // Ignore A if the memory object of A and B don't belong to the same
1274 // address space
1276 continue;
1277
1278 // Calculate the distance from A to B.
1279 const SCEVConstant *DistToB = dyn_cast<SCEVConstant>(
1280 PSE.getSE()->getMinusSCEV(DesA.Scev, DesB.Scev));
1281 if (!DistToB)
1282 continue;
1283 int64_t DistanceToB = DistToB->getAPInt().getSExtValue();
1284
1285 // Check rule 3. Ignore A if its distance to B is not a multiple of the
1286 // size.
1287 if (DistanceToB % static_cast<int64_t>(DesB.Size))
1288 continue;
1289
1290 // All members of a predicated interleave-group must have the same predicate,
1291 // and currently must reside in the same BB.
1292 BasicBlock *BlockA = A->getParent();
1293 BasicBlock *BlockB = B->getParent();
1294 if ((isPredicated(BlockA) || isPredicated(BlockB)) &&
1295 (!EnablePredicatedInterleavedMemAccesses || BlockA != BlockB))
1296 continue;
1297
1298 // The index of A is the index of B plus A's distance to B in multiples
1299 // of the size.
1300 int IndexA =
1301 GroupB->getIndex(B) + DistanceToB / static_cast<int64_t>(DesB.Size);
1302
1303 // Try to insert A into B's group.
1304 if (GroupB->insertMember(A, IndexA, DesA.Alignment)) {
1305 LLVM_DEBUG(dbgs() << "LV: Inserted:" << *A << '\n'
1306 << " into the interleave group with" << *B
1307 << '\n');
1308 InterleaveGroupMap[A] = GroupB;
1309
1310 // Set the first load in program order as the insert position.
1311 if (A->mayReadFromMemory())
1312 GroupB->setInsertPos(A);
1313 }
1314 } // Iteration over A accesses.
1315 } // Iteration over B accesses.
1316
1317 auto InvalidateGroupIfMemberMayWrap = [&](InterleaveGroup<Instruction> *Group,
1318 int Index,
1319 std::string FirstOrLast) -> bool {
1320 Instruction *Member = Group->getMember(Index);
1321 assert(Member && "Group member does not exist");
1322 Value *MemberPtr = getLoadStorePointerOperand(Member);
1323 Type *AccessTy = getLoadStoreType(Member);
1324 if (getPtrStride(PSE, AccessTy, MemberPtr, TheLoop, Strides,
1325 /*Assume=*/false, /*ShouldCheckWrap=*/true).value_or(0))
1326 return false;
1327 LLVM_DEBUG(dbgs() << "LV: Invalidate candidate interleaved group due to "
1328 << FirstOrLast
1329 << " group member potentially pointer-wrapping.\n");
1330 releaseGroup(Group);
1331 return true;
1332 };
1333
1334 // Remove interleaved groups with gaps whose memory
1335 // accesses may wrap around. We have to revisit the getPtrStride analysis,
1336 // this time with ShouldCheckWrap=true, since collectConstStrideAccesses does
1337 // not check wrapping (see documentation there).
1338 // FORNOW we use Assume=false;
1339 // TODO: Change to Assume=true but making sure we don't exceed the threshold
1340 // of runtime SCEV assumptions checks (thereby potentially failing to
1341 // vectorize altogether).
1342 // Additional optional optimizations:
1343 // TODO: If we are peeling the loop and we know that the first pointer doesn't
1344 // wrap then we can deduce that all pointers in the group don't wrap.
1345 // This means that we can forcefully peel the loop in order to only have to
1346 // check the first pointer for no-wrap. When we'll change to use Assume=true
1347 // we'll only need at most one runtime check per interleaved group.
1348 for (auto *Group : LoadGroups) {
1349 // Case 1: A full group. Can Skip the checks; For full groups, if the wide
1350 // load would wrap around the address space we would do a memory access at
1351 // nullptr even without the transformation.
1352 if (Group->getNumMembers() == Group->getFactor())
1353 continue;
1354
1355 // Case 2: If first and last members of the group don't wrap this implies
1356 // that all the pointers in the group don't wrap.
1357 // So we check only group member 0 (which is always guaranteed to exist),
1358 // and group member Factor - 1; If the latter doesn't exist we rely on
1359 // peeling (if it is a non-reversed accsess -- see Case 3).
1360 if (InvalidateGroupIfMemberMayWrap(Group, 0, std::string("first")))
1361 continue;
1362 if (Group->getMember(Group->getFactor() - 1))
1363 InvalidateGroupIfMemberMayWrap(Group, Group->getFactor() - 1,
1364 std::string("last"));
1365 else {
1366 // Case 3: A non-reversed interleaved load group with gaps: We need
1367 // to execute at least one scalar epilogue iteration. This will ensure
1368 // we don't speculatively access memory out-of-bounds. We only need
1369 // to look for a member at index factor - 1, since every group must have
1370 // a member at index zero.
1371 if (Group->isReverse()) {
1372 LLVM_DEBUG(
1373 dbgs() << "LV: Invalidate candidate interleaved group due to "
1374 "a reverse access with gaps.\n");
1375 releaseGroup(Group);
1376 continue;
1377 }
1378 LLVM_DEBUG(
1379 dbgs() << "LV: Interleaved group requires epilogue iteration.\n");
1380 RequiresScalarEpilogue = true;
1381 }
1382 }
1383
1384 for (auto *Group : StoreGroups) {
1385 // Case 1: A full group. Can Skip the checks; For full groups, if the wide
1386 // store would wrap around the address space we would do a memory access at
1387 // nullptr even without the transformation.
1388 if (Group->getNumMembers() == Group->getFactor())
1389 continue;
1390
1391 // Interleave-store-group with gaps is implemented using masked wide store.
1392 // Remove interleaved store groups with gaps if
1393 // masked-interleaved-accesses are not enabled by the target.
1394 if (!EnablePredicatedInterleavedMemAccesses) {
1395 LLVM_DEBUG(
1396 dbgs() << "LV: Invalidate candidate interleaved store group due "
1397 "to gaps.\n");
1398 releaseGroup(Group);
1399 continue;
1400 }
1401
1402 // Case 2: If first and last members of the group don't wrap this implies
1403 // that all the pointers in the group don't wrap.
1404 // So we check only group member 0 (which is always guaranteed to exist),
1405 // and the last group member. Case 3 (scalar epilog) is not relevant for
1406 // stores with gaps, which are implemented with masked-store (rather than
1407 // speculative access, as in loads).
1408 if (InvalidateGroupIfMemberMayWrap(Group, 0, std::string("first")))
1409 continue;
1410 for (int Index = Group->getFactor() - 1; Index > 0; Index--)
1411 if (Group->getMember(Index)) {
1412 InvalidateGroupIfMemberMayWrap(Group, Index, std::string("last"));
1413 break;
1414 }
1415 }
1416}
1417
1419 // If no group had triggered the requirement to create an epilogue loop,
1420 // there is nothing to do.
1422 return;
1423
1424 bool ReleasedGroup = false;
1425 // Release groups requiring scalar epilogues. Note that this also removes them
1426 // from InterleaveGroups.
1427 for (auto *Group : make_early_inc_range(InterleaveGroups)) {
1428 if (!Group->requiresScalarEpilogue())
1429 continue;
1430 LLVM_DEBUG(
1431 dbgs()
1432 << "LV: Invalidate candidate interleaved group due to gaps that "
1433 "require a scalar epilogue (not allowed under optsize) and cannot "
1434 "be masked (not enabled). \n");
1435 releaseGroup(Group);
1436 ReleasedGroup = true;
1437 }
1438 assert(ReleasedGroup && "At least one group must be invalidated, as a "
1439 "scalar epilogue was required");
1440 (void)ReleasedGroup;
1441 RequiresScalarEpilogue = false;
1442}
1443
1444template <typename InstT>
1445void InterleaveGroup<InstT>::addMetadata(InstT *NewInst) const {
1446 llvm_unreachable("addMetadata can only be used for Instruction");
1447}
1448
1449namespace llvm {
1450template <>
1453 std::transform(Members.begin(), Members.end(), std::back_inserter(VL),
1454 [](std::pair<int, Instruction *> p) { return p.second; });
1455 propagateMetadata(NewInst, VL);
1456}
1457}
1458
1460 const CallInst &CI, SmallVectorImpl<std::string> &VariantMappings) {
1462 if (S.empty())
1463 return;
1464
1466 S.split(ListAttr, ",");
1467
1468 for (const auto &S : SetVector<StringRef>(ListAttr.begin(), ListAttr.end())) {
1469 std::optional<VFInfo> Info = VFABI::tryDemangleForVFABI(S, CI);
1470 if (Info && CI.getModule()->getFunction(Info->VectorName)) {
1471 LLVM_DEBUG(dbgs() << "VFABI: Adding mapping '" << S << "' for " << CI
1472 << "\n");
1473 VariantMappings.push_back(std::string(S));
1474 } else
1475 LLVM_DEBUG(dbgs() << "VFABI: Invalid mapping '" << S << "'\n");
1476 }
1477}
1478
1480 for (unsigned Pos = 0, NumParams = Parameters.size(); Pos < NumParams;
1481 ++Pos) {
1482 assert(Parameters[Pos].ParamPos == Pos && "Broken parameter list.");
1483
1484 switch (Parameters[Pos].ParamKind) {
1485 default: // Nothing to check.
1486 break;
1491 // Compile time linear steps must be non-zero.
1492 if (Parameters[Pos].LinearStepOrPos == 0)
1493 return false;
1494 break;
1499 // The runtime linear step must be referring to some other
1500 // parameters in the signature.
1501 if (Parameters[Pos].LinearStepOrPos >= int(NumParams))
1502 return false;
1503 // The linear step parameter must be marked as uniform.
1504 if (Parameters[Parameters[Pos].LinearStepOrPos].ParamKind !=
1506 return false;
1507 // The linear step parameter can't point at itself.
1508 if (Parameters[Pos].LinearStepOrPos == int(Pos))
1509 return false;
1510 break;
1512 // The global predicate must be the unique. Can be placed anywhere in the
1513 // signature.
1514 for (unsigned NextPos = Pos + 1; NextPos < NumParams; ++NextPos)
1515 if (Parameters[NextPos].ParamKind == VFParamKind::GlobalPredicate)
1516 return false;
1517 break;
1518 }
1519 }
1520 return true;
1521}
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
#define LLVM_DEBUG(X)
Definition: Debug.h:101
uint64_t Size
DenseMap< Block *, BlockRelaxAux > Blocks
Definition: ELF_riscv.cpp:505
Generic implementation of equivalence classes through the use Tarjan's efficient union-find algorithm...
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
const NodeList & List
Definition: RDFGraph.cpp:201
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static unsigned getScalarSizeInBits(Type *Ty)
static SymbolRef::Type getType(const Symbol *Sym)
Definition: TapiFile.cpp:40
This pass exposes codegen information to IR-level passes.
static Value * concatenateTwoVectors(IRBuilderBase &Builder, Value *V1, Value *V2)
A helper function for concatenating vectors.
static cl::opt< unsigned > MaxInterleaveGroupFactor("max-interleave-group-factor", cl::Hidden, cl::desc("Maximum factor for an interleaved access group (default = 8)"), cl::init(8))
Maximum factor for an interleaved memory access.
static void addToAccessGroupList(ListT &List, MDNode *AccGroups)
Add all access groups in AccGroups to List.
static constexpr uint32_t RegMask
Definition: aarch32.h:221
Class for arbitrary precision integers.
Definition: APInt.h:76
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition: APInt.h:212
void clearBit(unsigned BitPosition)
Set a given bit to 0.
Definition: APInt.h:1379
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition: APInt.h:1302
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
Definition: APInt.h:358
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition: APInt.h:178
int64_t getSExtValue() const
Get sign extended value.
Definition: APInt.h:1507
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
const T & front() const
front - Get the first element.
Definition: ArrayRef.h:168
iterator end() const
Definition: ArrayRef.h:154
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
iterator begin() const
Definition: ArrayRef.h:153
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:160
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:318
LLVM Basic Block Representation.
Definition: BasicBlock.h:60
const Module * getModule() const
Return the module owning the function this basic block belongs to, or nullptr if the function does no...
Definition: BasicBlock.cpp:328
Attribute getFnAttr(StringRef Kind) const
Get the attribute of a given kind for the function.
Definition: InstrTypes.h:1672
This class represents a function call, abstracting a target machine's calling convention.
static Constant * get(ArrayRef< Constant * > V)
Definition: Constants.cpp:1342
This is an important base class in LLVM.
Definition: Constant.h:41
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: DenseMap.h:151
EquivalenceClasses - This represents a collection of equivalence classes and supports three efficient...
const ElemTy & getOrInsertLeaderValue(const ElemTy &V)
getOrInsertLeaderValue - Return the leader for the specified value that is in the set.
member_iterator member_end() const
member_iterator member_begin(iterator I) const
member_iterator unionSets(const ElemTy &V1, const ElemTy &V2)
union - Merge the two equivalence sets for the specified values, inserting them if they do not alread...
Common base class shared among various IRBuilders.
Definition: IRBuilder.h:94
ConstantInt * getInt1(bool V)
Get a constant value representing either true or false.
Definition: IRBuilder.h:455
Value * CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name="")
Definition: IRBuilder.h:2467
This instruction inserts a single (scalar) element into a VectorType value.
bool mayReadOrWriteMemory() const
Return true if this instruction may read or write memory.
Definition: Instruction.h:716
const Module * getModule() const
Return the module owning the function this instruction belongs to or nullptr it the function does not...
Definition: Instruction.cpp:71
MDNode * getMetadata(unsigned KindID) const
Get the metadata of given kind attached to this Instruction.
Definition: Instruction.h:346
void setMetadata(unsigned KindID, MDNode *Node)
Set the metadata of the specified kind to the specified node.
Definition: Metadata.cpp:1581
void getAllMetadataOtherThanDebugLoc(SmallVectorImpl< std::pair< unsigned, MDNode * > > &MDs) const
This does the same thing as getAllMetadata, except that it filters out the debug location.
Definition: Instruction.h:371
The group of interleaved loads/stores sharing the same stride and close to each other.
Definition: VectorUtils.h:614
uint32_t getFactor() const
Definition: VectorUtils.h:630
InstTy * getMember(uint32_t Index) const
Get the member with the given index Index.
Definition: VectorUtils.h:684
uint32_t getIndex(const InstTy *Instr) const
Get the index for the given member.
Definition: VectorUtils.h:691
void setInsertPos(InstTy *Inst)
Definition: VectorUtils.h:701
bool isReverse() const
Definition: VectorUtils.h:629
void addMetadata(InstTy *NewInst) const
Add metadata (e.g.
bool insertMember(InstTy *Instr, int32_t Index, Align NewAlign)
Try to insert a new member Instr with index Index and alignment NewAlign.
Definition: VectorUtils.h:639
uint32_t getNumMembers() const
Definition: VectorUtils.h:632
InterleaveGroup< Instruction > * getInterleaveGroup(const Instruction *Instr) const
Get the interleave group that Instr belongs to.
Definition: VectorUtils.h:801
bool requiresScalarEpilogue() const
Returns true if an interleaved group that may access memory out-of-bounds requires a scalar epilogue ...
Definition: VectorUtils.h:812
bool isInterleaved(Instruction *Instr) const
Check if Instr belongs to any interleave group.
Definition: VectorUtils.h:793
void analyzeInterleaving(bool EnableMaskedInterleavedGroup)
Analyze the interleaved accesses and collect them in interleave groups.
void invalidateGroupsRequiringScalarEpilogue()
Invalidate groups that require a scalar epilogue (due to gaps).
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
const DenseMap< Value *, const SCEV * > & getSymbolicStrides() const
If an access has a symbolic strides, this maps the pointer value to the stride symbol.
BlockT * getHeader() const
Store the result of a depth first search within basic blocks contained by a single loop.
Definition: LoopIterator.h:97
Metadata node.
Definition: Metadata.h:1037
static MDNode * getMostGenericAliasScope(MDNode *A, MDNode *B)
Definition: Metadata.cpp:1094
static MDNode * getMostGenericTBAA(MDNode *A, MDNode *B)
ArrayRef< MDOperand > operands() const
Definition: Metadata.h:1389
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1504
static MDNode * getMostGenericFPMath(MDNode *A, MDNode *B)
Definition: Metadata.cpp:1126
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1397
static MDNode * intersect(MDNode *A, MDNode *B)
Definition: Metadata.cpp:1081
LLVMContext & getContext() const
Definition: Metadata.h:1200
Tracking metadata reference owned by Metadata.
Definition: Metadata.h:859
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:36
reverse_iterator rend()
Definition: MapVector.h:76
iterator find(const KeyT &Key)
Definition: MapVector.h:167
bool empty() const
Definition: MapVector.h:79
reverse_iterator rbegin()
Definition: MapVector.h:74
Root of the metadata hierarchy.
Definition: Metadata.h:62
Function * getFunction(StringRef Name) const
Look up the specified function in the module symbol table.
Definition: Module.cpp:170
const DataLayout & getDataLayout() const
Get the data layout for the module's target platform.
Definition: Module.h:275
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
ScalarEvolution * getSE() const
Returns the ScalarEvolution analysis used.
This class represents a constant integer value.
const APInt & getAPInt() const
This class represents an analyzed expression in the program.
const SCEV * getMinusSCEV(const SCEV *LHS, const SCEV *RHS, SCEV::NoWrapFlags Flags=SCEV::FlagAnyWrap, unsigned Depth=0)
Return LHS-RHS.
A vector that has set insertion semantics.
Definition: SetVector.h:57
bool remove(const value_type &X)
Remove an item from the set vector.
Definition: SetVector.h:188
bool insert(const value_type &X)
Insert a new element into the SetVector.
Definition: SetVector.h:162
bool contains(const key_type &key) const
Check if the SetVector contains the given key.
Definition: SetVector.h:254
This instruction constructs a fixed permutation of two input vectors.
int getMaskValue(unsigned Elt) const
Return the shuffle mask value of this instruction for the given element index.
VectorType * getType() const
Overload to return most specific vector type.
size_type count(ConstPtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Definition: SmallPtrSet.h:384
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:366
bool contains(ConstPtrType Ptr) const
Definition: SmallPtrSet.h:390
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:451
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:370
bool empty() const
Definition: SmallVector.h:94
size_t size() const
Definition: SmallVector.h:91
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
void assign(size_type NumElts, ValueParamT Elt)
Definition: SmallVector.h:708
void reserve(size_type N)
Definition: SmallVector.h:667
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:687
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::pair< StringRef, StringRef > split(char Separator) const
Split into two substrings around the first occurrence of a separator character.
Definition: StringRef.h:704
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:134
Provides information about what library functions are available for the current target.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
bool isTypeLegal(Type *Ty) const
Return true if this type is legal.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
static UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
Definition: Constants.cpp:1724
A Use represents the edge between a Value definition and its users.
Definition: Use.h:43
Value * getOperand(unsigned i) const
Definition: User.h:169
LLVM Value Representation.
Definition: Value.h:74
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:1074
Base class of all SIMD vector types.
Definition: DerivedTypes.h:403
Type * getElementType() const
Definition: DerivedTypes.h:436
An efficient, type-erasing, non-owning reference to a callable.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
Definition: PatternMatch.h:982
class_match< BinaryOperator > m_BinOp()
Match an arbitrary binary operation and ignore it.
Definition: PatternMatch.h:84
class_match< Constant > m_Constant()
Match an arbitrary Constant and ignore it.
Definition: PatternMatch.h:144
bool match(Val *V, const Pattern &P)
Definition: PatternMatch.h:49
ThreeOps_match< Cond, LHS, RHS, Instruction::Select > m_Select(const Cond &C, const LHS &L, const RHS &R)
Matches SelectInst.
cst_pred_ty< is_zero_int > m_ZeroInt()
Match an integer 0 or a vector with all elements equal to 0.
Definition: PatternMatch.h:532
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
Definition: PatternMatch.h:76
ThreeOps_match< Val_t, Elt_t, Idx_t, Instruction::InsertElement > m_InsertElt(const Val_t &Val, const Elt_t &Elt, const Idx_t &Idx)
Matches InsertElementInst.
static constexpr char const * MappingsAttrName
Definition: VectorUtils.h:189
std::optional< VFInfo > tryDemangleForVFABI(StringRef MangledName, const CallInst &CI)
Function to construct a VFInfo out of a mangled names in the following format:
void getVectorVariantNames(const CallInst &CI, SmallVectorImpl< std::string > &VariantMappings)
Populates a set of strings representing the Vector Function ABI variants associated to the CallInst C...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:445
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1726
Intrinsic::ID getVectorIntrinsicIDForCall(const CallInst *CI, const TargetLibraryInfo *TLI)
Returns intrinsic ID for call.
APInt possiblyDemandedEltsInMask(Value *Mask)
Given a mask vector of the form <Y x i1>, return an APInt (of bitwidth Y) for each lane which may be ...
bool isVectorIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx)
Identifies if the vector form of the intrinsic is overloaded on the type of the operand at index OpdI...
unsigned getLoadStoreAddressSpace(Value *I)
A helper function that returns the address space of the pointer operand of load or store instruction.
const Value * getLoadStorePointerOperand(const Value *V)
A helper function that returns the pointer operand of a load or store instruction.
llvm::SmallVector< int, 16 > createUnaryMask(ArrayRef< int > Mask, unsigned NumElts)
Given a shuffle mask for a binary shuffle, create the equivalent shuffle mask assuming both operands ...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
int bit_width(T Value)
Returns the number of bits needed to represent Value if Value is nonzero.
Definition: bit.h:317
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:665
Value * concatenateVectors(IRBuilderBase &Builder, ArrayRef< Value * > Vecs)
Concatenate a list of vectors.
bool widenShuffleMaskElts(int Scale, ArrayRef< int > Mask, SmallVectorImpl< int > &ScaledMask)
Try to transform a shuffle mask by replacing elements with the scaled index for an equivalent mask of...
Instruction * propagateMetadata(Instruction *I, ArrayRef< Value * > VL)
Specifically, let Kinds = [MD_tbaa, MD_alias_scope, MD_noalias, MD_fpmath, MD_nontemporal,...
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
T bit_ceil(T Value)
Returns the smallest integral power of two no smaller than Value if Value is nonzero.
Definition: bit.h:342
MDNode * intersectAccessGroups(const Instruction *Inst1, const Instruction *Inst2)
Compute the access-group list of access groups that Inst1 and Inst2 are both in.
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1733
bool getShuffleDemandedElts(int SrcWidth, ArrayRef< int > Mask, const APInt &DemandedElts, APInt &DemandedLHS, APInt &DemandedRHS, bool AllowUndefElts=false)
Transform a shuffle mask's output demanded element mask into demanded element masks for the 2 operand...
bool isSplatValue(const Value *V, int Index=-1, unsigned Depth=0)
Return true if each element of the vector value V is poisoned or equal to every other non-poisoned el...
Constant * createBitMaskForGaps(IRBuilderBase &Builder, unsigned VF, const InterleaveGroup< Instruction > &Group)
Create a mask that filters the members of an interleave group where there are gaps.
constexpr unsigned MaxAnalysisRecursionDepth
Definition: ValueTracking.h:47
llvm::SmallVector< int, 16 > createStrideMask(unsigned Start, unsigned Stride, unsigned VF)
Create a stride shuffle mask.
llvm::SmallVector< int, 16 > createReplicatedMask(unsigned ReplicationFactor, unsigned VF)
Create a mask with replicated elements.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
std::optional< int64_t > getPtrStride(PredicatedScalarEvolution &PSE, Type *AccessTy, Value *Ptr, const Loop *Lp, const DenseMap< Value *, const SCEV * > &StridesMap=DenseMap< Value *, const SCEV * >(), bool Assume=false, bool ShouldCheckWrap=true)
If the pointer has a constant stride return it in units of the access type size.
Align getLoadStoreAlignment(Value *I)
A helper function that returns the alignment of load or store instruction.
bool maskIsAllOneOrUndef(Value *Mask)
Given a mask vector of i1, Return true if all of the elements of this predicate mask are known to be ...
constexpr int PoisonMaskElem
bool isValidAsAccessGroup(MDNode *AccGroup)
Return whether an MDNode might represent an access group.
Definition: LoopInfo.cpp:1121
Intrinsic::ID getIntrinsicForCallSite(const CallBase &CB, const TargetLibraryInfo *TLI)
Map a call instruction to an intrinsic ID.
void processShuffleMasks(ArrayRef< int > Mask, unsigned NumOfSrcRegs, unsigned NumOfDestRegs, unsigned NumOfUsedRegs, function_ref< void()> NoInputAction, function_ref< void(ArrayRef< int >, unsigned, unsigned)> SingleInputAction, function_ref< void(ArrayRef< int >, unsigned, unsigned)> ManyInputsAction)
Splits and processes shuffle mask depending on the number of input and output registers.
void narrowShuffleMaskElts(int Scale, ArrayRef< int > Mask, SmallVectorImpl< int > &ScaledMask)
Replace each shuffle mask index with the scaled sequential indices for an equivalent mask of narrowed...
llvm::SmallVector< int, 16 > createInterleaveMask(unsigned VF, unsigned NumVecs)
Create an interleave shuffle mask.
const SCEV * replaceSymbolicStrideSCEV(PredicatedScalarEvolution &PSE, const DenseMap< Value *, const SCEV * > &PtrToStride, Value *Ptr)
Return the SCEV corresponding to a pointer with the symbolic stride replaced with constant one,...
Value * findScalarElement(Value *V, unsigned EltNo)
Given a vector and an element number, see if the scalar value is already around as a register,...
MDNode * uniteAccessGroups(MDNode *AccGroups1, MDNode *AccGroups2)
Compute the union of two access-group lists.
auto count_if(R &&Range, UnaryPredicate P)
Wrapper function around std::count_if to count the number of times an element satisfying a given pred...
Definition: STLExtras.h:1925
bool maskIsAllZeroOrUndef(Value *Mask)
Given a mask vector of i1, Return true if all of the elements of this predicate mask are known to be ...
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1753
void getShuffleMaskWithWidestElts(ArrayRef< int > Mask, SmallVectorImpl< int > &ScaledMask)
Repetitively apply widenShuffleMaskElts() for as long as it succeeds, to get the shuffle mask with wi...
bool isVectorIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx)
Identifies if the vector form of the intrinsic has a scalar operand.
bool all_equal(std::initializer_list< T > Values)
Returns true if all Values in the initializer lists are equal or the list.
Definition: STLExtras.h:2008
bool isTriviallyVectorizable(Intrinsic::ID ID)
Identify if the intrinsic is trivially vectorizable.
Definition: VectorUtils.cpp:43
llvm::SmallVector< int, 16 > createSequentialMask(unsigned Start, unsigned NumInts, unsigned NumUndefs)
Create a sequential shuffle mask.
Type * getLoadStoreType(Value *I)
A helper function that returns the type of a load or store instruction.
MapVector< Instruction *, uint64_t > computeMinimumValueSizes(ArrayRef< BasicBlock * > Blocks, DemandedBits &DB, const TargetTransformInfo *TTI=nullptr)
Compute a map of integer instructions to their minimum legal type size.
int getSplatIndex(ArrayRef< int > Mask)
If all non-negative Mask elements are the same value, return that value.
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:860
bool hasValidParameterList() const
Validation check on the Parameters in the VFShape.
SmallVector< VFParameter, 8 > Parameters
Definition: VectorUtils.h:84