25#define DEBUG_TYPE "systemztti"
34 bool UsedAsMemCpySource =
false;
35 for (
const User *U : V->users())
37 if (isa<BitCastInst>(
User) || isa<GetElementPtrInst>(
User)) {
42 if (Memcpy->getOperand(1) == V && !Memcpy->isVolatile()) {
43 UsedAsMemCpySource =
true;
49 return UsedAsMemCpySource;
59 bool OtherUse =
false;
65 dbgs() <<
"++ SZTTI Adding inlining bonus: " << Bonus <<
"\n";);
85 if (Imm.getBitWidth() <= 64) {
87 if (isInt<32>(Imm.getSExtValue()))
90 if (isUInt<32>(Imm.getZExtValue()))
93 if ((Imm.getZExtValue() & 0xffffffff) == 0)
120 case Instruction::GetElementPtr:
127 case Instruction::Store:
128 if (
Idx == 0 && Imm.getBitWidth() <= 64) {
133 if (isInt<16>(Imm.getSExtValue()))
137 case Instruction::ICmp:
138 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
140 if (isInt<32>(Imm.getSExtValue()))
143 if (isUInt<32>(Imm.getZExtValue()))
147 case Instruction::Add:
148 case Instruction::Sub:
149 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
151 if (isUInt<32>(Imm.getZExtValue()))
154 if (isUInt<32>(-Imm.getSExtValue()))
158 case Instruction::Mul:
159 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
161 if (isInt<32>(Imm.getSExtValue()))
165 case Instruction::Or:
166 case Instruction::Xor:
167 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
169 if (isUInt<32>(Imm.getZExtValue()))
172 if ((Imm.getZExtValue() & 0xffffffff) == 0)
176 case Instruction::And:
177 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
182 if (isUInt<32>(~Imm.getZExtValue()))
185 if ((Imm.getZExtValue() & 0xffffffff) == 0xffffffff)
190 if (
TII->isRxSBGMask(Imm.getZExtValue(), BitSize, Start,
End))
194 case Instruction::Shl:
195 case Instruction::LShr:
196 case Instruction::AShr:
201 case Instruction::UDiv:
202 case Instruction::SDiv:
203 case Instruction::URem:
204 case Instruction::SRem:
205 case Instruction::Trunc:
206 case Instruction::ZExt:
207 case Instruction::SExt:
208 case Instruction::IntToPtr:
209 case Instruction::PtrToInt:
210 case Instruction::BitCast:
211 case Instruction::PHI:
212 case Instruction::Call:
213 case Instruction::Select:
214 case Instruction::Ret:
215 case Instruction::Load:
240 case Intrinsic::sadd_with_overflow:
241 case Intrinsic::uadd_with_overflow:
242 case Intrinsic::ssub_with_overflow:
243 case Intrinsic::usub_with_overflow:
245 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
246 if (isUInt<32>(Imm.getZExtValue()))
248 if (isUInt<32>(-Imm.getSExtValue()))
252 case Intrinsic::smul_with_overflow:
253 case Intrinsic::umul_with_overflow:
255 if (
Idx == 1 && Imm.getBitWidth() <= 64) {
256 if (isInt<32>(Imm.getSExtValue()))
260 case Intrinsic::experimental_stackmap:
261 if ((
Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
264 case Intrinsic::experimental_patchpoint_void:
265 case Intrinsic::experimental_patchpoint_i64:
266 if ((
Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
276 if (ST->hasPopulationCount() && TyWidth <= 64)
286 bool HasCall =
false;
288 for (
auto &BB : L->blocks())
289 for (
auto &
I : *BB) {
290 if (isa<CallInst>(&
I) || isa<InvokeInst>(&
I)) {
294 if (
F->getIntrinsicID() == Intrinsic::memcpy ||
295 F->getIntrinsicID() == Intrinsic::memset)
301 if (isa<StoreInst>(&
I)) {
302 Type *MemAccessTy =
I.getOperand(0)->getType();
311 unsigned const NumStoresVal = *NumStores.
getValue();
312 unsigned const Max = (NumStoresVal ? (12 / NumStoresVal) : UINT_MAX);
355 bool Vector = (ClassID == 1);
380 unsigned NumStridedMemAccesses,
381 unsigned NumPrefetches,
382 bool HasCall)
const {
384 if (NumPrefetches > 16)
389 if (NumStridedMemAccesses > 32 && !HasCall &&
390 (NumMemAccesses - NumStridedMemAccesses) * 32 <= NumStridedMemAccesses)
393 return ST->hasMiscellaneousExtensions3() ? 8192 : 2048;
406 assert(
Size > 0 &&
"Element must have non-zero size.");
414 auto *VTy = cast<FixedVectorType>(Ty);
416 assert(WideBits > 0 &&
"Could not compute size of vector");
417 return ((WideBits % 128U) ? ((WideBits / 128U) + 1) : (WideBits / 128U));
429 Op2Info, Args, CxtI);
443 const unsigned DivInstrCost = 20;
444 const unsigned DivMulSeqCost = 10;
445 const unsigned SDivPow2Cost = 4;
448 Opcode == Instruction::SDiv || Opcode == Instruction::SRem;
449 bool UnsignedDivRem =
450 Opcode == Instruction::UDiv || Opcode == Instruction::URem;
453 bool DivRemConst =
false;
454 bool DivRemConstPow2 =
false;
455 if ((SignedDivRem || UnsignedDivRem) && Args.size() == 2) {
456 if (
const Constant *
C = dyn_cast<Constant>(Args[1])) {
458 (
C->getType()->isVectorTy()
459 ? dyn_cast_or_null<const ConstantInt>(
C->getSplatValue())
460 : dyn_cast<const ConstantInt>(
C));
463 DivRemConstPow2 =
true;
473 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
474 Opcode == Instruction::FMul || Opcode == Instruction::FDiv)
478 if (Opcode == Instruction::FRem)
482 if (Args.size() == 2 && ST->hasMiscellaneousExtensions3()) {
483 if (Opcode == Instruction::Xor) {
484 for (
const Value *
A : Args) {
486 if (
I->hasOneUse() &&
487 (
I->getOpcode() == Instruction::And ||
488 I->getOpcode() == Instruction::Or ||
489 I->getOpcode() == Instruction::Xor))
493 else if (Opcode == Instruction::Or || Opcode == Instruction::And) {
494 for (
const Value *
A : Args) {
496 if (
I->hasOneUse() &&
I->getOpcode() == Instruction::Xor)
503 if (Opcode == Instruction::Or)
506 if (Opcode == Instruction::Xor && ScalarBits == 1) {
507 if (ST->hasLoadStoreOnCond2())
513 return (SignedDivRem ? SDivPow2Cost : 1);
515 return DivMulSeqCost;
516 if (SignedDivRem || UnsignedDivRem)
519 else if (ST->hasVector()) {
520 auto *VTy = cast<FixedVectorType>(Ty);
521 unsigned VF = VTy->getNumElements();
526 if (Opcode == Instruction::Shl || Opcode == Instruction::LShr ||
527 Opcode == Instruction::AShr) {
532 return (NumVectors * (SignedDivRem ? SDivPow2Cost : 1));
535 return VF * DivMulSeqCost +
538 if ((SignedDivRem || UnsignedDivRem) && VF > 4)
549 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
550 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) {
551 switch (ScalarBits) {
554 if (ST->hasVectorEnhancements1())
579 if (Opcode == Instruction::FRem) {
584 if (VF == 2 && ScalarBits == 32)
602 if (ST->hasVector()) {
618 return (
Index == 0 ? 0 : NumVectors);
625 return NumVectors - 1;
654 "Packing must reduce size of vector type.");
655 assert(cast<FixedVectorType>(SrcTy)->getNumElements() ==
656 cast<FixedVectorType>(DstTy)->getNumElements() &&
657 "Packing should not change number of elements.");
672 unsigned VF = cast<FixedVectorType>(SrcTy)->getNumElements();
673 for (
unsigned P = 0;
P < Log2Diff; ++
P) {
694 "Should only be called with vector types.");
696 unsigned PackCost = 0;
700 if (SrcScalarBits > DstScalarBits)
703 else if (SrcScalarBits < DstScalarBits) {
706 PackCost = Log2Diff * DstNumParts;
708 PackCost += DstNumParts - 1;
717 Type *OpTy =
nullptr;
718 if (
CmpInst *CI = dyn_cast<CmpInst>(
I->getOperand(0)))
719 OpTy = CI->getOperand(0)->getType();
720 else if (
Instruction *LogicI = dyn_cast<Instruction>(
I->getOperand(0)))
721 if (LogicI->getNumOperands() == 2)
722 if (
CmpInst *CI0 = dyn_cast<CmpInst>(LogicI->getOperand(0)))
723 if (isa<CmpInst>(LogicI->getOperand(1)))
724 OpTy = CI0->getOperand(0)->getType();
726 if (OpTy !=
nullptr) {
745 auto *DstVTy = cast<FixedVectorType>(Dst);
746 unsigned VF = DstVTy->getNumElements();
751 if (CmpOpTy !=
nullptr)
753 if (Opcode == Instruction::ZExt || Opcode == Instruction::UIToFP)
767 return BaseCost == 0 ? BaseCost : 1;
770 unsigned DstScalarBits = Dst->getScalarSizeInBits();
771 unsigned SrcScalarBits = Src->getScalarSizeInBits();
773 if (!Src->isVectorTy()) {
774 assert (!Dst->isVectorTy());
776 if (Opcode == Instruction::SIToFP || Opcode == Instruction::UIToFP) {
777 if (SrcScalarBits >= 32 ||
778 (
I !=
nullptr && isa<LoadInst>(
I->getOperand(0))))
780 return SrcScalarBits > 1 ? 2 : 5 ;
783 if ((Opcode == Instruction::ZExt || Opcode == Instruction::SExt) &&
784 Src->isIntegerTy(1)) {
785 if (ST->hasLoadStoreOnCond2())
791 if (Opcode == Instruction::SExt)
792 Cost = (DstScalarBits < 64 ? 3 : 4);
793 if (Opcode == Instruction::ZExt)
802 else if (ST->hasVector()) {
804 auto *SrcVecTy = cast<FixedVectorType>(Src);
805 auto *DstVecTy = dyn_cast<FixedVectorType>(Dst);
810 unsigned VF = SrcVecTy->getNumElements();
814 if (Opcode == Instruction::Trunc) {
815 if (Src->getScalarSizeInBits() == Dst->getScalarSizeInBits())
820 if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) {
821 if (SrcScalarBits >= 8) {
823 if (Opcode == Instruction::ZExt)
824 return NumDstVectors;
831 unsigned NumSrcVectorOps =
832 (NumUnpacks > 1 ? (NumDstVectors - NumSrcVectors)
833 : (NumDstVectors / 2));
835 return (NumUnpacks * NumDstVectors) + NumSrcVectorOps;
837 else if (SrcScalarBits == 1)
841 if (Opcode == Instruction::SIToFP || Opcode == Instruction::UIToFP ||
842 Opcode == Instruction::FPToSI || Opcode == Instruction::FPToUI) {
847 if (DstScalarBits == 64 || ST->hasVectorEnhancements2()) {
848 if (SrcScalarBits == DstScalarBits)
849 return NumDstVectors;
851 if (SrcScalarBits == 1)
859 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH,
CostKind);
861 bool NeedsInserts =
true, NeedsExtracts =
true;
863 if (DstScalarBits == 128 &&
864 (Opcode == Instruction::SIToFP || Opcode == Instruction::UIToFP))
865 NeedsInserts =
false;
866 if (SrcScalarBits == 128 &&
867 (Opcode == Instruction::FPToSI || Opcode == Instruction::FPToUI))
868 NeedsExtracts =
false;
876 if (VF == 2 && SrcScalarBits == 32 && DstScalarBits == 32)
882 if (Opcode == Instruction::FPTrunc) {
883 if (SrcScalarBits == 128)
888 return VF / 2 + std::max(1U, VF / 4 );
891 if (Opcode == Instruction::FPExt) {
892 if (SrcScalarBits == 32 && DstScalarBits == 64) {
910 unsigned ExtCost = 0;
911 for (
Value *Op :
I->operands())
913 if (!isa<LoadInst>(Op) && !isa<ConstantInt>(Op))
929 case Instruction::ICmp: {
933 if (
I !=
nullptr && ScalarBits >= 32)
934 if (
LoadInst *Ld = dyn_cast<LoadInst>(
I->getOperand(0)))
935 if (
const ConstantInt *
C = dyn_cast<ConstantInt>(
I->getOperand(1)))
936 if (!Ld->hasOneUse() && Ld->getParent() ==
I->getParent() &&
945 case Instruction::Select:
951 else if (ST->hasVector()) {
952 unsigned VF = cast<FixedVectorType>(ValTy)->getNumElements();
955 if (Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) {
956 unsigned PredicateExtraCost = 0;
959 switch (cast<CmpInst>(
I)->getPredicate()) {
965 PredicateExtraCost = 1;
971 PredicateExtraCost = 2;
983 unsigned Cost = (NumVecs_cmp * (CmpCostPerVector + PredicateExtraCost));
987 assert (Opcode == Instruction::Select);
991 unsigned PackCost = 0;
993 if (CmpOpTy !=
nullptr)
1011 return ((
Index % 2 == 0) ? 1 : 0);
1013 if (Opcode == Instruction::ExtractElement) {
1034 unsigned TruncBits = 0;
1035 unsigned SExtBits = 0;
1036 unsigned ZExtBits = 0;
1039 if (isa<TruncInst>(UserI))
1040 TruncBits = UserBits;
1041 else if (isa<SExtInst>(UserI))
1042 SExtBits = UserBits;
1043 else if (isa<ZExtInst>(UserI))
1044 ZExtBits = UserBits;
1046 if (TruncBits || SExtBits || ZExtBits) {
1047 FoldedValue = UserI;
1048 UserI = cast<Instruction>(*UserI->
user_begin());
1051 if ((UserI->
getOpcode() == Instruction::Sub ||
1052 UserI->
getOpcode() == Instruction::SDiv ||
1053 UserI->
getOpcode() == Instruction::UDiv) &&
1058 unsigned LoadOrTruncBits =
1059 ((SExtBits || ZExtBits) ? 0 : (TruncBits ? TruncBits : LoadedBits));
1061 case Instruction::Add:
1062 case Instruction::Sub:
1063 case Instruction::ICmp:
1064 if (LoadedBits == 32 && ZExtBits == 64)
1067 case Instruction::Mul:
1068 if (UserI->
getOpcode() != Instruction::ICmp) {
1069 if (LoadedBits == 16 &&
1071 (SExtBits == 64 && ST->hasMiscellaneousExtensions2())))
1073 if (LoadOrTruncBits == 16)
1077 case Instruction::SDiv:
1078 if (LoadedBits == 32 && SExtBits == 64)
1081 case Instruction::UDiv:
1082 case Instruction::And:
1083 case Instruction::Or:
1084 case Instruction::Xor:
1096 if (UserI->
getOpcode() == Instruction::ICmp)
1098 if (CI->getValue().isIntN(16))
1100 return (LoadOrTruncBits == 32 || LoadOrTruncBits == 64);
1108 if (
auto *CI = dyn_cast<CallInst>(
I))
1109 if (
auto *
F = CI->getCalledFunction())
1110 if (
F->getIntrinsicID() == Intrinsic::bswap)
1121 assert(!Src->isVoidTy() &&
"Invalid type");
1127 if (!Src->isVectorTy() && Opcode == Instruction::Load &&
I !=
nullptr) {
1136 for (
unsigned i = 0; i < 2; ++i) {
1141 LoadInst *OtherLoad = dyn_cast<LoadInst>(OtherOp);
1143 (isa<TruncInst>(OtherOp) || isa<SExtInst>(OtherOp) ||
1144 isa<ZExtInst>(OtherOp)))
1145 OtherLoad = dyn_cast<LoadInst>(OtherOp->getOperand(0));
1159 if (((!Src->isVectorTy() && NumOps == 1) || ST->hasVectorEnhancements2()) &&
1161 if (Opcode == Instruction::Load &&
I->hasOneUse()) {
1162 const Instruction *LdUser = cast<Instruction>(*
I->user_begin());
1168 else if (
const StoreInst *
SI = dyn_cast<StoreInst>(
I)) {
1169 const Value *StoredVal =
SI->getValueOperand();
1175 if (Src->getScalarSizeInBits() == 128)
1190 bool UseMaskForCond,
bool UseMaskForGaps) {
1191 if (UseMaskForCond || UseMaskForGaps)
1194 UseMaskForCond, UseMaskForGaps);
1195 assert(isa<VectorType>(VecTy) &&
1196 "Expect a vector type for interleaved memory op");
1198 unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements();
1199 assert(Factor > 1 && NumElts % Factor == 0 &&
"Invalid interleave factor");
1200 unsigned VF = NumElts / Factor;
1203 unsigned NumPermutes = 0;
1205 if (Opcode == Instruction::Load) {
1209 BitVector UsedInsts(NumVectorMemOps,
false);
1210 std::vector<BitVector> ValueVecs(Factor,
BitVector(NumVectorMemOps,
false));
1211 for (
unsigned Index : Indices)
1212 for (
unsigned Elt = 0; Elt < VF; ++Elt) {
1213 unsigned Vec = (
Index + Elt * Factor) / NumEltsPerVecReg;
1217 NumVectorMemOps = UsedInsts.
count();
1219 for (
unsigned Index : Indices) {
1223 unsigned NumSrcVecs = ValueVecs[
Index].count();
1225 assert (NumSrcVecs >= NumDstVecs &&
"Expected at least as many sources");
1226 NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs);
1232 unsigned NumSrcVecs = std::min(NumEltsPerVecReg, Factor);
1233 unsigned NumDstVecs = NumVectorMemOps;
1234 assert (NumSrcVecs > 1 &&
"Expected at least two source vectors.");
1235 NumPermutes += (NumDstVecs * NumSrcVecs) - NumDstVecs;
1239 return NumVectorMemOps + NumPermutes;
1243 if (
RetTy->isVectorTy() &&
ID == Intrinsic::bswap)
amdgpu Simplify well known AMD library false FunctionCallee Callee
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Cost tables and simple lookup functions.
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
static const Function * getCalledFunction(const Value *V, bool &IsNoBuiltin)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file describes how to lower LLVM code to machine code.
Class for arbitrary precision integers.
bool isNegatedPowerOf2() const
Check if this APInt's negated value is a power of two greater than zero.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
Get intrinsic cost based on arguments.
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getNumberOfParts(Type *Tp)
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=std::nullopt)
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind)
Estimate the overhead of scalarizing an instruction.
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask) const
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
size_type count() const
count - Returns the number of bits which are set.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
This class is the base class for the comparison instructions.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
@ ICMP_SLE
signed less or equal
@ ICMP_UGE
unsigned greater or equal
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
@ ICMP_SGE
signed greater or equal
@ ICMP_ULE
unsigned less or equal
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
This is the shared class of boolean and integer constants.
const APInt & getValue() const
Return the constant as an APInt value reference.
This is an important base class in LLVM.
static FixedVectorType * get(Type *ElementType, unsigned NumElts)
std::optional< CostType > getValue() const
This function is intended to be used as sparingly as possible, since the class provides the full rang...
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Type * getReturnType() const
Intrinsic::ID getID() const
An instruction for reading from memory.
Represents a single loop in the control flow graph.
This class wraps the llvm.memcpy intrinsic.
The main scalar evolution driver.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An instruction for storing to memory.
const SystemZInstrInfo * getInstrInfo() const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
unsigned getNumberOfRegisters(unsigned ClassID) const
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
unsigned getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst, const Instruction *I)
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
unsigned adjustInliningThreshold(const CallBase *CB) const
unsigned getVectorTruncCost(Type *SrcTy, Type *DstTy)
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue)
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=std::nullopt)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr)
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE)
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2)
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getVectorBitmaskConversionCost(Type *SrcTy, Type *DstTy)
InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr)
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
bool hasDivRemOp(Type *DataType, bool IsSigned)
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
static constexpr TypeSize getFixed(ScalarTy ExactSize)
static constexpr TypeSize getScalable(ScalarTy MinimumSize)
The instances of the Type class are immutable: once they are created, they are never changed.
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
bool isFloatTy() const
Return true if this is 'float', a 32-bit IEEE fp type.
bool isFP128Ty() const
Return true if this is 'fp128'.
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
bool isFloatingPointTy() const
Return true if this is one of the floating-point types.
bool isPtrOrPtrVectorTy() const
Return true if this is a pointer type or a vector of pointer types.
bool isIntegerTy() const
True if this is an instance of IntegerType.
TypeSize getPrimitiveSizeInBits() const LLVM_READONLY
Return the basic size of this type if it is a primitive type.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Value * getOperand(unsigned i) const
unsigned getNumOperands() const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
user_iterator user_begin()
bool hasOneUse() const
Return true if there is exactly one use of this value.
Base class of all SIMD vector types.
constexpr ScalarTy getFixedValue() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
This is an optimization pass for GlobalISel generic memory operations.
uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator)
Returns the integer ceil(Numerator / Denominator).
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
This struct is a compact representation of a valid (non-zero power of two) alignment.
bool isScalarInteger() const
Return true if this is an integer, but not a vector.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.