LLVM  12.0.0git
TargetTransformInfoImpl.h
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1 //===- TargetTransformInfoImpl.h --------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file provides helpers for the implementation of
10 /// a TargetTransformInfo-conforming class.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
15 #define LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
16 
20 #include "llvm/IR/DataLayout.h"
21 #include "llvm/IR/Function.h"
23 #include "llvm/IR/IntrinsicInst.h"
24 #include "llvm/IR/Operator.h"
25 #include "llvm/IR/Type.h"
26 
27 namespace llvm {
28 
29 /// Base class for use as a mix-in that aids implementing
30 /// a TargetTransformInfo-compatible class.
32 protected:
34 
35  const DataLayout &DL;
36 
38 
39 public:
40  // Provide value semantics. MSVC requires that we spell all of these out.
42  : DL(Arg.DL) {}
44 
45  const DataLayout &getDataLayout() const { return DL; }
46 
47  int getGEPCost(Type *PointeeType, const Value *Ptr,
50  // In the basic model, we just assume that all-constant GEPs will be folded
51  // into their uses via addressing modes.
52  for (unsigned Idx = 0, Size = Operands.size(); Idx != Size; ++Idx)
53  if (!isa<Constant>(Operands[Idx]))
54  return TTI::TCC_Basic;
55 
56  return TTI::TCC_Free;
57  }
58 
60  unsigned &JTSize,
61  ProfileSummaryInfo *PSI,
62  BlockFrequencyInfo *BFI) const {
63  (void)PSI;
64  (void)BFI;
65  JTSize = 0;
66  return SI.getNumCases();
67  }
68 
69  unsigned getInliningThresholdMultiplier() const { return 1; }
70 
71  int getInlinerVectorBonusPercent() const { return 150; }
72 
73  unsigned getMemcpyCost(const Instruction *I) const {
74  return TTI::TCC_Expensive;
75  }
76 
77  bool hasBranchDivergence() const { return false; }
78 
79  bool useGPUDivergenceAnalysis() const { return false; }
80 
81  bool isSourceOfDivergence(const Value *V) const { return false; }
82 
83  bool isAlwaysUniform(const Value *V) const { return false; }
84 
85  unsigned getFlatAddressSpace() const { return -1; }
86 
88  Intrinsic::ID IID) const {
89  return false;
90  }
91 
92  bool isNoopAddrSpaceCast(unsigned, unsigned) const { return false; }
93 
94  unsigned getAssumedAddrSpace(const Value *V) const { return -1; }
95 
97  Value *NewV) const {
98  return nullptr;
99  }
100 
101  bool isLoweredToCall(const Function *F) const {
102  assert(F && "A concrete function must be provided to this routine.");
103 
104  // FIXME: These should almost certainly not be handled here, and instead
105  // handled with the help of TLI or the target itself. This was largely
106  // ported from existing analysis heuristics here so that such refactorings
107  // can take place in the future.
108 
109  if (F->isIntrinsic())
110  return false;
111 
112  if (F->hasLocalLinkage() || !F->hasName())
113  return true;
114 
115  StringRef Name = F->getName();
116 
117  // These will all likely lower to a single selection DAG node.
118  if (Name == "copysign" || Name == "copysignf" || Name == "copysignl" ||
119  Name == "fabs" || Name == "fabsf" || Name == "fabsl" || Name == "sin" ||
120  Name == "fmin" || Name == "fminf" || Name == "fminl" ||
121  Name == "fmax" || Name == "fmaxf" || Name == "fmaxl" ||
122  Name == "sinf" || Name == "sinl" || Name == "cos" || Name == "cosf" ||
123  Name == "cosl" || Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl")
124  return false;
125 
126  // These are all likely to be optimized into something smaller.
127  if (Name == "pow" || Name == "powf" || Name == "powl" || Name == "exp2" ||
128  Name == "exp2l" || Name == "exp2f" || Name == "floor" ||
129  Name == "floorf" || Name == "ceil" || Name == "round" ||
130  Name == "ffs" || Name == "ffsl" || Name == "abs" || Name == "labs" ||
131  Name == "llabs")
132  return false;
133 
134  return true;
135  }
136 
138  AssumptionCache &AC, TargetLibraryInfo *LibInfo,
139  HardwareLoopInfo &HWLoopInfo) const {
140  return false;
141  }
142 
145  DominatorTree *DT,
146  const LoopAccessInfo *LAI) const {
147  return false;
148  }
149 
150  bool emitGetActiveLaneMask() const {
151  return false;
152  }
153 
155  IntrinsicInst &II) const {
156  return None;
157  }
158 
161  APInt DemandedMask, KnownBits &Known,
162  bool &KnownBitsComputed) const {
163  return None;
164  }
165 
167  InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
168  APInt &UndefElts2, APInt &UndefElts3,
169  std::function<void(Instruction *, unsigned, APInt, APInt &)>
170  SimplifyAndSetOp) const {
171  return None;
172  }
173 
175  TTI::UnrollingPreferences &) const {}
176 
178  TTI::PeelingPreferences &) const {}
179 
180  bool isLegalAddImmediate(int64_t Imm) const { return false; }
181 
182  bool isLegalICmpImmediate(int64_t Imm) const { return false; }
183 
184  bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
185  bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
186  Instruction *I = nullptr) const {
187  // Guess that only reg and reg+reg addressing is allowed. This heuristic is
188  // taken from the implementation of LSR.
189  return !BaseGV && BaseOffset == 0 && (Scale == 0 || Scale == 1);
190  }
191 
192  bool isLSRCostLess(TTI::LSRCost &C1, TTI::LSRCost &C2) const {
193  return std::tie(C1.NumRegs, C1.AddRecCost, C1.NumIVMuls, C1.NumBaseAdds,
194  C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
195  std::tie(C2.NumRegs, C2.AddRecCost, C2.NumIVMuls, C2.NumBaseAdds,
196  C2.ScaleCost, C2.ImmCost, C2.SetupCost);
197  }
198 
199  bool isNumRegsMajorCostOfLSR() const { return true; }
200 
201  bool isProfitableLSRChainElement(Instruction *I) const { return false; }
202 
203  bool canMacroFuseCmp() const { return false; }
204 
207  TargetLibraryInfo *LibInfo) const {
208  return false;
209  }
210 
211  bool shouldFavorPostInc() const { return false; }
212 
213  bool shouldFavorBackedgeIndex(const Loop *L) const { return false; }
214 
215  bool isLegalMaskedStore(Type *DataType, Align Alignment) const {
216  return false;
217  }
218 
219  bool isLegalMaskedLoad(Type *DataType, Align Alignment) const {
220  return false;
221  }
222 
223  bool isLegalNTStore(Type *DataType, Align Alignment) const {
224  // By default, assume nontemporal memory stores are available for stores
225  // that are aligned and have a size that is a power of 2.
226  unsigned DataSize = DL.getTypeStoreSize(DataType);
227  return Alignment >= DataSize && isPowerOf2_32(DataSize);
228  }
229 
230  bool isLegalNTLoad(Type *DataType, Align Alignment) const {
231  // By default, assume nontemporal memory loads are available for loads that
232  // are aligned and have a size that is a power of 2.
233  unsigned DataSize = DL.getTypeStoreSize(DataType);
234  return Alignment >= DataSize && isPowerOf2_32(DataSize);
235  }
236 
237  bool isLegalMaskedScatter(Type *DataType, Align Alignment) const {
238  return false;
239  }
240 
241  bool isLegalMaskedGather(Type *DataType, Align Alignment) const {
242  return false;
243  }
244 
245  bool isLegalMaskedCompressStore(Type *DataType) const { return false; }
246 
247  bool isLegalMaskedExpandLoad(Type *DataType) const { return false; }
248 
249  bool hasDivRemOp(Type *DataType, bool IsSigned) const { return false; }
250 
251  bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const {
252  return false;
253  }
254 
255  bool prefersVectorizedAddressing() const { return true; }
256 
257  int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
258  bool HasBaseReg, int64_t Scale,
259  unsigned AddrSpace) const {
260  // Guess that all legal addressing mode are free.
261  if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
262  AddrSpace))
263  return 0;
264  return -1;
265  }
266 
267  bool LSRWithInstrQueries() const { return false; }
268 
269  bool isTruncateFree(Type *Ty1, Type *Ty2) const { return false; }
270 
271  bool isProfitableToHoist(Instruction *I) const { return true; }
272 
273  bool useAA() const { return false; }
274 
275  bool isTypeLegal(Type *Ty) const { return false; }
276 
277  unsigned getRegUsageForType(Type *Ty) const { return 1; }
278 
279  bool shouldBuildLookupTables() const { return true; }
280  bool shouldBuildLookupTablesForConstant(Constant *C) const { return true; }
281 
282  bool useColdCCForColdCall(Function &F) const { return false; }
283 
284  unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts,
285  bool Insert, bool Extract) const {
286  return 0;
287  }
288 
290  unsigned VF) const {
291  return 0;
292  }
293 
294  bool supportsEfficientVectorElementLoadStore() const { return false; }
295 
296  bool enableAggressiveInterleaving(bool LoopHasReductions) const {
297  return false;
298  }
299 
301  bool IsZeroCmp) const {
302  return {};
303  }
304 
305  bool enableInterleavedAccessVectorization() const { return false; }
306 
307  bool enableMaskedInterleavedAccessVectorization() const { return false; }
308 
309  bool isFPVectorizationPotentiallyUnsafe() const { return false; }
310 
312  unsigned AddressSpace, unsigned Alignment,
313  bool *Fast) const {
314  return false;
315  }
316 
317  TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const {
318  return TTI::PSK_Software;
319  }
320 
321  bool haveFastSqrt(Type *Ty) const { return false; }
322 
323  bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { return true; }
324 
325  unsigned getFPOpCost(Type *Ty) const {
327  }
328 
329  int getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
330  Type *Ty) const {
331  return 0;
332  }
333 
334  unsigned getIntImmCost(const APInt &Imm, Type *Ty,
336  return TTI::TCC_Basic;
337  }
338 
339  unsigned getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm,
341  Instruction *Inst = nullptr) const {
342  return TTI::TCC_Free;
343  }
344 
345  unsigned getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
346  const APInt &Imm, Type *Ty,
348  return TTI::TCC_Free;
349  }
350 
351  unsigned getNumberOfRegisters(unsigned ClassID) const { return 8; }
352 
353  unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const {
354  return Vector ? 1 : 0;
355  };
356 
357  const char *getRegisterClassName(unsigned ClassID) const {
358  switch (ClassID) {
359  default:
360  return "Generic::Unknown Register Class";
361  case 0:
362  return "Generic::ScalarRC";
363  case 1:
364  return "Generic::VectorRC";
365  }
366  }
367 
368  unsigned getRegisterBitWidth(bool Vector) const { return 32; }
369 
370  unsigned getMinVectorRegisterBitWidth() const { return 128; }
371 
373 
374  bool shouldMaximizeVectorBandwidth(bool OptSize) const { return false; }
375 
376  unsigned getMinimumVF(unsigned ElemWidth) const { return 0; }
377 
378  unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { return 0; }
379 
381  const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
382  AllowPromotionWithoutCommonHeader = false;
383  return false;
384  }
385 
386  unsigned getCacheLineSize() const { return 0; }
387 
390  switch (Level) {
394  return llvm::Optional<unsigned>();
395  }
396  llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
397  }
398 
401  switch (Level) {
405  return llvm::Optional<unsigned>();
406  }
407 
408  llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
409  }
410 
411  unsigned getPrefetchDistance() const { return 0; }
412  unsigned getMinPrefetchStride(unsigned NumMemAccesses,
413  unsigned NumStridedMemAccesses,
414  unsigned NumPrefetches, bool HasCall) const {
415  return 1;
416  }
417  unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
418  bool enableWritePrefetching() const { return false; }
419 
420  unsigned getMaxInterleaveFactor(unsigned VF) const { return 1; }
421 
422  unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
424  TTI::OperandValueKind Opd1Info,
425  TTI::OperandValueKind Opd2Info,
426  TTI::OperandValueProperties Opd1PropInfo,
427  TTI::OperandValueProperties Opd2PropInfo,
429  const Instruction *CxtI = nullptr) const {
430  // FIXME: A number of transformation tests seem to require these values
431  // which seems a little odd for how arbitary there are.
432  switch (Opcode) {
433  default:
434  break;
435  case Instruction::FDiv:
436  case Instruction::FRem:
437  case Instruction::SDiv:
438  case Instruction::SRem:
439  case Instruction::UDiv:
440  case Instruction::URem:
441  // FIXME: Unlikely to be true for CodeSize.
442  return TTI::TCC_Expensive;
443  }
444  return 1;
445  }
446 
448  VectorType *SubTp) const {
449  return 1;
450  }
451 
452  unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
455  const Instruction *I) const {
456  switch (Opcode) {
457  default:
458  break;
459  case Instruction::IntToPtr: {
460  unsigned SrcSize = Src->getScalarSizeInBits();
461  if (DL.isLegalInteger(SrcSize) &&
462  SrcSize <= DL.getPointerTypeSizeInBits(Dst))
463  return 0;
464  break;
465  }
466  case Instruction::PtrToInt: {
467  unsigned DstSize = Dst->getScalarSizeInBits();
468  if (DL.isLegalInteger(DstSize) &&
469  DstSize >= DL.getPointerTypeSizeInBits(Src))
470  return 0;
471  break;
472  }
473  case Instruction::BitCast:
474  if (Dst == Src || (Dst->isPointerTy() && Src->isPointerTy()))
475  // Identity and pointer-to-pointer casts are free.
476  return 0;
477  break;
478  case Instruction::Trunc: {
479  // trunc to a native type is free (assuming the target has compare and
480  // shift-right of the same width).
481  TypeSize DstSize = DL.getTypeSizeInBits(Dst);
482  if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedSize()))
483  return 0;
484  break;
485  }
486  }
487  return 1;
488  }
489 
490  unsigned getExtractWithExtendCost(unsigned Opcode, Type *Dst,
491  VectorType *VecTy, unsigned Index) const {
492  return 1;
493  }
494 
495  unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind) const {
496  // A phi would be free, unless we're costing the throughput because it
497  // will require a register.
498  if (Opcode == Instruction::PHI && CostKind != TTI::TCK_RecipThroughput)
499  return 0;
500  return 1;
501  }
502 
503  unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
504  CmpInst::Predicate VecPred,
506  const Instruction *I) const {
507  return 1;
508  }
509 
510  unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
511  unsigned Index) const {
512  return 1;
513  }
514 
515  unsigned getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
517  const Instruction *I) const {
518  return 1;
519  }
520 
521  unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
522  unsigned AddressSpace,
524  return 1;
525  }
526 
527  unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
528  const Value *Ptr, bool VariableMask,
530  const Instruction *I = nullptr) const {
531  return 1;
532  }
533 
535  unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
536  Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
537  bool UseMaskForCond, bool UseMaskForGaps) const {
538  return 1;
539  }
540 
543  switch (ICA.getID()) {
544  default:
545  break;
546  case Intrinsic::annotation:
547  case Intrinsic::assume:
548  case Intrinsic::sideeffect:
549  case Intrinsic::pseudoprobe:
550  case Intrinsic::dbg_declare:
551  case Intrinsic::dbg_value:
552  case Intrinsic::dbg_label:
553  case Intrinsic::invariant_start:
554  case Intrinsic::invariant_end:
555  case Intrinsic::launder_invariant_group:
556  case Intrinsic::strip_invariant_group:
557  case Intrinsic::is_constant:
558  case Intrinsic::lifetime_start:
559  case Intrinsic::lifetime_end:
560  case Intrinsic::objectsize:
561  case Intrinsic::ptr_annotation:
562  case Intrinsic::var_annotation:
563  case Intrinsic::experimental_gc_result:
564  case Intrinsic::experimental_gc_relocate:
565  case Intrinsic::coro_alloc:
566  case Intrinsic::coro_begin:
567  case Intrinsic::coro_free:
568  case Intrinsic::coro_end:
569  case Intrinsic::coro_frame:
570  case Intrinsic::coro_size:
571  case Intrinsic::coro_suspend:
572  case Intrinsic::coro_param:
573  case Intrinsic::coro_subfn_addr:
574  // These intrinsics don't actually represent code after lowering.
575  return 0;
576  }
577  return 1;
578  }
579 
582  return 1;
583  }
584 
585  unsigned getNumberOfParts(Type *Tp) const { return 0; }
586 
588  const SCEV *) const {
589  return 0;
590  }
591 
592  unsigned getArithmeticReductionCost(unsigned, VectorType *, bool,
593  TTI::TargetCostKind) const {
594  return 1;
595  }
596 
597  unsigned getMinMaxReductionCost(VectorType *, VectorType *, bool, bool,
598  TTI::TargetCostKind) const {
599  return 1;
600  }
601 
603  return 0;
604  }
605 
607  return false;
608  }
609 
611  // Note for overrides: You must ensure for all element unordered-atomic
612  // memory intrinsics that all power-of-2 element sizes up to, and
613  // including, the return value of this method have a corresponding
614  // runtime lib call. These runtime lib call definitions can be found
615  // in RuntimeLibcalls.h
616  return 0;
617  }
618 
620  Type *ExpectedType) const {
621  return nullptr;
622  }
623 
625  unsigned SrcAddrSpace, unsigned DestAddrSpace,
626  unsigned SrcAlign, unsigned DestAlign) const {
627  return Type::getInt8Ty(Context);
628  }
629 
632  unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
633  unsigned SrcAlign, unsigned DestAlign) const {
634  for (unsigned i = 0; i != RemainingBytes; ++i)
636  }
637 
638  bool areInlineCompatible(const Function *Caller,
639  const Function *Callee) const {
640  return (Caller->getFnAttribute("target-cpu") ==
641  Callee->getFnAttribute("target-cpu")) &&
642  (Caller->getFnAttribute("target-features") ==
643  Callee->getFnAttribute("target-features"));
644  }
645 
647  const Function *Callee,
649  return (Caller->getFnAttribute("target-cpu") ==
650  Callee->getFnAttribute("target-cpu")) &&
651  (Caller->getFnAttribute("target-features") ==
652  Callee->getFnAttribute("target-features"));
653  }
654 
656  const DataLayout &DL) const {
657  return false;
658  }
659 
661  const DataLayout &DL) const {
662  return false;
663  }
664 
665  unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { return 128; }
666 
667  bool isLegalToVectorizeLoad(LoadInst *LI) const { return true; }
668 
669  bool isLegalToVectorizeStore(StoreInst *SI) const { return true; }
670 
671  bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
672  unsigned AddrSpace) const {
673  return true;
674  }
675 
676  bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
677  unsigned AddrSpace) const {
678  return true;
679  }
680 
681  unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
682  unsigned ChainSizeInBytes,
683  VectorType *VecTy) const {
684  return VF;
685  }
686 
687  unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
688  unsigned ChainSizeInBytes,
689  VectorType *VecTy) const {
690  return VF;
691  }
692 
693  bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
694  TTI::ReductionFlags Flags) const {
695  return false;
696  }
697 
698  bool preferInLoopReduction(unsigned Opcode, Type *Ty,
699  TTI::ReductionFlags Flags) const {
700  return false;
701  }
702 
703  bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
704  TTI::ReductionFlags Flags) const {
705  return false;
706  }
707 
708  bool shouldExpandReduction(const IntrinsicInst *II) const { return true; }
709 
710  unsigned getGISelRematGlobalCost() const { return 1; }
711 
712  bool supportsScalableVectors() const { return false; }
713 
714  bool hasActiveVectorLength() const { return false; }
715 
716 protected:
717  // Obtain the minimum required size to hold the value (without the sign)
718  // In case of a vector it returns the min required size for one element.
719  unsigned minRequiredElementSize(const Value *Val, bool &isSigned) const {
720  if (isa<ConstantDataVector>(Val) || isa<ConstantVector>(Val)) {
721  const auto *VectorValue = cast<Constant>(Val);
722 
723  // In case of a vector need to pick the max between the min
724  // required size for each element
725  auto *VT = cast<FixedVectorType>(Val->getType());
726 
727  // Assume unsigned elements
728  isSigned = false;
729 
730  // The max required size is the size of the vector element type
731  unsigned MaxRequiredSize =
732  VT->getElementType()->getPrimitiveSizeInBits().getFixedSize();
733 
734  unsigned MinRequiredSize = 0;
735  for (unsigned i = 0, e = VT->getNumElements(); i < e; ++i) {
736  if (auto *IntElement =
737  dyn_cast<ConstantInt>(VectorValue->getAggregateElement(i))) {
738  bool signedElement = IntElement->getValue().isNegative();
739  // Get the element min required size.
740  unsigned ElementMinRequiredSize =
741  IntElement->getValue().getMinSignedBits() - 1;
742  // In case one element is signed then all the vector is signed.
743  isSigned |= signedElement;
744  // Save the max required bit size between all the elements.
745  MinRequiredSize = std::max(MinRequiredSize, ElementMinRequiredSize);
746  } else {
747  // not an int constant element
748  return MaxRequiredSize;
749  }
750  }
751  return MinRequiredSize;
752  }
753 
754  if (const auto *CI = dyn_cast<ConstantInt>(Val)) {
755  isSigned = CI->getValue().isNegative();
756  return CI->getValue().getMinSignedBits() - 1;
757  }
758 
759  if (const auto *Cast = dyn_cast<SExtInst>(Val)) {
760  isSigned = true;
761  return Cast->getSrcTy()->getScalarSizeInBits() - 1;
762  }
763 
764  if (const auto *Cast = dyn_cast<ZExtInst>(Val)) {
765  isSigned = false;
766  return Cast->getSrcTy()->getScalarSizeInBits();
767  }
768 
769  isSigned = false;
770  return Val->getType()->getScalarSizeInBits();
771  }
772 
773  bool isStridedAccess(const SCEV *Ptr) const {
774  return Ptr && isa<SCEVAddRecExpr>(Ptr);
775  }
776 
778  const SCEV *Ptr) const {
779  if (!isStridedAccess(Ptr))
780  return nullptr;
781  const SCEVAddRecExpr *AddRec = cast<SCEVAddRecExpr>(Ptr);
782  return dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(*SE));
783  }
784 
786  int64_t MergeDistance) const {
787  const SCEVConstant *Step = getConstantStrideStep(SE, Ptr);
788  if (!Step)
789  return false;
790  APInt StrideVal = Step->getAPInt();
791  if (StrideVal.getBitWidth() > 64)
792  return false;
793  // FIXME: Need to take absolute value for negative stride case.
794  return StrideVal.getSExtValue() < MergeDistance;
795  }
796 };
797 
798 /// CRTP base class for use as a mix-in that aids implementing
799 /// a TargetTransformInfo-compatible class.
800 template <typename T>
802 private:
804 
805 protected:
807 
808 public:
809  using BaseT::getGEPCost;
810 
811  int getGEPCost(Type *PointeeType, const Value *Ptr,
814  assert(PointeeType && Ptr && "can't get GEPCost of nullptr");
815  // TODO: will remove this when pointers have an opaque type.
817  PointeeType &&
818  "explicit pointee type doesn't match operand's pointee type");
819  auto *BaseGV = dyn_cast<GlobalValue>(Ptr->stripPointerCasts());
820  bool HasBaseReg = (BaseGV == nullptr);
821 
822  auto PtrSizeBits = DL.getPointerTypeSizeInBits(Ptr->getType());
823  APInt BaseOffset(PtrSizeBits, 0);
824  int64_t Scale = 0;
825 
826  auto GTI = gep_type_begin(PointeeType, Operands);
827  Type *TargetType = nullptr;
828 
829  // Handle the case where the GEP instruction has a single operand,
830  // the basis, therefore TargetType is a nullptr.
831  if (Operands.empty())
832  return !BaseGV ? TTI::TCC_Free : TTI::TCC_Basic;
833 
834  for (auto I = Operands.begin(); I != Operands.end(); ++I, ++GTI) {
835  TargetType = GTI.getIndexedType();
836  // We assume that the cost of Scalar GEP with constant index and the
837  // cost of Vector GEP with splat constant index are the same.
838  const ConstantInt *ConstIdx = dyn_cast<ConstantInt>(*I);
839  if (!ConstIdx)
840  if (auto Splat = getSplatValue(*I))
841  ConstIdx = dyn_cast<ConstantInt>(Splat);
842  if (StructType *STy = GTI.getStructTypeOrNull()) {
843  // For structures the index is always splat or scalar constant
844  assert(ConstIdx && "Unexpected GEP index");
845  uint64_t Field = ConstIdx->getZExtValue();
846  BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
847  } else {
848  // If this operand is a scalable type, bail out early.
849  // TODO: handle scalable vectors
850  if (isa<ScalableVectorType>(TargetType))
851  return TTI::TCC_Basic;
852  int64_t ElementSize =
853  DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize();
854  if (ConstIdx) {
855  BaseOffset +=
856  ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;
857  } else {
858  // Needs scale register.
859  if (Scale != 0)
860  // No addressing mode takes two scale registers.
861  return TTI::TCC_Basic;
862  Scale = ElementSize;
863  }
864  }
865  }
866 
867  if (static_cast<T *>(this)->isLegalAddressingMode(
868  TargetType, const_cast<GlobalValue *>(BaseGV),
869  BaseOffset.sextOrTrunc(64).getSExtValue(), HasBaseReg, Scale,
870  Ptr->getType()->getPointerAddressSpace()))
871  return TTI::TCC_Free;
872  return TTI::TCC_Basic;
873  }
874 
877  auto *TargetTTI = static_cast<T *>(this);
878  // Handle non-intrinsic calls, invokes, and callbr.
879  // FIXME: Unlikely to be true for anything but CodeSize.
880  auto *CB = dyn_cast<CallBase>(U);
881  if (CB && !isa<IntrinsicInst>(U)) {
882  if (const Function *F = CB->getCalledFunction()) {
883  if (!TargetTTI->isLoweredToCall(F))
884  return TTI::TCC_Basic; // Give a basic cost if it will be lowered
885 
886  return TTI::TCC_Basic * (F->getFunctionType()->getNumParams() + 1);
887  }
888  // For indirect or other calls, scale cost by number of arguments.
889  return TTI::TCC_Basic * (CB->arg_size() + 1);
890  }
891 
892  Type *Ty = U->getType();
893  Type *OpTy =
894  U->getNumOperands() == 1 ? U->getOperand(0)->getType() : nullptr;
895  unsigned Opcode = Operator::getOpcode(U);
896  auto *I = dyn_cast<Instruction>(U);
897  switch (Opcode) {
898  default:
899  break;
900  case Instruction::Call: {
901  assert(isa<IntrinsicInst>(U) && "Unexpected non-intrinsic call");
902  auto *Intrinsic = cast<IntrinsicInst>(U);
903  IntrinsicCostAttributes CostAttrs(Intrinsic->getIntrinsicID(), *CB);
904  return TargetTTI->getIntrinsicInstrCost(CostAttrs, CostKind);
905  }
906  case Instruction::Br:
907  case Instruction::Ret:
908  case Instruction::PHI:
909  return TargetTTI->getCFInstrCost(Opcode, CostKind);
910  case Instruction::ExtractValue:
911  case Instruction::Freeze:
912  return TTI::TCC_Free;
913  case Instruction::Alloca:
914  if (cast<AllocaInst>(U)->isStaticAlloca())
915  return TTI::TCC_Free;
916  break;
917  case Instruction::GetElementPtr: {
918  const GEPOperator *GEP = cast<GEPOperator>(U);
919  return TargetTTI->getGEPCost(GEP->getSourceElementType(),
920  GEP->getPointerOperand(),
921  Operands.drop_front());
922  }
923  case Instruction::Add:
924  case Instruction::FAdd:
925  case Instruction::Sub:
926  case Instruction::FSub:
927  case Instruction::Mul:
928  case Instruction::FMul:
929  case Instruction::UDiv:
930  case Instruction::SDiv:
931  case Instruction::FDiv:
932  case Instruction::URem:
933  case Instruction::SRem:
934  case Instruction::FRem:
935  case Instruction::Shl:
936  case Instruction::LShr:
937  case Instruction::AShr:
938  case Instruction::And:
939  case Instruction::Or:
940  case Instruction::Xor:
941  case Instruction::FNeg: {
944  TTI::OperandValueKind Op1VK =
945  TTI::getOperandInfo(U->getOperand(0), Op1VP);
946  TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ?
949  return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind,
950  Op1VK, Op2VK,
951  Op1VP, Op2VP, Operands, I);
952  }
953  case Instruction::IntToPtr:
954  case Instruction::PtrToInt:
955  case Instruction::SIToFP:
956  case Instruction::UIToFP:
957  case Instruction::FPToUI:
958  case Instruction::FPToSI:
959  case Instruction::Trunc:
960  case Instruction::FPTrunc:
961  case Instruction::BitCast:
962  case Instruction::FPExt:
963  case Instruction::SExt:
964  case Instruction::ZExt:
965  case Instruction::AddrSpaceCast:
966  return TargetTTI->getCastInstrCost(
967  Opcode, Ty, OpTy, TTI::getCastContextHint(I), CostKind, I);
968  case Instruction::Store: {
969  auto *SI = cast<StoreInst>(U);
970  Type *ValTy = U->getOperand(0)->getType();
971  return TargetTTI->getMemoryOpCost(Opcode, ValTy, SI->getAlign(),
972  SI->getPointerAddressSpace(),
973  CostKind, I);
974  }
975  case Instruction::Load: {
976  auto *LI = cast<LoadInst>(U);
977  return TargetTTI->getMemoryOpCost(Opcode, U->getType(), LI->getAlign(),
979  CostKind, I);
980  }
981  case Instruction::Select: {
982  Type *CondTy = U->getOperand(0)->getType();
983  return TargetTTI->getCmpSelInstrCost(Opcode, U->getType(), CondTy,
985  CostKind, I);
986  }
987  case Instruction::ICmp:
988  case Instruction::FCmp: {
989  Type *ValTy = U->getOperand(0)->getType();
990  // TODO: Also handle ICmp/FCmp constant expressions.
991  return TargetTTI->getCmpSelInstrCost(Opcode, ValTy, U->getType(),
992  I ? cast<CmpInst>(I)->getPredicate()
994  CostKind, I);
995  }
996  case Instruction::InsertElement: {
997  auto *IE = dyn_cast<InsertElementInst>(U);
998  if (!IE)
999  return TTI::TCC_Basic; // FIXME
1000  auto *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
1001  unsigned Idx = CI ? CI->getZExtValue() : -1;
1002  return TargetTTI->getVectorInstrCost(Opcode, Ty, Idx);
1003  }
1004  case Instruction::ShuffleVector: {
1005  auto *Shuffle = dyn_cast<ShuffleVectorInst>(U);
1006  if (!Shuffle)
1007  return TTI::TCC_Basic; // FIXME
1008  auto *VecTy = cast<VectorType>(U->getType());
1009  auto *VecSrcTy = cast<VectorType>(U->getOperand(0)->getType());
1010 
1011  // TODO: Identify and add costs for insert subvector, etc.
1012  int SubIndex;
1013  if (Shuffle->isExtractSubvectorMask(SubIndex))
1014  return TargetTTI->getShuffleCost(TTI::SK_ExtractSubvector, VecSrcTy,
1015  SubIndex, VecTy);
1016  else if (Shuffle->changesLength())
1017  return CostKind == TTI::TCK_RecipThroughput ? -1 : 1;
1018  else if (Shuffle->isIdentity())
1019  return 0;
1020  else if (Shuffle->isReverse())
1021  return TargetTTI->getShuffleCost(TTI::SK_Reverse, VecTy, 0, nullptr);
1022  else if (Shuffle->isSelect())
1023  return TargetTTI->getShuffleCost(TTI::SK_Select, VecTy, 0, nullptr);
1024  else if (Shuffle->isTranspose())
1025  return TargetTTI->getShuffleCost(TTI::SK_Transpose, VecTy, 0, nullptr);
1026  else if (Shuffle->isZeroEltSplat())
1027  return TargetTTI->getShuffleCost(TTI::SK_Broadcast, VecTy, 0, nullptr);
1028  else if (Shuffle->isSingleSource())
1029  return TargetTTI->getShuffleCost(TTI::SK_PermuteSingleSrc, VecTy, 0,
1030  nullptr);
1031 
1032  return TargetTTI->getShuffleCost(TTI::SK_PermuteTwoSrc, VecTy, 0,
1033  nullptr);
1034  }
1035  case Instruction::ExtractElement: {
1036  unsigned Idx = -1;
1037  auto *EEI = dyn_cast<ExtractElementInst>(U);
1038  if (!EEI)
1039  return TTI::TCC_Basic; // FIXME
1040 
1041  auto *CI = dyn_cast<ConstantInt>(EEI->getOperand(1));
1042  if (CI)
1043  Idx = CI->getZExtValue();
1044 
1045  // Try to match a reduction (a series of shufflevector and vector ops
1046  // followed by an extractelement).
1047  unsigned RdxOpcode;
1048  VectorType *RdxType;
1049  bool IsPairwise;
1050  switch (TTI::matchVectorReduction(EEI, RdxOpcode, RdxType, IsPairwise)) {
1051  case TTI::RK_Arithmetic:
1052  return TargetTTI->getArithmeticReductionCost(RdxOpcode, RdxType,
1053  IsPairwise, CostKind);
1054  case TTI::RK_MinMax:
1055  return TargetTTI->getMinMaxReductionCost(
1056  RdxType, cast<VectorType>(CmpInst::makeCmpResultType(RdxType)),
1057  IsPairwise, /*IsUnsigned=*/false, CostKind);
1059  return TargetTTI->getMinMaxReductionCost(
1060  RdxType, cast<VectorType>(CmpInst::makeCmpResultType(RdxType)),
1061  IsPairwise, /*IsUnsigned=*/true, CostKind);
1062  case TTI::RK_None:
1063  break;
1064  }
1065  return TargetTTI->getVectorInstrCost(Opcode, U->getOperand(0)->getType(),
1066  Idx);
1067  }
1068  }
1069  // By default, just classify everything as 'basic'.
1070  return TTI::TCC_Basic;
1071  }
1072 
1074  SmallVector<const Value *, 4> Operands(I->operand_values());
1076  return 0;
1077 
1078  if (isa<LoadInst>(I))
1079  return 4;
1080 
1081  Type *DstTy = I->getType();
1082 
1083  // Usually an intrinsic is a simple instruction.
1084  // A real function call is much slower.
1085  if (auto *CI = dyn_cast<CallInst>(I)) {
1086  const Function *F = CI->getCalledFunction();
1087  if (!F || static_cast<T *>(this)->isLoweredToCall(F))
1088  return 40;
1089  // Some intrinsics return a value and a flag, we use the value type
1090  // to decide its latency.
1091  if (StructType *StructTy = dyn_cast<StructType>(DstTy))
1092  DstTy = StructTy->getElementType(0);
1093  // Fall through to simple instructions.
1094  }
1095 
1096  if (VectorType *VectorTy = dyn_cast<VectorType>(DstTy))
1097  DstTy = VectorTy->getElementType();
1098  if (DstTy->isFloatingPointTy())
1099  return 3;
1100 
1101  return 1;
1102  }
1103 };
1104 } // namespace llvm
1105 
1106 #endif
Optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
Optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
CastContextHint
Represents a hint about the context in which a cast is used.
uint64_t CallInst * C
llvm::Optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const
Base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:111
Bitwise or logical OR of integers.
bool isLoweredToCall(const Function *F) const
bool hasDivRemOp(Type *DataType, bool IsSigned) const
LLVMContext & Context
unsigned getMaxInterleaveFactor(unsigned VF) const
SI Whole Quad Mode
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Definition: InstrTypes.h:1034
unsigned getMemcpyCost(const Instruction *I) const
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool isLegalNTStore(Type *DataType, Align Alignment) const
unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond, bool UseMaskForGaps) const
bool isNoopAddrSpaceCast(unsigned, unsigned) const
unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
bool shouldBuildLookupTablesForConstant(Constant *C) const
Product of floats.
unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind) const
bool isConstantStridedAccessLessThan(ScalarEvolution *SE, const SCEV *Ptr, int64_t MergeDistance) const
bool isAlwaysUniform(const Value *V) const
unsigned getShuffleCost(TTI::ShuffleKind Kind, VectorType *Ty, int Index, VectorType *SubTp) const
unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
bool isLegalNTLoad(Type *DataType, Align Alignment) const
const StructLayout * getStructLayout(StructType *Ty) const
Returns a StructLayout object, indicating the alignment of the struct, its size, and the offsets of i...
Definition: DataLayout.cpp:670
Analysis providing profile information.
The main scalar evolution driver.
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const
MemIndexedMode
The type of load/store indexing.
ScalarTy getFixedSize() const
Definition: TypeSize.h:421
A cache of @llvm.assume calls within a function.
bool isLegalMaskedLoad(Type *DataType, Align Alignment) const
F(f)
unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
Definition: DerivedTypes.h:711
An instruction for reading from memory.
Definition: Instructions.h:174
Hexagon Common GEP
TypeSize getTypeSizeInBits(Type *Ty) const
Size examples:
Definition: DataLayout.h:664
unsigned getMinMaxReductionCost(VectorType *, VectorType *, bool, bool, TTI::TargetCostKind) const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:722
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1581
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
Definition: SmallPtrSet.h:343
bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, const DataLayout &DL) const
CRTP base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const
Type * getPointerElementType() const
Definition: Type.h:374
unsigned getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const
unsigned getPointerTypeSizeInBits(Type *) const
Layout pointer size, in bits, based on the type.
Definition: DataLayout.cpp:713
bool isFloatingPointTy() const
Return true if this is one of the six floating-point types.
Definition: Type.h:163
Class to represent struct types.
Definition: DerivedTypes.h:212
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
Bitwise or logical AND of integers.
The core instruction combiner logic.
Definition: InstCombiner.h:45
bool isLegalMaskedCompressStore(Type *DataType) const
mir Rename Register Operands
bool preferInLoopReduction(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
const APInt & getAPInt() const
bool isLegalToVectorizeLoad(LoadInst *LI) const
unsigned getAssumedAddrSpace(const Value *V) const
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
bool isStridedAccess(const SCEV *Ptr) const
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const
int64_t getSExtValue() const
Get sign extended value.
Definition: APInt.h:1643
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:246
This node represents a polynomial recurrence on the trip count of the specified loop.
TypeSize getTypeStoreSize(Type *Ty) const
Returns the maximum number of bytes that may be overwritten by storing the specified type.
Definition: DataLayout.h:468
PopcntSupportKind
Flags indicating the kind of support for population count.
bool isLegalICmpImmediate(int64_t Imm) const
APInt sextOrTrunc(unsigned width) const
Sign extend or truncate to width.
Definition: APInt.cpp:956
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
Selects elements from the corresponding lane of either source operand.
bool enableAggressiveInterleaving(bool LoopHasReductions) const
const APInt & getValue() const
Return the constant as an APInt value reference.
Definition: Constants.h:133
An instruction for storing to memory.
Definition: Instructions.h:303
static CastContextHint getCastContextHint(const Instruction *I)
Calculates a CastContextHint from I.
const SCEV * getStepRecurrence(ScalarEvolution &SE) const
Constructs and returns the recurrence indicating how much this expression steps by.
unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind) const
Reverse the order of the vector.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:151
Value * getOperand(unsigned i) const
Definition: User.h:169
Analysis containing CSE Info
Definition: CSEInfo.cpp:25
unsigned getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const
The weighted sum of size and latency.
unsigned minRequiredElementSize(const Value *Val, bool &isSigned) const
int getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition: Type.h:313
ExtractSubvector Index indicates start offset.
bool isLegalToVectorizeStore(StoreInst *SI) const
TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const
unsigned getMinimumVF(unsigned ElemWidth) const
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
Returns options for expansion of memcmp. IsZeroCmp is.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:144
unsigned getRegUsageForType(Type *Ty) const
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:492
Flags describing the kind of vector reduction.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:46
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
Conditional or Unconditional Branch instruction.
TargetTransformInfoImplBase(const TargetTransformInfoImplBase &Arg)
bool shouldFavorBackedgeIndex(const Loop *L) const
This is an important base class in LLVM.
Definition: Constant.h:41
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:229
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
TypeSize getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:500
Expected to fold away in lowering.
const SCEVConstant * getConstantStrideStep(ScalarEvolution *SE, const SCEV *Ptr) const
int getUserCost(const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)
Optional< unsigned > getMaxVScale() const
constexpr double e
Definition: MathExtras.h:58
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Merge elements from two source vectors into one with any shuffle mask.
unsigned getArithmeticReductionCost(unsigned, VectorType *, bool, TTI::TargetCostKind) const
unsigned getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147
Attributes of a target dependent hardware loop.
Optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
const Value * stripPointerCasts() const
Strip off pointer casts, all-zero GEPs and address space casts.
Definition: Value.cpp:630
llvm::Optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo, TTI::OperandValueProperties Opd2PropInfo, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
unsigned getNumberOfRegisters(unsigned ClassID) const
Sum of integers.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I) const
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
unsigned getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr) const
OperandValueProperties
Additional properties of an operand's values.
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
const char * getRegisterClassName(unsigned ClassID) const
void getPeelingPreferences(Loop *, ScalarEvolution &, TTI::PeelingPreferences &) const
unsigned getNumOperands() const
Definition: User.h:191
This is the shared class of boolean and integer constants.
Definition: Constants.h:77
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:350
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
bool areFunctionArgsABICompatible(const Function *Caller, const Function *Callee, SmallPtrSetImpl< Argument * > &Args) const
unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) const
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition: Type.cpp:147
bool isLSRCostLess(TTI::LSRCost &C1, TTI::LSRCost &C2) const
TargetTransformInfoImplBase(const DataLayout &DL)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1116
Provides information about what library functions are available for the current target.
bool isLegalMaskedExpandLoad(Type *DataType) const
AddressSpace
Definition: NVPTXBaseInfo.h:21
bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, unsigned Alignment, bool *Fast) const
bool isLegalInteger(uint64_t Width) const
Returns true if the specified type is known to be a native integer type supported by the CPU.
Definition: DataLayout.h:262
uint32_t Index
bool useReductionIntrinsic(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
bool useColdCCForColdCall(Function &F) const
Drive the analysis of memory accesses in the loop.
bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *TLI, DominatorTree *DT, const LoopAccessInfo *LAI) const
Product of integers.
int getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty) const
Base class of all SIMD vector types.
Definition: DerivedTypes.h:388
Class for arbitrary precision integers.
Definition: APInt.h:70
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I) const
amdgpu Simplify well known AMD library false FunctionCallee Callee
void getUnrollingPreferences(Loop *, ScalarEvolution &, TTI::UnrollingPreferences &) const
int getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency)
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType) const
unsigned getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, unsigned VF) const
uint64_t getElementOffset(unsigned Idx) const
Definition: DataLayout.h:647
This class represents an analyzed expression in the program.
unsigned getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:529
bool isLegalMaskedGather(Type *DataType, Align Alignment) const
Parameters that control the generic loop unrolling transformation.
unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract) const
#define I(x, y, z)
Definition: MD5.cpp:59
Sum of floats.
bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, const DataLayout &DL) const
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
iterator_range< value_op_iterator > operand_values()
Definition: User.h:266
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr) const
Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const
bool isProfitableToHoist(Instruction *I) const
unsigned getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const
bool isScalable() const
Returns whether the size is scaled by a runtime quantity (vscale).
Definition: TypeSize.h:295
unsigned getAddressComputationCost(Type *Tp, ScalarEvolution *, const SCEV *) const
Multiway switch.
TargetTransformInfoImplBase(TargetTransformInfoImplBase &&Arg)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
The cost of a typical 'add' instruction.
unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
LLVM Value Representation.
Definition: Value.h:75
unsigned getOpcode() const
Return the opcode for this Instruction or ConstantExpr.
Definition: Operator.h:40
bool isLegalMaskedStore(Type *DataType, Align Alignment) const
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:280
bool isProfitableLSRChainElement(Instruction *I) const
bool shouldExpandReduction(const IntrinsicInst *II) const
static ReductionKind matchVectorReduction(const ExtractElementInst *ReduxRoot, unsigned &Opcode, VectorType *&Ty, bool &IsPairwise)
bool isTruncateFree(Type *Ty1, Type *Ty2) const
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
Broadcast element 0 to all other elements.
bool shouldMaximizeVectorBandwidth(bool OptSize) const
print Print MemDeps of function
const DataLayout & getDataLayout() const
OperandValueKind
Additional information about an operand's possible values.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
This pass exposes codegen information to IR-level passes.
TargetCostKind
The kind of cost model.
CacheLevel
The possible cache levels.
unsigned getRegisterBitWidth(bool Vector) const
Bitwise or logical XOR of integers.
Information about a load/store intrinsic defined by the target.
The cost of a 'div' instruction on x86.
static IntegerType * getInt8Ty(LLVMContext &C)
Definition: Type.cpp:195
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:44
This class represents a constant integer value.
static OperandValueKind getOperandInfo(const Value *V, OperandValueProperties &OpProps)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
bool isSourceOfDivergence(const Value *V) const
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
ShuffleKind
The various kinds of shuffle patterns for vector queries.
gep_type_iterator gep_type_begin(const User *GEP)
Level
Definition: Debugify.cpp:34
Shuffle elements of single source vector with any shuffle mask.