30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
113 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
115 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
116 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
132 L->getExitingBlocks(ExitingBlocks);
137 if (!
L->isLoopLatch(BB)) {
146 if (ConstEC->getValue()->isZero())
167 bool NotAlways =
false;
169 if (!
L->contains(Pred))
204 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
209 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
212 TTIImpl = std::move(RHS.TTIImpl);
217 return TTIImpl->getInliningThresholdMultiplier();
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
232 return TTIImpl->getInliningLastCallToStaticBonus();
237 return TTIImpl->adjustInliningThreshold(CB);
242 return TTIImpl->getCallerAllocaCost(CB, AI);
246 return TTIImpl->getInlinerVectorBonusPercent();
252 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType,
CostKind);
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
267 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
276 "TTI should not produce negative costs!");
283 : TTIImpl->getPredictableBranchThreshold();
287 return TTIImpl->getBranchMispredictPenalty();
291 return TTIImpl->hasBranchDivergence(
F);
299 Call->hasFnAttr(Attribute::NoDivergenceSource))
306 unsigned ToAS)
const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311 unsigned ToAS)
const {
312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316 return TTIImpl->getFlatAddressSpace();
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
325 unsigned ToAS)
const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
329std::pair<KnownBits, KnownBits>
331 const Value &PtrOp)
const {
332 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
336 unsigned FromAS,
unsigned ToAS,
const KnownBits &FromPtrBits)
const {
337 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
341 unsigned SrcAS,
unsigned DstAS)
const {
342 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
347 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
351 return TTIImpl->getAssumedAddrSpace(V);
355 return TTIImpl->isSingleThreaded();
358std::pair<const Value *, unsigned>
360 return TTIImpl->getPredicatedAddrSpace(V);
365 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
369 return TTIImpl->isLoweredToCall(
F);
375 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
379 return TTIImpl->getEpilogueVectorizationMinVF();
384 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
388 return TTIImpl->getPreferredTailFoldingStyle();
391std::optional<Instruction *>
394 return TTIImpl->instCombineIntrinsic(IC,
II);
399 bool &KnownBitsComputed)
const {
400 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask,
Known,
408 SimplifyAndSetOp)
const {
409 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
410 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
417 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
422 return TTIImpl->getPeelingPreferences(L, SE, PP);
426 return TTIImpl->isLegalAddImmediate(Imm);
430 return TTIImpl->isLegalAddScalableImmediate(Imm);
434 return TTIImpl->isLegalICmpImmediate(Imm);
439 bool HasBaseReg, int64_t Scale,
442 int64_t ScalableOffset)
const {
443 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
444 Scale, AddrSpace,
I, ScalableOffset);
449 return TTIImpl->isLSRCostLess(C1, C2);
453 return TTIImpl->isNumRegsMajorCostOfLSR();
457 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
461 return TTIImpl->isProfitableLSRChainElement(
I);
465 return TTIImpl->canMacroFuseCmp();
472 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
478 return TTIImpl->getPreferredAddressingMode(L, SE);
484 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
491 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
496 Align Alignment)
const {
497 return TTIImpl->isLegalNTStore(DataType, Alignment);
501 return TTIImpl->isLegalNTLoad(DataType, Alignment);
506 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
510 Align Alignment)
const {
511 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
515 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
517 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
521 Align Alignment)
const {
522 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
526 Align Alignment)
const {
527 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
531 Align Alignment)
const {
532 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
536 Align Alignment)
const {
537 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
541 Align Alignment)
const {
542 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
546 Align Alignment)
const {
547 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
552 unsigned AddrSpace)
const {
553 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
558 Type *DataType)
const {
559 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
563 return TTIImpl->enableOrderedReductions();
567 return TTIImpl->hasDivRemOp(DataType, IsSigned);
571 unsigned AddrSpace)
const {
572 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
576 return TTIImpl->prefersVectorizedAddressing();
581 int64_t Scale,
unsigned AddrSpace)
const {
583 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
584 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
589 return TTIImpl->LSRWithInstrQueries();
593 return TTIImpl->isTruncateFree(Ty1, Ty2);
597 return TTIImpl->isProfitableToHoist(
I);
603 return TTIImpl->isTypeLegal(Ty);
607 return TTIImpl->getRegUsageForType(Ty);
611 return TTIImpl->shouldBuildLookupTables();
616 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
620 return TTIImpl->getMinimumLookupTableEntryBitWidth();
624 return TTIImpl->shouldBuildRelLookupTables();
628 return TTIImpl->useColdCCForColdCall(
F);
632 return TTIImpl->useFastCCForInternalCall(
F);
637 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(
ID, ScalarOpdIdx);
642 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(
ID, OpdIdx);
647 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(
ID, RetIdx);
658 I->getOperand(1)->hasOneUse())
673 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
680 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind, VIC);
684 return TTIImpl->supportsEfficientVectorElementLoadStore();
688 return TTIImpl->supportsTailCalls();
692 return TTIImpl->supportsTailCallFor(CB);
696 bool LoopHasReductions)
const {
697 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
702 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
706 return TTIImpl->enableSelectOptimize();
711 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
715 return TTIImpl->enableInterleavedAccessVectorization();
719 return TTIImpl->enableMaskedInterleavedAccessVectorization();
723 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
731 unsigned *
Fast)
const {
732 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
738 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
742 return TTIImpl->haveFastSqrt(Ty);
746 return TTIImpl->haveFastClmul(Ty);
751 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
755 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
760 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
769 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
777 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
782 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
785 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty,
CostKind, Inst);
786 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
795 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty,
CostKind);
796 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
802 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
806 return TTIImpl->getNumberOfRegisters(ClassID);
810 bool IsStore)
const {
811 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
816 return TTIImpl->getRegisterClassForType(
Vector, Ty);
820 return TTIImpl->getRegisterClassName(ClassID);
825 return TTIImpl->getRegisterClassSpillCost(ClassID,
CostKind);
830 return TTIImpl->getRegisterClassReloadCost(ClassID,
CostKind);
835 return TTIImpl->getRegisterBitWidth(K);
839 return TTIImpl->getMinVectorRegisterBitWidth();
843 return TTIImpl->getMaxVScale();
847 return TTIImpl->getVScaleForTuning();
852 return TTIImpl->shouldMaximizeVectorBandwidth(K);
856 bool IsScalable)
const {
857 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
861 unsigned Opcode)
const {
862 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
868 unsigned AddrSpace)
const {
869 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
874 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
875 return TTIImpl->shouldConsiderAddressTypePromotion(
876 I, AllowPromotionWithoutCommonHeader);
881 : TTIImpl->getCacheLineSize();
884std::optional<unsigned>
886 return TTIImpl->getCacheSize(Level);
889std::optional<unsigned>
891 return TTIImpl->getCacheAssociativity(Level);
896 : TTIImpl->getMinPageSize();
900 return TTIImpl->getPrefetchDistance();
904 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
905 unsigned NumPrefetches,
bool HasCall)
const {
906 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
907 NumPrefetches, HasCall);
911 return TTIImpl->getMaxPrefetchIterationsAhead();
915 return TTIImpl->enableWritePrefetching();
919 return TTIImpl->shouldPrefetchAddressSpace(AS);
923 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
927 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
928 AccumType, VF, OpAExtend, OpBExtend,
934 bool HasUnorderedReductions)
const {
935 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
949 if (CI->getValue().isPowerOf2())
951 else if (CI->getValue().isNegatedPowerOf2())
961 if (ShuffleInst->isZeroEltSplat())
976 if (CI->getValue().isPowerOf2())
978 else if (CI->getValue().isNegatedPowerOf2())
984 bool AllPow2 =
true, AllNegPow2 =
true;
985 for (
uint64_t I = 0, E = CDS->getNumElements();
I != E; ++
I) {
987 AllPow2 &= CI->getValue().isPowerOf2();
988 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
989 if (AllPow2 || AllNegPow2)
992 AllPow2 = AllNegPow2 =
false;
1001 return {OpInfo, OpProps};
1021 if (TLibInfo && Opcode == Instruction::FRem) {
1025 TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
1032 Opcode, Ty,
CostKind, Op1Info, Op2Info, Args, CxtI);
1033 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1038 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1041 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
1042 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1052 "Expected the Mask to match the return size if given");
1054 "Expected the same scalar types");
1056 Kind, DstTy, SrcTy, Mask,
CostKind, Index, SubTp, Args, CxtI);
1057 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1073 return Instruction::CastOps::ZExt;
1075 return Instruction::CastOps::SExt;
1077 return Instruction::CastOps::FPExt;
1088 case Instruction::CastOps::ZExt:
1090 case Instruction::CastOps::SExt:
1092 case Instruction::CastOps::FPExt:
1105 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1106 unsigned GatScatOp) {
1111 if (
I->getOpcode() == LdStOp)
1115 if (
II->getIntrinsicID() == MaskedOp)
1117 if (
II->getIntrinsicID() == GatScatOp)
1124 switch (
I->getOpcode()) {
1125 case Instruction::ZExt:
1126 case Instruction::SExt:
1127 case Instruction::FPExt:
1128 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1129 Intrinsic::masked_load, Intrinsic::masked_gather);
1130 case Instruction::Trunc:
1131 case Instruction::FPTrunc:
1133 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1134 Intrinsic::masked_store,
1135 Intrinsic::masked_scatter);
1147 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1148 "Opcode should reflect passed instruction.");
1150 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1151 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1159 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1160 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1166 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1167 "Opcode should reflect passed instruction.");
1169 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1177 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1178 "Opcode should reflect passed instruction.");
1180 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1181 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1188 assert((Opcode == Instruction::InsertElement ||
1189 Opcode == Instruction::ExtractElement) &&
1190 "Expecting Opcode to be insertelement/extractelement.");
1192 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1, VIC);
1193 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1199 Value *Scalar,
ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1201 assert((Opcode == Instruction::InsertElement ||
1202 Opcode == Instruction::ExtractElement) &&
1203 "Expecting Opcode to be insertelement/extractelement.");
1205 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1206 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1217 TTIImpl->getVectorInstrCost(
I, Val,
CostKind, Index, VIC);
1218 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1224 unsigned Index)
const {
1226 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1227 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1233 assert((Opcode == Instruction::InsertValue ||
1234 Opcode == Instruction::ExtractValue) &&
1235 "Expecting Opcode to be insertvalue/extractvalue.");
1237 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1242 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1245 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1246 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1254 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1255 "Opcode should reflect passed instruction.");
1258 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1265 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1268 UseMaskForCond, UseMaskForGaps);
1269 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1277 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1285 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1294 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1299 return TTIImpl->getNumberOfParts(Tp);
1306 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1307 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1313 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1318 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1322 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1325 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1326 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1334 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1335 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1342 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1347 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1349 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1355 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1360 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1364 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1369 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1375 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1376 std::optional<uint32_t> AtomicElementSize)
const {
1377 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1378 DestAddrSpace, SrcAlign, DestAlign,
1384 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1386 std::optional<uint32_t> AtomicCpySize)
const {
1387 TTIImpl->getMemcpyLoopResidualLoweringType(
1388 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1389 DestAlign, AtomicCpySize);
1394 return TTIImpl->areInlineCompatible(Caller, Callee);
1400 unsigned DefaultCallPenalty)
const {
1401 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1406 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1411 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1416 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1421 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1425 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1429 return TTIImpl->isLegalToVectorizeLoad(LI);
1433 return TTIImpl->isLegalToVectorizeStore(
SI);
1437 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1438 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1443 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1444 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1450 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1454 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1459 unsigned ChainSizeInBytes,
1461 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1466 unsigned ChainSizeInBytes,
1468 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1472 bool IsEpilogue)
const {
1473 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1478 return TTIImpl->preferInLoopReduction(Kind, Ty);
1482 return TTIImpl->preferAlternateOpcodeVectorization();
1486 return TTIImpl->preferSLPInstCountCheck();
1490 return TTIImpl->preferPredicatedReductionSelect();
1495 return TTIImpl->preferEpilogueVectorization(Iters);
1499 return TTIImpl->shouldConsiderVectorizationRegPressure();
1504 return TTIImpl->getVPLegalizationStrategy(VPI);
1508 return TTIImpl->hasArmWideBranch(Thumb);
1512 return TTIImpl->getFeatureMask(
F);
1516 return TTIImpl->getPriorityMask(
F);
1520 return TTIImpl->isMultiversionedFunction(
F);
1524 return TTIImpl->getMaxNumArgs();
1528 return TTIImpl->shouldExpandReduction(
II);
1534 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1538 return TTIImpl->getGISelRematGlobalCost();
1542 return TTIImpl->getMinTripCountTailFoldingThreshold();
1546 return TTIImpl->supportsScalableVectors();
1550 return TTIImpl->enableScalableVectorization();
1554 return TTIImpl->hasActiveVectorLength();
1559 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1563 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1569 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1575 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1579 return TTIImpl->allowVectorElementIndexingUsingGEP();
1584 return TTIImpl->isUniform(
I, UniformArgs);
1593 : TTICallback(
std::
move(TTICallback)) {}
1597 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1598 return TTICallback(
F);
1604 return Result(
F.getDataLayout());
1609 "Target Transform Information",
false,
true)
1623 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Conditional Branch instruction.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
Class to represent integer types.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
@ Known
Known to have no common set bits.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
VectorInstrContext
Represents a hint about the context in which a vector instruction or intrinsic is used.
@ None
The instruction is not folded.
@ Load
The value being inserted comes from a load (InsertElement only).
@ Store
The extracted value is stored (ExtractElement only).
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
ValueUniformity
Enum describing how values behave with respect to uniformity and divergence, to answer the question: ...
@ NeverUniform
The result value can never be assumed to be uniform.
@ Default
The result value is uniform if and only if all operands are uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.