30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost), LibInfo(LibInfo) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
113 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
115 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
116 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
132 L->getExitingBlocks(ExitingBlocks);
137 if (!
L->isLoopLatch(BB)) {
146 if (ConstEC->getValue()->isZero())
167 bool NotAlways =
false;
169 if (!
L->contains(Pred))
187 if (!BI->isConditional())
207 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
212 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
215 TTIImpl = std::move(RHS.TTIImpl);
220 return TTIImpl->getInliningThresholdMultiplier();
225 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
231 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
235 return TTIImpl->getInliningLastCallToStaticBonus();
240 return TTIImpl->adjustInliningThreshold(CB);
245 return TTIImpl->getCallerAllocaCost(CB, AI);
249 return TTIImpl->getInlinerVectorBonusPercent();
255 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType,
CostKind);
263 "If pointers have same base address it has to be provided.");
264 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
270 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
279 "TTI should not produce negative costs!");
286 : TTIImpl->getPredictableBranchThreshold();
290 return TTIImpl->getBranchMispredictPenalty();
294 return TTIImpl->hasBranchDivergence(
F);
299 if (
Call->hasFnAttr(Attribute::NoDivergenceSource))
302 return TTIImpl->isSourceOfDivergence(V);
306 return TTIImpl->isAlwaysUniform(V);
310 unsigned ToAS)
const {
311 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
315 unsigned ToAS)
const {
316 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
320 return TTIImpl->getFlatAddressSpace();
325 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
329 unsigned ToAS)
const {
330 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
335 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
339 return TTIImpl->getAssumedAddrSpace(V);
343 return TTIImpl->isSingleThreaded();
346std::pair<const Value *, unsigned>
348 return TTIImpl->getPredicatedAddrSpace(V);
353 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
357 return TTIImpl->isLoweredToCall(
F);
363 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
367 return TTIImpl->getEpilogueVectorizationMinVF();
372 return TTIImpl->preferPredicateOverEpilogue(TFI);
376 bool IVUpdateMayOverflow)
const {
377 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
380std::optional<Instruction *>
383 return TTIImpl->instCombineIntrinsic(IC,
II);
388 bool &KnownBitsComputed)
const {
389 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask, Known,
397 SimplifyAndSetOp)
const {
398 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
399 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
406 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
411 return TTIImpl->getPeelingPreferences(L, SE, PP);
415 return TTIImpl->isLegalAddImmediate(Imm);
419 return TTIImpl->isLegalAddScalableImmediate(Imm);
423 return TTIImpl->isLegalICmpImmediate(Imm);
428 bool HasBaseReg, int64_t Scale,
431 int64_t ScalableOffset)
const {
432 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
433 Scale, AddrSpace,
I, ScalableOffset);
438 return TTIImpl->isLSRCostLess(C1, C2);
442 return TTIImpl->isNumRegsMajorCostOfLSR();
446 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
450 return TTIImpl->isProfitableLSRChainElement(
I);
454 return TTIImpl->canMacroFuseCmp();
461 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
467 return TTIImpl->getPreferredAddressingMode(L, SE);
473 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
480 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
485 Align Alignment)
const {
486 return TTIImpl->isLegalNTStore(DataType, Alignment);
490 return TTIImpl->isLegalNTLoad(DataType, Alignment);
495 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
499 Align Alignment)
const {
500 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
504 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
506 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
510 Align Alignment)
const {
511 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
515 Align Alignment)
const {
516 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
520 Align Alignment)
const {
521 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
525 Align Alignment)
const {
526 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
530 Align Alignment)
const {
531 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
535 Align Alignment)
const {
536 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
541 unsigned AddrSpace)
const {
542 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
547 Type *DataType)
const {
548 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
552 return TTIImpl->enableOrderedReductions();
556 return TTIImpl->hasDivRemOp(DataType, IsSigned);
560 unsigned AddrSpace)
const {
561 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
565 return TTIImpl->prefersVectorizedAddressing();
570 int64_t Scale,
unsigned AddrSpace)
const {
572 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
573 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
578 return TTIImpl->LSRWithInstrQueries();
582 return TTIImpl->isTruncateFree(Ty1, Ty2);
586 return TTIImpl->isProfitableToHoist(
I);
592 return TTIImpl->isTypeLegal(Ty);
596 return TTIImpl->getRegUsageForType(Ty);
600 return TTIImpl->shouldBuildLookupTables();
605 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
609 return TTIImpl->shouldBuildRelLookupTables();
613 return TTIImpl->useColdCCForColdCall(
F);
617 return TTIImpl->useFastCCForInternalCall(
F);
622 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(
ID);
627 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(
ID, ScalarOpdIdx);
632 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(
ID, OpdIdx);
637 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(
ID, RetIdx);
644 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
650 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind);
654 return TTIImpl->supportsEfficientVectorElementLoadStore();
658 return TTIImpl->supportsTailCalls();
662 return TTIImpl->supportsTailCallFor(CB);
666 bool LoopHasReductions)
const {
667 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
672 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
676 return TTIImpl->enableSelectOptimize();
681 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
685 return TTIImpl->enableInterleavedAccessVectorization();
689 return TTIImpl->enableMaskedInterleavedAccessVectorization();
693 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
701 unsigned *
Fast)
const {
702 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
708 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
712 return TTIImpl->haveFastSqrt(Ty);
717 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
721 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
726 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
735 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
743 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
748 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
751 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty,
CostKind, Inst);
752 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
761 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty,
CostKind);
762 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
768 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
772 return TTIImpl->getNumberOfRegisters(ClassID);
776 bool IsStore)
const {
777 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
782 return TTIImpl->getRegisterClassForType(
Vector, Ty);
786 return TTIImpl->getRegisterClassName(ClassID);
791 return TTIImpl->getRegisterBitWidth(K);
795 return TTIImpl->getMinVectorRegisterBitWidth();
799 return TTIImpl->getMaxVScale();
803 return TTIImpl->getVScaleForTuning();
807 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
812 return TTIImpl->shouldMaximizeVectorBandwidth(K);
816 bool IsScalable)
const {
817 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
821 unsigned Opcode)
const {
822 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
826 Type *ScalarValTy)
const {
827 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
831 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
832 return TTIImpl->shouldConsiderAddressTypePromotion(
833 I, AllowPromotionWithoutCommonHeader);
838 : TTIImpl->getCacheLineSize();
841std::optional<unsigned>
843 return TTIImpl->getCacheSize(Level);
846std::optional<unsigned>
848 return TTIImpl->getCacheAssociativity(Level);
853 : TTIImpl->getMinPageSize();
857 return TTIImpl->getPrefetchDistance();
861 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
862 unsigned NumPrefetches,
bool HasCall)
const {
863 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
864 NumPrefetches, HasCall);
868 return TTIImpl->getMaxPrefetchIterationsAhead();
872 return TTIImpl->enableWritePrefetching();
876 return TTIImpl->shouldPrefetchAddressSpace(AS);
880 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
884 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
885 AccumType, VF, OpAExtend, OpBExtend,
890 return TTIImpl->getMaxInterleaveFactor(VF);
904 if (CI->getValue().isPowerOf2())
906 else if (CI->getValue().isNegatedPowerOf2())
916 if (ShuffleInst->isZeroEltSplat())
931 if (CI->getValue().isPowerOf2())
933 else if (CI->getValue().isNegatedPowerOf2())
939 bool AllPow2 =
true, AllNegPow2 =
true;
940 for (
uint64_t I = 0, E = CDS->getNumElements();
I != E; ++
I) {
942 AllPow2 &= CI->getValue().isPowerOf2();
943 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
944 if (AllPow2 || AllNegPow2)
947 AllPow2 = AllNegPow2 =
false;
956 return {OpInfo, OpProps};
968 if (TLibInfo && Opcode == Instruction::FRem) {
972 TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
979 TTIImpl->getArithmeticInstrCost(Opcode, Ty,
CostKind,
982 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
987 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
990 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
991 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1001 "Expected the Mask to match the return size if given");
1003 "Expected the same scalar types");
1005 Kind, DstTy, SrcTy, Mask,
CostKind, Index, SubTp, Args, CxtI);
1006 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1021 case Instruction::CastOps::ZExt:
1023 case Instruction::CastOps::SExt:
1036 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1037 unsigned GatScatOp) {
1042 if (
I->getOpcode() == LdStOp)
1046 if (
II->getIntrinsicID() == MaskedOp)
1048 if (
II->getIntrinsicID() == GatScatOp)
1055 switch (
I->getOpcode()) {
1056 case Instruction::ZExt:
1057 case Instruction::SExt:
1058 case Instruction::FPExt:
1059 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1060 Intrinsic::masked_load, Intrinsic::masked_gather);
1061 case Instruction::Trunc:
1062 case Instruction::FPTrunc:
1064 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1065 Intrinsic::masked_store,
1066 Intrinsic::masked_scatter);
1078 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1079 "Opcode should reflect passed instruction.");
1081 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1082 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1090 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1091 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1097 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1098 "Opcode should reflect passed instruction.");
1100 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1108 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1109 "Opcode should reflect passed instruction.");
1111 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1112 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1119 assert((Opcode == Instruction::InsertElement ||
1120 Opcode == Instruction::ExtractElement) &&
1121 "Expecting Opcode to be insertelement/extractelement.");
1123 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1);
1124 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1131 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx)
const {
1132 assert((Opcode == Instruction::InsertElement ||
1133 Opcode == Instruction::ExtractElement) &&
1134 "Expecting Opcode to be insertelement/extractelement.");
1136 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx);
1137 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1144 unsigned Index)
const {
1149 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1155 unsigned Index)
const {
1157 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1158 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1164 assert((Opcode == Instruction::InsertValue ||
1165 Opcode == Instruction::ExtractValue) &&
1166 "Expecting Opcode to be insertvalue/extractvalue.");
1168 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1173 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1176 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1177 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1185 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1186 "Opcode should reflect passed instruction.");
1189 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1196 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1199 UseMaskForCond, UseMaskForGaps);
1200 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1208 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1216 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1225 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1230 return TTIImpl->getNumberOfParts(Tp);
1237 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1238 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1244 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1249 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1253 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1256 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1257 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1265 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1266 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1273 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1278 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1280 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1286 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1291 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1295 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1300 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1306 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1307 std::optional<uint32_t> AtomicElementSize)
const {
1308 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1309 DestAddrSpace, SrcAlign, DestAlign,
1315 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1317 std::optional<uint32_t> AtomicCpySize)
const {
1318 TTIImpl->getMemcpyLoopResidualLoweringType(
1319 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1320 DestAlign, AtomicCpySize);
1325 return TTIImpl->areInlineCompatible(Caller, Callee);
1331 unsigned DefaultCallPenalty)
const {
1332 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1338 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1343 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1348 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1352 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1356 return TTIImpl->isLegalToVectorizeLoad(LI);
1360 return TTIImpl->isLegalToVectorizeStore(
SI);
1364 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1365 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1370 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1371 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1377 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1381 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1386 unsigned ChainSizeInBytes,
1388 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1393 unsigned ChainSizeInBytes,
1395 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1399 bool IsEpilogue)
const {
1400 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1405 return TTIImpl->preferInLoopReduction(Kind, Ty);
1409 return TTIImpl->preferAlternateOpcodeVectorization();
1413 return TTIImpl->preferPredicatedReductionSelect();
1417 return TTIImpl->preferEpilogueVectorization();
1421 return TTIImpl->shouldConsiderVectorizationRegPressure();
1426 return TTIImpl->getVPLegalizationStrategy(VPI);
1430 return TTIImpl->hasArmWideBranch(Thumb);
1434 return TTIImpl->getFeatureMask(
F);
1438 return TTIImpl->isMultiversionedFunction(
F);
1442 return TTIImpl->getMaxNumArgs();
1446 return TTIImpl->shouldExpandReduction(
II);
1452 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1456 return TTIImpl->getGISelRematGlobalCost();
1460 return TTIImpl->getMinTripCountTailFoldingThreshold();
1464 return TTIImpl->supportsScalableVectors();
1468 return TTIImpl->enableScalableVectorization();
1472 return TTIImpl->hasActiveVectorLength();
1477 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1481 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1487 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1493 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1497 return TTIImpl->allowVectorElementIndexingUsingGEP();
1506 : TTICallback(
std::
move(TTICallback)) {}
1510 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1511 return TTICallback(
F);
1517 return Result(
F.getDataLayout());
1522 "Target Transform Information",
false,
true)
1536 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false, TargetLibraryInfo const *LibInfo=nullptr)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.