27using namespace PatternMatch;
29#define DEBUG_TYPE "tti"
33 cl::desc(
"Recognize reduction patterns."));
37 cl::desc(
"Use this to override the target cache line size when "
38 "specified by the user."));
42 cl::desc(
"Use this to override the target's minimum page size."));
47 "Use this to override the target's predictable branch threshold (%)."));
65 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
74 ScalarizationCost(ScalarizationCost) {
76 if (
const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
77 FMF = FPMO->getFastMathFlags();
90 :
II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
91 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
96 :
RetTy(Ty), IID(Id) {
98 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
99 ParamTys.reserve(Arguments.size());
110 :
II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
111 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
112 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
139 if (isa<SCEVCouldNotCompute>(EC))
141 if (
const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
142 if (ConstEC->getValue()->isZero())
163 bool NotAlways =
false;
182 if (
BranchInst *BI = dyn_cast<BranchInst>(TI)) {
183 if (!BI->isConditional())
203 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(
DL))) {}
208 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
211 TTIImpl = std::move(
RHS.TTIImpl);
216 return TTIImpl->getInliningThresholdMultiplier();
221 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
227 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
231 return TTIImpl->getInliningLastCallToStaticBonus();
236 return TTIImpl->adjustInliningThreshold(CB);
241 return TTIImpl->getCallerAllocaCost(CB, AI);
245 return TTIImpl->getInlinerVectorBonusPercent();
259 "If pointers have same base address it has to be provided.");
266 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
275 "TTI should not produce negative costs!");
282 : TTIImpl->getPredictableBranchThreshold();
286 return TTIImpl->getBranchMispredictPenalty();
290 return TTIImpl->hasBranchDivergence(
F);
294 if (
const auto *Call = dyn_cast<CallBase>(V)) {
295 if (Call->hasFnAttr(Attribute::NoDivergenceSource))
298 return TTIImpl->isSourceOfDivergence(V);
302 return TTIImpl->isAlwaysUniform(V);
306 unsigned ToAS)
const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311 unsigned ToAS)
const {
312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316 return TTIImpl->getFlatAddressSpace();
321 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
325 unsigned ToAS)
const {
326 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
331 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
335 return TTIImpl->getAssumedAddrSpace(V);
339 return TTIImpl->isSingleThreaded();
342std::pair<const Value *, unsigned>
344 return TTIImpl->getPredicatedAddrSpace(V);
349 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
353 return TTIImpl->isLoweredToCall(
F);
359 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
363 return TTIImpl->getEpilogueVectorizationMinVF();
368 return TTIImpl->preferPredicateOverEpilogue(TFI);
372 bool IVUpdateMayOverflow)
const {
373 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
376std::optional<Instruction *>
379 return TTIImpl->instCombineIntrinsic(IC,
II);
384 bool &KnownBitsComputed)
const {
385 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask, Known,
393 SimplifyAndSetOp)
const {
394 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
395 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
402 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
407 return TTIImpl->getPeelingPreferences(L, SE, PP);
411 return TTIImpl->isLegalAddImmediate(Imm);
415 return TTIImpl->isLegalAddScalableImmediate(Imm);
419 return TTIImpl->isLegalICmpImmediate(Imm);
424 bool HasBaseReg, int64_t Scale,
427 int64_t ScalableOffset)
const {
428 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
429 Scale, AddrSpace,
I, ScalableOffset);
434 return TTIImpl->isLSRCostLess(C1, C2);
438 return TTIImpl->isNumRegsMajorCostOfLSR();
442 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
446 return TTIImpl->isProfitableLSRChainElement(
I);
450 return TTIImpl->canMacroFuseCmp();
457 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
463 return TTIImpl->getPreferredAddressingMode(L, SE);
467 Align Alignment)
const {
468 return TTIImpl->isLegalMaskedStore(DataType, Alignment);
472 Align Alignment)
const {
473 return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
477 Align Alignment)
const {
478 return TTIImpl->isLegalNTStore(DataType, Alignment);
482 return TTIImpl->isLegalNTLoad(DataType, Alignment);
487 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
491 Align Alignment)
const {
492 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
496 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
498 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
502 Align Alignment)
const {
503 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
507 Align Alignment)
const {
508 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
512 Align Alignment)
const {
513 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
517 Align Alignment)
const {
518 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
522 Align Alignment)
const {
523 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
527 Align Alignment)
const {
528 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
533 unsigned AddrSpace)
const {
534 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
539 Type *DataType)
const {
540 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
544 return TTIImpl->enableOrderedReductions();
548 return TTIImpl->hasDivRemOp(DataType, IsSigned);
552 unsigned AddrSpace)
const {
553 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
557 return TTIImpl->prefersVectorizedAddressing();
562 int64_t Scale,
unsigned AddrSpace)
const {
564 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
565 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
570 return TTIImpl->LSRWithInstrQueries();
574 return TTIImpl->isTruncateFree(Ty1, Ty2);
578 return TTIImpl->isProfitableToHoist(
I);
584 return TTIImpl->isTypeLegal(Ty);
588 return TTIImpl->getRegUsageForType(Ty);
592 return TTIImpl->shouldBuildLookupTables();
597 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
601 return TTIImpl->shouldBuildRelLookupTables();
605 return TTIImpl->useColdCCForColdCall(
F);
610 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(
ID);
615 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(
ID, ScalarOpdIdx);
620 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(
ID, OpdIdx);
625 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(
ID, RetIdx);
631 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
638 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys,
CostKind);
642 return TTIImpl->supportsEfficientVectorElementLoadStore();
646 return TTIImpl->supportsTailCalls();
650 return TTIImpl->supportsTailCallFor(CB);
654 bool LoopHasReductions)
const {
655 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
660 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
664 return TTIImpl->enableSelectOptimize();
669 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
673 return TTIImpl->enableInterleavedAccessVectorization();
677 return TTIImpl->enableMaskedInterleavedAccessVectorization();
681 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
689 unsigned *
Fast)
const {
690 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
696 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
700 return TTIImpl->haveFastSqrt(Ty);
705 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
709 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
714 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
723 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
731 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
736 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
739 TTIImpl->getIntImmCostInst(Opcode,
Idx, Imm, Ty,
CostKind, Inst);
740 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
749 TTIImpl->getIntImmCostIntrin(IID,
Idx, Imm, Ty,
CostKind);
750 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
756 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
760 return TTIImpl->getNumberOfRegisters(ClassID);
764 return TTIImpl->hasConditionalLoadStoreForType(Ty);
769 return TTIImpl->getRegisterClassForType(
Vector, Ty);
773 return TTIImpl->getRegisterClassName(ClassID);
778 return TTIImpl->getRegisterBitWidth(K);
782 return TTIImpl->getMinVectorRegisterBitWidth();
786 return TTIImpl->getMaxVScale();
790 return TTIImpl->getVScaleForTuning();
794 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
799 return TTIImpl->shouldMaximizeVectorBandwidth(K);
803 bool IsScalable)
const {
804 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
808 unsigned Opcode)
const {
809 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
813 Type *ScalarValTy)
const {
814 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
818 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
819 return TTIImpl->shouldConsiderAddressTypePromotion(
820 I, AllowPromotionWithoutCommonHeader);
825 : TTIImpl->getCacheLineSize();
828std::optional<unsigned>
830 return TTIImpl->getCacheSize(Level);
833std::optional<unsigned>
835 return TTIImpl->getCacheAssociativity(Level);
840 : TTIImpl->getMinPageSize();
844 return TTIImpl->getPrefetchDistance();
848 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
849 unsigned NumPrefetches,
bool HasCall)
const {
850 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
851 NumPrefetches, HasCall);
855 return TTIImpl->getMaxPrefetchIterationsAhead();
859 return TTIImpl->enableWritePrefetching();
863 return TTIImpl->shouldPrefetchAddressSpace(AS);
867 return TTIImpl->getMaxInterleaveFactor(VF);
875 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
876 if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
877 if (CI->getValue().isPowerOf2())
879 else if (CI->getValue().isNegatedPowerOf2())
888 if (
const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
889 if (ShuffleInst->isZeroEltSplat())
896 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
900 if (
auto *CI = dyn_cast<ConstantInt>(
Splat)) {
901 if (CI->getValue().isPowerOf2())
903 else if (CI->getValue().isNegatedPowerOf2())
906 }
else if (
const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
907 bool AllPow2 =
true, AllNegPow2 =
true;
908 for (
unsigned I = 0, E = CDS->getNumElements();
I != E; ++
I) {
909 if (
auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(
I))) {
910 AllPow2 &= CI->getValue().isPowerOf2();
911 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
912 if (AllPow2 || AllNegPow2)
915 AllPow2 = AllNegPow2 =
false;
928 return {OpInfo, OpProps};
940 if (TLibInfo && Opcode == Instruction::FRem) {
951 TTIImpl->getArithmeticInstrCost(Opcode, Ty,
CostKind,
954 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
959 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
962 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
963 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
972 Index, SubTp, Args, CxtI);
973 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
982 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
983 unsigned GatScatOp) {
988 if (
I->getOpcode() == LdStOp)
992 if (
II->getIntrinsicID() == MaskedOp)
994 if (
II->getIntrinsicID() == GatScatOp)
1001 switch (
I->getOpcode()) {
1002 case Instruction::ZExt:
1003 case Instruction::SExt:
1004 case Instruction::FPExt:
1005 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1006 Intrinsic::masked_load, Intrinsic::masked_gather);
1007 case Instruction::Trunc:
1008 case Instruction::FPTrunc:
1010 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1011 Intrinsic::masked_store,
1012 Intrinsic::masked_scatter);
1024 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1025 "Opcode should reflect passed instruction.");
1027 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1028 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1033 unsigned Opcode,
Type *Dst,
VectorType *VecTy,
unsigned Index)
const {
1035 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
1036 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1042 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1043 "Opcode should reflect passed instruction.");
1045 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1053 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1054 "Opcode should reflect passed instruction.");
1056 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1057 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1064 assert((Opcode == Instruction::InsertElement ||
1065 Opcode == Instruction::ExtractElement) &&
1066 "Expecting Opcode to be insertelement/extractelement.");
1068 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1);
1069 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1076 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx)
const {
1077 assert((Opcode == Instruction::InsertElement ||
1078 Opcode == Instruction::ExtractElement) &&
1079 "Expecting Opcode to be insertelement/extractelement.");
1081 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx);
1082 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1089 unsigned Index)
const {
1094 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1099 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1102 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1103 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1111 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1112 "Opcode should reflect passed instruction.");
1115 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1124 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1129 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1132 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
1134 "TTI should not produce negative costs!");
1139 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1142 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
1143 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1150 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1153 UseMaskForCond, UseMaskForGaps);
1154 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1162 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1171 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1176 return TTIImpl->getNumberOfParts(Tp);
1183 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1189 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1194 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1198 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1201 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1202 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1210 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1211 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1218 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1225 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty,
CostKind);
1230 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1235 return TTIImpl->getTgtMemIntrinsic(Inst,
Info);
1239 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1244 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1249 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1250 std::optional<uint32_t> AtomicElementSize)
const {
1251 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1252 DestAddrSpace, SrcAlign, DestAlign,
1258 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1260 std::optional<uint32_t> AtomicCpySize)
const {
1261 TTIImpl->getMemcpyLoopResidualLoweringType(
1262 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1263 DestAlign, AtomicCpySize);
1268 return TTIImpl->areInlineCompatible(Caller, Callee);
1274 unsigned DefaultCallPenalty)
const {
1275 return TTIImpl->getInlineCallPenalty(
F, Call, DefaultCallPenalty);
1281 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1286 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1291 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1295 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1299 return TTIImpl->isLegalToVectorizeLoad(LI);
1303 return TTIImpl->isLegalToVectorizeStore(SI);
1307 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1308 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1313 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1314 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1320 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1324 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1329 unsigned ChainSizeInBytes,
1331 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1336 unsigned ChainSizeInBytes,
1338 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1342 return TTIImpl->preferFixedOverScalableIfEqualCost();
1347 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1352 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1356 return TTIImpl->preferEpilogueVectorization();
1361 return TTIImpl->getVPLegalizationStrategy(VPI);
1365 return TTIImpl->hasArmWideBranch(Thumb);
1369 return TTIImpl->getMaxNumArgs();
1373 return TTIImpl->shouldExpandReduction(
II);
1379 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1383 return TTIImpl->getGISelRematGlobalCost();
1387 return TTIImpl->getMinTripCountTailFoldingThreshold();
1391 return TTIImpl->supportsScalableVectors();
1395 return TTIImpl->enableScalableVectorization();
1399 Align Alignment)
const {
1400 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1405 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1409 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1415 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1424 : TTICallback(
std::
move(TTICallback)) {}
1428 return TTICallback(
F);
1434 return Result(
F.getDataLayout());
1439 "Target Transform Information",
false,
true)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
mir Rename Register Operands
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
A container for analyses that lazily runs them and caches their results.
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
LLVMContext & getContext() const
Get the context in which this basic block lives.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
param_iterator param_begin() const
param_iterator param_end() const
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
BlockT * getHeader() const
bool isLoopLatch(const BlockT *BB) const
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
static IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
void initializeTargetTransformInfoWrapperPassPass(PassRegistry &)
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.