30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.push_back(Arg->getType());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
113 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
115 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
116 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
132 L->getExitingBlocks(ExitingBlocks);
137 if (!
L->isLoopLatch(BB)) {
146 if (ConstEC->getValue()->isZero())
167 bool NotAlways =
false;
169 if (!
L->contains(Pred))
204 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
209 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
212 TTIImpl = std::move(RHS.TTIImpl);
217 return TTIImpl->getInliningThresholdMultiplier();
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
232 return TTIImpl->getInliningLastCallToStaticBonus();
237 return TTIImpl->adjustInliningThreshold(CB);
242 return TTIImpl->getCallerAllocaCost(CB, AI);
246 return TTIImpl->getInlinerVectorBonusPercent();
252 return TTIImpl->getGEPCost(PointeeType, Ptr,
Operands,
CostKind, AccessType);
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
267 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
276 "TTI should not produce negative costs!");
283 : TTIImpl->getPredictableBranchThreshold();
287 return TTIImpl->getBranchMispredictPenalty();
291 return TTIImpl->hasBranchDivergence(
F);
299 Call->hasFnAttr(Attribute::NoDivergenceSource))
306 unsigned ToAS)
const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311 unsigned ToAS)
const {
312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316 return TTIImpl->getFlatAddressSpace();
320 unsigned AS2)
const {
321 assert(AS1 != AS2 &&
"Expected distinct address spaces");
322 return TTIImpl->getAddressSpaceJoin(AS1, AS2);
327 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
331 unsigned ToAS)
const {
332 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
335std::pair<KnownBits, KnownBits>
337 const Value &PtrOp)
const {
338 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
342 unsigned FromAS,
unsigned ToAS,
const KnownBits &FromPtrBits)
const {
343 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
347 unsigned SrcAS,
unsigned DstAS)
const {
348 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
353 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
357 return TTIImpl->getAssumedAddrSpace(V);
360std::pair<const Value *, unsigned>
362 return TTIImpl->getPredicatedAddrSpace(V);
367 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
371 return TTIImpl->isLoweredToCall(
F);
377 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
381 return TTIImpl->getEpilogueVectorizationMinVF();
386 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
390 return TTIImpl->getPreferredTailFoldingStyle();
393std::optional<Instruction *>
396 return TTIImpl->instCombineIntrinsic(IC,
II);
401 bool &KnownBitsComputed)
const {
402 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask,
Known,
410 SimplifyAndSetOp)
const {
411 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
412 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
419 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
424 return TTIImpl->getPeelingPreferences(L, SE, PP);
428 return TTIImpl->isLegalAddImmediate(
Imm);
432 return TTIImpl->isLegalAddScalableImmediate(
Imm);
436 return TTIImpl->isLegalICmpImmediate(
Imm);
441 bool HasBaseReg, int64_t Scale,
444 int64_t ScalableOffset)
const {
445 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
446 Scale, AddrSpace,
I, ScalableOffset);
451 return TTIImpl->isLSRCostLess(C1, C2);
455 return TTIImpl->isNumRegsMajorCostOfLSR();
459 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
463 return TTIImpl->isProfitableLSRChainElement(
I);
467 return TTIImpl->canMacroFuseCmp();
474 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
480 return TTIImpl->getPreferredAddressingMode(L, SE);
486 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
493 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
499 return TTIImpl->isLegalSpeculativeLoad(DataType,
AddressSpace);
503 Align Alignment)
const {
504 return TTIImpl->isLegalNTStore(DataType, Alignment);
508 return TTIImpl->isLegalNTLoad(DataType, Alignment);
513 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
517 Align Alignment)
const {
518 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
522 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
524 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask, Scalars);
528 Align Alignment)
const {
529 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
533 Align Alignment)
const {
534 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
538 Align Alignment)
const {
539 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
543 Align Alignment)
const {
544 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
548 Align Alignment)
const {
549 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
553 Align Alignment)
const {
554 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
559 bool IsStore, std::optional<Instruction::CastOps> CastHint)
const {
560 return TTIImpl->hasMultiVectorLoadStore(NumVectors, Mask, VectorTy, IsStore,
566 unsigned AddrSpace)
const {
567 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
572 Type *DataType)
const {
573 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
577 return TTIImpl->enableOrderedReductions();
581 return TTIImpl->hasDivRemOp(DataType, IsSigned);
585 unsigned AddrSpace)
const {
586 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
590 return TTIImpl->prefersVectorizedAddressing();
595 int64_t Scale,
unsigned AddrSpace)
const {
597 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
598 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
603 return TTIImpl->LSRWithInstrQueries();
607 return TTIImpl->isTruncateFree(Ty1, Ty2);
611 return TTIImpl->isProfitableToHoist(
I);
617 return TTIImpl->isTypeLegal(Ty);
621 return TTIImpl->getRegUsageForType(Ty);
625 return TTIImpl->shouldBuildLookupTables();
630 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
634 return TTIImpl->getMinimumLookupTableEntryBitWidth();
638 return TTIImpl->shouldBuildRelLookupTables();
642 return TTIImpl->useColdCCForColdCall(
F);
646 return TTIImpl->useFastCCForInternalCall(
F);
651 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
656 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
661 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
668 return Ctx1 == Ctx2 ? Ctx1 : TargetTransformInfo::VectorInstrContext::None;
679 I->getOperand(1)->hasOneUse())
695 return TTIImpl->getBuildVectorContextHint(Mask, Scalars, GatherUseOps);
702 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
709 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind, VIC);
713 return TTIImpl->supportsEfficientVectorElementLoadStore();
717 return TTIImpl->supportsTailCalls();
721 return TTIImpl->supportsTailCallFor(CB);
725 bool LoopHasReductions)
const {
726 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
731 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
735 return TTIImpl->enableSelectOptimize();
740 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
744 return TTIImpl->enableInterleavedAccessVectorization();
748 return TTIImpl->enableMaskedInterleavedAccessVectorization();
752 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
760 unsigned *
Fast)
const {
761 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
767 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
771 return TTIImpl->haveFastSqrt(Ty);
775 return TTIImpl->haveFastClmul(Ty);
780 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
784 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
789 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
798 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
806 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
811 unsigned Opcode,
unsigned Idx,
const APInt &
Imm,
Type *Ty,
814 TTIImpl->getIntImmCostInst(Opcode, Idx,
Imm, Ty,
CostKind, Inst);
815 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
824 TTIImpl->getIntImmCostIntrin(IID, Idx,
Imm, Ty,
CostKind);
825 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
831 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
835 return TTIImpl->getNumberOfRegisters(ClassID);
839 bool IsStore)
const {
840 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
845 return TTIImpl->getRegisterClassForType(
Vector, Ty);
849 return TTIImpl->getRegisterClassName(ClassID);
854 return TTIImpl->getRegisterClassSpillCost(ClassID,
CostKind);
859 return TTIImpl->getRegisterClassReloadCost(ClassID,
CostKind);
864 return TTIImpl->getRegisterBitWidth(
K);
868 return TTIImpl->getMinVectorRegisterBitWidth();
872 return TTIImpl->getVScaleForTuning();
877 return TTIImpl->shouldMaximizeVectorBandwidth(
K);
881 bool IsScalable)
const {
882 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
886 unsigned Opcode)
const {
887 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
893 unsigned AddrSpace)
const {
894 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
899 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
900 return TTIImpl->shouldConsiderAddressTypePromotion(
901 I, AllowPromotionWithoutCommonHeader);
906 : TTIImpl->getCacheLineSize();
909std::optional<unsigned>
911 return TTIImpl->getCacheSize(Level);
914std::optional<unsigned>
916 return TTIImpl->getCacheAssociativity(Level);
921 : TTIImpl->getMinPageSize();
925 return TTIImpl->getPrefetchDistance();
929 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
930 unsigned NumPrefetches,
bool HasCall)
const {
931 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
932 NumPrefetches, HasCall);
936 return TTIImpl->getMaxPrefetchIterationsAhead();
940 return TTIImpl->enableWritePrefetching();
944 return TTIImpl->shouldPrefetchAddressSpace(AS);
948 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
952 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
953 AccumType, VF, OpAExtend, OpBExtend,
959 bool HasUnorderedReductions)
const {
960 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
974 if (CI->getValue().isPowerOf2())
976 else if (CI->getValue().isNegatedPowerOf2())
986 if (ShuffleInst->isZeroEltSplat())
1001 if (CI->getValue().isPowerOf2())
1003 else if (CI->getValue().isNegatedPowerOf2())
1009 bool AllPow2 =
true, AllNegPow2 =
true;
1010 for (uint64_t
I = 0, E = CDS->getNumElements();
I != E; ++
I) {
1012 AllPow2 &= CI->getValue().isPowerOf2();
1013 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
1014 if (AllPow2 || AllNegPow2)
1017 AllPow2 = AllNegPow2 =
false;
1026 return {OpInfo, OpProps};
1032 const auto *Op0 =
Ops.front();
1046 return CI->getValue().isPowerOf2();
1052 return CI->getValue().isNegatedPowerOf2();
1057 if (IsConstant && IsUniform)
1059 else if (IsConstant)
1088 if (TLibInfo && Opcode == Instruction::FRem) {
1090 LibFunc Func = TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType());
1091 if (VecTy && Func != NotLibFunc &&
1098 Opcode, Ty,
CostKind, Op1Info, Op2Info, Args, CtxI);
1099 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1104 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1108 VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind, Scalars);
1109 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1120 "Expected the Mask to match the return size if given");
1122 "Expected the same scalar types");
1124 Kind, DstTy, SrcTy,
CostKind, Mask, Index, SubTp, Args, CtxI, VIC);
1125 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1141 return Instruction::CastOps::ZExt;
1143 return Instruction::CastOps::SExt;
1145 return Instruction::CastOps::FPExt;
1156 case Instruction::CastOps::ZExt:
1158 case Instruction::CastOps::SExt:
1160 case Instruction::CastOps::FPExt:
1173 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1174 unsigned GatScatOp) {
1179 if (
I->getOpcode() == LdStOp)
1183 if (
II->getIntrinsicID() == MaskedOp)
1185 if (
II->getIntrinsicID() == GatScatOp)
1192 switch (
I->getOpcode()) {
1193 case Instruction::ZExt:
1194 case Instruction::SExt:
1195 case Instruction::FPExt:
1196 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1197 Intrinsic::masked_load, Intrinsic::masked_gather);
1198 case Instruction::Trunc:
1199 case Instruction::FPTrunc:
1201 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1202 Intrinsic::masked_store,
1203 Intrinsic::masked_scatter);
1215 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1216 "Opcode should reflect passed instruction.");
1218 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1219 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1227 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1228 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1234 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1235 "Opcode should reflect passed instruction.");
1237 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1245 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1246 "Opcode should reflect passed instruction.");
1248 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1249 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1256 assert((Opcode == Instruction::InsertElement ||
1257 Opcode == Instruction::ExtractElement) &&
1258 "Expecting Opcode to be insertelement/extractelement.");
1260 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1, VIC);
1261 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1267 Value *Scalar,
ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1269 assert((Opcode == Instruction::InsertElement ||
1270 Opcode == Instruction::ExtractElement) &&
1271 "Expecting Opcode to be insertelement/extractelement.");
1273 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1274 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1285 TTIImpl->getVectorInstrCost(
I, Val,
CostKind, Index, VIC);
1286 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1292 unsigned Index)
const {
1294 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1295 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1301 assert((Opcode == Instruction::InsertValue ||
1302 Opcode == Instruction::ExtractValue) &&
1303 "Expecting Opcode to be insertvalue/extractvalue.");
1305 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1310 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1313 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1314 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1322 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1323 "Opcode should reflect passed instruction.");
1326 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1333 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1336 UseMaskForCond, UseMaskForGaps);
1337 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1345 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1353 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1362 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1367 return TTIImpl->getNumberOfParts(Tp);
1374 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1375 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1381 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1386 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1390 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1393 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1394 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1402 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1403 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1410 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1415 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1417 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1423 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1428 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1432 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1437 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1443 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1444 std::optional<uint32_t> AtomicElementSize)
const {
1445 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1446 DestAddrSpace, SrcAlign, DestAlign,
1452 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1454 std::optional<uint32_t> AtomicCpySize)
const {
1455 TTIImpl->getMemcpyLoopResidualLoweringType(
1456 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1457 DestAlign, AtomicCpySize);
1462 return TTIImpl->areInlineCompatible(Caller, Callee);
1468 unsigned DefaultCallPenalty)
const {
1469 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1474 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1479 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1484 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1489 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1493 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1497 return TTIImpl->isLegalToVectorizeLoad(LI);
1501 return TTIImpl->isLegalToVectorizeStore(
SI);
1505 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1506 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1511 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1512 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1518 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1522 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1527 unsigned ChainSizeInBytes,
1529 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1534 unsigned ChainSizeInBytes,
1536 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1540 return TTIImpl->preferFixedOverScalableIfEqualCost();
1545 return TTIImpl->preferInLoopReduction(Kind, Ty);
1549 return TTIImpl->preferAlternateOpcodeVectorization();
1553 return TTIImpl->preferSLPInstCountCheck();
1557 return TTIImpl->preferPredicatedReductionSelect();
1562 return TTIImpl->preferEpilogueVectorization(Iters);
1566 return TTIImpl->shouldConsiderVectorizationRegPressure();
1571 return TTIImpl->getVPLegalizationStrategy(VPI);
1575 return TTIImpl->hasArmWideBranch(Thumb);
1579 return TTIImpl->getFeatureMask(
F);
1583 return TTIImpl->getPriorityMask(
F);
1587 return TTIImpl->isMultiversionedFunction(
F);
1591 return TTIImpl->getMaxNumArgs();
1595 return TTIImpl->shouldExpandReduction(
II);
1601 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1605 return TTIImpl->getGISelRematGlobalCost();
1609 return TTIImpl->getMinTripCountTailFoldingThreshold();
1613 return TTIImpl->supportsScalableVectors();
1617 return TTIImpl->enableScalableVectorization();
1621 return TTIImpl->hasActiveVectorLength();
1626 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1630 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1636 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1642 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1646 return TTIImpl->allowVectorElementIndexingUsingGEP();
1651 return TTIImpl->isUniform(
I, UniformArgs);
1660 : TTICallback(
std::
move(TTICallback)) {}
1664 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1665 return TTICallback(
F);
1671 return Result(
F.getDataLayout());
1676 "Target Transform Information",
false,
true)
1690 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
iterator_range< User::op_iterator > args()
Iteration adapter for range-for loops.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Conditional Branch instruction.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
Class to represent integer types.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
LibFunc getLibFunc(StringRef funcName) const
Searches for a particular function name.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
LLVM_ABI bool isScalableTy() const
Return true if this is a type whose size is a known multiple of vscale.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
An efficient, type-erasing, non-owning reference to a callable.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
@ Known
Known to have no common set bits.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
VectorInstrContext
Represents a hint about the context in which a vector instruction or intrinsic is used.
@ None
The instruction is not folded.
@ Load
The value being inserted comes from a load (InsertElement only).
@ Store
The extracted value is stored (ExtractElement only).
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
@ Fast
Assign the register banks as fast as possible (default).
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
ValueUniformity
Enum describing how values behave with respect to uniformity and divergence, to answer the question: ...
@ NeverUniform
The result value can never be assumed to be uniform.
@ Default
The result value is uniform if and only if all operands are uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.