27using namespace PatternMatch;
29#define DEBUG_TYPE "tti"
33 cl::desc(
"Recognize reduction patterns."));
37 cl::desc(
"Use this to override the target cache line size when "
38 "specified by the user."));
43 "Use this to override the target's predictable branch threshold (%)."));
61 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
70 ScalarizationCost(ScalarizationCost) {
72 if (
const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
73 FMF = FPMO->getFastMathFlags();
86 : II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
87 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
92 :
RetTy(Ty), IID(Id) {
94 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
95 ParamTys.reserve(Arguments.size());
106 : II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
107 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
108 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
135 if (isa<SCEVCouldNotCompute>(EC))
137 if (
const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
138 if (ConstEC->getValue()->isZero())
159 bool NotAlways =
false;
178 if (
BranchInst *BI = dyn_cast<BranchInst>(TI)) {
179 if (!BI->isConditional())
199 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(
DL))) {}
204 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
207 TTIImpl = std::move(
RHS.TTIImpl);
212 return TTIImpl->getInliningThresholdMultiplier();
217 return TTIImpl->adjustInliningThreshold(CB);
222 return TTIImpl->getCallerAllocaCost(CB, AI);
226 return TTIImpl->getInlinerVectorBonusPercent();
240 "If pointers have same base address it has to be provided.");
247 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
256 "TTI should not produce negative costs!");
263 : TTIImpl->getPredictableBranchThreshold();
267 return TTIImpl->hasBranchDivergence(
F);
271 return TTIImpl->isSourceOfDivergence(V);
275 return TTIImpl->isAlwaysUniform(V);
279 unsigned ToAS)
const {
280 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
284 unsigned ToAS)
const {
285 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
289 return TTIImpl->getFlatAddressSpace();
294 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
298 unsigned ToAS)
const {
299 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
304 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
308 return TTIImpl->getAssumedAddrSpace(V);
312 return TTIImpl->isSingleThreaded();
315std::pair<const Value *, unsigned>
317 return TTIImpl->getPredicatedAddrSpace(V);
322 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
326 return TTIImpl->isLoweredToCall(
F);
332 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
337 return TTIImpl->preferPredicateOverEpilogue(TFI);
341 bool IVUpdateMayOverflow)
const {
342 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
345std::optional<Instruction *>
348 return TTIImpl->instCombineIntrinsic(IC, II);
353 bool &KnownBitsComputed)
const {
354 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
362 SimplifyAndSetOp)
const {
363 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
364 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
371 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
376 return TTIImpl->getPeelingPreferences(L, SE, PP);
380 return TTIImpl->isLegalAddImmediate(Imm);
384 return TTIImpl->isLegalICmpImmediate(Imm);
389 bool HasBaseReg, int64_t Scale,
392 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
393 Scale, AddrSpace,
I);
398 return TTIImpl->isLSRCostLess(C1, C2);
402 return TTIImpl->isNumRegsMajorCostOfLSR();
406 return TTIImpl->isProfitableLSRChainElement(
I);
410 return TTIImpl->canMacroFuseCmp();
417 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
423 return TTIImpl->getPreferredAddressingMode(L, SE);
427 Align Alignment)
const {
428 return TTIImpl->isLegalMaskedStore(DataType, Alignment);
432 Align Alignment)
const {
433 return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
437 Align Alignment)
const {
438 return TTIImpl->isLegalNTStore(DataType, Alignment);
442 return TTIImpl->isLegalNTLoad(DataType, Alignment);
447 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
451 Align Alignment)
const {
452 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
456 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
458 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
462 Align Alignment)
const {
463 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
467 Align Alignment)
const {
468 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
472 Align Alignment)
const {
473 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
477 return TTIImpl->isLegalMaskedCompressStore(DataType);
481 return TTIImpl->isLegalMaskedExpandLoad(DataType);
485 return TTIImpl->enableOrderedReductions();
489 return TTIImpl->hasDivRemOp(DataType, IsSigned);
493 unsigned AddrSpace)
const {
494 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
498 return TTIImpl->prefersVectorizedAddressing();
503 int64_t Scale,
unsigned AddrSpace)
const {
505 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
506 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
511 return TTIImpl->LSRWithInstrQueries();
515 return TTIImpl->isTruncateFree(Ty1, Ty2);
519 return TTIImpl->isProfitableToHoist(
I);
525 return TTIImpl->isTypeLegal(Ty);
529 return TTIImpl->getRegUsageForType(Ty);
533 return TTIImpl->shouldBuildLookupTables();
538 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
542 return TTIImpl->shouldBuildRelLookupTables();
546 return TTIImpl->useColdCCForColdCall(
F);
552 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
559 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys,
CostKind);
563 return TTIImpl->supportsEfficientVectorElementLoadStore();
567 return TTIImpl->supportsTailCalls();
571 return TTIImpl->supportsTailCallFor(CB);
575 bool LoopHasReductions)
const {
576 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
581 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
585 return TTIImpl->enableSelectOptimize();
589 return TTIImpl->enableInterleavedAccessVectorization();
593 return TTIImpl->enableMaskedInterleavedAccessVectorization();
597 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
605 unsigned *
Fast)
const {
612 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
616 return TTIImpl->haveFastSqrt(Ty);
621 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
625 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
630 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
639 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
647 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
652 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
655 TTIImpl->getIntImmCostInst(Opcode,
Idx, Imm, Ty,
CostKind, Inst);
656 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
665 TTIImpl->getIntImmCostIntrin(IID,
Idx, Imm, Ty,
CostKind);
666 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
671 return TTIImpl->getNumberOfRegisters(ClassID);
676 return TTIImpl->getRegisterClassForType(
Vector, Ty);
680 return TTIImpl->getRegisterClassName(ClassID);
685 return TTIImpl->getRegisterBitWidth(K);
689 return TTIImpl->getMinVectorRegisterBitWidth();
693 return TTIImpl->getMaxVScale();
697 return TTIImpl->getVScaleForTuning();
701 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
706 return TTIImpl->shouldMaximizeVectorBandwidth(K);
710 bool IsScalable)
const {
711 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
715 unsigned Opcode)
const {
716 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
720 Type *ScalarValTy)
const {
721 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
725 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
726 return TTIImpl->shouldConsiderAddressTypePromotion(
727 I, AllowPromotionWithoutCommonHeader);
732 : TTIImpl->getCacheLineSize();
735std::optional<unsigned>
737 return TTIImpl->getCacheSize(Level);
740std::optional<unsigned>
742 return TTIImpl->getCacheAssociativity(Level);
746 return TTIImpl->getPrefetchDistance();
750 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
751 unsigned NumPrefetches,
bool HasCall)
const {
752 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
753 NumPrefetches, HasCall);
757 return TTIImpl->getMaxPrefetchIterationsAhead();
761 return TTIImpl->enableWritePrefetching();
765 return TTIImpl->shouldPrefetchAddressSpace(AS);
769 return TTIImpl->getMaxInterleaveFactor(VF);
777 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
778 if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
779 if (CI->getValue().isPowerOf2())
781 else if (CI->getValue().isNegatedPowerOf2())
790 if (
const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
791 if (ShuffleInst->isZeroEltSplat())
798 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
802 if (
auto *CI = dyn_cast<ConstantInt>(
Splat)) {
803 if (CI->getValue().isPowerOf2())
805 else if (CI->getValue().isNegatedPowerOf2())
808 }
else if (
const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
809 bool AllPow2 =
true, AllNegPow2 =
true;
810 for (
unsigned I = 0,
E = CDS->getNumElements();
I !=
E; ++
I) {
811 if (
auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(
I))) {
812 AllPow2 &= CI->getValue().isPowerOf2();
813 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
814 if (AllPow2 || AllNegPow2)
817 AllPow2 = AllNegPow2 =
false;
830 return {OpInfo, OpProps};
838 TTIImpl->getArithmeticInstrCost(Opcode, Ty,
CostKind,
841 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
850 TTIImpl->getShuffleCost(Kind, Ty, Mask,
CostKind,
Index, SubTp, Args);
851 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
860 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
861 unsigned GatScatOp) {
866 if (
I->getOpcode() == LdStOp)
879 switch (
I->getOpcode()) {
880 case Instruction::ZExt:
881 case Instruction::SExt:
882 case Instruction::FPExt:
883 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
884 Intrinsic::masked_load, Intrinsic::masked_gather);
885 case Instruction::Trunc:
886 case Instruction::FPTrunc:
888 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
889 Intrinsic::masked_store,
890 Intrinsic::masked_scatter);
902 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
903 "Opcode should reflect passed instruction.");
905 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
906 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
913 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy,
Index);
914 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
920 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
921 "Opcode should reflect passed instruction.");
923 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
930 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
931 "Opcode should reflect passed instruction.");
933 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred,
CostKind,
I);
934 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
945 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind,
Index, Op0, Op1);
946 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
953 unsigned Index)
const {
958 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
963 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
966 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
967 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
975 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
976 "Opcode should reflect passed instruction.");
979 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
988 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
993 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
996 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
997 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1004 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1007 UseMaskForCond, UseMaskForGaps);
1008 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1016 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1025 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1030 return TTIImpl->getNumberOfParts(Tp);
1037 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1043 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1048 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1052 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1055 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1056 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1064 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1065 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1072 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1079 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty,
CostKind);
1084 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1089 return TTIImpl->getTgtMemIntrinsic(Inst,
Info);
1093 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1098 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1103 unsigned DestAddrSpace,
unsigned SrcAlign,
unsigned DestAlign,
1104 std::optional<uint32_t> AtomicElementSize)
const {
1105 return TTIImpl->getMemcpyLoopLoweringType(
Context,
Length, SrcAddrSpace,
1106 DestAddrSpace, SrcAlign, DestAlign,
1112 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1113 unsigned SrcAlign,
unsigned DestAlign,
1114 std::optional<uint32_t> AtomicCpySize)
const {
1115 TTIImpl->getMemcpyLoopResidualLoweringType(
1116 OpsOut,
Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1117 DestAlign, AtomicCpySize);
1122 return TTIImpl->areInlineCompatible(Caller, Callee);
1128 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1133 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1138 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1142 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1146 return TTIImpl->isLegalToVectorizeLoad(LI);
1150 return TTIImpl->isLegalToVectorizeStore(SI);
1154 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1155 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1160 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1161 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1167 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1171 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1176 unsigned ChainSizeInBytes,
1178 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1183 unsigned ChainSizeInBytes,
1185 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1190 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1195 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1199 return TTIImpl->preferEpilogueVectorization();
1204 return TTIImpl->getVPLegalizationStrategy(VPI);
1208 return TTIImpl->hasArmWideBranch(Thumb);
1212 return TTIImpl->getMaxNumArgs();
1216 return TTIImpl->shouldExpandReduction(II);
1220 return TTIImpl->getGISelRematGlobalCost();
1224 return TTIImpl->getMinTripCountTailFoldingThreshold();
1228 return TTIImpl->supportsScalableVectors();
1232 return TTIImpl->enableScalableVectorization();
1236 Align Alignment)
const {
1237 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1246 : TTICallback(
std::
move(TTICallback)) {}
1250 return TTICallback(
F);
1256 return Result(
F.getParent()->getDataLayout());
1261 "Target Transform Information",
false,
true)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
mir Rename Register Operands
Module.h This file contains the declarations for the Module class.
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
A container for analyses that lazily runs them and caches their results.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
LLVMContext & getContext() const
Get the context in which this basic block lives.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
static Constant * get(Type *Ty, uint64_t V, bool IsSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
param_iterator param_begin() const
param_iterator param_end() const
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
BlockT * getHeader() const
bool isLoopLatch(const BlockT *BB) const
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
The instances of the Type class are immutable: once they are created, they are never changed.
static IntegerType * getInt32Ty(LLVMContext &C)
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Base class of all SIMD vector types.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
void initializeTargetTransformInfoWrapperPassPass(PassRegistry &)
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.