LLVM 24.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
55#include <algorithm>
56#include <cassert>
57#include <cstdint>
58#include <limits>
59#include <optional>
60#include <utility>
61
62namespace llvm {
63
64class Function;
65class GlobalValue;
66class LLVMContext;
67class ScalarEvolution;
68class SCEV;
69class TargetMachine;
70
72
73/// Base class which can be used to help build a TTI implementation.
74///
75/// This class provides as much implementation of the TTI interface as is
76/// possible using the target independent parts of the code generator.
77///
78/// In order to subclass it, your class must implement a getST() method to
79/// return the subtarget, and a getTLI() method to return the target lowering.
80/// We need these methods implemented in the derived class so that this class
81/// doesn't have to duplicate storage for them.
82template <typename T>
84private:
86 using TTI = TargetTransformInfo;
87
88 /// Helper function to access this as a T.
89 const T *thisT() const { return static_cast<const T *>(this); }
90
91 /// Estimate a cost of Broadcast as an extract and sequence of insert
92 /// operations.
94 getBroadcastShuffleOverhead(FixedVectorType *VTy,
97 // Broadcast cost is equal to the cost of extracting the zero'th element
98 // plus the cost of inserting it into every element of the result vector.
99 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
100 CostKind, 0, nullptr, nullptr);
101
102 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
103 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
104 CostKind, i, nullptr, nullptr);
105 }
106 return Cost;
107 }
108
109 /// Estimate a cost of shuffle as a sequence of extract and insert
110 /// operations.
112 getPermuteShuffleOverhead(FixedVectorType *VTy,
115 // Shuffle cost is equal to the cost of extracting element from its argument
116 // plus the cost of inserting them onto the result vector.
117
118 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
119 // index 0 of first vector, index 1 of second vector,index 2 of first
120 // vector and finally index 3 of second vector and insert them at index
121 // <0,1,2,3> of result vector.
122 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
123 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
124 CostKind, i, nullptr, nullptr);
125 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
126 CostKind, i, nullptr, nullptr);
127 }
128 return Cost;
129 }
130
131 /// Estimate a cost of subvector extraction as a sequence of extract and
132 /// insert operations.
133 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
135 int Index,
136 FixedVectorType *SubVTy) const {
137 assert(VTy && SubVTy &&
138 "Can only extract subvectors from vectors");
139 int NumSubElts = SubVTy->getNumElements();
141 (Index + NumSubElts) <=
142 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
143 "SK_ExtractSubvector index out of range");
144
146 // Subvector extraction cost is equal to the cost of extracting element from
147 // the source type plus the cost of inserting them into the result vector
148 // type.
149 for (int i = 0; i != NumSubElts; ++i) {
150 Cost +=
151 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
152 CostKind, i + Index, nullptr, nullptr);
153 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
154 CostKind, i, nullptr, nullptr);
155 }
156 return Cost;
157 }
158
159 /// Estimate a cost of subvector insertion as a sequence of extract and
160 /// insert operations.
161 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
163 int Index,
164 FixedVectorType *SubVTy) const {
165 assert(VTy && SubVTy &&
166 "Can only insert subvectors into vectors");
167 int NumSubElts = SubVTy->getNumElements();
169 (Index + NumSubElts) <=
170 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
171 "SK_InsertSubvector index out of range");
172
174 // Subvector insertion cost is equal to the cost of extracting element from
175 // the source type plus the cost of inserting them into the result vector
176 // type.
177 for (int i = 0; i != NumSubElts; ++i) {
178 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
179 CostKind, i, nullptr, nullptr);
180 Cost +=
181 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
182 i + Index, nullptr, nullptr);
183 }
184 return Cost;
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetSubtargetInfo *getST() const {
189 return static_cast<const T *>(this)->getST();
190 }
191
192 /// Local query method delegates up to T which *must* implement this!
193 const TargetLoweringBase *getTLI() const {
194 return static_cast<const T *>(this)->getTLI();
195 }
196
197 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
198 switch (M) {
200 return ISD::UNINDEXED;
201 case TTI::MIM_PreInc:
202 return ISD::PRE_INC;
203 case TTI::MIM_PreDec:
204 return ISD::PRE_DEC;
205 case TTI::MIM_PostInc:
206 return ISD::POST_INC;
207 case TTI::MIM_PostDec:
208 return ISD::POST_DEC;
209 }
210 llvm_unreachable("Unexpected MemIndexedMode");
211 }
212
213 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
214 Align Alignment,
215 bool VariableMask,
216 bool IsGatherScatter,
218 unsigned AddressSpace = 0) const {
219 // We cannot scalarize scalable vectors, so return Invalid.
220 if (isa<ScalableVectorType>(DataTy))
222
223 auto *VT = cast<FixedVectorType>(DataTy);
224 unsigned VF = VT->getNumElements();
225
226 // Assume the target does not have support for gather/scatter operations
227 // and provide a rough estimate.
228 //
229 // First, compute the cost of the individual memory operations.
230 InstructionCost AddrExtractCost =
231 IsGatherScatter ? getScalarizationOverhead(
233 PointerType::get(VT->getContext(), 0), VF),
234 /*Insert=*/false, /*Extract=*/true, CostKind)
235 : 0;
236
237 // The cost of the scalar loads/stores.
238 InstructionCost MemoryOpCost =
239 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
241
242 // Next, compute the cost of packing the result in a vector.
243 InstructionCost PackingCost =
244 getScalarizationOverhead(VT, Opcode != Instruction::Store,
245 Opcode == Instruction::Store, CostKind);
246
247 InstructionCost ConditionalCost = 0;
248 if (VariableMask) {
249 // Compute the cost of conditionally executing the memory operations with
250 // variable masks. This includes extracting the individual conditions, a
251 // branches and PHIs to combine the results.
252 // NOTE: Estimating the cost of conditionally executing the memory
253 // operations accurately is quite difficult and the current solution
254 // provides a very rough estimate only.
255 ConditionalCost =
258 /*Insert=*/false, /*Extract=*/true, CostKind) +
259 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
260 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
261 }
262
263 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
264 }
265
266 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
267 /// or same non -1 index value and this index value contained at least twice.
268 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
269 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
270 /// with \p Index=2.
271 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
272 // Check that the broadcast index meets at least twice.
273 bool IsCompared = false;
274 if (int SplatIdx = PoisonMaskElem;
275 all_of(enumerate(Mask), [&](const auto &P) {
276 if (P.value() == PoisonMaskElem)
277 return P.index() != Mask.size() - 1 || IsCompared;
278 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
279 return false;
280 if (SplatIdx == PoisonMaskElem) {
281 SplatIdx = P.value();
282 return P.index() != Mask.size() - 1;
283 }
284 IsCompared = true;
285 return SplatIdx == P.value();
286 })) {
287 Index = SplatIdx;
288 return true;
289 }
290 return false;
291 }
292
293 /// Several intrinsics that return structs (including llvm.sincos[pi] and
294 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
295 /// vector library functions correspond to the scalar calls (e.g. sincos or
296 /// modf), which unlike the intrinsic return values via output pointers. This
297 /// helper checks if a vector call exists for the given intrinsic, and returns
298 /// the cost, which includes the cost of the mask (if required), and the loads
299 /// for values returned via output pointers. \p LC is the scalar libcall and
300 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
301 /// the call return value. If std::nullopt is returned, then no vector library
302 /// call is available, so the intrinsic should be assigned the default cost
303 /// (e.g. scalarization).
304 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
306 std::optional<unsigned> CallRetElementIndex = {}) const {
307 Type *RetTy = ICA.getReturnType();
308 // Vector variants of the intrinsic can be mapped to a vector library call.
309 if (!isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, CostKind, {}, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
384
385public:
386 /// \name Scalar TTI Implementations
387 /// @{
389 unsigned AddressSpace, Align Alignment,
390 unsigned *Fast) const override {
391 EVT E = EVT::getIntegerVT(Context, BitWidth);
392 return getTLI()->allowsMisalignedMemoryAccesses(
394 }
395
396 bool areInlineCompatible(const Function *Caller,
397 const Function *Callee) const override {
398 const TargetMachine &TM = getTLI()->getTargetMachine();
399
400 const TargetSubtargetInfo *CallerSTI = TM.getSubtargetImpl(*Caller);
401 const TargetSubtargetInfo *CalleeSTI = TM.getSubtargetImpl(*Callee);
402 FeatureBitset InlineIgnoreFeatures = CallerSTI->getInlineIgnoreFeatures();
403 FeatureBitset InlineInverseFeatures = CallerSTI->getInlineInverseFeatures();
404 FeatureBitset InlineMustMatchFeatures =
405 CallerSTI->getInlineMustMatchFeatures();
406
407 FeatureBitset CallerBits =
408 (CallerSTI->getFeatureBits() ^ InlineInverseFeatures) &
409 ~InlineIgnoreFeatures;
410 FeatureBitset CalleeBits =
411 (CalleeSTI->getFeatureBits() ^ InlineInverseFeatures) &
412 ~InlineIgnoreFeatures;
413
414 if ((CallerBits & InlineMustMatchFeatures) !=
415 (CalleeBits & InlineMustMatchFeatures))
416 return false;
417
418 // Inline a callee if its target-features are a subset of the callers
419 // target-features.
420 return (CallerBits & CalleeBits) == CalleeBits;
421 }
422
423 bool hasBranchDivergence(const Function *F = nullptr) const override {
424 return false;
425 }
426
427 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
428 return false;
429 }
430
431 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
432 return true;
433 }
434
435 unsigned getFlatAddressSpace() const override {
436 // Return an invalid address space.
437 return -1;
438 }
439
441 Intrinsic::ID IID) const override {
442 return false;
443 }
444
445 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
446 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
447 }
448
449 unsigned getAssumedAddrSpace(const Value *V) const override {
450 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
451 }
452
453 bool isSingleThreaded() const override {
454 return getTLI()->getTargetMachine().Options.ThreadModel ==
456 }
457
458 std::pair<const Value *, unsigned>
459 getPredicatedAddrSpace(const Value *V) const override {
460 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
461 }
462
464 Value *NewV) const override {
465 return nullptr;
466 }
467
468 bool isLegalAddImmediate(int64_t imm) const override {
469 return getTLI()->isLegalAddImmediate(imm);
470 }
471
472 bool isLegalAddScalableImmediate(int64_t Imm) const override {
473 return getTLI()->isLegalAddScalableImmediate(Imm);
474 }
475
476 bool isLegalICmpImmediate(int64_t imm) const override {
477 return getTLI()->isLegalICmpImmediate(imm);
478 }
479
480 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
481 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
482 Instruction *I = nullptr,
483 int64_t ScalableOffset = 0) const override {
485 AM.BaseGV = BaseGV;
486 AM.BaseOffs = BaseOffset;
487 AM.HasBaseReg = HasBaseReg;
488 AM.Scale = Scale;
489 AM.ScalableOffset = ScalableOffset;
490 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
491 }
492
493 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
494 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
495 }
496
497 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy,
498 Align Alignment,
499 unsigned AddrSpace) const override {
500 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy, Alignment,
501 AddrSpace](unsigned VF) {
502 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
503 EVT VT = getTLI()->getValueType(DL, SrcTy);
504 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
505 getTLI()->isOperationCustom(ISD::STORE, VT))
506 return true;
507
508 EVT ValVT =
509 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
510 EVT LegalizedVT =
511 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
512 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT, Alignment,
513 AddrSpace);
514 };
515 while (VF > 2 && IsSupportedByTarget(VF))
516 VF /= 2;
517 return VF;
518 }
519
520 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
521 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
522 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
523 }
524
525 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
526 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
527 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
528 }
529
531 const TTI::LSRCost &C2) const override {
533 }
534
538
542
546
548 StackOffset BaseOffset, bool HasBaseReg,
549 int64_t Scale,
550 unsigned AddrSpace) const override {
552 AM.BaseGV = BaseGV;
553 AM.BaseOffs = BaseOffset.getFixed();
554 AM.HasBaseReg = HasBaseReg;
555 AM.Scale = Scale;
556 AM.ScalableOffset = BaseOffset.getScalable();
557 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
558 return 0;
560 }
561
562 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
563 return getTLI()->isTruncateFree(Ty1, Ty2);
564 }
565
566 bool isProfitableToHoist(Instruction *I) const override {
567 return getTLI()->isProfitableToHoist(I);
568 }
569
570 bool useAA() const override { return getST()->useAA(); }
571
572 bool isTypeLegal(Type *Ty) const override {
573 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
574 return getTLI()->isTypeLegal(VT);
575 }
576
577 unsigned getRegUsageForType(Type *Ty) const override {
578 EVT ETy = getTLI()->getValueType(DL, Ty);
579 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
580 }
581
582 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
585 Type *AccessType) const override {
586 return BaseT::getGEPCost(PointeeType, Ptr, Operands, CostKind, AccessType);
587 }
588
590 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
591 BlockFrequencyInfo *BFI) const override {
592 /// Try to find the estimated number of clusters. Note that the number of
593 /// clusters identified in this function could be different from the actual
594 /// numbers found in lowering. This function ignore switches that are
595 /// lowered with a mix of jump table / bit test / BTree. This function was
596 /// initially intended to be used when estimating the cost of switch in
597 /// inline cost heuristic, but it's a generic cost model to be used in other
598 /// places (e.g., in loop unrolling).
599 unsigned N = SI.getNumCases();
600 const TargetLoweringBase *TLI = getTLI();
601 const DataLayout &DL = this->getDataLayout();
602
603 JumpTableSize = 0;
604 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
605
606 // Early exit if both a jump table and bit test are not allowed.
607 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
608 return N;
609
610 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
611 APInt MinCaseVal = MaxCaseVal;
612 for (auto CI : SI.cases()) {
613 const APInt &CaseVal = CI.getCaseValue()->getValue();
614 if (CaseVal.sgt(MaxCaseVal))
615 MaxCaseVal = CaseVal;
616 if (CaseVal.slt(MinCaseVal))
617 MinCaseVal = CaseVal;
618 }
619
620 // Check if suitable for a bit test
621 if (N <= DL.getIndexSizeInBits(0u)) {
623 for (auto I : SI.cases()) {
624 const BasicBlock *BB = I.getCaseSuccessor();
625 ++DestMap[BB];
626 }
627
628 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
629 return 1;
630 }
631
632 // Check if suitable for a jump table.
633 if (IsJTAllowed) {
634 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
635 return N;
637 (MaxCaseVal - MinCaseVal)
638 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
639 // Check whether a range of clusters is dense enough for a jump table
640 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
641 JumpTableSize = Range;
642 return 1;
643 }
644 }
645 return N;
646 }
647
648 bool shouldBuildLookupTables() const override {
649 const TargetLoweringBase *TLI = getTLI();
650 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
651 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
652 }
653
654 bool shouldBuildRelLookupTables() const override {
655 const TargetMachine &TM = getTLI()->getTargetMachine();
656 // If non-PIC mode, do not generate a relative lookup table.
657 if (!TM.isPositionIndependent())
658 return false;
659
660 /// Relative lookup table entries consist of 32-bit offsets.
661 /// Do not generate relative lookup tables for large code models
662 /// in 64-bit achitectures where 32-bit offsets might not be enough.
663 if (TM.getCodeModel() == CodeModel::Medium ||
665 return false;
666
667 const Triple &TargetTriple = TM.getTargetTriple();
668 if (!TargetTriple.isArch64Bit())
669 return false;
670
671 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
672 // there.
673 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
674 return false;
675
676 return true;
677 }
678
679 bool haveFastSqrt(Type *Ty) const override {
680 const TargetLoweringBase *TLI = getTLI();
681 EVT VT = TLI->getValueType(DL, Ty);
682 return TLI->isTypeLegal(VT) &&
684 }
685
686 bool haveFastClmul(IntegerType *Ty) const override {
687 // FIXME: clmul should really be Promote for any bitwidth under the largest
688 // legal bitwidth for clmul. Using IndexTy instead of Ty is a hack to get
689 // around that shortcoming.
690 const DataLayout &DL = thisT()->DL;
691 IntegerType *IndexTy =
692 DL.getIndexType(Ty->getContext(), DL.getAllocaAddrSpace());
693 if (Ty->getBitWidth() > IndexTy->getBitWidth())
694 return false;
695
696 const TargetLoweringBase *TLI = getTLI();
697 EVT VT = TLI->getValueType(DL, IndexTy);
698 return TLI->isOperationLegalOrCustom(ISD::CLMUL, VT);
699 }
700
701 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
702
703 InstructionCost getFPOpCost(Type *Ty) const override {
704 // Check whether FADD is available, as a proxy for floating-point in
705 // general.
706 const TargetLoweringBase *TLI = getTLI();
707 EVT VT = TLI->getValueType(DL, Ty);
711 }
712
714 const Function &Fn) const override {
715 switch (Inst.getOpcode()) {
716 default:
717 break;
718 case Instruction::SDiv:
719 case Instruction::SRem:
720 case Instruction::UDiv:
721 case Instruction::URem: {
722 if (!isa<ConstantInt>(Inst.getOperand(1)))
723 return false;
724 EVT VT = getTLI()->getValueType(DL, Inst.getType());
725 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
726 }
727 };
728
729 return false;
730 }
731
732 unsigned getInliningThresholdMultiplier() const override { return 1; }
733 unsigned adjustInliningThreshold(const CallBase *CB) const override {
734 return 0;
735 }
736 unsigned getCallerAllocaCost(const CallBase *CB,
737 const AllocaInst *AI) const override {
738 return 0;
739 }
740
741 int getInlinerVectorBonusPercent() const override { return 150; }
742
745 OptimizationRemarkEmitter *ORE) const override {
746 // This unrolling functionality is target independent, but to provide some
747 // motivation for its intended use, for x86:
748
749 // According to the Intel 64 and IA-32 Architectures Optimization Reference
750 // Manual, Intel Core models and later have a loop stream detector (and
751 // associated uop queue) that can benefit from partial unrolling.
752 // The relevant requirements are:
753 // - The loop must have no more than 4 (8 for Nehalem and later) branches
754 // taken, and none of them may be calls.
755 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
756
757 // According to the Software Optimization Guide for AMD Family 15h
758 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
759 // and loop buffer which can benefit from partial unrolling.
760 // The relevant requirements are:
761 // - The loop must have fewer than 16 branches
762 // - The loop must have less than 40 uops in all executed loop branches
763
764 // The number of taken branches in a loop is hard to estimate here, and
765 // benchmarking has revealed that it is better not to be conservative when
766 // estimating the branch count. As a result, we'll ignore the branch limits
767 // until someone finds a case where it matters in practice.
768
769 unsigned MaxOps;
770 const TargetSubtargetInfo *ST = getST();
771 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
773 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
774 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
775 else
776 return;
777
778 // Scan the loop: don't unroll loops with calls.
779 for (BasicBlock *BB : L->blocks()) {
780 for (Instruction &I : *BB) {
781 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
782 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
783 if (!thisT()->isLoweredToCall(F))
784 continue;
785 }
786
787 if (ORE) {
788 ORE->emit([&]() {
789 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
790 L->getHeader())
791 << "advising against unrolling the loop because it "
792 "contains a "
793 << ore::NV("Call", &I);
794 });
795 }
796 return;
797 }
798 }
799 }
800
801 // Enable runtime and partial unrolling up to the specified size.
802 // Enable using trip count upper bound to unroll loops.
803 UP.Partial = UP.Runtime = UP.UpperBound = true;
804 UP.PartialThreshold = MaxOps;
805
806 // Avoid unrolling when optimizing for size.
807 UP.OptSizeThreshold = 0;
809
810 // Set number of instructions optimized when "back edge"
811 // becomes "fall through" to default value of 2.
812 UP.BEInsns = 2;
813 }
814
816 TTI::PeelingPreferences &PP) const override {
817 PP.PeelCount = 0;
818 PP.AllowPeeling = true;
819 PP.AllowLoopNestsPeeling = false;
820 PP.PeelProfiledIterations = true;
821 }
822
825 HardwareLoopInfo &HWLoopInfo) const override {
826 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
827 }
828
829 unsigned getEpilogueVectorizationMinVF() const override {
831 }
832
836
840
841 std::optional<Instruction *>
844 }
845
846 std::optional<Value *>
848 APInt DemandedMask, KnownBits &Known,
849 bool &KnownBitsComputed) const override {
850 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
851 KnownBitsComputed);
852 }
853
855 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
856 APInt &UndefElts2, APInt &UndefElts3,
857 std::function<void(Instruction *, unsigned, APInt, APInt &)>
858 SimplifyAndSetOp) const override {
860 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
861 SimplifyAndSetOp);
862 }
863
865 return getST()->getMispredictionPenalty();
866 }
867
868 std::optional<unsigned>
870 return std::optional<unsigned>(
871 getST()->getCacheSize(static_cast<unsigned>(Level)));
872 }
873
874 std::optional<unsigned>
876 std::optional<unsigned> TargetResult =
877 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
878
879 if (TargetResult)
880 return TargetResult;
881
882 return BaseT::getCacheAssociativity(Level);
883 }
884
885 unsigned getCacheLineSize() const override {
886 return getST()->getCacheLineSize();
887 }
888
889 unsigned getPrefetchDistance() const override {
890 return getST()->getPrefetchDistance();
891 }
892
893 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
894 unsigned NumStridedMemAccesses,
895 unsigned NumPrefetches,
896 bool HasCall) const override {
897 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
898 NumPrefetches, HasCall);
899 }
900
901 unsigned getMaxPrefetchIterationsAhead() const override {
902 return getST()->getMaxPrefetchIterationsAhead();
903 }
904
905 bool enableWritePrefetching() const override {
906 return getST()->enableWritePrefetching();
907 }
908
909 bool shouldPrefetchAddressSpace(unsigned AS) const override {
910 return getST()->shouldPrefetchAddressSpace(AS);
911 }
912
913 /// @}
914
915 /// \name Vector TTI Implementations
916 /// @{
917
922
923 std::optional<unsigned> getVScaleForTuning() const override {
924 return std::nullopt;
925 }
926
927 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
928 /// are set if the demanded result elements need to be inserted and/or
929 /// extracted from vectors.
931 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
932 bool Insert, bool Extract,
934 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
936 TTI::VectorInstrContext::None) const override {
937 /// FIXME: a bitfield is not a reasonable abstraction for talking about
938 /// which elements are needed from a scalable vector
939 if (isa<ScalableVectorType>(InTy))
941 auto *Ty = cast<FixedVectorType>(InTy);
942
943 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
944 (VL.empty() || VL.size() == Ty->getNumElements()) &&
945 "Vector size mismatch");
946
948
949 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
950 if (!DemandedElts[i])
951 continue;
952 if (Insert) {
953 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
954 Cost +=
955 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
956 CostKind, i, nullptr, InsertedVal, VIC);
957 }
958 if (Extract)
959 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
960 CostKind, i, nullptr, nullptr, VIC);
961 }
962
963 return Cost;
964 }
965
966 bool
968 unsigned ScalarOpdIdx) const override {
969 return false;
970 }
971
973 int OpdIdx) const override {
974 return OpdIdx == -1;
975 }
976
977 bool
979 int RetIdx) const override {
980 return RetIdx == 0;
981 }
982
983 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
985 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
986 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
988 if (isa<ScalableVectorType>(InTy))
990 auto *Ty = cast<FixedVectorType>(InTy);
991
992 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
993 // Use CRTP to allow target overrides
994 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
995 CostKind, ForPoisonSrc, VL, VIC);
996 }
997
998 /// Estimate the overhead of scalarizing an instruction's
999 /// operands. The (potentially vector) types to use for each of
1000 /// argument are passes via Tys.
1004 TTI::VectorInstrContext::None) const override {
1006 for (Type *Ty : Tys) {
1007 // Disregard things like metadata arguments.
1008 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
1009 !Ty->isPtrOrPtrVectorTy())
1010 continue;
1011
1012 if (auto *VecTy = dyn_cast<VectorType>(Ty))
1013 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
1014 /*Extract*/ true, CostKind,
1015 /*ForPoisonSrc=*/true, {}, VIC);
1016 }
1017
1018 return Cost;
1019 }
1020
1021 /// Estimate the overhead of scalarizing the inputs and outputs of an
1022 /// instruction, with return type RetTy and arguments Args of type Tys. If
1023 /// Args are unknown (empty), then the cost associated with one argument is
1024 /// added as a heuristic.
1027 ArrayRef<Type *> Tys,
1030 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
1031 if (!Args.empty())
1033 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1034 else
1035 // When no information on arguments is provided, we add the cost
1036 // associated with one argument as a heuristic.
1037 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1038 /*Extract*/ true, CostKind);
1039
1040 return Cost;
1041 }
1042
1043 /// Estimate the cost of type-legalization and the legalized type.
1044 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1045 auto [It, Inserted] = TypeLegalizationCostCache.try_emplace(Ty);
1046 if (Inserted)
1047 It->second = computeTypeLegalizationCost(Ty);
1048 return It->second;
1049 }
1050
1051private:
1052 std::pair<InstructionCost, MVT> computeTypeLegalizationCost(Type *Ty) const {
1053 LLVMContext &C = Ty->getContext();
1054 EVT MTy = getTLI()->getValueType(DL, Ty);
1055
1057 // We keep legalizing the type until we find a legal kind. We assume that
1058 // the only operation that costs anything is the split. After splitting
1059 // we need to handle two types.
1060 while (true) {
1062
1064 // Ensure we return a sensible simple VT here, since many callers of
1065 // this function require it.
1066 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1067 return std::make_pair(InstructionCost::getInvalid(), VT);
1068 }
1069
1070 if (LK.first == TargetLoweringBase::TypeLegal)
1071 return std::make_pair(Cost, MTy.getSimpleVT());
1072
1073 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1075 Cost *= 2;
1076
1077 // Do not loop with f128 type.
1078 if (MTy == LK.second)
1079 return std::make_pair(Cost, MTy.getSimpleVT());
1080
1081 // Keep legalizing the type.
1082 MTy = LK.second;
1083 }
1084 }
1085
1086 /// Memoizes type legalization cost. The mapping does not depend on the IR, so
1087 /// entries stay valid for the lifetime of this object.
1088 mutable DenseMap<Type *, std::pair<InstructionCost, MVT>>
1089 TypeLegalizationCostCache;
1090
1091public:
1093 bool HasUnorderedReductions) const override {
1094 return 1;
1095 }
1096
1098 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1101 ArrayRef<const Value *> Args = {},
1102 const Instruction *CxtI = nullptr) const override {
1103 // Check if any of the operands are vector operands.
1104 const TargetLoweringBase *TLI = getTLI();
1105 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1106 assert(ISD && "Invalid opcode");
1107
1108 // TODO: Handle more cost kinds.
1110 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1111 Opd1Info, Opd2Info,
1112 Args, CxtI);
1113
1114 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1115
1116 bool IsFloat = Ty->isFPOrFPVectorTy();
1117 // Assume that floating point arithmetic operations cost twice as much as
1118 // integer operations.
1119 InstructionCost OpCost = (IsFloat ? 2 : 1);
1120
1121 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1122 // The operation is legal. Assume it costs 1.
1123 // TODO: Once we have extract/insert subvector cost we need to use them.
1124 return LT.first * OpCost;
1125 }
1126
1127 if (!TLI->isOperationExpand(ISD, LT.second)) {
1128 // If the operation is custom lowered, then assume that the code is twice
1129 // as expensive.
1130 return LT.first * 2 * OpCost;
1131 }
1132
1133 // An 'Expand' of URem and SRem is special because it may default
1134 // to expanding the operation into a sequence of sub-operations
1135 // i.e. X % Y -> X-(X/Y)*Y.
1136 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1137 bool IsSigned = ISD == ISD::SREM;
1138 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1139 LT.second) ||
1140 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1141 LT.second)) {
1142 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1143 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1144 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1145 InstructionCost MulCost =
1146 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1147 InstructionCost SubCost =
1148 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1149 return DivCost + MulCost + SubCost;
1150 }
1151 }
1152
1153 // We cannot scalarize scalable vectors, so return Invalid.
1156
1157 // Else, assume that we need to scalarize this op.
1158 // TODO: If one of the types get legalized by splitting, handle this
1159 // similarly to what getCastInstrCost() does.
1160 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1161 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1162 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1163 Args, CxtI);
1164 // Return the cost of multiple scalar invocation plus the cost of
1165 // inserting and extracting the values.
1166 SmallVector<Type *> Tys(Args.size(), Ty);
1167 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1168 VTy->getNumElements() * Cost;
1169 }
1170
1171 // We don't know anything about this scalar instruction.
1172 return OpCost;
1173 }
1174
1176 ArrayRef<int> Mask,
1177 VectorType *SrcTy, int &Index,
1178 VectorType *&SubTy) const {
1179 if (Mask.empty())
1180 return Kind;
1181 int NumDstElts = Mask.size();
1182 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1183 switch (Kind) {
1185 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1186 return TTI::SK_Reverse;
1187 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1188 return TTI::SK_Broadcast;
1189 if (isSplatMask(Mask, NumSrcElts, Index))
1190 return TTI::SK_Broadcast;
1191 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1192 (Index + NumDstElts) <= NumSrcElts) {
1193 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1195 }
1196 break;
1197 }
1198 case TTI::SK_PermuteTwoSrc: {
1199 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1201 Index, SubTy);
1202 int NumSubElts;
1203 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1204 Mask, NumSrcElts, NumSubElts, Index)) {
1205 if (Index + NumSubElts > NumSrcElts)
1206 return Kind;
1207 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1209 }
1210 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1211 return TTI::SK_Select;
1212 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1213 return TTI::SK_Transpose;
1214 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1215 return TTI::SK_Splice;
1216 break;
1217 }
1218 case TTI::SK_Select:
1219 case TTI::SK_Reverse:
1220 case TTI::SK_Broadcast:
1221 case TTI::SK_Transpose:
1224 case TTI::SK_Splice:
1225 break;
1226 }
1227 return Kind;
1228 }
1229
1233 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1234 const Instruction *CxtI = nullptr) const override {
1235 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1236 case TTI::SK_Broadcast:
1237 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1238 return getBroadcastShuffleOverhead(FVT, CostKind);
1240 case TTI::SK_Select:
1241 case TTI::SK_Splice:
1242 case TTI::SK_Reverse:
1243 case TTI::SK_Transpose:
1246 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1247 return getPermuteShuffleOverhead(FVT, CostKind);
1250 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1251 cast<FixedVectorType>(SubTp));
1253 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1254 cast<FixedVectorType>(SubTp));
1255 }
1256 llvm_unreachable("Unknown TTI::ShuffleKind");
1257 }
1258
1260 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1262 const Instruction *I = nullptr) const override {
1263 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1264 return 0;
1265
1266 const TargetLoweringBase *TLI = getTLI();
1267 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1268 assert(ISD && "Invalid opcode");
1269 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1270 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1271
1272 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1273 TypeSize DstSize = DstLT.second.getSizeInBits();
1274 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1275 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1276
1277 switch (Opcode) {
1278 default:
1279 break;
1280 case Instruction::Trunc:
1281 // Check for NOOP conversions.
1282 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1283 return 0;
1284 [[fallthrough]];
1285 case Instruction::BitCast:
1286 // Bitcast between types that are legalized to the same type are free and
1287 // assume int to/from ptr of the same size is also free.
1288 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1289 SrcSize == DstSize)
1290 return 0;
1291 break;
1292 case Instruction::FPExt:
1293 if (I && getTLI()->isExtFree(I))
1294 return 0;
1295 break;
1296 case Instruction::ZExt:
1297 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1298 return 0;
1299 [[fallthrough]];
1300 case Instruction::SExt:
1301 if (I && getTLI()->isExtFree(I))
1302 return 0;
1303
1304 // If this is a zext/sext of a load, return 0 if the corresponding
1305 // extending load exists on target and the result type is legal.
1306 if (CCH == TTI::CastContextHint::Normal) {
1307 EVT ExtVT = EVT::getEVT(Dst);
1308 EVT LoadVT = EVT::getEVT(Src);
1309 unsigned LType =
1310 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1311 if (I) {
1312 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1313 if (DstLT.first == SrcLT.first &&
1314 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1315 LI->getPointerAddressSpace(), LType, false))
1316 return 0;
1317 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1318 switch (II->getIntrinsicID()) {
1319 case Intrinsic::masked_load: {
1320 Type *PtrType = II->getArgOperand(0)->getType();
1321 assert(PtrType->isPointerTy());
1322
1323 if (DstLT.first == SrcLT.first &&
1324 TLI->isLoadLegal(
1325 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1326 PtrType->getPointerAddressSpace(), LType, false))
1327 return 0;
1328
1329 break;
1330 }
1331 default:
1332 break;
1333 }
1334 }
1335 }
1336 }
1337 break;
1338 case Instruction::AddrSpaceCast:
1339 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1340 Dst->getPointerAddressSpace()))
1341 return 0;
1342 break;
1343 }
1344
1345 auto *SrcVTy = dyn_cast<VectorType>(Src);
1346 auto *DstVTy = dyn_cast<VectorType>(Dst);
1347
1348 // If the cast is marked as legal (or promote) then assume low cost.
1349 if (SrcLT.first == DstLT.first &&
1350 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1351 return SrcLT.first;
1352
1353 // Handle scalar conversions.
1354 if (!SrcVTy && !DstVTy) {
1355 // Just check the op cost. If the operation is legal then assume it costs
1356 // 1.
1357 if (!TLI->isOperationExpand(ISD, DstLT.second))
1358 return 1;
1359
1360 // Assume that illegal scalar instruction are expensive.
1361 return 4;
1362 }
1363
1364 // Check vector-to-vector casts.
1365 if (DstVTy && SrcVTy) {
1366 // If the cast is between same-sized registers, then the check is simple.
1367 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1368
1369 // Assume that Zext is done using AND.
1370 if (Opcode == Instruction::ZExt)
1371 return SrcLT.first;
1372
1373 // Assume that sext is done using SHL and SRA.
1374 if (Opcode == Instruction::SExt)
1375 return SrcLT.first * 2;
1376
1377 // Just check the op cost. If the operation is legal then assume it
1378 // costs
1379 // 1 and multiply by the type-legalization overhead.
1380 if (!TLI->isOperationExpand(ISD, DstLT.second))
1381 return SrcLT.first * 1;
1382 }
1383
1384 // If we are legalizing by splitting, query the concrete TTI for the cost
1385 // of casting the original vector twice. We also need to factor in the
1386 // cost of the split itself. Count that as 1, to be consistent with
1387 // getTypeLegalizationCost().
1388 bool SplitSrc =
1389 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1391 bool SplitDst =
1392 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1394 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1395 DstVTy->getElementCount().isKnownEven()) {
1396 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1397 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1398 const T *TTI = thisT();
1399 // If both types need to be split then the split is free.
1400 InstructionCost SplitCost =
1401 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1402 return SplitCost +
1403 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1404 CostKind, I));
1405 }
1406
1407 // Scalarization cost is Invalid, can't assume any num elements.
1408 if (isa<ScalableVectorType>(DstVTy))
1410
1411 // In other cases where the source or destination are illegal, assume
1412 // the operation will get scalarized.
1413 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1414 InstructionCost Cost = thisT()->getCastInstrCost(
1415 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1416
1417 // Return the cost of multiple scalar invocation plus the cost of
1418 // inserting and extracting the values.
1419 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1420 CostKind) +
1421 Num * Cost;
1422 }
1423
1424 // We already handled vector-to-vector and scalar-to-scalar conversions.
1425 // This
1426 // is where we handle bitcast between vectors and scalars. We need to assume
1427 // that the conversion is scalarized in one way or another.
1428 if (Opcode == Instruction::BitCast) {
1429 // Illegal bitcasts are done by storing and loading from a stack slot.
1430 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1431 /*Extract*/ true, CostKind)
1432 : 0) +
1433 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1434 /*Extract*/ false, CostKind)
1435 : 0);
1436 }
1437
1438 llvm_unreachable("Unhandled cast");
1439 }
1440
1442 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1443 unsigned Index,
1444 TTI::TargetCostKind CostKind) const override {
1445 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1446 CostKind, Index, nullptr, nullptr) +
1447 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1449 }
1450
1453 const Instruction *I = nullptr) const override {
1454 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1455 }
1456
1458 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1462 const Instruction *I = nullptr) const override {
1463 const TargetLoweringBase *TLI = getTLI();
1464 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1465 assert(ISD && "Invalid opcode");
1466
1467 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1468 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1469 Op1Info, Op2Info, I);
1470
1471 // Selects on vectors are actually vector selects.
1472 if (ISD == ISD::SELECT) {
1473 assert(CondTy && "CondTy must exist");
1474 if (CondTy->isVectorTy())
1475 ISD = ISD::VSELECT;
1476 }
1477 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1478
1479 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1480 !TLI->isOperationExpand(ISD, LT.second)) {
1481 // The operation is legal. Assume it costs 1. Multiply
1482 // by the type-legalization overhead.
1483 return LT.first * 1;
1484 }
1485
1486 // Otherwise, assume that the cast is scalarized.
1487 // TODO: If one of the types get legalized by splitting, handle this
1488 // similarly to what getCastInstrCost() does.
1489 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1490 if (isa<ScalableVectorType>(ValTy))
1492
1493 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1494 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1495 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1496 CostKind, Op1Info, Op2Info, I);
1497
1498 // Return the cost of multiple scalar invocation plus the cost of
1499 // inserting and extracting the values.
1500 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1501 /*Extract*/ false, CostKind) +
1502 Num * Cost;
1503 }
1504
1505 // Unknown scalar opcode.
1506 return 1;
1507 }
1508
1511 unsigned Index, const Value *Op0, const Value *Op1,
1513 TTI::VectorInstrContext::None) const override {
1514 return getRegUsageForType(Val->getScalarType());
1515 }
1516
1517 /// \param ScalarUserAndIdx encodes the information about extracts from a
1518 /// vector with 'Scalar' being the value being extracted,'User' being the user
1519 /// of the extract(nullptr if user is not known before vectorization) and
1520 /// 'Idx' being the extract lane.
1522 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1523 Value *Scalar,
1524 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1526 TTI::VectorInstrContext::None) const override {
1527 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1528 VIC);
1529 }
1530
1533 TTI::TargetCostKind CostKind, unsigned Index,
1535 TTI::VectorInstrContext::None) const override {
1536 Value *Op0 = nullptr;
1537 Value *Op1 = nullptr;
1538 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1539 Op0 = IE->getOperand(0);
1540 Op1 = IE->getOperand(1);
1541 }
1542 // If VIC is None, compute it from the instruction
1545 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1546 Op1, VIC);
1547 }
1548
1552 unsigned Index) const override {
1553 unsigned NewIndex = -1;
1554 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1555 assert(Index < FVTy->getNumElements() &&
1556 "Unexpected index from end of vector");
1557 NewIndex = FVTy->getNumElements() - 1 - Index;
1558 }
1559 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1560 nullptr);
1561 }
1562
1564 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1565 const APInt &DemandedDstElts,
1566 TTI::TargetCostKind CostKind) const override {
1567 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1568 "Unexpected size of DemandedDstElts.");
1569
1571
1572 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1573 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1574
1575 // The Mask shuffling cost is extract all the elements of the Mask
1576 // and insert each of them Factor times into the wide vector:
1577 //
1578 // E.g. an interleaved group with factor 3:
1579 // %mask = icmp ult <8 x i32> %vec1, %vec2
1580 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1581 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1582 // The cost is estimated as extract all mask elements from the <8xi1> mask
1583 // vector and insert them factor times into the <24xi1> shuffled mask
1584 // vector.
1585 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1586 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1587 /*Insert*/ false,
1588 /*Extract*/ true, CostKind);
1589 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1590 /*Insert*/ true,
1591 /*Extract*/ false, CostKind);
1592
1593 return Cost;
1594 }
1595
1597 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1600 const Instruction *I = nullptr) const override {
1601 assert(!Src->isVoidTy() && "Invalid type");
1602 // Assume types, such as structs, are expensive.
1603 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1604 return 4;
1605 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1606
1607 // FIXME: Arbitrary cost
1608 if (Opcode == Instruction::Load && CostKind == TTI::TCK_Latency)
1609 return 4;
1610
1611 // Assuming that all loads of legal types cost 1.
1612 InstructionCost Cost = LT.first;
1614 return Cost;
1615
1616 const DataLayout &DL = this->getDataLayout();
1617 if (Src->isVectorTy() &&
1618 // In practice it's not currently possible to have a change in lane
1619 // length for extending loads or truncating stores so both types should
1620 // have the same scalable property.
1621 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1622 LT.second.getSizeInBits())) {
1623 // This is a vector load that legalizes to a larger type than the vector
1624 // itself. Unless the corresponding extending load or truncating store is
1625 // legal, then this will scalarize.
1627 EVT MemVT = getTLI()->getValueType(DL, Src);
1628 if (Opcode == Instruction::Store)
1629 LA = getTLI()->getTruncStoreAction(LT.second, MemVT, Alignment,
1630 AddressSpace);
1631 else
1632 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1633 ISD::EXTLOAD, false);
1634
1635 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1636 // This is a vector load/store for some illegal type that is scalarized.
1637 // We must account for the cost of building or decomposing the vector.
1639 cast<VectorType>(Src), Opcode != Instruction::Store,
1640 Opcode == Instruction::Store, CostKind);
1641 }
1642 }
1643
1644 return Cost;
1645 }
1646
1648 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1649 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1650 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1651
1652 // We cannot scalarize scalable vectors, so return Invalid.
1653 if (isa<ScalableVectorType>(VecTy))
1655
1656 auto *VT = cast<FixedVectorType>(VecTy);
1657
1658 unsigned NumElts = VT->getNumElements();
1659 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1660
1661 unsigned NumSubElts = NumElts / Factor;
1662 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1663
1664 // Firstly, the cost of load/store operation.
1666 if (UseMaskForCond || UseMaskForGaps) {
1667 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1668 : Intrinsic::masked_store;
1669 Cost = thisT()->getMemIntrinsicInstrCost(
1670 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1671 CostKind);
1672 } else
1673 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1674 CostKind);
1675
1676 // Legalize the vector type, and get the legalized and unlegalized type
1677 // sizes.
1678 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1679 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1680 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1681
1682 // Scale the cost of the memory operation by the fraction of legalized
1683 // instructions that will actually be used. We shouldn't account for the
1684 // cost of dead instructions since they will be removed.
1685 //
1686 // E.g., An interleaved load of factor 8:
1687 // %vec = load <16 x i64>, <16 x i64>* %ptr
1688 // %v0 = shufflevector %vec, undef, <0, 8>
1689 //
1690 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1691 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1692 // type). The other loads are unused.
1693 //
1694 // TODO: Note that legalization can turn masked loads/stores into unmasked
1695 // (legalized) loads/stores. This can be reflected in the cost.
1696 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1697 // The number of loads of a legal type it will take to represent a load
1698 // of the unlegalized vector type.
1699 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1700
1701 // The number of elements of the unlegalized type that correspond to a
1702 // single legal instruction.
1703 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1704
1705 // Determine which legal instructions will be used.
1706 BitVector UsedInsts(NumLegalInsts, false);
1707 for (unsigned Index : Indices)
1708 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1709 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1710
1711 // Scale the cost of the load by the fraction of legal instructions that
1712 // will be used.
1713 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1714 }
1715
1716 // Then plus the cost of interleave operation.
1717 assert(Indices.size() <= Factor &&
1718 "Interleaved memory op has too many members");
1719
1720 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1721 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1722
1723 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1724 for (unsigned Index : Indices) {
1725 assert(Index < Factor && "Invalid index for interleaved memory op");
1726 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1727 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1728 }
1729
1730 if (Opcode == Instruction::Load) {
1731 // The interleave cost is similar to extract sub vectors' elements
1732 // from the wide vector, and insert them into sub vectors.
1733 //
1734 // E.g. An interleaved load of factor 2 (with one member of index 0):
1735 // %vec = load <8 x i32>, <8 x i32>* %ptr
1736 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1737 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1738 // <8 x i32> vector and insert them into a <4 x i32> vector.
1739 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1740 SubVT, DemandedAllSubElts,
1741 /*Insert*/ true, /*Extract*/ false, CostKind);
1742 Cost += Indices.size() * InsSubCost;
1743 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1744 /*Insert*/ false,
1745 /*Extract*/ true, CostKind);
1746 } else {
1747 // The interleave cost is extract elements from sub vectors, and
1748 // insert them into the wide vector.
1749 //
1750 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1751 // (using VF=4):
1752 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1753 // %gaps.mask = <true, true, false, true, true, false,
1754 // true, true, false, true, true, false>
1755 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1756 // i32 Align, <12 x i1> %gaps.mask
1757 // The cost is estimated as extract all elements (of actual members,
1758 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1759 // i32> vector.
1760 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1761 SubVT, DemandedAllSubElts,
1762 /*Insert*/ false, /*Extract*/ true, CostKind);
1763 Cost += ExtSubCost * Indices.size();
1764 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1765 /*Insert*/ true,
1766 /*Extract*/ false, CostKind);
1767 }
1768
1769 if (!UseMaskForCond)
1770 return Cost;
1771
1772 Type *I8Type = Type::getInt8Ty(VT->getContext());
1773
1774 Cost += thisT()->getReplicationShuffleCost(
1775 I8Type, Factor, NumSubElts,
1776 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1777 CostKind);
1778
1779 // The Gaps mask is invariant and created outside the loop, therefore the
1780 // cost of creating it is not accounted for here. However if we have both
1781 // a MaskForGaps and some other mask that guards the execution of the
1782 // memory access, we need to account for the cost of And-ing the two masks
1783 // inside the loop.
1784 if (UseMaskForGaps) {
1785 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1786 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1787 CostKind);
1788 }
1789
1790 return Cost;
1791 }
1792
1793 /// Get intrinsic cost based on arguments.
1796 TTI::TargetCostKind CostKind) const override {
1797 // Check for generically free intrinsics.
1799 return 0;
1800
1801 // Assume that target intrinsics are cheap.
1802 Intrinsic::ID IID = ICA.getID();
1805
1806 // VP Intrinsics should have the same cost as their non-vp counterpart.
1807 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1808 // counterpart when the vector length argument is smaller than the maximum
1809 // vector length.
1810 // TODO: Support other kinds of VPIntrinsics
1811 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1812 std::optional<unsigned> FOp =
1814 if (FOp) {
1815 if (ICA.getID() == Intrinsic::vp_load) {
1816 Align Alignment;
1817 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1818 Alignment = VPI->getPointerAlignment().valueOrOne();
1819 unsigned AS = 0;
1820 if (ICA.getArgTypes().size() > 1)
1821 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1822 AS = PtrTy->getAddressSpace();
1823 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1824 AS, CostKind);
1825 }
1826 if (ICA.getID() == Intrinsic::vp_store) {
1827 Align Alignment;
1828 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1829 Alignment = VPI->getPointerAlignment().valueOrOne();
1830 unsigned AS = 0;
1831 if (ICA.getArgTypes().size() >= 2)
1832 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1833 AS = PtrTy->getAddressSpace();
1834 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1835 AS, CostKind);
1836 }
1837 if (ICA.getID() == Intrinsic::vp_udiv ||
1838 ICA.getID() == Intrinsic::vp_sdiv ||
1839 ICA.getID() == Intrinsic::vp_urem ||
1840 ICA.getID() == Intrinsic::vp_srem) {
1841 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1842 CostKind);
1843 }
1844 }
1845 if (ICA.getID() == Intrinsic::vp_load_ff) {
1846 Type *RetTy = ICA.getReturnType();
1847 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1848 Align Alignment;
1849 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1850 Alignment = VPI->getPointerAlignment().valueOrOne();
1851 return thisT()->getMemIntrinsicInstrCost(
1852 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1853 CostKind);
1854 }
1855 if (ICA.getID() == Intrinsic::vp_scatter) {
1856 if (ICA.isTypeBasedOnly()) {
1857 IntrinsicCostAttributes MaskedScatter(
1860 ICA.getFlags());
1861 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1862 }
1863 Align Alignment;
1864 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1865 Alignment = VPI->getPointerAlignment().valueOrOne();
1866 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1867 return thisT()->getMemIntrinsicInstrCost(
1868 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1869 ICA.getArgTypes()[0], ICA.getArgs()[1],
1870 VarMask, Alignment, nullptr),
1871 CostKind);
1872 }
1873 if (ICA.getID() == Intrinsic::vp_gather) {
1874 if (ICA.isTypeBasedOnly()) {
1875 IntrinsicCostAttributes MaskedGather(
1878 ICA.getFlags());
1879 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1880 }
1881 Align Alignment;
1882 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1883 Alignment = VPI->getPointerAlignment().valueOrOne();
1884 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1885 return thisT()->getMemIntrinsicInstrCost(
1886 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1887 ICA.getReturnType(), ICA.getArgs()[0],
1888 VarMask, Alignment, nullptr),
1889 CostKind);
1890 }
1891
1892 if (ICA.getID() == Intrinsic::vp_merge) {
1893 TTI::OperandValueInfo OpInfoX, OpInfoY;
1894 if (!ICA.isTypeBasedOnly()) {
1895 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1896 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1897 }
1898 return getCmpSelInstrCost(
1899 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1900 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1901 }
1902
1903 std::optional<Intrinsic::ID> FID =
1905
1906 // Not functionally equivalent but close enough for cost modelling.
1907 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1908 FID = Intrinsic::vector_reverse;
1909
1910 if (FID) {
1911 // Non-vp version will have same arg types except mask and vector
1912 // length.
1913 assert(ICA.getArgTypes().size() >= 2 &&
1914 "Expected VPIntrinsic to have Mask and Vector Length args and "
1915 "types");
1916
1917 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1918 if (!ICA.isTypeBasedOnly())
1919 NewArgs = NewArgs.drop_back(2);
1921
1922 // VPReduction intrinsics have a start value argument that their non-vp
1923 // counterparts do not have, except for the fadd and fmul non-vp
1924 // counterpart.
1926 *FID != Intrinsic::vector_reduce_fadd &&
1927 *FID != Intrinsic::vector_reduce_fmul) {
1928 if (!ICA.isTypeBasedOnly())
1929 NewArgs = NewArgs.drop_front();
1930 NewTys = NewTys.drop_front();
1931 }
1932
1933 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1934 NewTys, ICA.getFlags());
1935 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1936 }
1937 }
1938
1939 if (ICA.isTypeBasedOnly())
1941
1942 Type *RetTy = ICA.getReturnType();
1943
1944 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1946
1947 const IntrinsicInst *I = ICA.getInst();
1948 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1949 FastMathFlags FMF = ICA.getFlags();
1950 switch (IID) {
1951 default:
1952 break;
1953
1954 case Intrinsic::powi:
1955 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1956 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1957 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1958 ShouldOptForSize)) {
1959 // The cost is modeled on the expansion performed by ExpandPowI in
1960 // SelectionDAGBuilder.
1961 APInt Exponent = RHSC->getValue().abs();
1962 unsigned ActiveBits = Exponent.getActiveBits();
1963 unsigned PopCount = Exponent.popcount();
1964 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1965 thisT()->getArithmeticInstrCost(
1966 Instruction::FMul, RetTy, CostKind);
1967 if (RHSC->isNegative())
1968 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1969 CostKind);
1970 return Cost;
1971 }
1972 }
1973 break;
1974 case Intrinsic::cttz:
1975 // FIXME: If necessary, this should go in target-specific overrides.
1976 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1978 break;
1979
1980 case Intrinsic::ctlz:
1981 // FIXME: If necessary, this should go in target-specific overrides.
1982 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1984 break;
1985
1986 case Intrinsic::memcpy:
1987 return thisT()->getMemcpyCost(ICA.getInst());
1988
1989 case Intrinsic::masked_scatter: {
1990 const Value *Mask = Args[2];
1991 bool VarMask = !isa<Constant>(Mask);
1992 Align Alignment = I->getParamAlign(1).valueOrOne();
1993 return thisT()->getMemIntrinsicInstrCost(
1994 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1995 ICA.getArgTypes()[0], Args[1], VarMask,
1996 Alignment, I),
1997 CostKind);
1998 }
1999 case Intrinsic::masked_gather: {
2000 const Value *Mask = Args[1];
2001 bool VarMask = !isa<Constant>(Mask);
2002 Align Alignment = I->getParamAlign(0).valueOrOne();
2003 return thisT()->getMemIntrinsicInstrCost(
2004 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
2005 VarMask, Alignment, I),
2006 CostKind);
2007 }
2008 case Intrinsic::masked_compressstore: {
2009 const Value *Data = Args[0];
2010 const Value *Mask = Args[2];
2011 Align Alignment = I->getParamAlign(1).valueOrOne();
2012 return thisT()->getMemIntrinsicInstrCost(
2013 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
2014 Alignment, I),
2015 CostKind);
2016 }
2017 case Intrinsic::masked_expandload: {
2018 const Value *Mask = Args[1];
2019 Align Alignment = I->getParamAlign(0).valueOrOne();
2020 return thisT()->getMemIntrinsicInstrCost(
2021 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
2022 Alignment, I),
2023 CostKind);
2024 }
2025 case Intrinsic::experimental_vp_strided_store: {
2026 const Value *Data = Args[0];
2027 const Value *Ptr = Args[1];
2028 const Value *Mask = Args[3];
2029 const Value *EVL = Args[4];
2030 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2031 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
2032 Align Alignment =
2033 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
2034 return thisT()->getMemIntrinsicInstrCost(
2035 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
2036 Alignment, I),
2037 CostKind);
2038 }
2039 case Intrinsic::experimental_vp_strided_load: {
2040 const Value *Ptr = Args[0];
2041 const Value *Mask = Args[2];
2042 const Value *EVL = Args[3];
2043 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2044 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2045 Align Alignment =
2046 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2047 return thisT()->getMemIntrinsicInstrCost(
2048 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2049 CostKind);
2050 }
2051 case Intrinsic::stepvector: {
2052 if (isa<ScalableVectorType>(RetTy))
2054 // The cost of materialising a constant integer vector.
2056 }
2057 case Intrinsic::vector_extract: {
2058 // FIXME: Handle case where a scalable vector is extracted from a scalable
2059 // vector
2060 if (isa<ScalableVectorType>(RetTy))
2062 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2063 return thisT()->getShuffleCost(
2065 cast<VectorType>(Args[0]->getType()), CostKind, {}, Index,
2066 cast<VectorType>(RetTy));
2067 }
2068 case Intrinsic::vector_insert: {
2069 // FIXME: Handle case where a scalable vector is inserted into a scalable
2070 // vector
2071 if (isa<ScalableVectorType>(Args[1]->getType()))
2073 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2074 return thisT()->getShuffleCost(
2076 cast<VectorType>(Args[0]->getType()), CostKind, {}, Index,
2077 cast<VectorType>(Args[1]->getType()));
2078 }
2079 case Intrinsic::vector_splice_left:
2080 case Intrinsic::vector_splice_right: {
2081 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2082 if (!COffset)
2083 break;
2084 unsigned Index = COffset->getZExtValue();
2085 return thisT()->getShuffleCost(
2087 cast<VectorType>(Args[0]->getType()), CostKind, {},
2088 IID == Intrinsic::vector_splice_left ? Index : -Index,
2089 cast<VectorType>(RetTy));
2090 }
2091 case Intrinsic::vector_reduce_add:
2092 case Intrinsic::vector_reduce_mul:
2093 case Intrinsic::vector_reduce_and:
2094 case Intrinsic::vector_reduce_or:
2095 case Intrinsic::vector_reduce_xor:
2096 case Intrinsic::vector_reduce_smax:
2097 case Intrinsic::vector_reduce_smin:
2098 case Intrinsic::vector_reduce_fmax:
2099 case Intrinsic::vector_reduce_fmin:
2100 case Intrinsic::vector_reduce_fmaximum:
2101 case Intrinsic::vector_reduce_fminimum:
2102 case Intrinsic::vector_reduce_fmaximumnum:
2103 case Intrinsic::vector_reduce_fminimumnum:
2104 case Intrinsic::vector_reduce_umax:
2105 case Intrinsic::vector_reduce_umin: {
2106 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2108 }
2109 case Intrinsic::vector_reduce_fadd:
2110 case Intrinsic::vector_reduce_fmul: {
2112 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2114 }
2115 case Intrinsic::fshl:
2116 case Intrinsic::fshr: {
2117 const Value *X = Args[0];
2118 const Value *Y = Args[1];
2119 const Value *Z = Args[2];
2122 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2123
2124 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2125 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2127 Cost +=
2128 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2129 Cost += thisT()->getArithmeticInstrCost(
2130 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2131 {OpInfoZ.Kind, TTI::OP_None});
2132 Cost += thisT()->getArithmeticInstrCost(
2133 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2134 {OpInfoZ.Kind, TTI::OP_None});
2135
2136 if (!OpInfoZ.isConstant()) {
2137 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2138 CostKind);
2139 // Non-constant shift amounts requires a modulo. If the typesize is a
2140 // power-2 then this will be converted to an and, otherwise it will use
2141 // a urem.
2142 Cost += thisT()->getArithmeticInstrCost(
2143 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2144 : BinaryOperator::URem,
2145 RetTy, CostKind, OpInfoZ,
2146 {TTI::OK_UniformConstantValue, TTI::OP_None});
2147 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2148 if (X != Y) {
2149 Type *CondTy = RetTy->getWithNewBitWidth(1);
2150 Cost += thisT()->getCmpSelInstrCost(
2151 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2152 Cost +=
2153 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2155 }
2156 }
2157 return Cost;
2158 }
2159 case Intrinsic::experimental_cttz_elts: {
2160 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2161
2162 // TODO: The costs below reflect the expansion code in
2163 // TargetLowering::expandCttzElts, but we may want to sacrifice some
2164 // accuracy in favour of compile time.
2165
2166 // Find the smallest "sensible" element type to use for the expansion.
2167 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2168 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2169 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2170 VScaleRange = getVScaleRange(I->getCaller(), 64);
2171
2172 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2173 getTLI()->getValueType(DL, RetTy), ArgType.getVectorElementCount(),
2174 ZeroIsPoison, &VScaleRange);
2175 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2176
2177 // Create the new vector type & get the vector length
2178 Type *NewVecTy = VectorType::get(
2179 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2180
2181 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2182 FMF);
2184 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2185
2186 Cost +=
2187 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2188 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2189 Args[0]->getType(),
2191 Cost +=
2192 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2193
2194 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2195 NewEltTy, NewVecTy, FMF, I, 1);
2196 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2197 Cost +=
2198 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2199
2200 return Cost;
2201 }
2202 case Intrinsic::get_active_lane_mask:
2203 case Intrinsic::experimental_vector_match:
2204 case Intrinsic::experimental_vector_histogram_add:
2205 case Intrinsic::experimental_vector_histogram_uadd_sat:
2206 case Intrinsic::experimental_vector_histogram_umax:
2207 case Intrinsic::experimental_vector_histogram_umin:
2208 case Intrinsic::masked_udiv:
2209 case Intrinsic::masked_sdiv:
2210 case Intrinsic::masked_urem:
2211 case Intrinsic::masked_srem:
2212 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2213 case Intrinsic::modf:
2214 case Intrinsic::sincos:
2215 case Intrinsic::sincospi: {
2216 std::optional<unsigned> CallRetElementIndex;
2217 // The first element of the modf result is returned by value in the
2218 // libcall.
2219 if (ICA.getID() == Intrinsic::modf)
2220 CallRetElementIndex = 0;
2221
2222 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2223 ICA, CostKind, CallRetElementIndex))
2224 return *Cost;
2225 // Otherwise, fallback to default scalarization cost.
2226 break;
2227 }
2228 case Intrinsic::loop_dependence_war_mask:
2229 case Intrinsic::loop_dependence_raw_mask: {
2230 // Compute the cost of the expanded version of these intrinsics:
2231 //
2232 // The possible expansions are...
2233 //
2234 // loop_dependence_war_mask:
2235 // diff = (addrB - addrA) / eltSize
2236 // cmp = icmp sle diff, 0
2237 // upper_bound = select cmp, -1, diff
2238 // mask = get_active_lane_mask 0, upper_bound
2239 //
2240 // loop_dependence_raw_mask:
2241 // diff = (abs(addrB - addrA)) / eltSize
2242 // cmp = icmp eq diff, 0
2243 // upper_bound = select cmp, -1, diff
2244 // mask = get_active_lane_mask 0, upper_bound
2245 //
2246 Type *AddrTy = ICA.getArgTypes()[0];
2247 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2248
2250 thisT()->getArithmeticInstrCost(Instruction::Sub, AddrTy, CostKind);
2251 if (IsReadAfterWrite) {
2252 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, AddrTy, {AddrTy}, {});
2253 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2254 }
2255
2256 TTI::OperandValueInfo EltSizeOpInfo =
2257 TTI::getOperandInfo(ICA.getArgs()[2]);
2258 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, AddrTy,
2259 CostKind, {}, EltSizeOpInfo);
2260
2261 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2262 CmpInst::Predicate Pred =
2263 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2264 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy, AddrTy,
2265 Pred, CostKind);
2266 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, AddrTy,
2267 CondTy, Pred, CostKind);
2268
2269 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2270 {AddrTy, AddrTy}, FMF);
2271 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2272 return Cost;
2273 }
2274 }
2275
2276 // Assume that we need to scalarize this intrinsic.)
2277 // Compute the scalarization overhead based on Args for a vector
2278 // intrinsic.
2279 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2280 if (RetVF.isVector() && !RetVF.isScalable()) {
2281 ScalarizationCost = 0;
2282 if (!RetTy->isVoidTy()) {
2283 for (Type *VectorTy : getContainedTypes(RetTy)) {
2284 ScalarizationCost += getScalarizationOverhead(
2285 cast<VectorType>(VectorTy),
2286 /*Insert=*/true, /*Extract=*/false, CostKind);
2287 }
2288 }
2289 ScalarizationCost += getOperandsScalarizationOverhead(
2290 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2291 CostKind);
2292 }
2293
2294 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2295 ScalarizationCost);
2296 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2297 }
2298
2299 /// Get intrinsic cost based on argument types.
2300 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2301 /// cost of scalarizing the arguments and the return value will be computed
2302 /// based on types.
2306 Intrinsic::ID IID = ICA.getID();
2307 Type *RetTy = ICA.getReturnType();
2308 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2309 FastMathFlags FMF = ICA.getFlags();
2310 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2311 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2312
2313 VectorType *VecOpTy = nullptr;
2314 if (!Tys.empty()) {
2315 // The vector reduction operand is operand 0 except for fadd/fmul.
2316 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2317 unsigned VecTyIndex = 0;
2318 if (IID == Intrinsic::vector_reduce_fadd ||
2319 IID == Intrinsic::vector_reduce_fmul)
2320 VecTyIndex = 1;
2321 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2322 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2323 }
2324
2325 // Library call cost - other than size, make it expensive.
2326 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2327 unsigned ISD = 0;
2328 switch (IID) {
2329 default: {
2330 // Scalable vectors cannot be scalarized, so return Invalid.
2331 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2332 return isa<ScalableVectorType>(Ty);
2333 }))
2335
2336 // Assume that we need to scalarize this intrinsic.
2337 InstructionCost ScalarizationCost =
2338 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2339 unsigned ScalarCalls = 1;
2340 Type *ScalarRetTy = RetTy;
2341 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2342 if (!SkipScalarizationCost)
2343 ScalarizationCost = getScalarizationOverhead(
2344 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2345 ScalarCalls = std::max(ScalarCalls,
2346 cast<FixedVectorType>(RetVTy)->getNumElements());
2347 ScalarRetTy = RetTy->getScalarType();
2348 }
2349 SmallVector<Type *, 4> ScalarTys;
2350 for (Type *Ty : Tys) {
2351 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2352 if (!SkipScalarizationCost)
2353 ScalarizationCost += getScalarizationOverhead(
2354 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2355 ScalarCalls = std::max(ScalarCalls,
2356 cast<FixedVectorType>(VTy)->getNumElements());
2357 Ty = Ty->getScalarType();
2358 }
2359 ScalarTys.push_back(Ty);
2360 }
2361 if (ScalarCalls == 1)
2362 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2363
2364 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2365 InstructionCost ScalarCost =
2366 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2367
2368 return ScalarCalls * ScalarCost + ScalarizationCost;
2369 }
2370 // Look for intrinsics that can be lowered directly or turned into a scalar
2371 // intrinsic call.
2372 case Intrinsic::sqrt:
2373 ISD = ISD::FSQRT;
2374 break;
2375 case Intrinsic::sin:
2376 ISD = ISD::FSIN;
2377 break;
2378 case Intrinsic::cos:
2379 ISD = ISD::FCOS;
2380 break;
2381 case Intrinsic::sincos:
2382 ISD = ISD::FSINCOS;
2383 break;
2384 case Intrinsic::sincospi:
2386 break;
2387 case Intrinsic::modf:
2388 ISD = ISD::FMODF;
2389 break;
2390 case Intrinsic::tan:
2391 ISD = ISD::FTAN;
2392 break;
2393 case Intrinsic::asin:
2394 ISD = ISD::FASIN;
2395 break;
2396 case Intrinsic::acos:
2397 ISD = ISD::FACOS;
2398 break;
2399 case Intrinsic::atan:
2400 ISD = ISD::FATAN;
2401 break;
2402 case Intrinsic::atan2:
2403 ISD = ISD::FATAN2;
2404 break;
2405 case Intrinsic::sinh:
2406 ISD = ISD::FSINH;
2407 break;
2408 case Intrinsic::cosh:
2409 ISD = ISD::FCOSH;
2410 break;
2411 case Intrinsic::tanh:
2412 ISD = ISD::FTANH;
2413 break;
2414 case Intrinsic::exp:
2415 ISD = ISD::FEXP;
2416 break;
2417 case Intrinsic::exp2:
2418 ISD = ISD::FEXP2;
2419 break;
2420 case Intrinsic::exp10:
2421 ISD = ISD::FEXP10;
2422 break;
2423 case Intrinsic::log:
2424 ISD = ISD::FLOG;
2425 break;
2426 case Intrinsic::log10:
2427 ISD = ISD::FLOG10;
2428 break;
2429 case Intrinsic::log2:
2430 ISD = ISD::FLOG2;
2431 break;
2432 case Intrinsic::ldexp:
2433 ISD = ISD::FLDEXP;
2434 break;
2435 case Intrinsic::fabs:
2436 ISD = ISD::FABS;
2437 break;
2438 case Intrinsic::canonicalize:
2440 break;
2441 case Intrinsic::minnum:
2442 ISD = ISD::FMINNUM;
2443 break;
2444 case Intrinsic::maxnum:
2445 ISD = ISD::FMAXNUM;
2446 break;
2447 case Intrinsic::minimum:
2449 break;
2450 case Intrinsic::maximum:
2452 break;
2453 case Intrinsic::minimumnum:
2455 break;
2456 case Intrinsic::maximumnum:
2458 break;
2459 case Intrinsic::copysign:
2461 break;
2462 case Intrinsic::floor:
2463 ISD = ISD::FFLOOR;
2464 break;
2465 case Intrinsic::ceil:
2466 ISD = ISD::FCEIL;
2467 break;
2468 case Intrinsic::trunc:
2469 ISD = ISD::FTRUNC;
2470 break;
2471 case Intrinsic::nearbyint:
2473 break;
2474 case Intrinsic::rint:
2475 ISD = ISD::FRINT;
2476 break;
2477 case Intrinsic::lrint:
2478 ISD = ISD::LRINT;
2479 break;
2480 case Intrinsic::llrint:
2481 ISD = ISD::LLRINT;
2482 break;
2483 case Intrinsic::round:
2484 ISD = ISD::FROUND;
2485 break;
2486 case Intrinsic::roundeven:
2488 break;
2489 case Intrinsic::lround:
2490 ISD = ISD::LROUND;
2491 break;
2492 case Intrinsic::llround:
2493 ISD = ISD::LLROUND;
2494 break;
2495 case Intrinsic::pow:
2496 ISD = ISD::FPOW;
2497 break;
2498 case Intrinsic::fma:
2499 ISD = ISD::FMA;
2500 break;
2501 case Intrinsic::fmuladd:
2502 ISD = ISD::FMA;
2503 break;
2504 case Intrinsic::experimental_constrained_fmuladd:
2506 break;
2507 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2508 case Intrinsic::lifetime_start:
2509 case Intrinsic::lifetime_end:
2510 case Intrinsic::sideeffect:
2511 case Intrinsic::pseudoprobe:
2512 case Intrinsic::arithmetic_fence:
2513 return 0;
2514 case Intrinsic::masked_store: {
2515 Type *Ty = Tys[0];
2516 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2517 return thisT()->getMemIntrinsicInstrCost(
2518 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2519 }
2520 case Intrinsic::masked_load: {
2521 Type *Ty = RetTy;
2522 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2523 return thisT()->getMemIntrinsicInstrCost(
2524 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2525 }
2526 case Intrinsic::experimental_vp_strided_store: {
2527 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2528 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2529 return thisT()->getMemIntrinsicInstrCost(
2530 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2531 /*VariableMask=*/true, Alignment,
2532 ICA.getInst()),
2533 CostKind);
2534 }
2535 case Intrinsic::experimental_vp_strided_load: {
2536 auto *Ty = cast<VectorType>(ICA.getReturnType());
2537 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2538 return thisT()->getMemIntrinsicInstrCost(
2539 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2540 /*VariableMask=*/true, Alignment,
2541 ICA.getInst()),
2542 CostKind);
2543 }
2544 case Intrinsic::vector_reduce_add:
2545 case Intrinsic::vector_reduce_mul:
2546 case Intrinsic::vector_reduce_and:
2547 case Intrinsic::vector_reduce_or:
2548 case Intrinsic::vector_reduce_xor:
2549 return thisT()->getArithmeticReductionCost(
2550 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2551 CostKind);
2552 case Intrinsic::vector_reduce_fadd:
2553 case Intrinsic::vector_reduce_fmul:
2554 return thisT()->getArithmeticReductionCost(
2555 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2556 case Intrinsic::vector_reduce_smax:
2557 case Intrinsic::vector_reduce_smin:
2558 case Intrinsic::vector_reduce_umax:
2559 case Intrinsic::vector_reduce_umin:
2560 case Intrinsic::vector_reduce_fmax:
2561 case Intrinsic::vector_reduce_fmin:
2562 case Intrinsic::vector_reduce_fmaximum:
2563 case Intrinsic::vector_reduce_fminimum:
2564 case Intrinsic::vector_reduce_fmaximumnum:
2565 case Intrinsic::vector_reduce_fminimumnum:
2566 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2567 VecOpTy, ICA.getFlags(), CostKind);
2568 case Intrinsic::experimental_vector_match: {
2569 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2570 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2571 unsigned SearchSize = NeedleTy->getNumElements();
2572
2573 // Approximate the cost based on the expansion code in
2574 // TargetLowering::expandVectorMatch.
2576 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2577 CostKind, 1, nullptr, nullptr);
2578 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2579 CostKind, 0, nullptr, nullptr);
2580 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy,
2581 CostKind, {}, 0, nullptr);
2582 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2584 Cost +=
2585 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2586 Cost *= SearchSize;
2587 Cost +=
2588 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2589 return Cost;
2590 }
2591 case Intrinsic::vector_reverse:
2592 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2593 cast<VectorType>(ICA.getArgTypes()[0]),
2594 CostKind, {}, 0, cast<VectorType>(RetTy));
2595 case Intrinsic::experimental_vector_histogram_add:
2596 case Intrinsic::experimental_vector_histogram_uadd_sat:
2597 case Intrinsic::experimental_vector_histogram_umax:
2598 case Intrinsic::experimental_vector_histogram_umin: {
2600 Type *EltTy = ICA.getArgTypes()[1];
2601
2602 // Targets with scalable vectors must handle this on their own.
2603 if (!PtrsTy)
2605
2606 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2608 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2609 CostKind, 1, nullptr, nullptr);
2610 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2611 CostKind);
2612 switch (IID) {
2613 default:
2614 llvm_unreachable("Unhandled histogram update operation.");
2615 case Intrinsic::experimental_vector_histogram_add:
2616 Cost +=
2617 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2618 break;
2619 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2620 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2621 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2622 break;
2623 }
2624 case Intrinsic::experimental_vector_histogram_umax: {
2625 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2626 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2627 break;
2628 }
2629 case Intrinsic::experimental_vector_histogram_umin: {
2630 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2631 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2632 break;
2633 }
2634 }
2635 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2636 CostKind);
2637 Cost *= PtrsTy->getNumElements();
2638 return Cost;
2639 }
2640 case Intrinsic::get_active_lane_mask: {
2641 Type *ArgTy = ICA.getArgTypes()[0];
2642 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2643 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2644
2645 // If we're not expanding the intrinsic then we assume this is cheap
2646 // to implement.
2647 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2648 return getTypeLegalizationCost(RetTy).first;
2649
2650 // Create the expanded types that will be used to calculate the uadd_sat
2651 // operation.
2652 Type *ExpRetTy =
2653 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2654 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2656 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2657 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2659 return Cost;
2660 }
2661 case Intrinsic::experimental_memset_pattern:
2662 // This cost is set to match the cost of the memset_pattern16 libcall.
2663 // It should likely be re-evaluated after migration to this intrinsic
2664 // is complete.
2665 return TTI::TCC_Basic * 4;
2666 case Intrinsic::abs:
2667 ISD = ISD::ABS;
2668 break;
2669 case Intrinsic::fshl:
2670 ISD = ISD::FSHL;
2671 break;
2672 case Intrinsic::fshr:
2673 ISD = ISD::FSHR;
2674 break;
2675 case Intrinsic::smax:
2676 ISD = ISD::SMAX;
2677 break;
2678 case Intrinsic::smin:
2679 ISD = ISD::SMIN;
2680 break;
2681 case Intrinsic::umax:
2682 ISD = ISD::UMAX;
2683 break;
2684 case Intrinsic::umin:
2685 ISD = ISD::UMIN;
2686 break;
2687 case Intrinsic::sadd_sat:
2688 ISD = ISD::SADDSAT;
2689 break;
2690 case Intrinsic::ssub_sat:
2691 ISD = ISD::SSUBSAT;
2692 break;
2693 case Intrinsic::uadd_sat:
2694 ISD = ISD::UADDSAT;
2695 break;
2696 case Intrinsic::usub_sat:
2697 ISD = ISD::USUBSAT;
2698 break;
2699 case Intrinsic::smul_fix:
2700 ISD = ISD::SMULFIX;
2701 break;
2702 case Intrinsic::umul_fix:
2703 ISD = ISD::UMULFIX;
2704 break;
2705 case Intrinsic::sadd_with_overflow:
2706 ISD = ISD::SADDO;
2707 break;
2708 case Intrinsic::ssub_with_overflow:
2709 ISD = ISD::SSUBO;
2710 break;
2711 case Intrinsic::uadd_with_overflow:
2712 ISD = ISD::UADDO;
2713 break;
2714 case Intrinsic::usub_with_overflow:
2715 ISD = ISD::USUBO;
2716 break;
2717 case Intrinsic::smul_with_overflow:
2718 ISD = ISD::SMULO;
2719 break;
2720 case Intrinsic::umul_with_overflow:
2721 ISD = ISD::UMULO;
2722 break;
2723 case Intrinsic::fptosi_sat:
2724 case Intrinsic::fptoui_sat: {
2725 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2726 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2727
2728 // For cast instructions, types are different between source and
2729 // destination. Also need to check if the source type can be legalize.
2730 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2732 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2734 break;
2735 }
2736 case Intrinsic::ctpop:
2737 ISD = ISD::CTPOP;
2738 // In case of legalization use TCC_Expensive. This is cheaper than a
2739 // library call but still not a cheap instruction.
2740 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2741 break;
2742 case Intrinsic::ctlz:
2743 ISD = ISD::CTLZ;
2744 break;
2745 case Intrinsic::cttz:
2746 ISD = ISD::CTTZ;
2747 break;
2748 case Intrinsic::bswap:
2749 ISD = ISD::BSWAP;
2750 break;
2751 case Intrinsic::bitreverse:
2753 break;
2754 case Intrinsic::ucmp:
2755 ISD = ISD::UCMP;
2756 break;
2757 case Intrinsic::scmp:
2758 ISD = ISD::SCMP;
2759 break;
2760 case Intrinsic::clmul:
2761 ISD = ISD::CLMUL;
2762 break;
2763 case Intrinsic::masked_udiv:
2764 case Intrinsic::masked_sdiv:
2765 case Intrinsic::masked_urem:
2766 case Intrinsic::masked_srem: {
2767 unsigned UnmaskedOpc;
2768 switch (IID) {
2769 case Intrinsic::masked_udiv:
2771 UnmaskedOpc = Instruction::UDiv;
2772 break;
2773 case Intrinsic::masked_sdiv:
2775 UnmaskedOpc = Instruction::SDiv;
2776 break;
2777 case Intrinsic::masked_urem:
2779 UnmaskedOpc = Instruction::URem;
2780 break;
2781 case Intrinsic::masked_srem:
2783 UnmaskedOpc = Instruction::SRem;
2784 break;
2785 default:
2786 llvm_unreachable("Unexpected intrinsic ID");
2787 }
2789 thisT()->getArithmeticInstrCost(UnmaskedOpc, RetTy, CostKind);
2790
2791 // Expansion generates a (select %mask, %rhs, 1) for the divisor.
2792 MVT LT = getTypeLegalizationCost(RetTy).second;
2793 if (!getTLI()->isOperationLegalOrCustom(ISD, LT)) {
2794 Type *CondTy = cast<VectorType>(RetTy)->getWithNewType(
2796 Cost += thisT()->getCmpSelInstrCost(
2797 BinaryOperator::Select, RetTy, CondTy, CmpInst::BAD_ICMP_PREDICATE,
2799 }
2800
2801 return Cost;
2802 }
2803 }
2804
2805 auto *ST = dyn_cast<StructType>(RetTy);
2806 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2807 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2808
2809 const TargetLoweringBase *TLI = getTLI();
2810
2811 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2812 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2813 TLI->isFAbsFree(LT.second)) {
2814 return 0;
2815 }
2816
2817 // The operation is legal. Assume it costs 1.
2818 // If the type is split to multiple registers, assume that there is some
2819 // overhead to this.
2820 // TODO: Once we have extract/insert subvector cost we need to use them.
2821 if (LT.first > 1)
2822 return (LT.first * 2);
2823 else
2824 return (LT.first * 1);
2825 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2826 // If the operation is custom lowered then assume
2827 // that the code is twice as expensive.
2828 return (LT.first * 2);
2829 }
2830
2831 switch (IID) {
2832 case Intrinsic::fmuladd: {
2833 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2834 // point mul followed by an add.
2835
2836 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2837 CostKind) +
2838 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2839 CostKind);
2840 }
2841 case Intrinsic::experimental_constrained_fmuladd: {
2842 IntrinsicCostAttributes FMulAttrs(
2843 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2844 IntrinsicCostAttributes FAddAttrs(
2845 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2846 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2847 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2848 }
2849 case Intrinsic::smin:
2850 case Intrinsic::smax:
2851 case Intrinsic::umin:
2852 case Intrinsic::umax: {
2853 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2854 Type *CondTy = RetTy->getWithNewBitWidth(1);
2855 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2856 CmpInst::Predicate Pred =
2857 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2859 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2860 Pred, CostKind);
2861 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2862 Pred, CostKind);
2863 return Cost;
2864 }
2865 case Intrinsic::sadd_with_overflow:
2866 case Intrinsic::ssub_with_overflow: {
2867 Type *SumTy = RetTy->getContainedType(0);
2868 Type *OverflowTy = RetTy->getContainedType(1);
2869 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2870 ? BinaryOperator::Add
2871 : BinaryOperator::Sub;
2872
2873 // Add:
2874 // Overflow -> (Result < LHS) ^ (RHS < 0)
2875 // Sub:
2876 // Overflow -> (Result < LHS) ^ (RHS > 0)
2878 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2879 Cost +=
2880 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2882 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2883 CostKind);
2884 return Cost;
2885 }
2886 case Intrinsic::uadd_with_overflow:
2887 case Intrinsic::usub_with_overflow: {
2888 Type *SumTy = RetTy->getContainedType(0);
2889 Type *OverflowTy = RetTy->getContainedType(1);
2890 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2891 ? BinaryOperator::Add
2892 : BinaryOperator::Sub;
2893 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2896
2898 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2899 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2900 OverflowTy, Pred, CostKind);
2901 return Cost;
2902 }
2903 case Intrinsic::smul_with_overflow:
2904 case Intrinsic::umul_with_overflow: {
2905 Type *MulTy = RetTy->getContainedType(0);
2906 Type *OverflowTy = RetTy->getContainedType(1);
2907 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2908 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2909 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2910
2911 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2913
2915 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2916 Cost +=
2917 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2918 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2919 CCH, CostKind);
2920 Cost += thisT()->getArithmeticInstrCost(
2921 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2923
2924 if (IsSigned)
2925 Cost += thisT()->getArithmeticInstrCost(
2926 Instruction::AShr, MulTy, CostKind,
2929
2930 Cost += thisT()->getCmpSelInstrCost(
2931 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2932 return Cost;
2933 }
2934 case Intrinsic::sadd_sat:
2935 case Intrinsic::ssub_sat: {
2936 // Assume a default expansion.
2937 Type *CondTy = RetTy->getWithNewBitWidth(1);
2938
2939 Type *OpTy = StructType::create({RetTy, CondTy});
2940 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2941 ? Intrinsic::sadd_with_overflow
2942 : Intrinsic::ssub_with_overflow;
2944
2945 // SatMax -> Overflow && SumDiff < 0
2946 // SatMin -> Overflow && SumDiff >= 0
2948 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2949 nullptr, ScalarizationCostPassed);
2950 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2951 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2952 Pred, CostKind);
2953 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2954 CondTy, Pred, CostKind);
2955 return Cost;
2956 }
2957 case Intrinsic::uadd_sat:
2958 case Intrinsic::usub_sat: {
2959 Type *CondTy = RetTy->getWithNewBitWidth(1);
2960
2961 Type *OpTy = StructType::create({RetTy, CondTy});
2962 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2963 ? Intrinsic::uadd_with_overflow
2964 : Intrinsic::usub_with_overflow;
2965
2967 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2968 nullptr, ScalarizationCostPassed);
2969 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2970 Cost +=
2971 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2973 return Cost;
2974 }
2975 case Intrinsic::smul_fix:
2976 case Intrinsic::umul_fix: {
2977 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2978 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2979
2980 unsigned ExtOp =
2981 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2983
2985 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2986 Cost +=
2987 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2988 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2989 CCH, CostKind);
2990 Cost += thisT()->getArithmeticInstrCost(
2991 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2993 Cost += thisT()->getArithmeticInstrCost(
2994 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2996 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2997 return Cost;
2998 }
2999 case Intrinsic::abs: {
3000 // abs(X) = select(icmp(X,0),X,sub(0,X))
3001 Type *CondTy = RetTy->getWithNewBitWidth(1);
3004 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3005 Pred, CostKind);
3006 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3007 Pred, CostKind);
3008 // TODO: Should we add an OperandValueProperties::OP_Zero property?
3009 Cost += thisT()->getArithmeticInstrCost(
3010 BinaryOperator::Sub, RetTy, CostKind,
3012 return Cost;
3013 }
3014 case Intrinsic::fshl:
3015 case Intrinsic::fshr: {
3016 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
3017 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
3018 Type *CondTy = RetTy->getWithNewBitWidth(1);
3020 Cost +=
3021 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
3022 Cost +=
3023 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
3024 Cost +=
3025 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
3026 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
3027 CostKind);
3028 // Non-constant shift amounts requires a modulo. If the typesize is a
3029 // power-2 then this will be converted to an and, otherwise it will use a
3030 // urem.
3031 Cost += thisT()->getArithmeticInstrCost(
3032 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
3033 : BinaryOperator::URem,
3034 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3035 {TTI::OK_UniformConstantValue, TTI::OP_None});
3036 // Shift-by-zero handling.
3037 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3039 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3041 return Cost;
3042 }
3043 case Intrinsic::fptosi_sat:
3044 case Intrinsic::fptoui_sat: {
3045 if (Tys.empty())
3046 break;
3047 Type *FromTy = Tys[0];
3048 bool IsSigned = IID == Intrinsic::fptosi_sat;
3049
3051 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
3052 {FromTy, FromTy});
3053 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
3054 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
3055 {FromTy, FromTy});
3056 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
3057 Cost += thisT()->getCastInstrCost(
3058 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
3060 if (IsSigned) {
3061 Type *CondTy = RetTy->getWithNewBitWidth(1);
3062 Cost += thisT()->getCmpSelInstrCost(
3063 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3064 Cost += thisT()->getCmpSelInstrCost(
3065 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3066 }
3067 return Cost;
3068 }
3069 case Intrinsic::ucmp:
3070 case Intrinsic::scmp: {
3071 Type *CmpTy = Tys[0];
3072 Type *CondTy = RetTy->getWithNewBitWidth(1);
3074 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3076 CostKind) +
3077 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3079 CostKind);
3080
3081 EVT VT = TLI->getValueType(DL, CmpTy, true);
3083 // x < y ? -1 : (x > y ? 1 : 0)
3084 Cost += 2 * thisT()->getCmpSelInstrCost(
3085 BinaryOperator::Select, RetTy, CondTy,
3087 } else {
3088 // zext(x > y) - zext(x < y)
3089 Cost +=
3090 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3092 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3093 CostKind);
3094 }
3095 return Cost;
3096 }
3097 case Intrinsic::maximumnum:
3098 case Intrinsic::minimumnum: {
3099 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3100 // maximumnum/minimumnum to
3101 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3102 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3103 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3104 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3105 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3106 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3107 int IeeeISD =
3108 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3109 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3110 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3111 RetTy, Tys[0]);
3112 InstructionCost FCanonicalizeCost =
3113 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3114 return LT.first + FCanonicalizeCost * 2;
3115 }
3116 break;
3117 }
3118 case Intrinsic::clmul: {
3119 // This cost model should match the expansion in
3120 // TargetLowering::expandCLMUL.
3121 unsigned BW = RetTy->getScalarSizeInBits();
3122 InstructionCost AndCost =
3123 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind);
3124 InstructionCost OrCost =
3125 thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
3126 InstructionCost XorCost =
3127 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3128 InstructionCost MulCost =
3129 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind);
3130
3131 // When the multiplication with holes approach is used, that emits 16
3132 // MULs, 8 + 4 ANDs, 12 XORs and 3 ORs.
3133 if (BW >= 32 && BW <= 64 &&
3135 TLI->getValueType(DL, RetTy))) {
3136 return 16 * MulCost + 12 * AndCost + 12 * XorCost + 3 * OrCost;
3137 }
3138
3139 InstructionCost PerBitCostMul = AndCost + MulCost + XorCost;
3140 InstructionCost PerBitCostBittest =
3141 AndCost +
3142 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3144 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3146 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3147 return BW * PerBitCost;
3148 }
3149 default:
3150 break;
3151 }
3152
3153 // Else, assume that we need to scalarize this intrinsic. For math builtins
3154 // this will emit a costly libcall, adding call overhead and spills. Make it
3155 // very expensive.
3156 if (isVectorizedTy(RetTy)) {
3157 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3158
3159 // Scalable vectors cannot be scalarized, so return Invalid.
3160 if (any_of(concat<Type *const>(RetVTys, Tys),
3161 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3163
3164 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3165 if (!SkipScalarizationCost) {
3166 ScalarizationCost = 0;
3167 for (Type *RetVTy : RetVTys) {
3168 ScalarizationCost += getScalarizationOverhead(
3169 cast<VectorType>(RetVTy), /*Insert=*/true,
3170 /*Extract=*/false, CostKind);
3171 }
3172 }
3173
3174 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3175 SmallVector<Type *, 4> ScalarTys;
3176 for (Type *Ty : Tys) {
3177 if (Ty->isVectorTy())
3178 Ty = Ty->getScalarType();
3179 ScalarTys.push_back(Ty);
3180 }
3181 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3182 InstructionCost ScalarCost =
3183 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3184 for (Type *Ty : Tys) {
3185 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3186 if (!ICA.skipScalarizationCost())
3187 ScalarizationCost += getScalarizationOverhead(
3188 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3189 ScalarCalls = std::max(ScalarCalls,
3190 cast<FixedVectorType>(VTy)->getNumElements());
3191 }
3192 }
3193 return ScalarCalls * ScalarCost + ScalarizationCost;
3194 }
3195
3196 // This is going to be turned into a library call, make it expensive.
3197 return SingleCallCost;
3198 }
3199
3200 /// Get memory intrinsic cost based on arguments.
3203 TTI::TargetCostKind CostKind) const override {
3204 unsigned Id = MICA.getID();
3205 Type *DataTy = MICA.getDataType();
3206 bool VariableMask = MICA.getVariableMask();
3207 Align Alignment = MICA.getAlignment();
3208
3209 switch (Id) {
3210 case Intrinsic::experimental_vp_strided_load:
3211 case Intrinsic::experimental_vp_strided_store: {
3212 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3213 ? Instruction::Load
3214 : Instruction::Store;
3215 // For a target without strided memory operations (or for an illegal
3216 // operation type on one which does), assume we lower to a gather/scatter
3217 // operation. (Which may in turn be scalarized.)
3218 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3219 VariableMask, true, CostKind);
3220 }
3221 case Intrinsic::masked_scatter:
3222 case Intrinsic::masked_gather:
3223 case Intrinsic::vp_scatter:
3224 case Intrinsic::vp_gather: {
3225 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3226 MICA.getID() == Intrinsic::vp_gather)
3227 ? Instruction::Load
3228 : Instruction::Store;
3229
3230 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3231 VariableMask, true, CostKind);
3232 }
3233 case Intrinsic::vp_load:
3234 case Intrinsic::vp_store:
3236 case Intrinsic::masked_load:
3237 case Intrinsic::masked_store: {
3238 unsigned Opcode =
3239 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3240 // TODO: Pass on AddressSpace when we have test coverage.
3241 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3242 CostKind);
3243 }
3244 case Intrinsic::masked_compressstore:
3245 case Intrinsic::masked_expandload: {
3246 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3247 ? Instruction::Load
3248 : Instruction::Store;
3249 // Treat expand load/compress store as gather/scatter operation.
3250 // TODO: implement more precise cost estimation for these intrinsics.
3251 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3252 VariableMask,
3253 /*IsGatherScatter*/ true, CostKind);
3254 }
3255 case Intrinsic::vp_load_ff:
3257 default:
3258 llvm_unreachable("unexpected intrinsic");
3259 }
3260 }
3261
3262 /// Compute a cost of the given call instruction.
3263 ///
3264 /// Compute the cost of calling function F with return type RetTy and
3265 /// argument types Tys. F might be nullptr, in this case the cost of an
3266 /// arbitrary call with the specified signature will be returned.
3267 /// This is used, for instance, when we estimate call of a vector
3268 /// counterpart of the given function.
3269 /// \param F Called function, might be nullptr.
3270 /// \param RetTy Return value types.
3271 /// \param Tys Argument types.
3272 /// \returns The cost of Call instruction.
3275 TTI::TargetCostKind CostKind) const override {
3276 return 10;
3277 }
3278
3279 unsigned getNumberOfParts(Type *Tp) const override {
3280 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3281 if (!LT.first.isValid())
3282 return 0;
3283 // Try to find actual number of parts for non-power-of-2 elements as
3284 // ceil(num-of-elements/num-of-subtype-elements).
3285 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3286 FTp && LT.second.isFixedLengthVector() &&
3287 !has_single_bit(FTp->getNumElements())) {
3288 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3289 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3290 SubTp && SubTp->getElementType() == FTp->getElementType())
3291 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3292 }
3293 return LT.first.getValue();
3294 }
3295
3298 TTI::TargetCostKind) const override {
3299 return 0;
3300 }
3301
3302 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3303 /// We're assuming that reduction operation are performing the following way:
3304 ///
3305 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3306 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3307 /// \----------------v-------------/ \----------v------------/
3308 /// n/2 elements n/2 elements
3309 /// %red1 = op <n x t> %val, <n x t> val1
3310 /// After this operation we have a vector %red1 where only the first n/2
3311 /// elements are meaningful, the second n/2 elements are undefined and can be
3312 /// dropped. All other operations are actually working with the vector of
3313 /// length n/2, not n, though the real vector length is still n.
3314 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3315 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3316 /// \----------------v-------------/ \----------v------------/
3317 /// n/4 elements 3*n/4 elements
3318 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3319 /// length n/2, the resulting vector has length n/4 etc.
3320 ///
3321 /// The cost model should take into account that the actual length of the
3322 /// vector is reduced on each iteration.
3325 // Targets must implement a default value for the scalable case, since
3326 // we don't know how many lanes the vector has.
3329
3330 Type *ScalarTy = Ty->getElementType();
3331 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3332 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3333 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3334 NumVecElts >= 2) {
3335 // Or reduction for i1 is represented as:
3336 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3337 // %res = cmp ne iReduxWidth %val, 0
3338 // And reduction for i1 is represented as:
3339 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3340 // %res = cmp eq iReduxWidth %val, 11111
3341 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3342 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3344 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3347 }
3348 unsigned NumReduxLevels = Log2_32(NumVecElts);
3349 InstructionCost ArithCost = 0;
3350 InstructionCost ShuffleCost = 0;
3351 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3352 unsigned LongVectorCount = 0;
3353 unsigned MVTLen =
3354 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3355 while (NumVecElts > MVTLen) {
3356 NumVecElts /= 2;
3357 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3358 ShuffleCost += thisT()->getShuffleCost(
3359 TTI::SK_ExtractSubvector, SubTy, Ty, CostKind, {}, NumVecElts, SubTy);
3360 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3361 Ty = SubTy;
3362 ++LongVectorCount;
3363 }
3364
3365 NumReduxLevels -= LongVectorCount;
3366
3367 // The minimal length of the vector is limited by the real length of vector
3368 // operations performed on the current platform. That's why several final
3369 // reduction operations are performed on the vectors with the same
3370 // architecture-dependent length.
3371
3372 // By default reductions need one shuffle per reduction level.
3373 ShuffleCost +=
3374 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3375 Ty, CostKind, {}, 0, Ty);
3376 ArithCost +=
3377 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3378 return ShuffleCost + ArithCost +
3379 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3380 CostKind, 0, nullptr, nullptr);
3381 }
3382
3383 /// Try to calculate the cost of performing strict (in-order) reductions,
3384 /// which involves doing a sequence of floating point additions in lane
3385 /// order, starting with an initial value. For example, consider a scalar
3386 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3387 ///
3388 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3389 ///
3390 /// %add1 = %InitVal + %v0
3391 /// %add2 = %add1 + %v1
3392 /// %add3 = %add2 + %v2
3393 /// %add4 = %add3 + %v3
3394 ///
3395 /// As a simple estimate we can say the cost of such a reduction is 4 times
3396 /// the cost of a scalar FP addition. We can only estimate the costs for
3397 /// fixed-width vectors here because for scalable vectors we do not know the
3398 /// runtime number of operations.
3401 // Targets must implement a default value for the scalable case, since
3402 // we don't know how many lanes the vector has.
3405
3406 auto *VTy = cast<FixedVectorType>(Ty);
3408 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3409 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3410 Opcode, VTy->getElementType(), CostKind);
3411 ArithCost *= VTy->getNumElements();
3412
3413 return ExtractCost + ArithCost;
3414 }
3415
3418 std::optional<FastMathFlags> FMF,
3419 TTI::TargetCostKind CostKind) const override {
3420 assert(Ty && "Unknown reduction vector type");
3422 return getOrderedReductionCost(Opcode, Ty, CostKind);
3423 return getTreeReductionCost(Opcode, Ty, CostKind);
3424 }
3425
3426 /// Try to calculate op costs for min/max reduction operations.
3427 /// \param CondTy Conditional type for the Select instruction.
3430 TTI::TargetCostKind CostKind) const override {
3431 // Targets must implement a default value for the scalable case, since
3432 // we don't know how many lanes the vector has.
3435
3436 Type *ScalarTy = Ty->getElementType();
3437 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3438 unsigned NumReduxLevels = Log2_32(NumVecElts);
3439 InstructionCost MinMaxCost = 0;
3440 InstructionCost ShuffleCost = 0;
3441 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3442 unsigned LongVectorCount = 0;
3443 unsigned MVTLen =
3444 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3445 while (NumVecElts > MVTLen) {
3446 NumVecElts /= 2;
3447 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3448
3449 ShuffleCost += thisT()->getShuffleCost(
3450 TTI::SK_ExtractSubvector, SubTy, Ty, CostKind, {}, NumVecElts, SubTy);
3451
3452 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3453 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3454 Ty = SubTy;
3455 ++LongVectorCount;
3456 }
3457
3458 NumReduxLevels -= LongVectorCount;
3459
3460 // The minimal length of the vector is limited by the real length of vector
3461 // operations performed on the current platform. That's why several final
3462 // reduction opertions are perfomed on the vectors with the same
3463 // architecture-dependent length.
3464 ShuffleCost +=
3465 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3466 Ty, CostKind, {}, 0, Ty);
3467 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3468 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3469 // The last min/max should be in vector registers and we counted it above.
3470 // So just need a single extractelement.
3471 return ShuffleCost + MinMaxCost +
3472 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3473 CostKind, 0, nullptr, nullptr);
3474 }
3475
3477 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3478 VectorType *Ty, std::optional<FastMathFlags> FMF,
3479 TTI::TargetCostKind CostKind) const override {
3480 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3481 FTy && IsUnsigned && Opcode == Instruction::Add &&
3482 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3483 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3484 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3485 auto *IntTy =
3486 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3487 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3488 FMF ? *FMF : FastMathFlags());
3489 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3491 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3492 }
3493 // Without any native support, this is equivalent to the cost of
3494 // vecreduce.opcode(ext(Ty A)).
3495 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3496 InstructionCost RedCost =
3497 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3498 InstructionCost ExtCost = thisT()->getCastInstrCost(
3499 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3501
3502 return RedCost + ExtCost;
3503 }
3504
3506 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3507 VectorType *Ty,
3508 TTI::TargetCostKind CostKind) const override {
3509 // Without any native support, this is equivalent to the cost of
3510 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3511 // vecreduce.add(mul(A, B)).
3512 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3513 "The reduction opcode is expected to be Add or Sub.");
3514 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3515 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3516 RedOpcode, ExtTy, std::nullopt, CostKind);
3517 InstructionCost ExtCost = thisT()->getCastInstrCost(
3518 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3520
3521 InstructionCost MulCost =
3522 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3523
3524 return RedCost + MulCost + 2 * ExtCost;
3525 }
3526
3528 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
3530 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
3532 std::optional<FastMathFlags> FMF) const override {
3533 unsigned EltSizeAcc = AccumType->getScalarSizeInBits();
3534 unsigned EltSizeInA = InputTypeA->getScalarSizeInBits();
3535 unsigned Ratio = EltSizeAcc / EltSizeInA;
3536 if (VF.getKnownMinValue() <= Ratio || VF.getKnownMinValue() % Ratio != 0 ||
3537 EltSizeAcc % EltSizeInA != 0 || (BinOp && InputTypeA != InputTypeB))
3539
3540 Type *InputVectorType = VectorType::get(InputTypeA, VF);
3541 Type *ExtInputVectorType = VectorType::get(AccumType, VF);
3542 Type *AccumVectorType =
3543 VectorType::get(AccumType, VF.divideCoefficientBy(Ratio));
3544
3545 InstructionCost ExtendCostA = 0;
3547 ExtendCostA = getCastInstrCost(
3549 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3550 CostKind);
3551
3552 // TODO: add cost of extracting subvectors from the source vector that
3553 // is to be partially reduced.
3554 InstructionCost ReductionOpCost =
3555 Ratio * getArithmeticInstrCost(Opcode, AccumVectorType, CostKind);
3556
3557 if (!BinOp)
3558 return ExtendCostA + ReductionOpCost;
3559
3560 InstructionCost ExtendCostB = 0;
3562 ExtendCostB = getCastInstrCost(
3564 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3565 CostKind);
3566 return ExtendCostA + ExtendCostB + ReductionOpCost +
3567 getArithmeticInstrCost(*BinOp, ExtInputVectorType, CostKind);
3568 }
3569
3571
3572 /// @}
3573};
3574
3575/// Concrete BasicTTIImpl that can be used if no further customization
3576/// is needed.
3577class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3578 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3579
3580 friend class BasicTTIImplBase<BasicTTIImpl>;
3581
3582 const TargetSubtargetInfo *ST;
3583 const TargetLoweringBase *TLI;
3584
3585 const TargetSubtargetInfo *getST() const { return ST; }
3586 const TargetLoweringBase *getTLI() const { return TLI; }
3587
3588public:
3589 LLVM_ABI explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3590};
3591
3592} // end namespace llvm
3593
3594#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
unsigned Imm
unsigned uint64_t
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:857
This file implements the BitVector class.
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_ABI
Definition Compiler.h:215
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
SI Fold Operands
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:231
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1351
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1206
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1509
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1135
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:197
an instruction to allocate memory on the stack
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:194
size_t size() const
Get the array size.
Definition ArrayRef.h:141
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:200
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
bool haveFastClmul(IntegerType *Ty) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy, Align Alignment, unsigned AddrSpace) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
unsigned getMaxInterleaveFactor(ElementCount VF, bool HasUnorderedReductions) const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const override
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
bool isSingleThreaded() const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind, Type *AccessType) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, TTI::TargetCostKind CostKind, ArrayRef< int > Mask, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getBranchMispredictPenalty() const override
bool isNumRegsMajorCostOfLSR() const override
LLVM_ABI BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Set all bits in the bitvector.
Definition BitVector.h:366
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:740
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:770
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:763
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:767
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:765
@ ICMP_NE
not equal
Definition InstrTypes.h:762
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:750
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:320
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:305
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:316
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:843
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:329
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Class to represent integer types.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:338
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(LLVMContext &C, unsigned AddressSpace)
This constructs an opaque pointer to an object in a numbered address space.
Definition Type.cpp:887
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:662
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeKind getTypeConversion(LLVMContext &Context, EVT VT) const
Return pair that represents the legalization kind (first) that needs to happen to EVT (second) in ord...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const FeatureBitset & getInlineMustMatchFeatures() const =0
Target features where all mismatches prevent inlining.
virtual const FeatureBitset & getInlineInverseFeatures() const =0
Target features where the callee may have an additional feature, instead of the caller.
virtual const FeatureBitset & getInlineIgnoreFeatures() const =0
Target features to ignore for inline compatibility check.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind, Type *AccessType) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
@ TCK_Latency
The latency of instruction.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
llvm::VectorInstrContext VectorInstrContext
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
static LLVM_ABI Instruction::CastOps getOpcodeForPartialReductionExtendKind(PartialReductionExtendKind Kind)
Get the cast opcode for an extension kind.
MemIndexedMode
The type of load/store indexing.
static LLVM_ABI VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:514
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1827
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:723
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:339
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:283
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:277
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:297
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:363
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVM_ABI Type * getWithNewType(Type *EltTy) const
Given vector type, change the element type, whilst keeping the old number of elements.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:222
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:296
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:303
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:222
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:392
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:257
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition TypeSize.h:252
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3043
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:789
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:520
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:749
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:780
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:543
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:806
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:729
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:815
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:737
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:955
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:536
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1739
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:840
InstructionCost Cost
@ Known
Known to have no common set bits.
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2554
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1151
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:149
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1746
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:326
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:280
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:389
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
@ Fast
Assign the register banks as fast as possible (default).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
LLVM_ABI cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:373
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:339
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static LLVM_ABI bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).