LLVM 24.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
55#include <algorithm>
56#include <cassert>
57#include <cstdint>
58#include <limits>
59#include <optional>
60#include <utility>
61
62namespace llvm {
63
64class Function;
65class GlobalValue;
66class LLVMContext;
67class ScalarEvolution;
68class SCEV;
69class TargetMachine;
70
72
73/// Base class which can be used to help build a TTI implementation.
74///
75/// This class provides as much implementation of the TTI interface as is
76/// possible using the target independent parts of the code generator.
77///
78/// In order to subclass it, your class must implement a getST() method to
79/// return the subtarget, and a getTLI() method to return the target lowering.
80/// We need these methods implemented in the derived class so that this class
81/// doesn't have to duplicate storage for them.
82template <typename T>
84private:
86 using TTI = TargetTransformInfo;
87
88 /// Helper function to access this as a T.
89 const T *thisT() const { return static_cast<const T *>(this); }
90
91 /// Estimate a cost of Broadcast as an extract and sequence of insert
92 /// operations.
94 getBroadcastShuffleOverhead(FixedVectorType *VTy,
97 // Broadcast cost is equal to the cost of extracting the zero'th element
98 // plus the cost of inserting it into every element of the result vector.
99 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
100 CostKind, 0, nullptr, nullptr);
101
102 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
103 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
104 CostKind, i, nullptr, nullptr);
105 }
106 return Cost;
107 }
108
109 /// Estimate a cost of shuffle as a sequence of extract and insert
110 /// operations.
112 getPermuteShuffleOverhead(FixedVectorType *VTy,
115 // Shuffle cost is equal to the cost of extracting element from its argument
116 // plus the cost of inserting them onto the result vector.
117
118 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
119 // index 0 of first vector, index 1 of second vector,index 2 of first
120 // vector and finally index 3 of second vector and insert them at index
121 // <0,1,2,3> of result vector.
122 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
123 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
124 CostKind, i, nullptr, nullptr);
125 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
126 CostKind, i, nullptr, nullptr);
127 }
128 return Cost;
129 }
130
131 /// Estimate a cost of subvector extraction as a sequence of extract and
132 /// insert operations.
133 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
135 int Index,
136 FixedVectorType *SubVTy) const {
137 assert(VTy && SubVTy &&
138 "Can only extract subvectors from vectors");
139 int NumSubElts = SubVTy->getNumElements();
141 (Index + NumSubElts) <=
142 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
143 "SK_ExtractSubvector index out of range");
144
146 // Subvector extraction cost is equal to the cost of extracting element from
147 // the source type plus the cost of inserting them into the result vector
148 // type.
149 for (int i = 0; i != NumSubElts; ++i) {
150 Cost +=
151 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
152 CostKind, i + Index, nullptr, nullptr);
153 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
154 CostKind, i, nullptr, nullptr);
155 }
156 return Cost;
157 }
158
159 /// Estimate a cost of subvector insertion as a sequence of extract and
160 /// insert operations.
161 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
163 int Index,
164 FixedVectorType *SubVTy) const {
165 assert(VTy && SubVTy &&
166 "Can only insert subvectors into vectors");
167 int NumSubElts = SubVTy->getNumElements();
169 (Index + NumSubElts) <=
170 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
171 "SK_InsertSubvector index out of range");
172
174 // Subvector insertion cost is equal to the cost of extracting element from
175 // the source type plus the cost of inserting them into the result vector
176 // type.
177 for (int i = 0; i != NumSubElts; ++i) {
178 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
179 CostKind, i, nullptr, nullptr);
180 Cost +=
181 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
182 i + Index, nullptr, nullptr);
183 }
184 return Cost;
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetSubtargetInfo *getST() const {
189 return static_cast<const T *>(this)->getST();
190 }
191
192 /// Local query method delegates up to T which *must* implement this!
193 const TargetLoweringBase *getTLI() const {
194 return static_cast<const T *>(this)->getTLI();
195 }
196
197 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
198 switch (M) {
200 return ISD::UNINDEXED;
201 case TTI::MIM_PreInc:
202 return ISD::PRE_INC;
203 case TTI::MIM_PreDec:
204 return ISD::PRE_DEC;
205 case TTI::MIM_PostInc:
206 return ISD::POST_INC;
207 case TTI::MIM_PostDec:
208 return ISD::POST_DEC;
209 }
210 llvm_unreachable("Unexpected MemIndexedMode");
211 }
212
213 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
214 Align Alignment,
215 bool VariableMask,
216 bool IsGatherScatter,
218 unsigned AddressSpace = 0) const {
219 // We cannot scalarize scalable vectors, so return Invalid.
220 if (isa<ScalableVectorType>(DataTy))
222
223 auto *VT = cast<FixedVectorType>(DataTy);
224 unsigned VF = VT->getNumElements();
225
226 // Assume the target does not have support for gather/scatter operations
227 // and provide a rough estimate.
228 //
229 // First, compute the cost of the individual memory operations.
230 InstructionCost AddrExtractCost =
231 IsGatherScatter ? getScalarizationOverhead(
233 PointerType::get(VT->getContext(), 0), VF),
234 /*Insert=*/false, /*Extract=*/true, CostKind)
235 : 0;
236
237 // The cost of the scalar loads/stores.
238 InstructionCost MemoryOpCost =
239 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
241
242 // Next, compute the cost of packing the result in a vector.
243 InstructionCost PackingCost =
244 getScalarizationOverhead(VT, Opcode != Instruction::Store,
245 Opcode == Instruction::Store, CostKind);
246
247 InstructionCost ConditionalCost = 0;
248 if (VariableMask) {
249 // Compute the cost of conditionally executing the memory operations with
250 // variable masks. This includes extracting the individual conditions, a
251 // branches and PHIs to combine the results.
252 // NOTE: Estimating the cost of conditionally executing the memory
253 // operations accurately is quite difficult and the current solution
254 // provides a very rough estimate only.
255 ConditionalCost =
258 /*Insert=*/false, /*Extract=*/true, CostKind) +
259 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
260 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
261 }
262
263 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
264 }
265
266 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
267 /// or same non -1 index value and this index value contained at least twice.
268 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
269 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
270 /// with \p Index=2.
271 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
272 // Check that the broadcast index meets at least twice.
273 bool IsCompared = false;
274 if (int SplatIdx = PoisonMaskElem;
275 all_of(enumerate(Mask), [&](const auto &P) {
276 if (P.value() == PoisonMaskElem)
277 return P.index() != Mask.size() - 1 || IsCompared;
278 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
279 return false;
280 if (SplatIdx == PoisonMaskElem) {
281 SplatIdx = P.value();
282 return P.index() != Mask.size() - 1;
283 }
284 IsCompared = true;
285 return SplatIdx == P.value();
286 })) {
287 Index = SplatIdx;
288 return true;
289 }
290 return false;
291 }
292
293 /// Several intrinsics that return structs (including llvm.sincos[pi] and
294 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
295 /// vector library functions correspond to the scalar calls (e.g. sincos or
296 /// modf), which unlike the intrinsic return values via output pointers. This
297 /// helper checks if a vector call exists for the given intrinsic, and returns
298 /// the cost, which includes the cost of the mask (if required), and the loads
299 /// for values returned via output pointers. \p LC is the scalar libcall and
300 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
301 /// the call return value. If std::nullopt is returned, then no vector library
302 /// call is available, so the intrinsic should be assigned the default cost
303 /// (e.g. scalarization).
304 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
306 std::optional<unsigned> CallRetElementIndex = {}) const {
307 Type *RetTy = ICA.getReturnType();
308 // Vector variants of the intrinsic can be mapped to a vector library call.
309 if (!isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, {}, CostKind, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
384
385public:
386 /// \name Scalar TTI Implementations
387 /// @{
389 unsigned AddressSpace, Align Alignment,
390 unsigned *Fast) const override {
391 EVT E = EVT::getIntegerVT(Context, BitWidth);
392 return getTLI()->allowsMisalignedMemoryAccesses(
394 }
395
396 bool areInlineCompatible(const Function *Caller,
397 const Function *Callee) const override {
398 const TargetMachine &TM = getTLI()->getTargetMachine();
399
400 const TargetSubtargetInfo *CallerSTI = TM.getSubtargetImpl(*Caller);
401 const TargetSubtargetInfo *CalleeSTI = TM.getSubtargetImpl(*Callee);
402 FeatureBitset InlineIgnoreFeatures = CallerSTI->getInlineIgnoreFeatures();
403 FeatureBitset InlineInverseFeatures = CallerSTI->getInlineInverseFeatures();
404 FeatureBitset InlineMustMatchFeatures =
405 CallerSTI->getInlineMustMatchFeatures();
406
407 FeatureBitset CallerBits =
408 (CallerSTI->getFeatureBits() ^ InlineInverseFeatures) &
409 ~InlineIgnoreFeatures;
410 FeatureBitset CalleeBits =
411 (CalleeSTI->getFeatureBits() ^ InlineInverseFeatures) &
412 ~InlineIgnoreFeatures;
413
414 if ((CallerBits & InlineMustMatchFeatures) !=
415 (CalleeBits & InlineMustMatchFeatures))
416 return false;
417
418 // Inline a callee if its target-features are a subset of the callers
419 // target-features.
420 return (CallerBits & CalleeBits) == CalleeBits;
421 }
422
423 bool hasBranchDivergence(const Function *F = nullptr) const override {
424 return false;
425 }
426
427 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
428 return false;
429 }
430
431 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
432 return true;
433 }
434
435 unsigned getFlatAddressSpace() const override {
436 // Return an invalid address space.
437 return -1;
438 }
439
441 Intrinsic::ID IID) const override {
442 return false;
443 }
444
445 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
446 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
447 }
448
449 unsigned getAssumedAddrSpace(const Value *V) const override {
450 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
451 }
452
453 bool isSingleThreaded() const override {
454 return getTLI()->getTargetMachine().Options.ThreadModel ==
456 }
457
458 std::pair<const Value *, unsigned>
459 getPredicatedAddrSpace(const Value *V) const override {
460 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
461 }
462
464 Value *NewV) const override {
465 return nullptr;
466 }
467
468 bool isLegalAddImmediate(int64_t imm) const override {
469 return getTLI()->isLegalAddImmediate(imm);
470 }
471
472 bool isLegalAddScalableImmediate(int64_t Imm) const override {
473 return getTLI()->isLegalAddScalableImmediate(Imm);
474 }
475
476 bool isLegalICmpImmediate(int64_t imm) const override {
477 return getTLI()->isLegalICmpImmediate(imm);
478 }
479
480 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
481 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
482 Instruction *I = nullptr,
483 int64_t ScalableOffset = 0) const override {
485 AM.BaseGV = BaseGV;
486 AM.BaseOffs = BaseOffset;
487 AM.HasBaseReg = HasBaseReg;
488 AM.Scale = Scale;
489 AM.ScalableOffset = ScalableOffset;
490 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
491 }
492
493 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
494 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
495 }
496
497 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy,
498 Align Alignment,
499 unsigned AddrSpace) const override {
500 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy, Alignment,
501 AddrSpace](unsigned VF) {
502 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
503 EVT VT = getTLI()->getValueType(DL, SrcTy);
504 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
505 getTLI()->isOperationCustom(ISD::STORE, VT))
506 return true;
507
508 EVT ValVT =
509 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
510 EVT LegalizedVT =
511 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
512 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT, Alignment,
513 AddrSpace);
514 };
515 while (VF > 2 && IsSupportedByTarget(VF))
516 VF /= 2;
517 return VF;
518 }
519
520 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
521 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
522 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
523 }
524
525 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
526 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
527 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
528 }
529
531 const TTI::LSRCost &C2) const override {
533 }
534
538
542
546
548 StackOffset BaseOffset, bool HasBaseReg,
549 int64_t Scale,
550 unsigned AddrSpace) const override {
552 AM.BaseGV = BaseGV;
553 AM.BaseOffs = BaseOffset.getFixed();
554 AM.HasBaseReg = HasBaseReg;
555 AM.Scale = Scale;
556 AM.ScalableOffset = BaseOffset.getScalable();
557 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
558 return 0;
560 }
561
562 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
563 return getTLI()->isTruncateFree(Ty1, Ty2);
564 }
565
566 bool isProfitableToHoist(Instruction *I) const override {
567 return getTLI()->isProfitableToHoist(I);
568 }
569
570 bool useAA() const override { return getST()->useAA(); }
571
572 bool isTypeLegal(Type *Ty) const override {
573 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
574 return getTLI()->isTypeLegal(VT);
575 }
576
577 unsigned getRegUsageForType(Type *Ty) const override {
578 EVT ETy = getTLI()->getValueType(DL, Ty);
579 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
580 }
581
582 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
584 TTI::TargetCostKind CostKind) const override {
585 return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
586 }
587
589 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
590 BlockFrequencyInfo *BFI) const override {
591 /// Try to find the estimated number of clusters. Note that the number of
592 /// clusters identified in this function could be different from the actual
593 /// numbers found in lowering. This function ignore switches that are
594 /// lowered with a mix of jump table / bit test / BTree. This function was
595 /// initially intended to be used when estimating the cost of switch in
596 /// inline cost heuristic, but it's a generic cost model to be used in other
597 /// places (e.g., in loop unrolling).
598 unsigned N = SI.getNumCases();
599 const TargetLoweringBase *TLI = getTLI();
600 const DataLayout &DL = this->getDataLayout();
601
602 JumpTableSize = 0;
603 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
604
605 // Early exit if both a jump table and bit test are not allowed.
606 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
607 return N;
608
609 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
610 APInt MinCaseVal = MaxCaseVal;
611 for (auto CI : SI.cases()) {
612 const APInt &CaseVal = CI.getCaseValue()->getValue();
613 if (CaseVal.sgt(MaxCaseVal))
614 MaxCaseVal = CaseVal;
615 if (CaseVal.slt(MinCaseVal))
616 MinCaseVal = CaseVal;
617 }
618
619 // Check if suitable for a bit test
620 if (N <= DL.getIndexSizeInBits(0u)) {
622 for (auto I : SI.cases()) {
623 const BasicBlock *BB = I.getCaseSuccessor();
624 ++DestMap[BB];
625 }
626
627 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
628 return 1;
629 }
630
631 // Check if suitable for a jump table.
632 if (IsJTAllowed) {
633 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
634 return N;
636 (MaxCaseVal - MinCaseVal)
637 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
638 // Check whether a range of clusters is dense enough for a jump table
639 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
640 JumpTableSize = Range;
641 return 1;
642 }
643 }
644 return N;
645 }
646
647 bool shouldBuildLookupTables() const override {
648 const TargetLoweringBase *TLI = getTLI();
649 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
650 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
651 }
652
653 bool shouldBuildRelLookupTables() const override {
654 const TargetMachine &TM = getTLI()->getTargetMachine();
655 // If non-PIC mode, do not generate a relative lookup table.
656 if (!TM.isPositionIndependent())
657 return false;
658
659 /// Relative lookup table entries consist of 32-bit offsets.
660 /// Do not generate relative lookup tables for large code models
661 /// in 64-bit achitectures where 32-bit offsets might not be enough.
662 if (TM.getCodeModel() == CodeModel::Medium ||
664 return false;
665
666 const Triple &TargetTriple = TM.getTargetTriple();
667 if (!TargetTriple.isArch64Bit())
668 return false;
669
670 // Disable relative lookup tables for all AArch64 targets. Even AArch64's
671 // small code model allows a 4GB span of text + data, which might not fit
672 // in the 32-bit offsets relative lookup tables generate.
673 if (TargetTriple.isAArch64())
674 return false;
675
676 return true;
677 }
678
679 bool haveFastSqrt(Type *Ty) const override {
680 const TargetLoweringBase *TLI = getTLI();
681 EVT VT = TLI->getValueType(DL, Ty);
682 return TLI->isTypeLegal(VT) &&
684 }
685
686 bool haveFastClmul(IntegerType *Ty) const override {
687 // FIXME: clmul should really be Promote for any bitwidth under the largest
688 // legal bitwidth for clmul. Using IndexTy instead of Ty is a hack to get
689 // around that shortcoming.
690 const DataLayout &DL = thisT()->DL;
691 IntegerType *IndexTy =
692 DL.getIndexType(Ty->getContext(), DL.getAllocaAddrSpace());
693 if (Ty->getBitWidth() > IndexTy->getBitWidth())
694 return false;
695
696 const TargetLoweringBase *TLI = getTLI();
697 EVT VT = TLI->getValueType(DL, IndexTy);
698 return TLI->isOperationLegalOrCustom(ISD::CLMUL, VT);
699 }
700
701 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
702
703 InstructionCost getFPOpCost(Type *Ty) const override {
704 // Check whether FADD is available, as a proxy for floating-point in
705 // general.
706 const TargetLoweringBase *TLI = getTLI();
707 EVT VT = TLI->getValueType(DL, Ty);
711 }
712
714 const Function &Fn) const override {
715 switch (Inst.getOpcode()) {
716 default:
717 break;
718 case Instruction::SDiv:
719 case Instruction::SRem:
720 case Instruction::UDiv:
721 case Instruction::URem: {
722 if (!isa<ConstantInt>(Inst.getOperand(1)))
723 return false;
724 EVT VT = getTLI()->getValueType(DL, Inst.getType());
725 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
726 }
727 };
728
729 return false;
730 }
731
732 unsigned getInliningThresholdMultiplier() const override { return 1; }
733 unsigned adjustInliningThreshold(const CallBase *CB) const override {
734 return 0;
735 }
736 unsigned getCallerAllocaCost(const CallBase *CB,
737 const AllocaInst *AI) const override {
738 return 0;
739 }
740
741 int getInlinerVectorBonusPercent() const override { return 150; }
742
745 OptimizationRemarkEmitter *ORE) const override {
746 // This unrolling functionality is target independent, but to provide some
747 // motivation for its intended use, for x86:
748
749 // According to the Intel 64 and IA-32 Architectures Optimization Reference
750 // Manual, Intel Core models and later have a loop stream detector (and
751 // associated uop queue) that can benefit from partial unrolling.
752 // The relevant requirements are:
753 // - The loop must have no more than 4 (8 for Nehalem and later) branches
754 // taken, and none of them may be calls.
755 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
756
757 // According to the Software Optimization Guide for AMD Family 15h
758 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
759 // and loop buffer which can benefit from partial unrolling.
760 // The relevant requirements are:
761 // - The loop must have fewer than 16 branches
762 // - The loop must have less than 40 uops in all executed loop branches
763
764 // The number of taken branches in a loop is hard to estimate here, and
765 // benchmarking has revealed that it is better not to be conservative when
766 // estimating the branch count. As a result, we'll ignore the branch limits
767 // until someone finds a case where it matters in practice.
768
769 unsigned MaxOps;
770 const TargetSubtargetInfo *ST = getST();
771 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
773 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
774 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
775 else
776 return;
777
778 // Scan the loop: don't unroll loops with calls.
779 for (BasicBlock *BB : L->blocks()) {
780 for (Instruction &I : *BB) {
781 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
782 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
783 if (!thisT()->isLoweredToCall(F))
784 continue;
785 }
786
787 if (ORE) {
788 ORE->emit([&]() {
789 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
790 L->getHeader())
791 << "advising against unrolling the loop because it "
792 "contains a "
793 << ore::NV("Call", &I);
794 });
795 }
796 return;
797 }
798 }
799 }
800
801 // Enable runtime and partial unrolling up to the specified size.
802 // Enable using trip count upper bound to unroll loops.
803 UP.Partial = UP.Runtime = UP.UpperBound = true;
804 UP.PartialThreshold = MaxOps;
805
806 // Avoid unrolling when optimizing for size.
807 UP.OptSizeThreshold = 0;
809
810 // Set number of instructions optimized when "back edge"
811 // becomes "fall through" to default value of 2.
812 UP.BEInsns = 2;
813 }
814
816 TTI::PeelingPreferences &PP) const override {
817 PP.PeelCount = 0;
818 PP.AllowPeeling = true;
819 PP.AllowLoopNestsPeeling = false;
820 PP.PeelProfiledIterations = true;
821 }
822
825 HardwareLoopInfo &HWLoopInfo) const override {
826 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
827 }
828
829 unsigned getEpilogueVectorizationMinVF() const override {
831 }
832
836
840
841 std::optional<Instruction *>
844 }
845
846 std::optional<Value *>
848 APInt DemandedMask, KnownBits &Known,
849 bool &KnownBitsComputed) const override {
850 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
851 KnownBitsComputed);
852 }
853
855 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
856 APInt &UndefElts2, APInt &UndefElts3,
857 std::function<void(Instruction *, unsigned, APInt, APInt &)>
858 SimplifyAndSetOp) const override {
860 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
861 SimplifyAndSetOp);
862 }
863
865 return getST()->getMispredictionPenalty();
866 }
867
868 std::optional<unsigned>
870 return std::optional<unsigned>(
871 getST()->getCacheSize(static_cast<unsigned>(Level)));
872 }
873
874 std::optional<unsigned>
876 std::optional<unsigned> TargetResult =
877 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
878
879 if (TargetResult)
880 return TargetResult;
881
882 return BaseT::getCacheAssociativity(Level);
883 }
884
885 unsigned getCacheLineSize() const override {
886 return getST()->getCacheLineSize();
887 }
888
889 unsigned getPrefetchDistance() const override {
890 return getST()->getPrefetchDistance();
891 }
892
893 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
894 unsigned NumStridedMemAccesses,
895 unsigned NumPrefetches,
896 bool HasCall) const override {
897 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
898 NumPrefetches, HasCall);
899 }
900
901 unsigned getMaxPrefetchIterationsAhead() const override {
902 return getST()->getMaxPrefetchIterationsAhead();
903 }
904
905 bool enableWritePrefetching() const override {
906 return getST()->enableWritePrefetching();
907 }
908
909 bool shouldPrefetchAddressSpace(unsigned AS) const override {
910 return getST()->shouldPrefetchAddressSpace(AS);
911 }
912
913 /// @}
914
915 /// \name Vector TTI Implementations
916 /// @{
917
922
923 std::optional<unsigned> getMaxVScale() const override { return std::nullopt; }
924 std::optional<unsigned> getVScaleForTuning() const override {
925 return std::nullopt;
926 }
927
928 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
929 /// are set if the demanded result elements need to be inserted and/or
930 /// extracted from vectors.
932 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
933 bool Insert, bool Extract,
935 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
937 TTI::VectorInstrContext::None) const override {
938 /// FIXME: a bitfield is not a reasonable abstraction for talking about
939 /// which elements are needed from a scalable vector
940 if (isa<ScalableVectorType>(InTy))
942 auto *Ty = cast<FixedVectorType>(InTy);
943
944 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
945 (VL.empty() || VL.size() == Ty->getNumElements()) &&
946 "Vector size mismatch");
947
949
950 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
951 if (!DemandedElts[i])
952 continue;
953 if (Insert) {
954 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
955 Cost +=
956 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
957 CostKind, i, nullptr, InsertedVal, VIC);
958 }
959 if (Extract)
960 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
961 CostKind, i, nullptr, nullptr, VIC);
962 }
963
964 return Cost;
965 }
966
967 bool
969 unsigned ScalarOpdIdx) const override {
970 return false;
971 }
972
974 int OpdIdx) const override {
975 return OpdIdx == -1;
976 }
977
978 bool
980 int RetIdx) const override {
981 return RetIdx == 0;
982 }
983
984 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
986 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
987 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
989 if (isa<ScalableVectorType>(InTy))
991 auto *Ty = cast<FixedVectorType>(InTy);
992
993 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
994 // Use CRTP to allow target overrides
995 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
996 CostKind, ForPoisonSrc, VL, VIC);
997 }
998
999 /// Estimate the overhead of scalarizing an instruction's
1000 /// operands. The (potentially vector) types to use for each of
1001 /// argument are passes via Tys.
1005 TTI::VectorInstrContext::None) const override {
1007 for (Type *Ty : Tys) {
1008 // Disregard things like metadata arguments.
1009 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
1010 !Ty->isPtrOrPtrVectorTy())
1011 continue;
1012
1013 if (auto *VecTy = dyn_cast<VectorType>(Ty))
1014 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
1015 /*Extract*/ true, CostKind,
1016 /*ForPoisonSrc=*/true, {}, VIC);
1017 }
1018
1019 return Cost;
1020 }
1021
1022 /// Estimate the overhead of scalarizing the inputs and outputs of an
1023 /// instruction, with return type RetTy and arguments Args of type Tys. If
1024 /// Args are unknown (empty), then the cost associated with one argument is
1025 /// added as a heuristic.
1028 ArrayRef<Type *> Tys,
1031 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
1032 if (!Args.empty())
1034 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1035 else
1036 // When no information on arguments is provided, we add the cost
1037 // associated with one argument as a heuristic.
1038 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1039 /*Extract*/ true, CostKind);
1040
1041 return Cost;
1042 }
1043
1044 /// Estimate the cost of type-legalization and the legalized type.
1045 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1046 LLVMContext &C = Ty->getContext();
1047 EVT MTy = getTLI()->getValueType(DL, Ty);
1048
1050 // We keep legalizing the type until we find a legal kind. We assume that
1051 // the only operation that costs anything is the split. After splitting
1052 // we need to handle two types.
1053 while (true) {
1054 TargetLoweringBase::LegalizeKind LK = getTLI()->getTypeConversion(C, MTy);
1055
1057 // Ensure we return a sensible simple VT here, since many callers of
1058 // this function require it.
1059 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1060 return std::make_pair(InstructionCost::getInvalid(), VT);
1061 }
1062
1063 if (LK.first == TargetLoweringBase::TypeLegal)
1064 return std::make_pair(Cost, MTy.getSimpleVT());
1065
1066 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1068 Cost *= 2;
1069
1070 // Do not loop with f128 type.
1071 if (MTy == LK.second)
1072 return std::make_pair(Cost, MTy.getSimpleVT());
1073
1074 // Keep legalizing the type.
1075 MTy = LK.second;
1076 }
1077 }
1078
1080 bool HasUnorderedReductions) const override {
1081 return 1;
1082 }
1083
1085 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1088 ArrayRef<const Value *> Args = {},
1089 const Instruction *CxtI = nullptr) const override {
1090 // Check if any of the operands are vector operands.
1091 const TargetLoweringBase *TLI = getTLI();
1092 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1093 assert(ISD && "Invalid opcode");
1094
1095 // TODO: Handle more cost kinds.
1097 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1098 Opd1Info, Opd2Info,
1099 Args, CxtI);
1100
1101 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1102
1103 bool IsFloat = Ty->isFPOrFPVectorTy();
1104 // Assume that floating point arithmetic operations cost twice as much as
1105 // integer operations.
1106 InstructionCost OpCost = (IsFloat ? 2 : 1);
1107
1108 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1109 // The operation is legal. Assume it costs 1.
1110 // TODO: Once we have extract/insert subvector cost we need to use them.
1111 return LT.first * OpCost;
1112 }
1113
1114 if (!TLI->isOperationExpand(ISD, LT.second)) {
1115 // If the operation is custom lowered, then assume that the code is twice
1116 // as expensive.
1117 return LT.first * 2 * OpCost;
1118 }
1119
1120 // An 'Expand' of URem and SRem is special because it may default
1121 // to expanding the operation into a sequence of sub-operations
1122 // i.e. X % Y -> X-(X/Y)*Y.
1123 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1124 bool IsSigned = ISD == ISD::SREM;
1125 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1126 LT.second) ||
1127 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1128 LT.second)) {
1129 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1130 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1131 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1132 InstructionCost MulCost =
1133 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1134 InstructionCost SubCost =
1135 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1136 return DivCost + MulCost + SubCost;
1137 }
1138 }
1139
1140 // We cannot scalarize scalable vectors, so return Invalid.
1143
1144 // Else, assume that we need to scalarize this op.
1145 // TODO: If one of the types get legalized by splitting, handle this
1146 // similarly to what getCastInstrCost() does.
1147 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1148 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1149 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1150 Args, CxtI);
1151 // Return the cost of multiple scalar invocation plus the cost of
1152 // inserting and extracting the values.
1153 SmallVector<Type *> Tys(Args.size(), Ty);
1154 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1155 VTy->getNumElements() * Cost;
1156 }
1157
1158 // We don't know anything about this scalar instruction.
1159 return OpCost;
1160 }
1161
1163 ArrayRef<int> Mask,
1164 VectorType *SrcTy, int &Index,
1165 VectorType *&SubTy) const {
1166 if (Mask.empty())
1167 return Kind;
1168 int NumDstElts = Mask.size();
1169 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1170 switch (Kind) {
1172 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1173 return TTI::SK_Reverse;
1174 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1175 return TTI::SK_Broadcast;
1176 if (isSplatMask(Mask, NumSrcElts, Index))
1177 return TTI::SK_Broadcast;
1178 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1179 (Index + NumDstElts) <= NumSrcElts) {
1180 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1182 }
1183 break;
1184 }
1185 case TTI::SK_PermuteTwoSrc: {
1186 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1188 Index, SubTy);
1189 int NumSubElts;
1190 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1191 Mask, NumSrcElts, NumSubElts, Index)) {
1192 if (Index + NumSubElts > NumSrcElts)
1193 return Kind;
1194 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1196 }
1197 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1198 return TTI::SK_Select;
1199 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1200 return TTI::SK_Transpose;
1201 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1202 return TTI::SK_Splice;
1203 break;
1204 }
1205 case TTI::SK_Select:
1206 case TTI::SK_Reverse:
1207 case TTI::SK_Broadcast:
1208 case TTI::SK_Transpose:
1211 case TTI::SK_Splice:
1212 break;
1213 }
1214 return Kind;
1215 }
1216
1220 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1221 const Instruction *CxtI = nullptr) const override {
1222 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1223 case TTI::SK_Broadcast:
1224 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1225 return getBroadcastShuffleOverhead(FVT, CostKind);
1227 case TTI::SK_Select:
1228 case TTI::SK_Splice:
1229 case TTI::SK_Reverse:
1230 case TTI::SK_Transpose:
1233 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1234 return getPermuteShuffleOverhead(FVT, CostKind);
1237 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1238 cast<FixedVectorType>(SubTp));
1240 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1241 cast<FixedVectorType>(SubTp));
1242 }
1243 llvm_unreachable("Unknown TTI::ShuffleKind");
1244 }
1245
1247 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1249 const Instruction *I = nullptr) const override {
1250 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1251 return 0;
1252
1253 const TargetLoweringBase *TLI = getTLI();
1254 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1255 assert(ISD && "Invalid opcode");
1256 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1257 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1258
1259 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1260 TypeSize DstSize = DstLT.second.getSizeInBits();
1261 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1262 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1263
1264 switch (Opcode) {
1265 default:
1266 break;
1267 case Instruction::Trunc:
1268 // Check for NOOP conversions.
1269 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1270 return 0;
1271 [[fallthrough]];
1272 case Instruction::BitCast:
1273 // Bitcast between types that are legalized to the same type are free and
1274 // assume int to/from ptr of the same size is also free.
1275 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1276 SrcSize == DstSize)
1277 return 0;
1278 break;
1279 case Instruction::FPExt:
1280 if (I && getTLI()->isExtFree(I))
1281 return 0;
1282 break;
1283 case Instruction::ZExt:
1284 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1285 return 0;
1286 [[fallthrough]];
1287 case Instruction::SExt:
1288 if (I && getTLI()->isExtFree(I))
1289 return 0;
1290
1291 // If this is a zext/sext of a load, return 0 if the corresponding
1292 // extending load exists on target and the result type is legal.
1293 if (CCH == TTI::CastContextHint::Normal) {
1294 EVT ExtVT = EVT::getEVT(Dst);
1295 EVT LoadVT = EVT::getEVT(Src);
1296 unsigned LType =
1297 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1298 if (I) {
1299 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1300 if (DstLT.first == SrcLT.first &&
1301 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1302 LI->getPointerAddressSpace(), LType, false))
1303 return 0;
1304 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1305 switch (II->getIntrinsicID()) {
1306 case Intrinsic::masked_load: {
1307 Type *PtrType = II->getArgOperand(0)->getType();
1308 assert(PtrType->isPointerTy());
1309
1310 if (DstLT.first == SrcLT.first &&
1311 TLI->isLoadLegal(
1312 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1313 PtrType->getPointerAddressSpace(), LType, false))
1314 return 0;
1315
1316 break;
1317 }
1318 default:
1319 break;
1320 }
1321 }
1322 }
1323 }
1324 break;
1325 case Instruction::AddrSpaceCast:
1326 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1327 Dst->getPointerAddressSpace()))
1328 return 0;
1329 break;
1330 }
1331
1332 auto *SrcVTy = dyn_cast<VectorType>(Src);
1333 auto *DstVTy = dyn_cast<VectorType>(Dst);
1334
1335 // If the cast is marked as legal (or promote) then assume low cost.
1336 if (SrcLT.first == DstLT.first &&
1337 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1338 return SrcLT.first;
1339
1340 // Handle scalar conversions.
1341 if (!SrcVTy && !DstVTy) {
1342 // Just check the op cost. If the operation is legal then assume it costs
1343 // 1.
1344 if (!TLI->isOperationExpand(ISD, DstLT.second))
1345 return 1;
1346
1347 // Assume that illegal scalar instruction are expensive.
1348 return 4;
1349 }
1350
1351 // Check vector-to-vector casts.
1352 if (DstVTy && SrcVTy) {
1353 // If the cast is between same-sized registers, then the check is simple.
1354 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1355
1356 // Assume that Zext is done using AND.
1357 if (Opcode == Instruction::ZExt)
1358 return SrcLT.first;
1359
1360 // Assume that sext is done using SHL and SRA.
1361 if (Opcode == Instruction::SExt)
1362 return SrcLT.first * 2;
1363
1364 // Just check the op cost. If the operation is legal then assume it
1365 // costs
1366 // 1 and multiply by the type-legalization overhead.
1367 if (!TLI->isOperationExpand(ISD, DstLT.second))
1368 return SrcLT.first * 1;
1369 }
1370
1371 // If we are legalizing by splitting, query the concrete TTI for the cost
1372 // of casting the original vector twice. We also need to factor in the
1373 // cost of the split itself. Count that as 1, to be consistent with
1374 // getTypeLegalizationCost().
1375 bool SplitSrc =
1376 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1378 bool SplitDst =
1379 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1381 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1382 DstVTy->getElementCount().isKnownEven()) {
1383 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1384 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1385 const T *TTI = thisT();
1386 // If both types need to be split then the split is free.
1387 InstructionCost SplitCost =
1388 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1389 return SplitCost +
1390 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1391 CostKind, I));
1392 }
1393
1394 // Scalarization cost is Invalid, can't assume any num elements.
1395 if (isa<ScalableVectorType>(DstVTy))
1397
1398 // In other cases where the source or destination are illegal, assume
1399 // the operation will get scalarized.
1400 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1401 InstructionCost Cost = thisT()->getCastInstrCost(
1402 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1403
1404 // Return the cost of multiple scalar invocation plus the cost of
1405 // inserting and extracting the values.
1406 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1407 CostKind) +
1408 Num * Cost;
1409 }
1410
1411 // We already handled vector-to-vector and scalar-to-scalar conversions.
1412 // This
1413 // is where we handle bitcast between vectors and scalars. We need to assume
1414 // that the conversion is scalarized in one way or another.
1415 if (Opcode == Instruction::BitCast) {
1416 // Illegal bitcasts are done by storing and loading from a stack slot.
1417 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1418 /*Extract*/ true, CostKind)
1419 : 0) +
1420 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1421 /*Extract*/ false, CostKind)
1422 : 0);
1423 }
1424
1425 llvm_unreachable("Unhandled cast");
1426 }
1427
1429 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1430 unsigned Index,
1431 TTI::TargetCostKind CostKind) const override {
1432 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1433 CostKind, Index, nullptr, nullptr) +
1434 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1436 }
1437
1440 const Instruction *I = nullptr) const override {
1441 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1442 }
1443
1445 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1449 const Instruction *I = nullptr) const override {
1450 const TargetLoweringBase *TLI = getTLI();
1451 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1452 assert(ISD && "Invalid opcode");
1453
1454 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1455 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1456 Op1Info, Op2Info, I);
1457
1458 // Selects on vectors are actually vector selects.
1459 if (ISD == ISD::SELECT) {
1460 assert(CondTy && "CondTy must exist");
1461 if (CondTy->isVectorTy())
1462 ISD = ISD::VSELECT;
1463 }
1464 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1465
1466 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1467 !TLI->isOperationExpand(ISD, LT.second)) {
1468 // The operation is legal. Assume it costs 1. Multiply
1469 // by the type-legalization overhead.
1470 return LT.first * 1;
1471 }
1472
1473 // Otherwise, assume that the cast is scalarized.
1474 // TODO: If one of the types get legalized by splitting, handle this
1475 // similarly to what getCastInstrCost() does.
1476 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1477 if (isa<ScalableVectorType>(ValTy))
1479
1480 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1481 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1482 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1483 CostKind, Op1Info, Op2Info, I);
1484
1485 // Return the cost of multiple scalar invocation plus the cost of
1486 // inserting and extracting the values.
1487 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1488 /*Extract*/ false, CostKind) +
1489 Num * Cost;
1490 }
1491
1492 // Unknown scalar opcode.
1493 return 1;
1494 }
1495
1498 unsigned Index, const Value *Op0, const Value *Op1,
1500 TTI::VectorInstrContext::None) const override {
1501 return getRegUsageForType(Val->getScalarType());
1502 }
1503
1504 /// \param ScalarUserAndIdx encodes the information about extracts from a
1505 /// vector with 'Scalar' being the value being extracted,'User' being the user
1506 /// of the extract(nullptr if user is not known before vectorization) and
1507 /// 'Idx' being the extract lane.
1509 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1510 Value *Scalar,
1511 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1513 TTI::VectorInstrContext::None) const override {
1514 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1515 VIC);
1516 }
1517
1520 TTI::TargetCostKind CostKind, unsigned Index,
1522 TTI::VectorInstrContext::None) const override {
1523 Value *Op0 = nullptr;
1524 Value *Op1 = nullptr;
1525 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1526 Op0 = IE->getOperand(0);
1527 Op1 = IE->getOperand(1);
1528 }
1529 // If VIC is None, compute it from the instruction
1532 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1533 Op1, VIC);
1534 }
1535
1539 unsigned Index) const override {
1540 unsigned NewIndex = -1;
1541 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1542 assert(Index < FVTy->getNumElements() &&
1543 "Unexpected index from end of vector");
1544 NewIndex = FVTy->getNumElements() - 1 - Index;
1545 }
1546 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1547 nullptr);
1548 }
1549
1551 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1552 const APInt &DemandedDstElts,
1553 TTI::TargetCostKind CostKind) const override {
1554 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1555 "Unexpected size of DemandedDstElts.");
1556
1558
1559 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1560 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1561
1562 // The Mask shuffling cost is extract all the elements of the Mask
1563 // and insert each of them Factor times into the wide vector:
1564 //
1565 // E.g. an interleaved group with factor 3:
1566 // %mask = icmp ult <8 x i32> %vec1, %vec2
1567 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1568 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1569 // The cost is estimated as extract all mask elements from the <8xi1> mask
1570 // vector and insert them factor times into the <24xi1> shuffled mask
1571 // vector.
1572 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1573 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1574 /*Insert*/ false,
1575 /*Extract*/ true, CostKind);
1576 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1577 /*Insert*/ true,
1578 /*Extract*/ false, CostKind);
1579
1580 return Cost;
1581 }
1582
1584 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1587 const Instruction *I = nullptr) const override {
1588 assert(!Src->isVoidTy() && "Invalid type");
1589 // Assume types, such as structs, are expensive.
1590 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1591 return 4;
1592 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1593
1594 // FIXME: Arbitrary cost
1595 if (Opcode == Instruction::Load && CostKind == TTI::TCK_Latency)
1596 return 4;
1597
1598 // Assuming that all loads of legal types cost 1.
1599 InstructionCost Cost = LT.first;
1601 return Cost;
1602
1603 const DataLayout &DL = this->getDataLayout();
1604 if (Src->isVectorTy() &&
1605 // In practice it's not currently possible to have a change in lane
1606 // length for extending loads or truncating stores so both types should
1607 // have the same scalable property.
1608 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1609 LT.second.getSizeInBits())) {
1610 // This is a vector load that legalizes to a larger type than the vector
1611 // itself. Unless the corresponding extending load or truncating store is
1612 // legal, then this will scalarize.
1614 EVT MemVT = getTLI()->getValueType(DL, Src);
1615 if (Opcode == Instruction::Store)
1616 LA = getTLI()->getTruncStoreAction(LT.second, MemVT, Alignment,
1617 AddressSpace);
1618 else
1619 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1620 ISD::EXTLOAD, false);
1621
1622 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1623 // This is a vector load/store for some illegal type that is scalarized.
1624 // We must account for the cost of building or decomposing the vector.
1626 cast<VectorType>(Src), Opcode != Instruction::Store,
1627 Opcode == Instruction::Store, CostKind);
1628 }
1629 }
1630
1631 return Cost;
1632 }
1633
1635 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1636 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1637 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1638
1639 // We cannot scalarize scalable vectors, so return Invalid.
1640 if (isa<ScalableVectorType>(VecTy))
1642
1643 auto *VT = cast<FixedVectorType>(VecTy);
1644
1645 unsigned NumElts = VT->getNumElements();
1646 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1647
1648 unsigned NumSubElts = NumElts / Factor;
1649 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1650
1651 // Firstly, the cost of load/store operation.
1653 if (UseMaskForCond || UseMaskForGaps) {
1654 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1655 : Intrinsic::masked_store;
1656 Cost = thisT()->getMemIntrinsicInstrCost(
1657 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1658 CostKind);
1659 } else
1660 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1661 CostKind);
1662
1663 // Legalize the vector type, and get the legalized and unlegalized type
1664 // sizes.
1665 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1666 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1667 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1668
1669 // Scale the cost of the memory operation by the fraction of legalized
1670 // instructions that will actually be used. We shouldn't account for the
1671 // cost of dead instructions since they will be removed.
1672 //
1673 // E.g., An interleaved load of factor 8:
1674 // %vec = load <16 x i64>, <16 x i64>* %ptr
1675 // %v0 = shufflevector %vec, undef, <0, 8>
1676 //
1677 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1678 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1679 // type). The other loads are unused.
1680 //
1681 // TODO: Note that legalization can turn masked loads/stores into unmasked
1682 // (legalized) loads/stores. This can be reflected in the cost.
1683 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1684 // The number of loads of a legal type it will take to represent a load
1685 // of the unlegalized vector type.
1686 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1687
1688 // The number of elements of the unlegalized type that correspond to a
1689 // single legal instruction.
1690 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1691
1692 // Determine which legal instructions will be used.
1693 BitVector UsedInsts(NumLegalInsts, false);
1694 for (unsigned Index : Indices)
1695 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1696 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1697
1698 // Scale the cost of the load by the fraction of legal instructions that
1699 // will be used.
1700 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1701 }
1702
1703 // Then plus the cost of interleave operation.
1704 assert(Indices.size() <= Factor &&
1705 "Interleaved memory op has too many members");
1706
1707 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1708 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1709
1710 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1711 for (unsigned Index : Indices) {
1712 assert(Index < Factor && "Invalid index for interleaved memory op");
1713 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1714 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1715 }
1716
1717 if (Opcode == Instruction::Load) {
1718 // The interleave cost is similar to extract sub vectors' elements
1719 // from the wide vector, and insert them into sub vectors.
1720 //
1721 // E.g. An interleaved load of factor 2 (with one member of index 0):
1722 // %vec = load <8 x i32>, <8 x i32>* %ptr
1723 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1724 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1725 // <8 x i32> vector and insert them into a <4 x i32> vector.
1726 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1727 SubVT, DemandedAllSubElts,
1728 /*Insert*/ true, /*Extract*/ false, CostKind);
1729 Cost += Indices.size() * InsSubCost;
1730 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1731 /*Insert*/ false,
1732 /*Extract*/ true, CostKind);
1733 } else {
1734 // The interleave cost is extract elements from sub vectors, and
1735 // insert them into the wide vector.
1736 //
1737 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1738 // (using VF=4):
1739 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1740 // %gaps.mask = <true, true, false, true, true, false,
1741 // true, true, false, true, true, false>
1742 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1743 // i32 Align, <12 x i1> %gaps.mask
1744 // The cost is estimated as extract all elements (of actual members,
1745 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1746 // i32> vector.
1747 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1748 SubVT, DemandedAllSubElts,
1749 /*Insert*/ false, /*Extract*/ true, CostKind);
1750 Cost += ExtSubCost * Indices.size();
1751 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1752 /*Insert*/ true,
1753 /*Extract*/ false, CostKind);
1754 }
1755
1756 if (!UseMaskForCond)
1757 return Cost;
1758
1759 Type *I8Type = Type::getInt8Ty(VT->getContext());
1760
1761 Cost += thisT()->getReplicationShuffleCost(
1762 I8Type, Factor, NumSubElts,
1763 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1764 CostKind);
1765
1766 // The Gaps mask is invariant and created outside the loop, therefore the
1767 // cost of creating it is not accounted for here. However if we have both
1768 // a MaskForGaps and some other mask that guards the execution of the
1769 // memory access, we need to account for the cost of And-ing the two masks
1770 // inside the loop.
1771 if (UseMaskForGaps) {
1772 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1773 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1774 CostKind);
1775 }
1776
1777 return Cost;
1778 }
1779
1780 /// Get intrinsic cost based on arguments.
1783 TTI::TargetCostKind CostKind) const override {
1784 // Check for generically free intrinsics.
1786 return 0;
1787
1788 // Assume that target intrinsics are cheap.
1789 Intrinsic::ID IID = ICA.getID();
1792
1793 // VP Intrinsics should have the same cost as their non-vp counterpart.
1794 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1795 // counterpart when the vector length argument is smaller than the maximum
1796 // vector length.
1797 // TODO: Support other kinds of VPIntrinsics
1798 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1799 std::optional<unsigned> FOp =
1801 if (FOp) {
1802 if (ICA.getID() == Intrinsic::vp_load) {
1803 Align Alignment;
1804 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1805 Alignment = VPI->getPointerAlignment().valueOrOne();
1806 unsigned AS = 0;
1807 if (ICA.getArgTypes().size() > 1)
1808 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1809 AS = PtrTy->getAddressSpace();
1810 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1811 AS, CostKind);
1812 }
1813 if (ICA.getID() == Intrinsic::vp_store) {
1814 Align Alignment;
1815 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1816 Alignment = VPI->getPointerAlignment().valueOrOne();
1817 unsigned AS = 0;
1818 if (ICA.getArgTypes().size() >= 2)
1819 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1820 AS = PtrTy->getAddressSpace();
1821 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1822 AS, CostKind);
1823 }
1824 if (ICA.getID() == Intrinsic::vp_udiv ||
1825 ICA.getID() == Intrinsic::vp_sdiv ||
1826 ICA.getID() == Intrinsic::vp_urem ||
1827 ICA.getID() == Intrinsic::vp_srem) {
1828 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1829 CostKind);
1830 }
1831 }
1832 if (ICA.getID() == Intrinsic::vp_load_ff) {
1833 Type *RetTy = ICA.getReturnType();
1834 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1835 Align Alignment;
1836 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1837 Alignment = VPI->getPointerAlignment().valueOrOne();
1838 return thisT()->getMemIntrinsicInstrCost(
1839 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1840 CostKind);
1841 }
1842 if (ICA.getID() == Intrinsic::vp_scatter) {
1843 if (ICA.isTypeBasedOnly()) {
1844 IntrinsicCostAttributes MaskedScatter(
1847 ICA.getFlags());
1848 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1849 }
1850 Align Alignment;
1851 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1852 Alignment = VPI->getPointerAlignment().valueOrOne();
1853 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1854 return thisT()->getMemIntrinsicInstrCost(
1855 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1856 ICA.getArgTypes()[0], ICA.getArgs()[1],
1857 VarMask, Alignment, nullptr),
1858 CostKind);
1859 }
1860 if (ICA.getID() == Intrinsic::vp_gather) {
1861 if (ICA.isTypeBasedOnly()) {
1862 IntrinsicCostAttributes MaskedGather(
1865 ICA.getFlags());
1866 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1867 }
1868 Align Alignment;
1869 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1870 Alignment = VPI->getPointerAlignment().valueOrOne();
1871 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1872 return thisT()->getMemIntrinsicInstrCost(
1873 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1874 ICA.getReturnType(), ICA.getArgs()[0],
1875 VarMask, Alignment, nullptr),
1876 CostKind);
1877 }
1878
1879 if (ICA.getID() == Intrinsic::vp_merge) {
1880 TTI::OperandValueInfo OpInfoX, OpInfoY;
1881 if (!ICA.isTypeBasedOnly()) {
1882 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1883 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1884 }
1885 return getCmpSelInstrCost(
1886 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1887 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1888 }
1889
1890 std::optional<Intrinsic::ID> FID =
1892
1893 // Not functionally equivalent but close enough for cost modelling.
1894 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1895 FID = Intrinsic::vector_reverse;
1896
1897 if (FID) {
1898 // Non-vp version will have same arg types except mask and vector
1899 // length.
1900 assert(ICA.getArgTypes().size() >= 2 &&
1901 "Expected VPIntrinsic to have Mask and Vector Length args and "
1902 "types");
1903
1904 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1905 if (!ICA.isTypeBasedOnly())
1906 NewArgs = NewArgs.drop_back(2);
1908
1909 // VPReduction intrinsics have a start value argument that their non-vp
1910 // counterparts do not have, except for the fadd and fmul non-vp
1911 // counterpart.
1913 *FID != Intrinsic::vector_reduce_fadd &&
1914 *FID != Intrinsic::vector_reduce_fmul) {
1915 if (!ICA.isTypeBasedOnly())
1916 NewArgs = NewArgs.drop_front();
1917 NewTys = NewTys.drop_front();
1918 }
1919
1920 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1921 NewTys, ICA.getFlags());
1922 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1923 }
1924 }
1925
1926 if (ICA.isTypeBasedOnly())
1928
1929 Type *RetTy = ICA.getReturnType();
1930
1931 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1933
1934 const IntrinsicInst *I = ICA.getInst();
1935 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1936 FastMathFlags FMF = ICA.getFlags();
1937 switch (IID) {
1938 default:
1939 break;
1940
1941 case Intrinsic::powi:
1942 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1943 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1944 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1945 ShouldOptForSize)) {
1946 // The cost is modeled on the expansion performed by ExpandPowI in
1947 // SelectionDAGBuilder.
1948 APInt Exponent = RHSC->getValue().abs();
1949 unsigned ActiveBits = Exponent.getActiveBits();
1950 unsigned PopCount = Exponent.popcount();
1951 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1952 thisT()->getArithmeticInstrCost(
1953 Instruction::FMul, RetTy, CostKind);
1954 if (RHSC->isNegative())
1955 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1956 CostKind);
1957 return Cost;
1958 }
1959 }
1960 break;
1961 case Intrinsic::cttz:
1962 // FIXME: If necessary, this should go in target-specific overrides.
1963 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1965 break;
1966
1967 case Intrinsic::ctlz:
1968 // FIXME: If necessary, this should go in target-specific overrides.
1969 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1971 break;
1972
1973 case Intrinsic::memcpy:
1974 return thisT()->getMemcpyCost(ICA.getInst());
1975
1976 case Intrinsic::masked_scatter: {
1977 const Value *Mask = Args[2];
1978 bool VarMask = !isa<Constant>(Mask);
1979 Align Alignment = I->getParamAlign(1).valueOrOne();
1980 return thisT()->getMemIntrinsicInstrCost(
1981 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1982 ICA.getArgTypes()[0], Args[1], VarMask,
1983 Alignment, I),
1984 CostKind);
1985 }
1986 case Intrinsic::masked_gather: {
1987 const Value *Mask = Args[1];
1988 bool VarMask = !isa<Constant>(Mask);
1989 Align Alignment = I->getParamAlign(0).valueOrOne();
1990 return thisT()->getMemIntrinsicInstrCost(
1991 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
1992 VarMask, Alignment, I),
1993 CostKind);
1994 }
1995 case Intrinsic::masked_compressstore: {
1996 const Value *Data = Args[0];
1997 const Value *Mask = Args[2];
1998 Align Alignment = I->getParamAlign(1).valueOrOne();
1999 return thisT()->getMemIntrinsicInstrCost(
2000 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
2001 Alignment, I),
2002 CostKind);
2003 }
2004 case Intrinsic::masked_expandload: {
2005 const Value *Mask = Args[1];
2006 Align Alignment = I->getParamAlign(0).valueOrOne();
2007 return thisT()->getMemIntrinsicInstrCost(
2008 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
2009 Alignment, I),
2010 CostKind);
2011 }
2012 case Intrinsic::experimental_vp_strided_store: {
2013 const Value *Data = Args[0];
2014 const Value *Ptr = Args[1];
2015 const Value *Mask = Args[3];
2016 const Value *EVL = Args[4];
2017 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2018 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
2019 Align Alignment =
2020 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
2021 return thisT()->getMemIntrinsicInstrCost(
2022 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
2023 Alignment, I),
2024 CostKind);
2025 }
2026 case Intrinsic::experimental_vp_strided_load: {
2027 const Value *Ptr = Args[0];
2028 const Value *Mask = Args[2];
2029 const Value *EVL = Args[3];
2030 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2031 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2032 Align Alignment =
2033 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2034 return thisT()->getMemIntrinsicInstrCost(
2035 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2036 CostKind);
2037 }
2038 case Intrinsic::stepvector: {
2039 if (isa<ScalableVectorType>(RetTy))
2041 // The cost of materialising a constant integer vector.
2043 }
2044 case Intrinsic::vector_extract: {
2045 // FIXME: Handle case where a scalable vector is extracted from a scalable
2046 // vector
2047 if (isa<ScalableVectorType>(RetTy))
2049 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2050 return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
2051 cast<VectorType>(RetTy),
2052 cast<VectorType>(Args[0]->getType()), {},
2053 CostKind, Index, cast<VectorType>(RetTy));
2054 }
2055 case Intrinsic::vector_insert: {
2056 // FIXME: Handle case where a scalable vector is inserted into a scalable
2057 // vector
2058 if (isa<ScalableVectorType>(Args[1]->getType()))
2060 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2061 return thisT()->getShuffleCost(
2063 cast<VectorType>(Args[0]->getType()), {}, CostKind, Index,
2064 cast<VectorType>(Args[1]->getType()));
2065 }
2066 case Intrinsic::vector_splice_left:
2067 case Intrinsic::vector_splice_right: {
2068 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2069 if (!COffset)
2070 break;
2071 unsigned Index = COffset->getZExtValue();
2072 return thisT()->getShuffleCost(
2074 cast<VectorType>(Args[0]->getType()), {}, CostKind,
2075 IID == Intrinsic::vector_splice_left ? Index : -Index,
2076 cast<VectorType>(RetTy));
2077 }
2078 case Intrinsic::vector_reduce_add:
2079 case Intrinsic::vector_reduce_mul:
2080 case Intrinsic::vector_reduce_and:
2081 case Intrinsic::vector_reduce_or:
2082 case Intrinsic::vector_reduce_xor:
2083 case Intrinsic::vector_reduce_smax:
2084 case Intrinsic::vector_reduce_smin:
2085 case Intrinsic::vector_reduce_fmax:
2086 case Intrinsic::vector_reduce_fmin:
2087 case Intrinsic::vector_reduce_fmaximum:
2088 case Intrinsic::vector_reduce_fminimum:
2089 case Intrinsic::vector_reduce_umax:
2090 case Intrinsic::vector_reduce_umin: {
2091 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2093 }
2094 case Intrinsic::vector_reduce_fadd:
2095 case Intrinsic::vector_reduce_fmul: {
2097 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2099 }
2100 case Intrinsic::fshl:
2101 case Intrinsic::fshr: {
2102 const Value *X = Args[0];
2103 const Value *Y = Args[1];
2104 const Value *Z = Args[2];
2107 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2108
2109 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2110 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2112 Cost +=
2113 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2114 Cost += thisT()->getArithmeticInstrCost(
2115 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2116 {OpInfoZ.Kind, TTI::OP_None});
2117 Cost += thisT()->getArithmeticInstrCost(
2118 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2119 {OpInfoZ.Kind, TTI::OP_None});
2120
2121 if (!OpInfoZ.isConstant()) {
2122 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2123 CostKind);
2124 // Non-constant shift amounts requires a modulo. If the typesize is a
2125 // power-2 then this will be converted to an and, otherwise it will use
2126 // a urem.
2127 Cost += thisT()->getArithmeticInstrCost(
2128 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2129 : BinaryOperator::URem,
2130 RetTy, CostKind, OpInfoZ,
2131 {TTI::OK_UniformConstantValue, TTI::OP_None});
2132 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2133 if (X != Y) {
2134 Type *CondTy = RetTy->getWithNewBitWidth(1);
2135 Cost += thisT()->getCmpSelInstrCost(
2136 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2137 Cost +=
2138 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2140 }
2141 }
2142 return Cost;
2143 }
2144 case Intrinsic::experimental_cttz_elts: {
2145 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2146
2147 // TODO: The costs below reflect the expansion code in
2148 // TargetLowering::expandCttzElts, but we may want to sacrifice some
2149 // accuracy in favour of compile time.
2150
2151 // Find the smallest "sensible" element type to use for the expansion.
2152 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2153 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2154 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2155 VScaleRange = getVScaleRange(I->getCaller(), 64);
2156
2157 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2158 getTLI()->getValueType(DL, RetTy), ArgType.getVectorElementCount(),
2159 ZeroIsPoison, &VScaleRange);
2160 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2161
2162 // Create the new vector type & get the vector length
2163 Type *NewVecTy = VectorType::get(
2164 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2165
2166 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2167 FMF);
2169 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2170
2171 Cost +=
2172 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2173 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2174 Args[0]->getType(),
2176 Cost +=
2177 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2178
2179 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2180 NewEltTy, NewVecTy, FMF, I, 1);
2181 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2182 Cost +=
2183 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2184
2185 return Cost;
2186 }
2187 case Intrinsic::get_active_lane_mask:
2188 case Intrinsic::experimental_vector_match:
2189 case Intrinsic::experimental_vector_histogram_add:
2190 case Intrinsic::experimental_vector_histogram_uadd_sat:
2191 case Intrinsic::experimental_vector_histogram_umax:
2192 case Intrinsic::experimental_vector_histogram_umin:
2193 case Intrinsic::masked_udiv:
2194 case Intrinsic::masked_sdiv:
2195 case Intrinsic::masked_urem:
2196 case Intrinsic::masked_srem:
2197 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2198 case Intrinsic::modf:
2199 case Intrinsic::sincos:
2200 case Intrinsic::sincospi: {
2201 std::optional<unsigned> CallRetElementIndex;
2202 // The first element of the modf result is returned by value in the
2203 // libcall.
2204 if (ICA.getID() == Intrinsic::modf)
2205 CallRetElementIndex = 0;
2206
2207 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2208 ICA, CostKind, CallRetElementIndex))
2209 return *Cost;
2210 // Otherwise, fallback to default scalarization cost.
2211 break;
2212 }
2213 case Intrinsic::loop_dependence_war_mask:
2214 case Intrinsic::loop_dependence_raw_mask: {
2215 // Compute the cost of the expanded version of these intrinsics:
2216 //
2217 // The possible expansions are...
2218 //
2219 // loop_dependence_war_mask:
2220 // diff = (addrB - addrA) / eltSize
2221 // cmp = icmp sle diff, 0
2222 // upper_bound = select cmp, -1, diff
2223 // mask = get_active_lane_mask 0, upper_bound
2224 //
2225 // loop_dependence_raw_mask:
2226 // diff = (abs(addrB - addrA)) / eltSize
2227 // cmp = icmp eq diff, 0
2228 // upper_bound = select cmp, -1, diff
2229 // mask = get_active_lane_mask 0, upper_bound
2230 //
2231 Type *AddrTy = ICA.getArgTypes()[0];
2232 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2233
2235 thisT()->getArithmeticInstrCost(Instruction::Sub, AddrTy, CostKind);
2236 if (IsReadAfterWrite) {
2237 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, AddrTy, {AddrTy}, {});
2238 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2239 }
2240
2241 TTI::OperandValueInfo EltSizeOpInfo =
2242 TTI::getOperandInfo(ICA.getArgs()[2]);
2243 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, AddrTy,
2244 CostKind, {}, EltSizeOpInfo);
2245
2246 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2247 CmpInst::Predicate Pred =
2248 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2249 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy, AddrTy,
2250 Pred, CostKind);
2251 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, AddrTy,
2252 CondTy, Pred, CostKind);
2253
2254 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2255 {AddrTy, AddrTy}, FMF);
2256 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2257 return Cost;
2258 }
2259 }
2260
2261 // Assume that we need to scalarize this intrinsic.)
2262 // Compute the scalarization overhead based on Args for a vector
2263 // intrinsic.
2264 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2265 if (RetVF.isVector() && !RetVF.isScalable()) {
2266 ScalarizationCost = 0;
2267 if (!RetTy->isVoidTy()) {
2268 for (Type *VectorTy : getContainedTypes(RetTy)) {
2269 ScalarizationCost += getScalarizationOverhead(
2270 cast<VectorType>(VectorTy),
2271 /*Insert=*/true, /*Extract=*/false, CostKind);
2272 }
2273 }
2274 ScalarizationCost += getOperandsScalarizationOverhead(
2275 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2276 CostKind);
2277 }
2278
2279 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2280 ScalarizationCost);
2281 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2282 }
2283
2284 /// Get intrinsic cost based on argument types.
2285 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2286 /// cost of scalarizing the arguments and the return value will be computed
2287 /// based on types.
2291 Intrinsic::ID IID = ICA.getID();
2292 Type *RetTy = ICA.getReturnType();
2293 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2294 FastMathFlags FMF = ICA.getFlags();
2295 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2296 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2297
2298 VectorType *VecOpTy = nullptr;
2299 if (!Tys.empty()) {
2300 // The vector reduction operand is operand 0 except for fadd/fmul.
2301 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2302 unsigned VecTyIndex = 0;
2303 if (IID == Intrinsic::vector_reduce_fadd ||
2304 IID == Intrinsic::vector_reduce_fmul)
2305 VecTyIndex = 1;
2306 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2307 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2308 }
2309
2310 // Library call cost - other than size, make it expensive.
2311 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2312 unsigned ISD = 0;
2313 switch (IID) {
2314 default: {
2315 // Scalable vectors cannot be scalarized, so return Invalid.
2316 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2317 return isa<ScalableVectorType>(Ty);
2318 }))
2320
2321 // Assume that we need to scalarize this intrinsic.
2322 InstructionCost ScalarizationCost =
2323 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2324 unsigned ScalarCalls = 1;
2325 Type *ScalarRetTy = RetTy;
2326 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2327 if (!SkipScalarizationCost)
2328 ScalarizationCost = getScalarizationOverhead(
2329 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2330 ScalarCalls = std::max(ScalarCalls,
2331 cast<FixedVectorType>(RetVTy)->getNumElements());
2332 ScalarRetTy = RetTy->getScalarType();
2333 }
2334 SmallVector<Type *, 4> ScalarTys;
2335 for (Type *Ty : Tys) {
2336 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2337 if (!SkipScalarizationCost)
2338 ScalarizationCost += getScalarizationOverhead(
2339 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2340 ScalarCalls = std::max(ScalarCalls,
2341 cast<FixedVectorType>(VTy)->getNumElements());
2342 Ty = Ty->getScalarType();
2343 }
2344 ScalarTys.push_back(Ty);
2345 }
2346 if (ScalarCalls == 1)
2347 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2348
2349 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2350 InstructionCost ScalarCost =
2351 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2352
2353 return ScalarCalls * ScalarCost + ScalarizationCost;
2354 }
2355 // Look for intrinsics that can be lowered directly or turned into a scalar
2356 // intrinsic call.
2357 case Intrinsic::sqrt:
2358 ISD = ISD::FSQRT;
2359 break;
2360 case Intrinsic::sin:
2361 ISD = ISD::FSIN;
2362 break;
2363 case Intrinsic::cos:
2364 ISD = ISD::FCOS;
2365 break;
2366 case Intrinsic::sincos:
2367 ISD = ISD::FSINCOS;
2368 break;
2369 case Intrinsic::sincospi:
2371 break;
2372 case Intrinsic::modf:
2373 ISD = ISD::FMODF;
2374 break;
2375 case Intrinsic::tan:
2376 ISD = ISD::FTAN;
2377 break;
2378 case Intrinsic::asin:
2379 ISD = ISD::FASIN;
2380 break;
2381 case Intrinsic::acos:
2382 ISD = ISD::FACOS;
2383 break;
2384 case Intrinsic::atan:
2385 ISD = ISD::FATAN;
2386 break;
2387 case Intrinsic::atan2:
2388 ISD = ISD::FATAN2;
2389 break;
2390 case Intrinsic::sinh:
2391 ISD = ISD::FSINH;
2392 break;
2393 case Intrinsic::cosh:
2394 ISD = ISD::FCOSH;
2395 break;
2396 case Intrinsic::tanh:
2397 ISD = ISD::FTANH;
2398 break;
2399 case Intrinsic::exp:
2400 ISD = ISD::FEXP;
2401 break;
2402 case Intrinsic::exp2:
2403 ISD = ISD::FEXP2;
2404 break;
2405 case Intrinsic::exp10:
2406 ISD = ISD::FEXP10;
2407 break;
2408 case Intrinsic::log:
2409 ISD = ISD::FLOG;
2410 break;
2411 case Intrinsic::log10:
2412 ISD = ISD::FLOG10;
2413 break;
2414 case Intrinsic::log2:
2415 ISD = ISD::FLOG2;
2416 break;
2417 case Intrinsic::ldexp:
2418 ISD = ISD::FLDEXP;
2419 break;
2420 case Intrinsic::fabs:
2421 ISD = ISD::FABS;
2422 break;
2423 case Intrinsic::canonicalize:
2425 break;
2426 case Intrinsic::minnum:
2427 ISD = ISD::FMINNUM;
2428 break;
2429 case Intrinsic::maxnum:
2430 ISD = ISD::FMAXNUM;
2431 break;
2432 case Intrinsic::minimum:
2434 break;
2435 case Intrinsic::maximum:
2437 break;
2438 case Intrinsic::minimumnum:
2440 break;
2441 case Intrinsic::maximumnum:
2443 break;
2444 case Intrinsic::copysign:
2446 break;
2447 case Intrinsic::floor:
2448 ISD = ISD::FFLOOR;
2449 break;
2450 case Intrinsic::ceil:
2451 ISD = ISD::FCEIL;
2452 break;
2453 case Intrinsic::trunc:
2454 ISD = ISD::FTRUNC;
2455 break;
2456 case Intrinsic::nearbyint:
2458 break;
2459 case Intrinsic::rint:
2460 ISD = ISD::FRINT;
2461 break;
2462 case Intrinsic::lrint:
2463 ISD = ISD::LRINT;
2464 break;
2465 case Intrinsic::llrint:
2466 ISD = ISD::LLRINT;
2467 break;
2468 case Intrinsic::round:
2469 ISD = ISD::FROUND;
2470 break;
2471 case Intrinsic::roundeven:
2473 break;
2474 case Intrinsic::lround:
2475 ISD = ISD::LROUND;
2476 break;
2477 case Intrinsic::llround:
2478 ISD = ISD::LLROUND;
2479 break;
2480 case Intrinsic::pow:
2481 ISD = ISD::FPOW;
2482 break;
2483 case Intrinsic::fma:
2484 ISD = ISD::FMA;
2485 break;
2486 case Intrinsic::fmuladd:
2487 ISD = ISD::FMA;
2488 break;
2489 case Intrinsic::experimental_constrained_fmuladd:
2491 break;
2492 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2493 case Intrinsic::lifetime_start:
2494 case Intrinsic::lifetime_end:
2495 case Intrinsic::sideeffect:
2496 case Intrinsic::pseudoprobe:
2497 case Intrinsic::arithmetic_fence:
2498 return 0;
2499 case Intrinsic::masked_store: {
2500 Type *Ty = Tys[0];
2501 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2502 return thisT()->getMemIntrinsicInstrCost(
2503 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2504 }
2505 case Intrinsic::masked_load: {
2506 Type *Ty = RetTy;
2507 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2508 return thisT()->getMemIntrinsicInstrCost(
2509 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2510 }
2511 case Intrinsic::experimental_vp_strided_store: {
2512 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2513 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2514 return thisT()->getMemIntrinsicInstrCost(
2515 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2516 /*VariableMask=*/true, Alignment,
2517 ICA.getInst()),
2518 CostKind);
2519 }
2520 case Intrinsic::experimental_vp_strided_load: {
2521 auto *Ty = cast<VectorType>(ICA.getReturnType());
2522 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2523 return thisT()->getMemIntrinsicInstrCost(
2524 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2525 /*VariableMask=*/true, Alignment,
2526 ICA.getInst()),
2527 CostKind);
2528 }
2529 case Intrinsic::vector_reduce_add:
2530 case Intrinsic::vector_reduce_mul:
2531 case Intrinsic::vector_reduce_and:
2532 case Intrinsic::vector_reduce_or:
2533 case Intrinsic::vector_reduce_xor:
2534 return thisT()->getArithmeticReductionCost(
2535 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2536 CostKind);
2537 case Intrinsic::vector_reduce_fadd:
2538 case Intrinsic::vector_reduce_fmul:
2539 return thisT()->getArithmeticReductionCost(
2540 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2541 case Intrinsic::vector_reduce_smax:
2542 case Intrinsic::vector_reduce_smin:
2543 case Intrinsic::vector_reduce_umax:
2544 case Intrinsic::vector_reduce_umin:
2545 case Intrinsic::vector_reduce_fmax:
2546 case Intrinsic::vector_reduce_fmin:
2547 case Intrinsic::vector_reduce_fmaximum:
2548 case Intrinsic::vector_reduce_fminimum:
2549 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2550 VecOpTy, ICA.getFlags(), CostKind);
2551 case Intrinsic::experimental_vector_match: {
2552 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2553 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2554 unsigned SearchSize = NeedleTy->getNumElements();
2555
2556 // Approximate the cost based on the expansion code in
2557 // TargetLowering::expandVectorMatch.
2559 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2560 CostKind, 1, nullptr, nullptr);
2561 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2562 CostKind, 0, nullptr, nullptr);
2563 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy, {},
2564 CostKind, 0, nullptr);
2565 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2567 Cost +=
2568 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2569 Cost *= SearchSize;
2570 Cost +=
2571 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2572 return Cost;
2573 }
2574 case Intrinsic::vector_reverse:
2575 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2576 cast<VectorType>(ICA.getArgTypes()[0]), {},
2577 CostKind, 0, cast<VectorType>(RetTy));
2578 case Intrinsic::experimental_vector_histogram_add:
2579 case Intrinsic::experimental_vector_histogram_uadd_sat:
2580 case Intrinsic::experimental_vector_histogram_umax:
2581 case Intrinsic::experimental_vector_histogram_umin: {
2583 Type *EltTy = ICA.getArgTypes()[1];
2584
2585 // Targets with scalable vectors must handle this on their own.
2586 if (!PtrsTy)
2588
2589 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2591 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2592 CostKind, 1, nullptr, nullptr);
2593 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2594 CostKind);
2595 switch (IID) {
2596 default:
2597 llvm_unreachable("Unhandled histogram update operation.");
2598 case Intrinsic::experimental_vector_histogram_add:
2599 Cost +=
2600 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2601 break;
2602 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2603 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2604 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2605 break;
2606 }
2607 case Intrinsic::experimental_vector_histogram_umax: {
2608 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2609 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2610 break;
2611 }
2612 case Intrinsic::experimental_vector_histogram_umin: {
2613 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2614 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2615 break;
2616 }
2617 }
2618 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2619 CostKind);
2620 Cost *= PtrsTy->getNumElements();
2621 return Cost;
2622 }
2623 case Intrinsic::get_active_lane_mask: {
2624 Type *ArgTy = ICA.getArgTypes()[0];
2625 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2626 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2627
2628 // If we're not expanding the intrinsic then we assume this is cheap
2629 // to implement.
2630 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2631 return getTypeLegalizationCost(RetTy).first;
2632
2633 // Create the expanded types that will be used to calculate the uadd_sat
2634 // operation.
2635 Type *ExpRetTy =
2636 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2637 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2639 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2640 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2642 return Cost;
2643 }
2644 case Intrinsic::experimental_memset_pattern:
2645 // This cost is set to match the cost of the memset_pattern16 libcall.
2646 // It should likely be re-evaluated after migration to this intrinsic
2647 // is complete.
2648 return TTI::TCC_Basic * 4;
2649 case Intrinsic::abs:
2650 ISD = ISD::ABS;
2651 break;
2652 case Intrinsic::fshl:
2653 ISD = ISD::FSHL;
2654 break;
2655 case Intrinsic::fshr:
2656 ISD = ISD::FSHR;
2657 break;
2658 case Intrinsic::smax:
2659 ISD = ISD::SMAX;
2660 break;
2661 case Intrinsic::smin:
2662 ISD = ISD::SMIN;
2663 break;
2664 case Intrinsic::umax:
2665 ISD = ISD::UMAX;
2666 break;
2667 case Intrinsic::umin:
2668 ISD = ISD::UMIN;
2669 break;
2670 case Intrinsic::sadd_sat:
2671 ISD = ISD::SADDSAT;
2672 break;
2673 case Intrinsic::ssub_sat:
2674 ISD = ISD::SSUBSAT;
2675 break;
2676 case Intrinsic::uadd_sat:
2677 ISD = ISD::UADDSAT;
2678 break;
2679 case Intrinsic::usub_sat:
2680 ISD = ISD::USUBSAT;
2681 break;
2682 case Intrinsic::smul_fix:
2683 ISD = ISD::SMULFIX;
2684 break;
2685 case Intrinsic::umul_fix:
2686 ISD = ISD::UMULFIX;
2687 break;
2688 case Intrinsic::sadd_with_overflow:
2689 ISD = ISD::SADDO;
2690 break;
2691 case Intrinsic::ssub_with_overflow:
2692 ISD = ISD::SSUBO;
2693 break;
2694 case Intrinsic::uadd_with_overflow:
2695 ISD = ISD::UADDO;
2696 break;
2697 case Intrinsic::usub_with_overflow:
2698 ISD = ISD::USUBO;
2699 break;
2700 case Intrinsic::smul_with_overflow:
2701 ISD = ISD::SMULO;
2702 break;
2703 case Intrinsic::umul_with_overflow:
2704 ISD = ISD::UMULO;
2705 break;
2706 case Intrinsic::fptosi_sat:
2707 case Intrinsic::fptoui_sat: {
2708 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2709 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2710
2711 // For cast instructions, types are different between source and
2712 // destination. Also need to check if the source type can be legalize.
2713 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2715 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2717 break;
2718 }
2719 case Intrinsic::ctpop:
2720 ISD = ISD::CTPOP;
2721 // In case of legalization use TCC_Expensive. This is cheaper than a
2722 // library call but still not a cheap instruction.
2723 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2724 break;
2725 case Intrinsic::ctlz:
2726 ISD = ISD::CTLZ;
2727 break;
2728 case Intrinsic::cttz:
2729 ISD = ISD::CTTZ;
2730 break;
2731 case Intrinsic::bswap:
2732 ISD = ISD::BSWAP;
2733 break;
2734 case Intrinsic::bitreverse:
2736 break;
2737 case Intrinsic::ucmp:
2738 ISD = ISD::UCMP;
2739 break;
2740 case Intrinsic::scmp:
2741 ISD = ISD::SCMP;
2742 break;
2743 case Intrinsic::clmul:
2744 ISD = ISD::CLMUL;
2745 break;
2746 case Intrinsic::masked_udiv:
2747 case Intrinsic::masked_sdiv:
2748 case Intrinsic::masked_urem:
2749 case Intrinsic::masked_srem: {
2750 unsigned UnmaskedOpc;
2751 switch (IID) {
2752 case Intrinsic::masked_udiv:
2754 UnmaskedOpc = Instruction::UDiv;
2755 break;
2756 case Intrinsic::masked_sdiv:
2758 UnmaskedOpc = Instruction::SDiv;
2759 break;
2760 case Intrinsic::masked_urem:
2762 UnmaskedOpc = Instruction::URem;
2763 break;
2764 case Intrinsic::masked_srem:
2766 UnmaskedOpc = Instruction::SRem;
2767 break;
2768 default:
2769 llvm_unreachable("Unexpected intrinsic ID");
2770 }
2772 thisT()->getArithmeticInstrCost(UnmaskedOpc, RetTy, CostKind);
2773
2774 // Expansion generates a (select %mask, %rhs, 1) for the divisor.
2775 MVT LT = getTypeLegalizationCost(RetTy).second;
2776 if (!getTLI()->isOperationLegalOrCustom(ISD, LT)) {
2777 Type *CondTy = cast<VectorType>(RetTy)->getWithNewType(
2779 Cost += thisT()->getCmpSelInstrCost(
2780 BinaryOperator::Select, RetTy, CondTy, CmpInst::BAD_ICMP_PREDICATE,
2782 }
2783
2784 return Cost;
2785 }
2786 }
2787
2788 auto *ST = dyn_cast<StructType>(RetTy);
2789 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2790 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2791
2792 const TargetLoweringBase *TLI = getTLI();
2793
2794 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2795 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2796 TLI->isFAbsFree(LT.second)) {
2797 return 0;
2798 }
2799
2800 // The operation is legal. Assume it costs 1.
2801 // If the type is split to multiple registers, assume that there is some
2802 // overhead to this.
2803 // TODO: Once we have extract/insert subvector cost we need to use them.
2804 if (LT.first > 1)
2805 return (LT.first * 2);
2806 else
2807 return (LT.first * 1);
2808 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2809 // If the operation is custom lowered then assume
2810 // that the code is twice as expensive.
2811 return (LT.first * 2);
2812 }
2813
2814 switch (IID) {
2815 case Intrinsic::fmuladd: {
2816 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2817 // point mul followed by an add.
2818
2819 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2820 CostKind) +
2821 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2822 CostKind);
2823 }
2824 case Intrinsic::experimental_constrained_fmuladd: {
2825 IntrinsicCostAttributes FMulAttrs(
2826 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2827 IntrinsicCostAttributes FAddAttrs(
2828 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2829 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2830 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2831 }
2832 case Intrinsic::smin:
2833 case Intrinsic::smax:
2834 case Intrinsic::umin:
2835 case Intrinsic::umax: {
2836 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2837 Type *CondTy = RetTy->getWithNewBitWidth(1);
2838 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2839 CmpInst::Predicate Pred =
2840 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2842 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2843 Pred, CostKind);
2844 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2845 Pred, CostKind);
2846 return Cost;
2847 }
2848 case Intrinsic::sadd_with_overflow:
2849 case Intrinsic::ssub_with_overflow: {
2850 Type *SumTy = RetTy->getContainedType(0);
2851 Type *OverflowTy = RetTy->getContainedType(1);
2852 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2853 ? BinaryOperator::Add
2854 : BinaryOperator::Sub;
2855
2856 // Add:
2857 // Overflow -> (Result < LHS) ^ (RHS < 0)
2858 // Sub:
2859 // Overflow -> (Result < LHS) ^ (RHS > 0)
2861 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2862 Cost +=
2863 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2865 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2866 CostKind);
2867 return Cost;
2868 }
2869 case Intrinsic::uadd_with_overflow:
2870 case Intrinsic::usub_with_overflow: {
2871 Type *SumTy = RetTy->getContainedType(0);
2872 Type *OverflowTy = RetTy->getContainedType(1);
2873 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2874 ? BinaryOperator::Add
2875 : BinaryOperator::Sub;
2876 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2879
2881 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2882 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2883 OverflowTy, Pred, CostKind);
2884 return Cost;
2885 }
2886 case Intrinsic::smul_with_overflow:
2887 case Intrinsic::umul_with_overflow: {
2888 Type *MulTy = RetTy->getContainedType(0);
2889 Type *OverflowTy = RetTy->getContainedType(1);
2890 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2891 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2892 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2893
2894 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2896
2898 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2899 Cost +=
2900 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2901 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2902 CCH, CostKind);
2903 Cost += thisT()->getArithmeticInstrCost(
2904 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2906
2907 if (IsSigned)
2908 Cost += thisT()->getArithmeticInstrCost(
2909 Instruction::AShr, MulTy, CostKind,
2912
2913 Cost += thisT()->getCmpSelInstrCost(
2914 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2915 return Cost;
2916 }
2917 case Intrinsic::sadd_sat:
2918 case Intrinsic::ssub_sat: {
2919 // Assume a default expansion.
2920 Type *CondTy = RetTy->getWithNewBitWidth(1);
2921
2922 Type *OpTy = StructType::create({RetTy, CondTy});
2923 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2924 ? Intrinsic::sadd_with_overflow
2925 : Intrinsic::ssub_with_overflow;
2927
2928 // SatMax -> Overflow && SumDiff < 0
2929 // SatMin -> Overflow && SumDiff >= 0
2931 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2932 nullptr, ScalarizationCostPassed);
2933 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2934 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2935 Pred, CostKind);
2936 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2937 CondTy, Pred, CostKind);
2938 return Cost;
2939 }
2940 case Intrinsic::uadd_sat:
2941 case Intrinsic::usub_sat: {
2942 Type *CondTy = RetTy->getWithNewBitWidth(1);
2943
2944 Type *OpTy = StructType::create({RetTy, CondTy});
2945 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2946 ? Intrinsic::uadd_with_overflow
2947 : Intrinsic::usub_with_overflow;
2948
2950 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2951 nullptr, ScalarizationCostPassed);
2952 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2953 Cost +=
2954 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2956 return Cost;
2957 }
2958 case Intrinsic::smul_fix:
2959 case Intrinsic::umul_fix: {
2960 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2961 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2962
2963 unsigned ExtOp =
2964 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2966
2968 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2969 Cost +=
2970 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2971 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2972 CCH, CostKind);
2973 Cost += thisT()->getArithmeticInstrCost(
2974 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2976 Cost += thisT()->getArithmeticInstrCost(
2977 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2979 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2980 return Cost;
2981 }
2982 case Intrinsic::abs: {
2983 // abs(X) = select(icmp(X,0),X,sub(0,X))
2984 Type *CondTy = RetTy->getWithNewBitWidth(1);
2987 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2988 Pred, CostKind);
2989 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2990 Pred, CostKind);
2991 // TODO: Should we add an OperandValueProperties::OP_Zero property?
2992 Cost += thisT()->getArithmeticInstrCost(
2993 BinaryOperator::Sub, RetTy, CostKind,
2995 return Cost;
2996 }
2997 case Intrinsic::fshl:
2998 case Intrinsic::fshr: {
2999 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
3000 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
3001 Type *CondTy = RetTy->getWithNewBitWidth(1);
3003 Cost +=
3004 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
3005 Cost +=
3006 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
3007 Cost +=
3008 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
3009 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
3010 CostKind);
3011 // Non-constant shift amounts requires a modulo. If the typesize is a
3012 // power-2 then this will be converted to an and, otherwise it will use a
3013 // urem.
3014 Cost += thisT()->getArithmeticInstrCost(
3015 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
3016 : BinaryOperator::URem,
3017 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3018 {TTI::OK_UniformConstantValue, TTI::OP_None});
3019 // Shift-by-zero handling.
3020 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3022 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3024 return Cost;
3025 }
3026 case Intrinsic::fptosi_sat:
3027 case Intrinsic::fptoui_sat: {
3028 if (Tys.empty())
3029 break;
3030 Type *FromTy = Tys[0];
3031 bool IsSigned = IID == Intrinsic::fptosi_sat;
3032
3034 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
3035 {FromTy, FromTy});
3036 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
3037 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
3038 {FromTy, FromTy});
3039 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
3040 Cost += thisT()->getCastInstrCost(
3041 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
3043 if (IsSigned) {
3044 Type *CondTy = RetTy->getWithNewBitWidth(1);
3045 Cost += thisT()->getCmpSelInstrCost(
3046 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3047 Cost += thisT()->getCmpSelInstrCost(
3048 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3049 }
3050 return Cost;
3051 }
3052 case Intrinsic::ucmp:
3053 case Intrinsic::scmp: {
3054 Type *CmpTy = Tys[0];
3055 Type *CondTy = RetTy->getWithNewBitWidth(1);
3057 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3059 CostKind) +
3060 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3062 CostKind);
3063
3064 EVT VT = TLI->getValueType(DL, CmpTy, true);
3066 // x < y ? -1 : (x > y ? 1 : 0)
3067 Cost += 2 * thisT()->getCmpSelInstrCost(
3068 BinaryOperator::Select, RetTy, CondTy,
3070 } else {
3071 // zext(x > y) - zext(x < y)
3072 Cost +=
3073 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3075 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3076 CostKind);
3077 }
3078 return Cost;
3079 }
3080 case Intrinsic::maximumnum:
3081 case Intrinsic::minimumnum: {
3082 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3083 // maximumnum/minimumnum to
3084 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3085 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3086 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3087 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3088 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3089 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3090 int IeeeISD =
3091 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3092 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3093 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3094 RetTy, Tys[0]);
3095 InstructionCost FCanonicalizeCost =
3096 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3097 return LT.first + FCanonicalizeCost * 2;
3098 }
3099 break;
3100 }
3101 case Intrinsic::clmul: {
3102 // This cost model should match the expansion in
3103 // TargetLowering::expandCLMUL.
3104 unsigned BW = RetTy->getScalarSizeInBits();
3105 InstructionCost AndCost =
3106 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind);
3107 InstructionCost OrCost =
3108 thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
3109 InstructionCost XorCost =
3110 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3111 InstructionCost MulCost =
3112 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind);
3113
3114 // When the multiplication with holes approach is used, that emits 16
3115 // MULs, 8 + 4 ANDs, 12 XORs and 3 ORs.
3116 if (BW >= 32 && BW <= 64 &&
3118 TLI->getValueType(DL, RetTy))) {
3119 return 16 * MulCost + 12 * AndCost + 12 * XorCost + 3 * OrCost;
3120 }
3121
3122 InstructionCost PerBitCostMul = AndCost + MulCost + XorCost;
3123 InstructionCost PerBitCostBittest =
3124 AndCost +
3125 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3127 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3129 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3130 return BW * PerBitCost;
3131 }
3132 default:
3133 break;
3134 }
3135
3136 // Else, assume that we need to scalarize this intrinsic. For math builtins
3137 // this will emit a costly libcall, adding call overhead and spills. Make it
3138 // very expensive.
3139 if (isVectorizedTy(RetTy)) {
3140 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3141
3142 // Scalable vectors cannot be scalarized, so return Invalid.
3143 if (any_of(concat<Type *const>(RetVTys, Tys),
3144 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3146
3147 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3148 if (!SkipScalarizationCost) {
3149 ScalarizationCost = 0;
3150 for (Type *RetVTy : RetVTys) {
3151 ScalarizationCost += getScalarizationOverhead(
3152 cast<VectorType>(RetVTy), /*Insert=*/true,
3153 /*Extract=*/false, CostKind);
3154 }
3155 }
3156
3157 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3158 SmallVector<Type *, 4> ScalarTys;
3159 for (Type *Ty : Tys) {
3160 if (Ty->isVectorTy())
3161 Ty = Ty->getScalarType();
3162 ScalarTys.push_back(Ty);
3163 }
3164 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3165 InstructionCost ScalarCost =
3166 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3167 for (Type *Ty : Tys) {
3168 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3169 if (!ICA.skipScalarizationCost())
3170 ScalarizationCost += getScalarizationOverhead(
3171 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3172 ScalarCalls = std::max(ScalarCalls,
3173 cast<FixedVectorType>(VTy)->getNumElements());
3174 }
3175 }
3176 return ScalarCalls * ScalarCost + ScalarizationCost;
3177 }
3178
3179 // This is going to be turned into a library call, make it expensive.
3180 return SingleCallCost;
3181 }
3182
3183 /// Get memory intrinsic cost based on arguments.
3186 TTI::TargetCostKind CostKind) const override {
3187 unsigned Id = MICA.getID();
3188 Type *DataTy = MICA.getDataType();
3189 bool VariableMask = MICA.getVariableMask();
3190 Align Alignment = MICA.getAlignment();
3191
3192 switch (Id) {
3193 case Intrinsic::experimental_vp_strided_load:
3194 case Intrinsic::experimental_vp_strided_store: {
3195 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3196 ? Instruction::Load
3197 : Instruction::Store;
3198 // For a target without strided memory operations (or for an illegal
3199 // operation type on one which does), assume we lower to a gather/scatter
3200 // operation. (Which may in turn be scalarized.)
3201 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3202 VariableMask, true, CostKind);
3203 }
3204 case Intrinsic::masked_scatter:
3205 case Intrinsic::masked_gather:
3206 case Intrinsic::vp_scatter:
3207 case Intrinsic::vp_gather: {
3208 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3209 MICA.getID() == Intrinsic::vp_gather)
3210 ? Instruction::Load
3211 : Instruction::Store;
3212
3213 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3214 VariableMask, true, CostKind);
3215 }
3216 case Intrinsic::vp_load:
3217 case Intrinsic::vp_store:
3219 case Intrinsic::masked_load:
3220 case Intrinsic::masked_store: {
3221 unsigned Opcode =
3222 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3223 // TODO: Pass on AddressSpace when we have test coverage.
3224 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3225 CostKind);
3226 }
3227 case Intrinsic::masked_compressstore:
3228 case Intrinsic::masked_expandload: {
3229 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3230 ? Instruction::Load
3231 : Instruction::Store;
3232 // Treat expand load/compress store as gather/scatter operation.
3233 // TODO: implement more precise cost estimation for these intrinsics.
3234 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3235 VariableMask,
3236 /*IsGatherScatter*/ true, CostKind);
3237 }
3238 case Intrinsic::vp_load_ff:
3240 default:
3241 llvm_unreachable("unexpected intrinsic");
3242 }
3243 }
3244
3245 /// Compute a cost of the given call instruction.
3246 ///
3247 /// Compute the cost of calling function F with return type RetTy and
3248 /// argument types Tys. F might be nullptr, in this case the cost of an
3249 /// arbitrary call with the specified signature will be returned.
3250 /// This is used, for instance, when we estimate call of a vector
3251 /// counterpart of the given function.
3252 /// \param F Called function, might be nullptr.
3253 /// \param RetTy Return value types.
3254 /// \param Tys Argument types.
3255 /// \returns The cost of Call instruction.
3258 TTI::TargetCostKind CostKind) const override {
3259 return 10;
3260 }
3261
3262 unsigned getNumberOfParts(Type *Tp) const override {
3263 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3264 if (!LT.first.isValid())
3265 return 0;
3266 // Try to find actual number of parts for non-power-of-2 elements as
3267 // ceil(num-of-elements/num-of-subtype-elements).
3268 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3269 Tp && LT.second.isFixedLengthVector() &&
3270 !has_single_bit(FTp->getNumElements())) {
3271 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3272 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3273 SubTp && SubTp->getElementType() == FTp->getElementType())
3274 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3275 }
3276 return LT.first.getValue();
3277 }
3278
3281 TTI::TargetCostKind) const override {
3282 return 0;
3283 }
3284
3285 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3286 /// We're assuming that reduction operation are performing the following way:
3287 ///
3288 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3289 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3290 /// \----------------v-------------/ \----------v------------/
3291 /// n/2 elements n/2 elements
3292 /// %red1 = op <n x t> %val, <n x t> val1
3293 /// After this operation we have a vector %red1 where only the first n/2
3294 /// elements are meaningful, the second n/2 elements are undefined and can be
3295 /// dropped. All other operations are actually working with the vector of
3296 /// length n/2, not n, though the real vector length is still n.
3297 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3298 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3299 /// \----------------v-------------/ \----------v------------/
3300 /// n/4 elements 3*n/4 elements
3301 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3302 /// length n/2, the resulting vector has length n/4 etc.
3303 ///
3304 /// The cost model should take into account that the actual length of the
3305 /// vector is reduced on each iteration.
3308 // Targets must implement a default value for the scalable case, since
3309 // we don't know how many lanes the vector has.
3312
3313 Type *ScalarTy = Ty->getElementType();
3314 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3315 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3316 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3317 NumVecElts >= 2) {
3318 // Or reduction for i1 is represented as:
3319 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3320 // %res = cmp ne iReduxWidth %val, 0
3321 // And reduction for i1 is represented as:
3322 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3323 // %res = cmp eq iReduxWidth %val, 11111
3324 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3325 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3327 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3330 }
3331 unsigned NumReduxLevels = Log2_32(NumVecElts);
3332 InstructionCost ArithCost = 0;
3333 InstructionCost ShuffleCost = 0;
3334 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3335 unsigned LongVectorCount = 0;
3336 unsigned MVTLen =
3337 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3338 while (NumVecElts > MVTLen) {
3339 NumVecElts /= 2;
3340 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3341 ShuffleCost += thisT()->getShuffleCost(
3342 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3343 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3344 Ty = SubTy;
3345 ++LongVectorCount;
3346 }
3347
3348 NumReduxLevels -= LongVectorCount;
3349
3350 // The minimal length of the vector is limited by the real length of vector
3351 // operations performed on the current platform. That's why several final
3352 // reduction operations are performed on the vectors with the same
3353 // architecture-dependent length.
3354
3355 // By default reductions need one shuffle per reduction level.
3356 ShuffleCost +=
3357 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3358 Ty, {}, CostKind, 0, Ty);
3359 ArithCost +=
3360 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3361 return ShuffleCost + ArithCost +
3362 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3363 CostKind, 0, nullptr, nullptr);
3364 }
3365
3366 /// Try to calculate the cost of performing strict (in-order) reductions,
3367 /// which involves doing a sequence of floating point additions in lane
3368 /// order, starting with an initial value. For example, consider a scalar
3369 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3370 ///
3371 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3372 ///
3373 /// %add1 = %InitVal + %v0
3374 /// %add2 = %add1 + %v1
3375 /// %add3 = %add2 + %v2
3376 /// %add4 = %add3 + %v3
3377 ///
3378 /// As a simple estimate we can say the cost of such a reduction is 4 times
3379 /// the cost of a scalar FP addition. We can only estimate the costs for
3380 /// fixed-width vectors here because for scalable vectors we do not know the
3381 /// runtime number of operations.
3384 // Targets must implement a default value for the scalable case, since
3385 // we don't know how many lanes the vector has.
3388
3389 auto *VTy = cast<FixedVectorType>(Ty);
3391 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3392 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3393 Opcode, VTy->getElementType(), CostKind);
3394 ArithCost *= VTy->getNumElements();
3395
3396 return ExtractCost + ArithCost;
3397 }
3398
3401 std::optional<FastMathFlags> FMF,
3402 TTI::TargetCostKind CostKind) const override {
3403 assert(Ty && "Unknown reduction vector type");
3405 return getOrderedReductionCost(Opcode, Ty, CostKind);
3406 return getTreeReductionCost(Opcode, Ty, CostKind);
3407 }
3408
3409 /// Try to calculate op costs for min/max reduction operations.
3410 /// \param CondTy Conditional type for the Select instruction.
3413 TTI::TargetCostKind CostKind) const override {
3414 // Targets must implement a default value for the scalable case, since
3415 // we don't know how many lanes the vector has.
3418
3419 Type *ScalarTy = Ty->getElementType();
3420 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3421 unsigned NumReduxLevels = Log2_32(NumVecElts);
3422 InstructionCost MinMaxCost = 0;
3423 InstructionCost ShuffleCost = 0;
3424 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3425 unsigned LongVectorCount = 0;
3426 unsigned MVTLen =
3427 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3428 while (NumVecElts > MVTLen) {
3429 NumVecElts /= 2;
3430 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3431
3432 ShuffleCost += thisT()->getShuffleCost(
3433 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3434
3435 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3436 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3437 Ty = SubTy;
3438 ++LongVectorCount;
3439 }
3440
3441 NumReduxLevels -= LongVectorCount;
3442
3443 // The minimal length of the vector is limited by the real length of vector
3444 // operations performed on the current platform. That's why several final
3445 // reduction opertions are perfomed on the vectors with the same
3446 // architecture-dependent length.
3447 ShuffleCost +=
3448 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3449 Ty, {}, CostKind, 0, Ty);
3450 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3451 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3452 // The last min/max should be in vector registers and we counted it above.
3453 // So just need a single extractelement.
3454 return ShuffleCost + MinMaxCost +
3455 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3456 CostKind, 0, nullptr, nullptr);
3457 }
3458
3460 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3461 VectorType *Ty, std::optional<FastMathFlags> FMF,
3462 TTI::TargetCostKind CostKind) const override {
3463 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3464 FTy && IsUnsigned && Opcode == Instruction::Add &&
3465 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3466 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3467 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3468 auto *IntTy =
3469 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3470 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3471 FMF ? *FMF : FastMathFlags());
3472 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3474 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3475 }
3476 // Without any native support, this is equivalent to the cost of
3477 // vecreduce.opcode(ext(Ty A)).
3478 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3479 InstructionCost RedCost =
3480 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3481 InstructionCost ExtCost = thisT()->getCastInstrCost(
3482 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3484
3485 return RedCost + ExtCost;
3486 }
3487
3489 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3490 VectorType *Ty,
3491 TTI::TargetCostKind CostKind) const override {
3492 // Without any native support, this is equivalent to the cost of
3493 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3494 // vecreduce.add(mul(A, B)).
3495 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3496 "The reduction opcode is expected to be Add or Sub.");
3497 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3498 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3499 RedOpcode, ExtTy, std::nullopt, CostKind);
3500 InstructionCost ExtCost = thisT()->getCastInstrCost(
3501 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3503
3504 InstructionCost MulCost =
3505 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3506
3507 return RedCost + MulCost + 2 * ExtCost;
3508 }
3509
3511 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
3513 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
3515 std::optional<FastMathFlags> FMF) const override {
3516 unsigned EltSizeAcc = AccumType->getScalarSizeInBits();
3517 unsigned EltSizeInA = InputTypeA->getScalarSizeInBits();
3518 unsigned Ratio = EltSizeAcc / EltSizeInA;
3519 if (VF.getKnownMinValue() <= Ratio || VF.getKnownMinValue() % Ratio != 0 ||
3520 EltSizeAcc % EltSizeInA != 0 || (BinOp && InputTypeA != InputTypeB))
3522
3523 Type *InputVectorType = VectorType::get(InputTypeA, VF);
3524 Type *ExtInputVectorType = VectorType::get(AccumType, VF);
3525 Type *AccumVectorType =
3526 VectorType::get(AccumType, VF.divideCoefficientBy(Ratio));
3527
3528 InstructionCost ExtendCostA = 0;
3530 ExtendCostA = getCastInstrCost(
3532 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3533 CostKind);
3534
3535 // TODO: add cost of extracting subvectors from the source vector that
3536 // is to be partially reduced.
3537 InstructionCost ReductionOpCost =
3538 Ratio * getArithmeticInstrCost(Opcode, AccumVectorType, CostKind);
3539
3540 if (!BinOp)
3541 return ExtendCostA + ReductionOpCost;
3542
3543 InstructionCost ExtendCostB = 0;
3545 ExtendCostB = getCastInstrCost(
3547 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3548 CostKind);
3549 return ExtendCostA + ExtendCostB + ReductionOpCost +
3550 getArithmeticInstrCost(*BinOp, ExtInputVectorType, CostKind);
3551 }
3552
3554
3555 /// @}
3556};
3557
3558/// Concrete BasicTTIImpl that can be used if no further customization
3559/// is needed.
3560class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3561 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3562
3563 friend class BasicTTIImplBase<BasicTTIImpl>;
3564
3565 const TargetSubtargetInfo *ST;
3566 const TargetLoweringBase *TLI;
3567
3568 const TargetSubtargetInfo *getST() const { return ST; }
3569 const TargetLoweringBase *getTLI() const { return TLI; }
3570
3571public:
3572 LLVM_ABI explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3573};
3574
3575} // end namespace llvm
3576
3577#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
unsigned Imm
unsigned uint64_t
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:856
This file implements the BitVector class.
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_ABI
Definition Compiler.h:215
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
SI Fold Operands
static Type * getValueType(Value *V, bool LookThroughCmp=false)
Returns the "element type" of the given value/instruction V.
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:231
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1351
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1206
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1509
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1135
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:197
an instruction to allocate memory on the stack
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:194
size_t size() const
Get the array size.
Definition ArrayRef.h:141
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:200
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
bool haveFastClmul(IntegerType *Ty) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy, Align Alignment, unsigned AddrSpace) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
std::optional< unsigned > getMaxVScale() const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
unsigned getMaxInterleaveFactor(ElementCount VF, bool HasUnorderedReductions) const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const override
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
bool isSingleThreaded() const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getBranchMispredictPenalty() const override
bool isNumRegsMajorCostOfLSR() const override
LLVM_ABI BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Set all bits in the bitvector.
Definition BitVector.h:366
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:740
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:770
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:763
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:767
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:765
@ ICMP_NE
not equal
Definition InstrTypes.h:762
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:750
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:324
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:309
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:320
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:867
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:328
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Class to represent integer types.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:348
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(LLVMContext &C, unsigned AddressSpace)
This constructs an opaque pointer to an object in a numbered address space.
Definition Type.cpp:911
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:683
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const FeatureBitset & getInlineMustMatchFeatures() const =0
Target features where all mismatches prevent inlining.
virtual const FeatureBitset & getInlineInverseFeatures() const =0
Target features where the callee may have an additional feature, instead of the caller.
virtual const FeatureBitset & getInlineIgnoreFeatures() const =0
Target features to ignore for inline compatibility check.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
@ TCK_Latency
The latency of instruction.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
llvm::VectorInstrContext VectorInstrContext
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
static LLVM_ABI Instruction::CastOps getOpcodeForPartialReductionExtendKind(PartialReductionExtendKind Kind)
Get the cast opcode for an extension kind.
MemIndexedMode
The type of load/store indexing.
static LLVM_ABI VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1822
bool isAArch64() const
Tests whether the target is AArch64 (little and big endian).
Definition Triple.h:1093
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:343
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:288
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:282
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:307
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:368
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVM_ABI Type * getWithNewType(Type *EltTy) const
Given vector type, change the element type, whilst keeping the old number of elements.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:232
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:306
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:313
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:227
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:397
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:255
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition TypeSize.h:252
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3035
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:789
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:520
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:749
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:780
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:543
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:806
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:729
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:815
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:737
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:955
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:536
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1739
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:840
InstructionCost Cost
@ Known
Known to have no common set bits.
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2554
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1151
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:149
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1746
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:332
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:280
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:395
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
@ Fast
Assign the register banks as fast as possible (default).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
LLVM_ABI cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:373
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:339
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static LLVM_ABI bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).