AArch64Subtarget.cpp File Reference

#include "AArch64Subtarget.h"
#include "AArch64.h"
#include "AArch64InstrInfo.h"
#include "AArch64PBQPRegAlloc.h"
#include "AArch64TargetMachine.h"
#include "GISel/AArch64CallLowering.h"
#include "GISel/AArch64LegalizerInfo.h"
#include "GISel/AArch64RegisterBankInfo.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Option/LibraryOptions.h"
#include "llvm/Support/SipHash.h"
#include "llvm/TargetParser/AArch64TargetParser.h"
#include "AArch64GenSubtargetInfo.inc"
#include "AArch64Options.inc"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "aarch64-subtarget"
#define	GET_SUBTARGETINFO_CTOR
#define	GET_SUBTARGETINFO_TARGET_DESC
#define	OPTIONS_STRUCT_DEFS

Functions
static unsigned	getMOVKShiftImm (const MachineInstr &MI)
	Returns a MOVK's shifter operand, or 0 otherwise.
static bool	fusesMOVImmPairImpl (const AArch64Subtarget &ST, bool HasFirst, unsigned FirstOpc, unsigned FirstShift, unsigned SecondOpc, unsigned SecondShift)
	HasFirst is false when the 1st instruction is a wildcard.

Variables
static cl::list< std::string >	ReservedRegsForRA ("reserve-regs-for-regalloc", cl::desc("Reserve physical " "registers, so they can't be used by register allocator. " "Should only be used for testing register allocator."), cl::CommaSeparated, cl::Hidden)

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "aarch64-subtarget"

Definition at line 33 of file AArch64Subtarget.cpp.

GET_SUBTARGETINFO_CTOR

#define GET_SUBTARGETINFO_CTOR

Definition at line 35 of file AArch64Subtarget.cpp.

GET_SUBTARGETINFO_TARGET_DESC

#define GET_SUBTARGETINFO_TARGET_DESC

Definition at line 36 of file AArch64Subtarget.cpp.

OPTIONS_STRUCT_DEFS

#define OPTIONS_STRUCT_DEFS

Definition at line 39 of file AArch64Subtarget.cpp.

Function Documentation

fusesMOVImmPairImpl()

bool fusesMOVImmPairImpl ( const AArch64Subtarget & ST, bool HasFirst, unsigned FirstOpc, unsigned FirstShift, unsigned SecondOpc, unsigned SecondShift )

static

HasFirst is false when the 1st instruction is a wildcard.

Definition at line 604 of file AArch64Subtarget.cpp.

References assert().

Referenced by llvm::AArch64Subtarget::fusesMOVImmPair(), and llvm::AArch64Subtarget::fusesMOVImmPair().

getMOVKShiftImm()

unsigned getMOVKShiftImm ( const MachineInstr & MI )

static

Returns a MOVK's shifter operand, or 0 otherwise.

Definition at line 596 of file AArch64Subtarget.cpp.

References MI, and Opc.

Referenced by llvm::AArch64Subtarget::fusesMOVImmPair().

Variable Documentation

ReservedRegsForRA

cl::list< std::string > ReservedRegsForRA("reserve-regs-for-regalloc", cl::desc("Reserve physical " "registers, so they can't be used by register allocator. " "Should only be used for testing register allocator."), cl::CommaSeparated, cl::Hidden) ( "reserve-regs-for-regalloc" , cl::desc("Reserve physical " "registers, so they can't be used by register allocator. " "Should only be used for testing register allocator.") , cl::CommaSeparated , cl::Hidden  )

static

Referenced by llvm::AArch64Subtarget::AArch64Subtarget().