AArch64Subtarget.cpp File Reference

#include "AArch64Subtarget.h"
#include "AArch64.h"
#include "AArch64InstrInfo.h"
#include "AArch64PBQPRegAlloc.h"
#include "AArch64TargetMachine.h"
#include "GISel/AArch64CallLowering.h"
#include "GISel/AArch64LegalizerInfo.h"
#include "GISel/AArch64RegisterBankInfo.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/TargetParser/AArch64TargetParser.h"
#include "AArch64GenSubtargetInfo.inc"

Include dependency graph for AArch64Subtarget.cpp:

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "aarch64-subtarget"
#define	GET_SUBTARGETINFO_CTOR
#define	GET_SUBTARGETINFO_TARGET_DESC

Variables
static cl::opt< bool >	EnableEarlyIfConvert ("aarch64-early-ifcvt", cl::desc("Enable the early if " "converter pass"), cl::init(true), cl::Hidden)
static cl::opt< bool >	UseAddressTopByteIgnored ("aarch64-use-tbi", cl::desc("Assume that top byte of " "an address is ignored"), cl::init(false), cl::Hidden)
static cl::opt< bool >	UseNonLazyBind ("aarch64-enable-nonlazybind", cl::desc("Call nonlazybind functions via direct GOT load"), cl::init(false), cl::Hidden)
static cl::opt< bool >	UseAA ("aarch64-use-aa", cl::init(true), cl::desc("Enable the use of AA during codegen."))
static cl::opt< unsigned >	OverrideVectorInsertExtractBaseCost ("aarch64-insert-extract-base-cost", cl::desc("Base cost of vector insert/extract element"), cl::Hidden)
static cl::list< std::string >	ReservedRegsForRA ("reserve-regs-for-regalloc", cl::desc("Reserve physical " "registers, so they can't be used by register allocator. " "Should only be used for testing register allocator."), cl::CommaSeparated, cl::Hidden)
static cl::opt< bool >	ForceStreamingCompatibleSVE ("force-streaming-compatible-sve", cl::init(false), cl::Hidden)

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "aarch64-subtarget"

Definition at line 31 of file AArch64Subtarget.cpp.

GET_SUBTARGETINFO_CTOR

#define GET_SUBTARGETINFO_CTOR

Definition at line 33 of file AArch64Subtarget.cpp.

GET_SUBTARGETINFO_TARGET_DESC

#define GET_SUBTARGETINFO_TARGET_DESC

Definition at line 34 of file AArch64Subtarget.cpp.

Variable Documentation

EnableEarlyIfConvert

cl::opt< bool > EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if " "converter pass"), cl::init(true), cl::Hidden) ( "aarch64-early-ifcvt"  , cl::desc("Enable the early if " "converter pass")  , cl::init(true)  , cl::Hidden    )

static

Referenced by llvm::AArch64Subtarget::enableEarlyIfConversion().

ForceStreamingCompatibleSVE

cl::opt< bool > ForceStreamingCompatibleSVE("force-streaming-compatible-sve", cl::init(false), cl::Hidden) ( "force-streaming-compatible-sve"  , cl::init(false)  , cl::Hidden    )

static

Referenced by llvm::AArch64Subtarget::forceStreamingCompatibleSVE().

OverrideVectorInsertExtractBaseCost

cl::opt< unsigned > OverrideVectorInsertExtractBaseCost("aarch64-insert-extract-base-cost", cl::desc("Base cost of vector insert/extract element"), cl::Hidden) ( "aarch64-insert-extract-base-cost"  , cl::desc("Base cost of vector insert/extract element")  , cl::Hidden    )

static

Referenced by llvm::AArch64Subtarget::getVectorInsertExtractBaseCost().

ReservedRegsForRA

cl::list< std::string > ReservedRegsForRA("reserve-regs-for-regalloc", cl::desc("Reserve physical " "registers, so they can't be used by register allocator. " "Should only be used for testing register allocator."), cl::CommaSeparated, cl::Hidden) ( "reserve-regs-for-regalloc"  , cl::desc("Reserve physical " "registers, so they can't be used by register allocator. " "Should only be used for testing register allocator.")  , cl::CommaSeparated  , cl::Hidden    )

static

Referenced by llvm::AArch64Subtarget::AArch64Subtarget().

UseAA

cl::opt< bool > UseAA("aarch64-use-aa", cl::init(true), cl::desc("Enable the use of AA during codegen.")) ( "aarch64-use-aa"  , cl::init(true)  , cl::desc("Enable the use of AA during codegen.")    )

static

Referenced by llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::AArch64Subtarget::useAA(), and llvm::GCNSubtarget::useAA().

UseAddressTopByteIgnored

cl::opt< bool > UseAddressTopByteIgnored("aarch64-use-tbi", cl::desc("Assume that top byte of " "an address is ignored"), cl::init(false), cl::Hidden) ( "aarch64-use-tbi"  , cl::desc("Assume that top byte of " "an address is ignored")  , cl::init(false)  , cl::Hidden    )

static

Referenced by llvm::AArch64Subtarget::supportsAddressTopByteIgnored().

UseNonLazyBind

cl::opt< bool > UseNonLazyBind("aarch64-enable-nonlazybind", cl::desc("Call nonlazybind functions via direct GOT load"), cl::init(false), cl::Hidden) ( "aarch64-enable-nonlazybind"  , cl::desc("Call nonlazybind functions via direct GOT load")  , cl::init(false)  , cl::Hidden    )

static

Referenced by llvm::AArch64Subtarget::classifyGlobalFunctionReference().