LLVM 18.0.0git
AArch64TargetParser.h
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1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
15#define LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
16
17#include "llvm/ADT/ArrayRef.h"
18#include "llvm/ADT/Bitset.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/ADT/StringRef.h"
22#include <array>
23#include <vector>
24
25namespace llvm {
26
27class Triple;
28
29namespace AArch64 {
30// Function Multi Versioning CPU features. They must be kept in sync with
31// compiler-rt enum CPUFeatures in lib/builtins/cpu_model.c with FEAT_MAX as
32// sentinel.
93};
94
95static_assert(FEAT_MAX <= 64,
96 "CPUFeatures enum must not have more than 64 entries");
97
98// Arch extension modifiers for CPUs. These are labelled with their Arm ARM
99// feature name (though the canonical reference for those is AArch64.td)
100// clang-format off
101enum ArchExtKind : unsigned {
103 AEK_CRC = 2, // FEAT_CRC32
105 AEK_FP = 4, // FEAT_FP
106 AEK_SIMD = 5, // FEAT_AdvSIMD
107 AEK_FP16 = 6, // FEAT_FP16
108 AEK_PROFILE = 7, // FEAT_SPE
109 AEK_RAS = 8, // FEAT_RAS, FEAT_RASv1p1
110 AEK_LSE = 9, // FEAT_LSE
111 AEK_SVE = 10, // FEAT_SVE
112 AEK_DOTPROD = 11, // FEAT_DotProd
113 AEK_RCPC = 12, // FEAT_LRCPC
114 AEK_RDM = 13, // FEAT_RDM
115 AEK_SM4 = 14, // FEAT_SM4, FEAT_SM3
116 AEK_SHA3 = 15, // FEAT_SHA3, FEAT_SHA512
117 AEK_SHA2 = 16, // FEAT_SHA1, FEAT_SHA256
118 AEK_AES = 17, // FEAT_AES, FEAT_PMULL
119 AEK_FP16FML = 18, // FEAT_FHM
120 AEK_RAND = 19, // FEAT_RNG
121 AEK_MTE = 20, // FEAT_MTE, FEAT_MTE2
122 AEK_SSBS = 21, // FEAT_SSBS, FEAT_SSBS2
123 AEK_SB = 22, // FEAT_SB
124 AEK_PREDRES = 23, // FEAT_SPECRES
125 AEK_SVE2 = 24, // FEAT_SVE2
126 AEK_SVE2AES = 25, // FEAT_SVE_AES, FEAT_SVE_PMULL128
127 AEK_SVE2SM4 = 26, // FEAT_SVE_SM4
128 AEK_SVE2SHA3 = 27, // FEAT_SVE_SHA3
129 AEK_SVE2BITPERM = 28, // FEAT_SVE_BitPerm
130 AEK_TME = 29, // FEAT_TME
131 AEK_BF16 = 30, // FEAT_BF16
132 AEK_I8MM = 31, // FEAT_I8MM
133 AEK_F32MM = 32, // FEAT_F32MM
134 AEK_F64MM = 33, // FEAT_F64MM
135 AEK_LS64 = 34, // FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA
136 AEK_BRBE = 35, // FEAT_BRBE
137 AEK_PAUTH = 36, // FEAT_PAuth
138 AEK_FLAGM = 37, // FEAT_FlagM
139 AEK_SME = 38, // FEAT_SME
140 AEK_SMEF64F64 = 39, // FEAT_SME_F64F64
141 AEK_SMEI16I64 = 40, // FEAT_SME_I16I64
142 AEK_HBC = 41, // FEAT_HBC
143 AEK_MOPS = 42, // FEAT_MOPS
144 AEK_PERFMON = 43, // FEAT_PMUv3
145 AEK_SME2 = 44, // FEAT_SME2
146 AEK_SVE2p1 = 45, // FEAT_SVE2p1
147 AEK_SME2p1 = 46, // FEAT_SME2p1
148 AEK_B16B16 = 47, // FEAT_B16B16
149 AEK_SMEF16F16 = 48, // FEAT_SMEF16F16
150 AEK_CSSC = 49, // FEAT_CSSC
151 AEK_RCPC3 = 50, // FEAT_LRCPC3
152 AEK_THE = 51, // FEAT_THE
153 AEK_D128 = 52, // FEAT_D128
154 AEK_LSE128 = 53, // FEAT_LSE128
155 AEK_SPECRES2 = 54, // FEAT_SPECRES2
156 AEK_RASv2 = 55, // FEAT_RASv2
157 AEK_ITE = 56, // FEAT_ITE
158 AEK_GCS = 57, // FEAT_GCS
162// clang-format on
163
164// Represents an extension that can be enabled with -march=<arch>+<extension>.
165// Typically these correspond to Arm Architecture extensions, unlike
166// SubtargetFeature which may represent either an actual extension or some
167// internal LLVM property.
169 StringRef Name; // Human readable name, e.g. "profile".
170 ArchExtKind ID; // Corresponding to the ArchExtKind, this
171 // extensions representation in the bitfield.
172 StringRef Feature; // -mattr enable string, e.g. "+spe"
173 StringRef NegFeature; // -mattr disable string, e.g. "-spe"
174 CPUFeatures CPUFeature; // Function Multi Versioning (FMV) bitfield value
175 // set in __aarch64_cpu_features
176 StringRef DependentFeatures; // FMV enabled features string,
177 // e.g. "+dotprod,+fp-armv8,+neon"
178 unsigned FmvPriority; // FMV feature priority
179 static constexpr unsigned MaxFMVPriority =
180 1000; // Maximum priority for FMV feature
181};
182
183// NOTE: If adding a new extension here, consider adding it to ExtensionMap
184// in AArch64AsmParser too, if supported as an extension name by binutils.
185// clang-format off
186inline constexpr ExtensionInfo Extensions[] = {
187 {"aes", AArch64::AEK_AES, "+aes", "-aes", FEAT_AES, "+fp-armv8,+neon", 150},
188 {"b16b16", AArch64::AEK_B16B16, "+b16b16", "-b16b16", FEAT_MAX, "", 0},
189 {"bf16", AArch64::AEK_BF16, "+bf16", "-bf16", FEAT_BF16, "+bf16", 280},
190 {"brbe", AArch64::AEK_BRBE, "+brbe", "-brbe", FEAT_MAX, "", 0},
191 {"bti", AArch64::AEK_NONE, {}, {}, FEAT_BTI, "+bti", 510},
192 {"crc", AArch64::AEK_CRC, "+crc", "-crc", FEAT_CRC, "+crc", 110},
193 {"crypto", AArch64::AEK_CRYPTO, "+crypto", "-crypto", FEAT_MAX, "+aes,+sha2", 0},
194 {"cssc", AArch64::AEK_CSSC, "+cssc", "-cssc", FEAT_MAX, "", 0},
195 {"d128", AArch64::AEK_D128, "+d128", "-d128", FEAT_MAX, "", 0},
196 {"dgh", AArch64::AEK_NONE, {}, {}, FEAT_DGH, "", 260},
197 {"dit", AArch64::AEK_NONE, {}, {}, FEAT_DIT, "+dit", 180},
198 {"dotprod", AArch64::AEK_DOTPROD, "+dotprod", "-dotprod", FEAT_DOTPROD, "+dotprod,+fp-armv8,+neon", 50},
199 {"dpb", AArch64::AEK_NONE, {}, {}, FEAT_DPB, "+ccpp", 190},
200 {"dpb2", AArch64::AEK_NONE, {}, {}, FEAT_DPB2, "+ccpp,+ccdp", 200},
201 {"ebf16", AArch64::AEK_NONE, {}, {}, FEAT_EBF16, "+bf16", 290},
202 {"f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32mm", FEAT_SVE_F32MM, "+sve,+f32mm,+fullfp16,+fp-armv8,+neon", 350},
203 {"f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm", FEAT_SVE_F64MM, "+sve,+f64mm,+fullfp16,+fp-armv8,+neon", 360},
204 {"fcma", AArch64::AEK_NONE, {}, {}, FEAT_FCMA, "+fp-armv8,+neon,+complxnum", 220},
205 {"flagm", AArch64::AEK_FLAGM, "+flagm", "-flagm", FEAT_FLAGM, "+flagm", 20},
206 {"flagm2", AArch64::AEK_NONE, {}, {}, FEAT_FLAGM2, "+flagm,+altnzcv", 30},
207 {"fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8", FEAT_FP, "+fp-armv8,+neon", 90},
208 {"fp16", AArch64::AEK_FP16, "+fullfp16", "-fullfp16", FEAT_FP16, "+fullfp16,+fp-armv8,+neon", 170},
209 {"fp16fml", AArch64::AEK_FP16FML, "+fp16fml", "-fp16fml", FEAT_FP16FML, "+fp16fml,+fullfp16,+fp-armv8,+neon", 40},
210 {"frintts", AArch64::AEK_NONE, {}, {}, FEAT_FRINTTS, "+fptoint", 250},
211 {"hbc", AArch64::AEK_HBC, "+hbc", "-hbc", FEAT_MAX, "", 0},
212 {"i8mm", AArch64::AEK_I8MM, "+i8mm", "-i8mm", FEAT_I8MM, "+i8mm", 270},
213 {"ite", AArch64::AEK_ITE, "+ite", "-ite", FEAT_MAX, "", 0},
214 {"jscvt", AArch64::AEK_NONE, {}, {}, FEAT_JSCVT, "+fp-armv8,+neon,+jsconv", 210},
215 {"ls64_accdata", AArch64::AEK_NONE, {}, {}, FEAT_LS64_ACCDATA, "+ls64", 540},
216 {"ls64_v", AArch64::AEK_NONE, {}, {}, FEAT_LS64_V, "", 530},
217 {"ls64", AArch64::AEK_LS64, "+ls64", "-ls64", FEAT_LS64, "", 520},
218 {"lse", AArch64::AEK_LSE, "+lse", "-lse", FEAT_LSE, "+lse", 80},
219 {"lse128", AArch64::AEK_LSE128, "+lse128", "-lse128", FEAT_MAX, "", 0},
220 {"memtag", AArch64::AEK_MTE, "+mte", "-mte", FEAT_MEMTAG, "", 440},
221 {"memtag2", AArch64::AEK_NONE, {}, {}, FEAT_MEMTAG2, "+mte", 450},
222 {"memtag3", AArch64::AEK_NONE, {}, {}, FEAT_MEMTAG3, "+mte", 460},
223 {"mops", AArch64::AEK_MOPS, "+mops", "-mops", FEAT_MAX, "", 0},
224 {"pauth", AArch64::AEK_PAUTH, "+pauth", "-pauth", FEAT_MAX, "", 0},
225 {"pmull", AArch64::AEK_NONE, {}, {}, FEAT_PMULL, "+aes,+fp-armv8,+neon", 160},
226 {"pmuv3", AArch64::AEK_PERFMON, "+perfmon", "-perfmon", FEAT_MAX, "", 0},
227 {"predres", AArch64::AEK_PREDRES, "+predres", "-predres", FEAT_PREDRES, "+predres", 480},
228 {"predres2", AArch64::AEK_SPECRES2, "+specres2", "-specres2", FEAT_MAX, "", 0},
229 {"profile", AArch64::AEK_PROFILE, "+spe", "-spe", FEAT_MAX, "", 0},
230 {"ras", AArch64::AEK_RAS, "+ras", "-ras", FEAT_MAX, "", 0},
231 {"rasv2", AArch64::AEK_RASv2, "+rasv2", "-rasv2", FEAT_MAX, "", 0},
232 {"rcpc", AArch64::AEK_RCPC, "+rcpc", "-rcpc", FEAT_RCPC, "+rcpc", 230},
233 {"rcpc2", AArch64::AEK_NONE, {}, {}, FEAT_RCPC2, "+rcpc", 240},
234 {"rcpc3", AArch64::AEK_RCPC3, "+rcpc3", "-rcpc3", FEAT_MAX, "", 0},
235 {"rdm", AArch64::AEK_RDM, "+rdm", "-rdm", FEAT_RDM, "+rdm,+fp-armv8,+neon", 70},
236 {"rng", AArch64::AEK_RAND, "+rand", "-rand", FEAT_RNG, "+rand", 10},
237 {"rpres", AArch64::AEK_NONE, {}, {}, FEAT_RPRES, "", 300},
238 {"sb", AArch64::AEK_SB, "+sb", "-sb", FEAT_SB, "+sb", 470},
239 {"sha1", AArch64::AEK_NONE, {}, {}, FEAT_SHA1, "+fp-armv8,+neon", 120},
240 {"sha2", AArch64::AEK_SHA2, "+sha2", "-sha2", FEAT_SHA2, "+sha2,+fp-armv8,+neon", 130},
241 {"sha3", AArch64::AEK_SHA3, "+sha3", "-sha3", FEAT_SHA3, "+sha3,+sha2,+fp-armv8,+neon", 140},
242 {"simd", AArch64::AEK_SIMD, "+neon", "-neon", FEAT_SIMD, "+fp-armv8,+neon", 100},
243 {"sm4", AArch64::AEK_SM4, "+sm4", "-sm4", FEAT_SM4, "+sm4,+fp-armv8,+neon", 60},
244 {"sme-f16f16", AArch64::AEK_SMEF16F16, "+sme-f16f16", "-sme-f16f16", FEAT_MAX, "", 0},
245 {"sme-f64f64", AArch64::AEK_SMEF64F64, "+sme-f64f64", "-sme-f64f64", FEAT_SME_F64, "+sme,+sme-f64f64,+bf16", 560},
246 {"sme-i16i64", AArch64::AEK_SMEI16I64, "+sme-i16i64", "-sme-i16i64", FEAT_SME_I64, "+sme,+sme-i16i64,+bf16", 570},
247 {"sme", AArch64::AEK_SME, "+sme", "-sme", FEAT_SME, "+sme,+bf16", 430},
248 {"sme2", AArch64::AEK_SME2, "+sme2", "-sme2", FEAT_SME2, "+sme2,+sme,+bf16", 580},
249 {"sme2p1", AArch64::AEK_SME2p1, "+sme2p1", "-sme2p1", FEAT_MAX, "", 0},
250 {"ssbs", AArch64::AEK_SSBS, "+ssbs", "-ssbs", FEAT_SSBS, "", 490},
251 {"ssbs2", AArch64::AEK_NONE, {}, {}, FEAT_SSBS2, "+ssbs", 500},
252 {"sve-bf16", AArch64::AEK_NONE, {}, {}, FEAT_SVE_BF16, "+sve,+bf16,+fullfp16,+fp-armv8,+neon", 320},
253 {"sve-ebf16", AArch64::AEK_NONE, {}, {}, FEAT_SVE_EBF16, "+sve,+bf16,+fullfp16,+fp-armv8,+neon", 330},
254 {"sve-i8mm", AArch64::AEK_NONE, {}, {}, FEAT_SVE_I8MM, "+sve,+i8mm,+fullfp16,+fp-armv8,+neon", 340},
255 {"sve", AArch64::AEK_SVE, "+sve", "-sve", FEAT_SVE, "+sve,+fullfp16,+fp-armv8,+neon", 310},
256 {"sve2-aes", AArch64::AEK_SVE2AES, "+sve2-aes", "-sve2-aes", FEAT_SVE_AES, "+sve2,+sve,+sve2-aes,+fullfp16,+fp-armv8,+neon", 380},
257 {"sve2-bitperm", AArch64::AEK_SVE2BITPERM, "+sve2-bitperm", "-sve2-bitperm", FEAT_SVE_BITPERM, "+sve2,+sve,+sve2-bitperm,+fullfp16,+fp-armv8,+neon", 400},
258 {"sve2-pmull128", AArch64::AEK_NONE, {}, {}, FEAT_SVE_PMULL128, "+sve2,+sve,+sve2-aes,+fullfp16,+fp-armv8,+neon", 390},
259 {"sve2-sha3", AArch64::AEK_SVE2SHA3, "+sve2-sha3", "-sve2-sha3", FEAT_SVE_SHA3, "+sve2,+sve,+sve2-sha3,+fullfp16,+fp-armv8,+neon", 410},
260 {"sve2-sm4", AArch64::AEK_SVE2SM4, "+sve2-sm4", "-sve2-sm4", FEAT_SVE_SM4, "+sve2,+sve,+sve2-sm4,+fullfp16,+fp-armv8,+neon", 420},
261 {"sve2", AArch64::AEK_SVE2, "+sve2", "-sve2", FEAT_SVE2, "+sve2,+sve,+fullfp16,+fp-armv8,+neon", 370},
262 {"sve2p1", AArch64::AEK_SVE2p1, "+sve2p1", "-sve2p1", FEAT_MAX, "+sve2p1,+sve2,+sve,+fullfp16,+fp-armv8,+neon", 0},
263 {"the", AArch64::AEK_THE, "+the", "-the", FEAT_MAX, "", 0},
264 {"tme", AArch64::AEK_TME, "+tme", "-tme", FEAT_MAX, "", 0},
265 {"wfxt", AArch64::AEK_NONE, {}, {}, FEAT_WFXT, "+wfxt", 550},
266 {"gcs", AArch64::AEK_GCS, "+gcs", "-gcs", FEAT_MAX, "", 0},
267 // Special cases
269};
270// clang-format on
271
272enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
273
274// Information about a specific architecture, e.g. V8.1-A
275struct ArchInfo {
276 VersionTuple Version; // Architecture version, major + minor.
277 ArchProfile Profile; // Architecuture profile
278 StringRef Name; // Human readable name, e.g. "armv8.1-a"
279 StringRef ArchFeature; // Command line feature flag, e.g. +v8a
281 DefaultExts; // bitfield of default extensions ArchExtKind
282
283 bool operator==(const ArchInfo &Other) const {
284 return this->Name == Other.Name;
285 }
286 bool operator!=(const ArchInfo &Other) const {
287 return this->Name != Other.Name;
288 }
289
290 // Defines the following partial order, indicating when an architecture is
291 // a superset of another:
292 //
293 // v9.4a > v9.3a > v9.3a > v9.3a > v9a;
294 // v v v v v
295 // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
296 //
297 // v8r has no relation to anything. This is used to determine which
298 // features to enable for a given architecture. See
299 // AArch64TargetInfo::setFeatureEnabled.
300 bool implies(const ArchInfo &Other) const {
301 if (this->Profile != Other.Profile)
302 return false; // ARMV8R
303 if (this->Version.getMajor() == Other.Version.getMajor()) {
304 return this->Version > Other.Version;
305 }
306 if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
307 assert(this->Version.getMinor() && Other.Version.getMinor() &&
308 "AArch64::ArchInfo should have a minor version.");
309 return this->Version.getMinor().value_or(0) + 5 >=
310 Other.Version.getMinor().value_or(0);
311 }
312 return false;
313 }
314
315 // Return ArchFeature without the leading "+".
316 StringRef getSubArch() const { return ArchFeature.substr(1); }
317
318 // Search for ArchInfo by SubArch name
319 static std::optional<ArchInfo> findBySubArch(StringRef SubArch);
320};
321
322// clang-format off
323inline constexpr ArchInfo ARMV8A = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (
325inline constexpr ArchInfo ARMV8_1A = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts |
327inline constexpr ArchInfo ARMV8_2A = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts |
329inline constexpr ArchInfo ARMV8_3A = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts |
331inline constexpr ArchInfo ARMV8_4A = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts |
333inline constexpr ArchInfo ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)};
334inline constexpr ArchInfo ARMV8_6A = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts |
336inline constexpr ArchInfo ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)};
337inline constexpr ArchInfo ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts |
339inline constexpr ArchInfo ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts |
341inline constexpr ArchInfo ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts |
343inline constexpr ArchInfo ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts |
345inline constexpr ArchInfo ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)};
346inline constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts |
348inline constexpr ArchInfo ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
350// For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions.
351inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
354// clang-format on
355
356// The set of all architectures
357static constexpr std::array<const ArchInfo *, 16> ArchInfos = {
361};
362
363// Details of a specific CPU.
364struct CpuInfo {
365 StringRef Name; // Name, as written for -mcpu.
368 DefaultExtensions; // Default extensions for this CPU. These will be
369 // ORd with the architecture defaults.
370
375 return ImpliedExts;
376 }
377};
378
379inline constexpr CpuInfo CpuInfos[] = {
380 {"cortex-a34", ARMV8A,
383 {"cortex-a35", ARMV8A,
386 {"cortex-a53", ARMV8A,
389 {"cortex-a55", ARMV8_2A,
393 {"cortex-a510", ARMV9A,
399 {"cortex-a57", ARMV8A,
402 {"cortex-a65", ARMV8_2A,
406 {"cortex-a65ae", ARMV8_2A,
410 {"cortex-a72", ARMV8A,
413 {"cortex-a73", ARMV8A,
416 {"cortex-a75", ARMV8_2A,
420 {"cortex-a76", ARMV8_2A,
424 {"cortex-a76ae", ARMV8_2A,
428 {"cortex-a77", ARMV8_2A,
432 {"cortex-a78", ARMV8_2A,
437 {"cortex-a78c", ARMV8_2A,
443 {"cortex-a710", ARMV9A,
449 {"cortex-a715", ARMV9A,
456 {"cortex-r82", ARMV8R,
458 {"cortex-x1", ARMV8_2A,
463 {"cortex-x1c", ARMV8_2A,
468 {"cortex-x2", ARMV9A,
474 {"cortex-x3", ARMV9A,
481 {"neoverse-e1", ARMV8_2A,
485 {"neoverse-n1", ARMV8_2A,
490 {"neoverse-n2", ARMV8_5A,
497 {"neoverse-512tvb", ARMV8_4A,
504 {"neoverse-v1", ARMV8_4A,
511 {"neoverse-v2", ARMV9A,
517 {"cyclone", ARMV8A,
520 {"apple-a7", ARMV8A,
523 {"apple-a8", ARMV8A,
526 {"apple-a9", ARMV8A,
529 {"apple-a10", ARMV8A,
533 {"apple-a11", ARMV8_2A,
536 {"apple-a12", ARMV8_3A,
539 {"apple-a13", ARMV8_4A,
543 {"apple-a14", ARMV8_5A,
547 {"apple-a15", ARMV8_5A,
552 {"apple-a16", ARMV8_5A,
557 {"apple-m1", ARMV8_5A,
561 {"apple-m2", ARMV8_5A,
566 {"apple-s4", ARMV8_3A,
569 {"apple-s5", ARMV8_3A,
572 {"exynos-m3", ARMV8A,
575 {"exynos-m4", ARMV8_2A,
579 {"exynos-m5", ARMV8_2A,
583 {"falkor", ARMV8A,
587 {"saphira", ARMV8_3A,
590 {"kryo", ARMV8A,
593 {"thunderx2t99", ARMV8_1A,
596 {"thunderx3t110", ARMV8_3A,
599 {"thunderx", ARMV8A,
602 {"thunderxt88", ARMV8A,
605 {"thunderxt81", ARMV8A,
608 {"thunderxt83", ARMV8A,
611 {"tsv110", ARMV8_2A,
615 {"a64fx", ARMV8_2A,
619 {"carmel", ARMV8_2A,
622 {"ampere1", ARMV8_6A,
627 {"ampere1a", ARMV8_6A,
632};
633
634// An alias for a CPU.
635struct CpuAlias {
638};
639
640inline constexpr CpuAlias CpuAliases[] = {{"grace", "neoverse-v2"}};
641
644 std::vector<StringRef> &Features);
645
648
649// Information by Name
650std::optional<ArchInfo> getArchForCpu(StringRef CPU);
651
652// Parser
653std::optional<ArchInfo> parseArch(StringRef Arch);
654std::optional<ExtensionInfo> parseArchExtension(StringRef Extension);
655// Given the name of a CPU or alias, return the correponding CpuInfo.
656std::optional<CpuInfo> parseCpu(StringRef Name);
657// Used by target parser tests
659
660bool isX18ReservedByDefault(const Triple &TT);
661
662// For given feature names, return a bitmask corresponding to the entries of
663// AArch64::CPUFeatures. The values in CPUFeatures are not bitmasks
664// themselves, they are sequential (0, 1, 2, 3, ...).
666
668
669} // namespace AArch64
670} // namespace llvm
671
672#endif
This file defines the StringMap class.
std::string Name
static constexpr ImpliedExtsEntry ImpliedExts[]
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Defines the llvm::VersionTuple class, which represents a version in the form major[....
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:112
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:575
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
Represents a version number in the form major[.minor[.subminor[.build]]].
Definition: VersionTuple.h:31
unsigned getMajor() const
Retrieve the major version number.
Definition: VersionTuple.h:73
std::optional< unsigned > getMinor() const
Retrieve the minor version number, if provided.
Definition: VersionTuple.h:76
static constexpr std::array< const ArchInfo *, 16 > ArchInfos
void PrintSupportedExtensions(StringMap< StringRef > DescMap)
constexpr ArchInfo ARMV8_9A
bool isX18ReservedByDefault(const Triple &TT)
StringRef getArchExtFeature(StringRef ArchExt)
std::optional< ExtensionInfo > parseArchExtension(StringRef Extension)
constexpr ArchInfo ARMV8_3A
constexpr CpuInfo CpuInfos[]
constexpr ArchInfo ARMV8_7A
constexpr ArchInfo ARMV8R
std::optional< CpuInfo > parseCpu(StringRef Name)
constexpr ArchInfo ARMV8_4A
uint64_t getCpuSupportsMask(ArrayRef< StringRef > FeatureStrs)
constexpr ArchInfo ARMV9_3A
constexpr ArchInfo ARMV8_6A
constexpr ArchInfo ARMV8_5A
constexpr ArchInfo ARMV8A
constexpr ArchInfo ARMV9_1A
constexpr ArchInfo ARMV9A
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
std::optional< ArchInfo > parseArch(StringRef Arch)
constexpr ArchInfo ARMV9_2A
constexpr CpuAlias CpuAliases[]
constexpr ArchInfo ARMV9_4A
std::optional< ArchInfo > getArchForCpu(StringRef CPU)
StringRef resolveCPUAlias(StringRef CPU)
bool getExtensionFeatures(const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)
constexpr ArchInfo ARMV8_8A
constexpr ArchInfo ARMV8_1A
constexpr ArchInfo ARMV8_2A
Bitset< AEK_NUM_EXTENSIONS > ExtensionBitset
constexpr ExtensionInfo Extensions[]
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Other
Any other memory.
StringRef getSubArch() const
bool implies(const ArchInfo &Other) const
AArch64::ExtensionBitset DefaultExts
static std::optional< ArchInfo > findBySubArch(StringRef SubArch)
bool operator==(const ArchInfo &Other) const
bool operator!=(const ArchInfo &Other) const
AArch64::ExtensionBitset getImpliedExtensions() const
AArch64::ExtensionBitset DefaultExtensions
static constexpr unsigned MaxFMVPriority