LLVM 20.0.0git
AArch64TargetParser.h
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1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
15#define LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
16
17#include "llvm/ADT/ArrayRef.h"
18#include "llvm/ADT/Bitset.h"
20#include "llvm/ADT/StringMap.h"
21#include "llvm/ADT/StringRef.h"
25#include <array>
26#include <set>
27#include <vector>
28
29namespace llvm {
30
31class Triple;
32
33namespace AArch64 {
34
35struct ArchInfo;
36struct CpuInfo;
37
40
41static_assert(FEAT_MAX < 62,
42 "Number of features in CPUFeatures are limited to 62 entries");
43
44// Each ArchExtKind correponds directly to a possible -target-feature.
45#define EMIT_ARCHEXTKIND_ENUM
46#include "llvm/TargetParser/AArch64TargetParserDef.inc"
47
49
50// Represents an extension that can be enabled with -march=<arch>+<extension>.
51// Typically these correspond to Arm Architecture extensions, unlike
52// SubtargetFeature which may represent either an actual extension or some
53// internal LLVM property.
55 StringRef UserVisibleName; // Human readable name used in -march, -cpu
56 // and target func attribute, e.g. "profile".
57 std::optional<StringRef> Alias; // An alias for this extension, if one exists.
58 ArchExtKind ID; // Corresponding to the ArchExtKind, this
59 // extensions representation in the bitfield.
60 StringRef ArchFeatureName; // The feature name defined by the
61 // Architecture, e.g. FEAT_AdvSIMD.
62 StringRef Description; // The textual description of the extension.
63 StringRef PosTargetFeature; // -target-feature/-mattr enable string,
64 // e.g. "+spe".
65 StringRef NegTargetFeature; // -target-feature/-mattr disable string,
66 // e.g. "-spe".
67};
68
69#define EMIT_EXTENSIONS
70#include "llvm/TargetParser/AArch64TargetParserDef.inc"
71
72struct FMVInfo {
73 StringRef Name; // The target_version/target_clones spelling.
74 CPUFeatures FeatureBit; // Index of the bit in the FMV feature bitset.
75 FeatPriorities PriorityBit; // Index of the bit in the FMV priority bitset.
76 std::optional<ArchExtKind> ID; // The architecture extension to enable.
77 FMVInfo(StringRef Name, CPUFeatures FeatureBit, FeatPriorities PriorityBit,
78 std::optional<ArchExtKind> ID)
80};
81
82const std::vector<FMVInfo> &getFMVInfo();
83
84// Represents a dependency between two architecture extensions. Later is the
85// feature which was added to the architecture after Earlier, and expands the
86// functionality provided by it. If Later is enabled, then Earlier will also be
87// enabled. If Earlier is disabled, then Later will also be disabled.
89 ArchExtKind Earlier;
90 ArchExtKind Later;
91};
92
93#define EMIT_EXTENSION_DEPENDENCIES
94#include "llvm/TargetParser/AArch64TargetParserDef.inc"
95
96enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
97
98// Information about a specific architecture, e.g. V8.1-A
99struct ArchInfo {
100 VersionTuple Version; // Architecture version, major + minor.
101 ArchProfile Profile; // Architecuture profile
102 StringRef Name; // Name as supplied to -march e.g. "armv8.1-a"
103 StringRef ArchFeature; // Name as supplied to -target-feature, e.g. "+v8a"
105 DefaultExts; // bitfield of default extensions ArchExtKind
106
107 bool operator==(const ArchInfo &Other) const {
108 return this->Name == Other.Name;
109 }
110 bool operator!=(const ArchInfo &Other) const {
111 return this->Name != Other.Name;
112 }
113
114 // Defines the following partial order, indicating when an architecture is
115 // a superset of another:
116 //
117 // v9.6a > v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
118 // v v v v v
119 // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
120 //
121 // v8r has no relation to anything. This is used to determine which
122 // features to enable for a given architecture. See
123 // AArch64TargetInfo::setFeatureEnabled.
124 bool implies(const ArchInfo &Other) const {
125 if (this->Profile != Other.Profile)
126 return false; // ARMV8R
127 if (this->Version.getMajor() == Other.Version.getMajor()) {
128 return this->Version > Other.Version;
129 }
130 if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
131 assert(this->Version.getMinor() && Other.Version.getMinor() &&
132 "AArch64::ArchInfo should have a minor version.");
133 return this->Version.getMinor().value_or(0) + 5 >=
134 Other.Version.getMinor().value_or(0);
135 }
136 return false;
137 }
138
139 // True if this architecture is a superset of Other (including being equal to
140 // it).
141 bool is_superset(const ArchInfo &Other) const {
142 return (*this == Other) || implies(Other);
143 }
144
145 // Return ArchFeature without the leading "+".
146 StringRef getSubArch() const { return ArchFeature.substr(1); }
147
148 // Search for ArchInfo by SubArch name
149 static std::optional<ArchInfo> findBySubArch(StringRef SubArch);
150};
151
152#define EMIT_ARCHITECTURES
153#include "llvm/TargetParser/AArch64TargetParserDef.inc"
154
155// Details of a specific CPU.
156struct CpuInfo {
157 StringRef Name; // Name, as written for -mcpu.
160 DefaultExtensions; // Default extensions for this CPU.
161
163 return DefaultExtensions;
164 }
165};
166
167#define EMIT_CPU_INFO
168#include "llvm/TargetParser/AArch64TargetParserDef.inc"
169
171 // Set of extensions which are currently enabled.
173 // Set of extensions which have been enabled or disabled at any point. Used
174 // to avoid cluttering the cc1 command-line with lots of unneeded features.
176 // Base architecture version, which we need to know because some feature
177 // dependencies change depending on this.
179
180 ExtensionSet() : Enabled(), Touched(), BaseArch(nullptr) {}
181
182 // Enable the given architecture extension, and any other extensions it
183 // depends on. Does not change the base architecture, or follow dependencies
184 // between features which are only related by required arcitecture versions.
185 void enable(ArchExtKind E);
186
187 // Disable the given architecture extension, and any other extensions which
188 // depend on it. Does not change the base architecture, or follow
189 // dependencies between features which are only related by required
190 // arcitecture versions.
191 void disable(ArchExtKind E);
192
193 // Add default extensions for the given CPU. Records the base architecture,
194 // to later resolve dependencies which depend on it.
195 void addCPUDefaults(const CpuInfo &CPU);
196
197 // Add default extensions for the given architecture version. Records the
198 // base architecture, to later resolve dependencies which depend on it.
199 void addArchDefaults(const ArchInfo &Arch);
200
201 // Add or remove a feature based on a modifier string. The string must be of
202 // the form "<name>" to enable a feature or "no<name>" to disable it. This
203 // will also enable or disable any features as required by the dependencies
204 // between them.
205 bool parseModifier(StringRef Modifier, const bool AllowNoDashForm = false);
206
207 // Constructs a new ExtensionSet by toggling the corresponding bits for every
208 // feature in the \p Features list without expanding their dependencies. Used
209 // for reconstructing an ExtensionSet from the output of toLLVMFeatures().
210 // Features that are not recognized are pushed back to \p NonExtensions.
211 void reconstructFromParsedFeatures(const std::vector<std::string> &Features,
212 std::vector<std::string> &NonExtensions);
213
214 // Convert the set of enabled extension to an LLVM feature list, appending
215 // them to Features.
216 template <typename T> void toLLVMFeatureList(std::vector<T> &Features) const {
218 Features.emplace_back(T(BaseArch->ArchFeature));
219
220 for (const auto &E : Extensions) {
221 if (E.PosTargetFeature.empty() || !Touched.test(E.ID))
222 continue;
223 if (Enabled.test(E.ID))
224 Features.emplace_back(T(E.PosTargetFeature));
225 else
226 Features.emplace_back(T(E.NegTargetFeature));
227 }
228 }
229
230 void dump() const;
231};
232
233// Name alias.
234struct Alias {
237};
238
239#define EMIT_CPU_ALIAS
240#include "llvm/TargetParser/AArch64TargetParserDef.inc"
241
242const ExtensionInfo &getExtensionByID(ArchExtKind(ExtID));
243
246 std::vector<StringRef> &Features);
247
250
251// Information by Name
253
254// Parser
255const ArchInfo *parseArch(StringRef Arch);
256
257// Return the extension which has the given -target-feature name.
258std::optional<ExtensionInfo> targetFeatureToExtension(StringRef TargetFeature);
259
260// Parse a name as defined by the Extension class in tablegen.
261std::optional<ExtensionInfo> parseArchExtension(StringRef Extension);
262
263// Parse a name as defined by the FMVInfo class in tablegen.
264std::optional<FMVInfo> parseFMVExtension(StringRef Extension);
265
266// Given the name of a CPU or alias, return the correponding CpuInfo.
267std::optional<CpuInfo> parseCpu(StringRef Name);
268// Used by target parser tests
270
271bool isX18ReservedByDefault(const Triple &TT);
272
273// Return the priority for a given set of FMV features.
275
276// For given feature names, return a bitmask corresponding to the entries of
277// AArch64::CPUFeatures. The values in CPUFeatures are not bitmasks themselves,
278// they are sequential (0, 1, 2, 3, ...). The resulting bitmask is used at
279// runtime to test whether a certain FMV feature is available on the host.
281
283
284void printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames);
285
286} // namespace AArch64
287} // namespace llvm
288
289#endif
This file defines the StringMap class.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
std::string Name
#define T
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static cl::opt< std::set< SPIRV::Extension::Extension >, false, SPIRVExtensionsParser > Extensions("spirv-ext", cl::desc("Specify list of enabled SPIR-V extensions"))
This file contains some functions that are useful when dealing with strings.
Defines the llvm::VersionTuple class, which represents a version in the form major[....
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
constexpr bool test(unsigned I) const
Definition: Bitset.h:77
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:573
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:571
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:147
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
Represents a version number in the form major[.minor[.subminor[.build]]].
Definition: VersionTuple.h:29
unsigned getMajor() const
Retrieve the major version number.
Definition: VersionTuple.h:71
std::optional< unsigned > getMinor() const
Retrieve the minor version number, if provided.
Definition: VersionTuple.h:74
bool isX18ReservedByDefault(const Triple &TT)
StringRef getArchExtFeature(StringRef ArchExt)
std::optional< ExtensionInfo > parseArchExtension(StringRef Extension)
std::optional< CpuInfo > parseCpu(StringRef Name)
const ArchInfo * parseArch(StringRef Arch)
const ArchInfo * getArchForCpu(StringRef CPU)
uint64_t getFMVPriority(ArrayRef< StringRef > Features)
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
const ExtensionInfo & getExtensionByID(ArchExtKind(ExtID))
void printEnabledExtensions(const std::set< StringRef > &EnabledFeatureNames)
std::optional< FMVInfo > parseFMVExtension(StringRef Extension)
const std::vector< FMVInfo > & getFMVInfo()
std::optional< ExtensionInfo > targetFeatureToExtension(StringRef TargetFeature)
StringRef resolveCPUAlias(StringRef CPU)
bool getExtensionFeatures(const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)
uint64_t getCpuSupportsMask(ArrayRef< StringRef > Features)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Other
Any other memory.
bool is_superset(const ArchInfo &Other) const
StringRef getSubArch() const
bool implies(const ArchInfo &Other) const
AArch64::ExtensionBitset DefaultExts
static std::optional< ArchInfo > findBySubArch(StringRef SubArch)
bool operator==(const ArchInfo &Other) const
bool operator!=(const ArchInfo &Other) const
AArch64::ExtensionBitset getImpliedExtensions() const
AArch64::ExtensionBitset DefaultExtensions
std::optional< StringRef > Alias
bool parseModifier(StringRef Modifier, const bool AllowNoDashForm=false)
void addCPUDefaults(const CpuInfo &CPU)
void toLLVMFeatureList(std::vector< T > &Features) const
void addArchDefaults(const ArchInfo &Arch)
void reconstructFromParsedFeatures(const std::vector< std::string > &Features, std::vector< std::string > &NonExtensions)
std::optional< ArchExtKind > ID
FMVInfo(StringRef Name, CPUFeatures FeatureBit, FeatPriorities PriorityBit, std::optional< ArchExtKind > ID)