llvm::AArch64 Namespace Reference

Classes
struct	ArchInfo
struct	CpuAlias
struct	CpuInfo
struct	ExtensionInfo

Typedefs
using	ExtensionBitset = Bitset< AEK_NUM_EXTENSIONS >

Enumerations
enum	CPUFeatures {   FEAT_RNG , FEAT_FLAGM , FEAT_FLAGM2 , FEAT_FP16FML ,   FEAT_DOTPROD , FEAT_SM4 , FEAT_RDM , FEAT_LSE ,   FEAT_FP , FEAT_SIMD , FEAT_CRC , FEAT_SHA1 ,   FEAT_SHA2 , FEAT_SHA3 , FEAT_AES , FEAT_PMULL ,   FEAT_FP16 , FEAT_DIT , FEAT_DPB , FEAT_DPB2 ,   FEAT_JSCVT , FEAT_FCMA , FEAT_RCPC , FEAT_RCPC2 ,   FEAT_FRINTTS , FEAT_DGH , FEAT_I8MM , FEAT_BF16 ,   FEAT_EBF16 , FEAT_RPRES , FEAT_SVE , FEAT_SVE_BF16 ,   FEAT_SVE_EBF16 , FEAT_SVE_I8MM , FEAT_SVE_F32MM , FEAT_SVE_F64MM ,   FEAT_SVE2 , FEAT_SVE_AES , FEAT_SVE_PMULL128 , FEAT_SVE_BITPERM ,   FEAT_SVE_SHA3 , FEAT_SVE_SM4 , FEAT_SME , FEAT_MEMTAG ,   FEAT_MEMTAG2 , FEAT_MEMTAG3 , FEAT_SB , FEAT_PREDRES ,   FEAT_SSBS , FEAT_SSBS2 , FEAT_BTI , FEAT_LS64 ,   FEAT_LS64_V , FEAT_LS64_ACCDATA , FEAT_WFXT , FEAT_SME_F64 ,   FEAT_SME_I64 , FEAT_SME2 , FEAT_MAX }
enum	ArchExtKind : unsigned {   AEK_NONE = 1 , AEK_CRC = 2 , AEK_CRYPTO = 3 , AEK_FP = 4 ,   AEK_SIMD = 5 , AEK_FP16 = 6 , AEK_PROFILE = 7 , AEK_RAS = 8 ,   AEK_LSE = 9 , AEK_SVE = 10 , AEK_DOTPROD = 11 , AEK_RCPC = 12 ,   AEK_RDM = 13 , AEK_SM4 = 14 , AEK_SHA3 = 15 , AEK_SHA2 = 16 ,   AEK_AES = 17 , AEK_FP16FML = 18 , AEK_RAND = 19 , AEK_MTE = 20 ,   AEK_SSBS = 21 , AEK_SB = 22 , AEK_PREDRES = 23 , AEK_SVE2 = 24 ,   AEK_SVE2AES = 25 , AEK_SVE2SM4 = 26 , AEK_SVE2SHA3 = 27 , AEK_SVE2BITPERM = 28 ,   AEK_TME = 29 , AEK_BF16 = 30 , AEK_I8MM = 31 , AEK_F32MM = 32 ,   AEK_F64MM = 33 , AEK_LS64 = 34 , AEK_BRBE = 35 , AEK_PAUTH = 36 ,   AEK_FLAGM = 37 , AEK_SME = 38 , AEK_SMEF64F64 = 39 , AEK_SMEI16I64 = 40 ,   AEK_HBC = 41 , AEK_MOPS = 42 , AEK_PERFMON = 43 , AEK_SME2 = 44 ,   AEK_SVE2p1 = 45 , AEK_SME2p1 = 46 , AEK_B16B16 = 47 , AEK_SMEF16F16 = 48 ,   AEK_CSSC = 49 , AEK_RCPC3 = 50 , AEK_THE = 51 , AEK_D128 = 52 ,   AEK_LSE128 = 53 , AEK_SPECRES2 = 54 , AEK_RASv2 = 55 , AEK_ITE = 56 ,   AEK_GCS = 57 , AEK_NUM_EXTENSIONS = AEK_GCS + 1 }
enum	ArchProfile { AProfile = 'A' , RProfile = 'R' , InvalidProfile = '?' }
enum	ElementSizeType {   ElementSizeMask = TSFLAG_ELEMENT_SIZE_TYPE(0x7) , ElementSizeNone = TSFLAG_ELEMENT_SIZE_TYPE(0x0) , ElementSizeB = TSFLAG_ELEMENT_SIZE_TYPE(0x1) , ElementSizeH = TSFLAG_ELEMENT_SIZE_TYPE(0x2) ,   ElementSizeS = TSFLAG_ELEMENT_SIZE_TYPE(0x3) , ElementSizeD = TSFLAG_ELEMENT_SIZE_TYPE(0x4) }
enum	DestructiveInstType {   DestructiveInstTypeMask = TSFLAG_DESTRUCTIVE_INST_TYPE(0xf) , NotDestructive = TSFLAG_DESTRUCTIVE_INST_TYPE(0x0) , DestructiveOther = TSFLAG_DESTRUCTIVE_INST_TYPE(0x1) , DestructiveUnary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x2) ,   DestructiveBinaryImm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x3) , DestructiveBinaryShImmUnpred = TSFLAG_DESTRUCTIVE_INST_TYPE(0x4) , DestructiveBinary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x5) , DestructiveBinaryComm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x6) ,   DestructiveBinaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x7) , DestructiveTernaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x8) , DestructiveUnaryPassthru = TSFLAG_DESTRUCTIVE_INST_TYPE(0x9) }
enum	FalseLaneType { FalseLanesMask = TSFLAG_FALSE_LANE_TYPE(0x3) , FalseLanesZero = TSFLAG_FALSE_LANE_TYPE(0x1) , FalseLanesUndef = TSFLAG_FALSE_LANE_TYPE(0x2) }
enum	SMEMatrixType {   SMEMatrixTypeMask = TSFLAG_SME_MATRIX_TYPE(0x7) , SMEMatrixNone = TSFLAG_SME_MATRIX_TYPE(0x0) , SMEMatrixTileB = TSFLAG_SME_MATRIX_TYPE(0x1) , SMEMatrixTileH = TSFLAG_SME_MATRIX_TYPE(0x2) ,   SMEMatrixTileS = TSFLAG_SME_MATRIX_TYPE(0x3) , SMEMatrixTileD = TSFLAG_SME_MATRIX_TYPE(0x4) , SMEMatrixTileQ = TSFLAG_SME_MATRIX_TYPE(0x5) , SMEMatrixArray = TSFLAG_SME_MATRIX_TYPE(0x6) }
enum	Rounding {   RN = 0 , RP = 1 , RM = 2 , RZ = 3 ,   rmMask = 3 }
	Possible values of current rounding mode, which is specified in bits 23:22 of FPCR. More...
enum	Fixups {   fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind , fixup_aarch64_pcrel_adrp_imm21 , fixup_aarch64_add_imm12 , fixup_aarch64_ldst_imm12_scale1 ,   fixup_aarch64_ldst_imm12_scale2 , fixup_aarch64_ldst_imm12_scale4 , fixup_aarch64_ldst_imm12_scale8 , fixup_aarch64_ldst_imm12_scale16 ,   fixup_aarch64_ldr_pcrel_imm19 , fixup_aarch64_movw , fixup_aarch64_pcrel_branch14 , fixup_aarch64_pcrel_branch19 ,   fixup_aarch64_pcrel_branch26 , fixup_aarch64_pcrel_call26 , LastTargetFixupKind , NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind }
enum	OperandType { OPERAND_IMPLICIT_IMM_0 = MCOI::OPERAND_FIRST_TARGET }

Functions
bool	getExtensionFeatures (const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)
StringRef	getArchExtFeature (StringRef ArchExt)
StringRef	resolveCPUAlias (StringRef CPU)
std::optional< ArchInfo >	getArchForCpu (StringRef CPU)
std::optional< ArchInfo >	parseArch (StringRef Arch)
std::optional< ExtensionInfo >	parseArchExtension (StringRef Extension)
std::optional< CpuInfo >	parseCpu (StringRef Name)
void	fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)
bool	isX18ReservedByDefault (const Triple &TT)
uint64_t	getCpuSupportsMask (ArrayRef< StringRef > FeatureStrs)
void	PrintSupportedExtensions (StringMap< StringRef > DescMap)
int	getSVEPseudoMap (uint16_t Opcode)
int	getSVERevInstr (uint16_t Opcode)
int	getSVENonRevInstr (uint16_t Opcode)
int	getSMEPseudoMap (uint16_t Opcode)
ArrayRef< MCPhysReg >	getGPRArgRegs ()
ArrayRef< MCPhysReg >	getFPRArgRegs ()
FastISel *	createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)

Variables
constexpr ExtensionInfo	Extensions []
constexpr ArchInfo	ARMV8A
constexpr ArchInfo	ARMV8_1A
constexpr ArchInfo	ARMV8_2A
constexpr ArchInfo	ARMV8_3A
constexpr ArchInfo	ARMV8_4A
constexpr ArchInfo	ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)}
constexpr ArchInfo	ARMV8_6A
constexpr ArchInfo	ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)}
constexpr ArchInfo	ARMV8_8A
constexpr ArchInfo	ARMV8_9A
constexpr ArchInfo	ARMV9A
constexpr ArchInfo	ARMV9_1A
constexpr ArchInfo	ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)}
constexpr ArchInfo	ARMV9_3A
constexpr ArchInfo	ARMV9_4A
constexpr ArchInfo	ARMV8R
static constexpr std::array< const ArchInfo *, 16 >	ArchInfos
constexpr CpuInfo	CpuInfos []
constexpr CpuAlias	CpuAliases [] = {{"grace", "neoverse-v2"}}
static const uint64_t	InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)
static const uint64_t	InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)
const unsigned	RoundingBitsPos = 22
static constexpr unsigned	SVEBitsPerBlock = 128
static constexpr unsigned	SVEMaxBitsPerVector = 2048

Typedef Documentation

ExtensionBitset

using llvm::AArch64::ExtensionBitset = typedef Bitset<AEK_NUM_EXTENSIONS>

Definition at line 161 of file AArch64TargetParser.h.

Enumeration Type Documentation

ArchExtKind

enum llvm::AArch64::ArchExtKind : unsigned

Enumerator
AEK_NONE
AEK_CRC
AEK_CRYPTO
AEK_FP
AEK_SIMD
AEK_FP16
AEK_PROFILE
AEK_RAS
AEK_LSE
AEK_SVE
AEK_DOTPROD
AEK_RCPC
AEK_RDM
AEK_SM4
AEK_SHA3
AEK_SHA2
AEK_AES
AEK_FP16FML
AEK_RAND
AEK_MTE
AEK_SSBS
AEK_SB
AEK_PREDRES
AEK_SVE2
AEK_SVE2AES
AEK_SVE2SM4
AEK_SVE2SHA3
AEK_SVE2BITPERM
AEK_TME
AEK_BF16
AEK_I8MM
AEK_F32MM
AEK_F64MM
AEK_LS64
AEK_BRBE
AEK_PAUTH
AEK_FLAGM
AEK_SME
AEK_SMEF64F64
AEK_SMEI16I64
AEK_HBC
AEK_MOPS
AEK_PERFMON
AEK_SME2
AEK_SVE2p1
AEK_SME2p1
AEK_B16B16
AEK_SMEF16F16
AEK_CSSC
AEK_RCPC3
AEK_THE
AEK_D128
AEK_LSE128
AEK_SPECRES2
AEK_RASv2
AEK_ITE
AEK_GCS
AEK_NUM_EXTENSIONS

Definition at line 101 of file AArch64TargetParser.h.

ArchProfile

enum llvm::AArch64::ArchProfile

Enumerator
AProfile
RProfile
InvalidProfile

Definition at line 272 of file AArch64TargetParser.h.

CPUFeatures

enum llvm::AArch64::CPUFeatures

Enumerator
FEAT_RNG
FEAT_FLAGM
FEAT_FLAGM2
FEAT_FP16FML
FEAT_DOTPROD
FEAT_SM4
FEAT_RDM
FEAT_LSE
FEAT_FP
FEAT_SIMD
FEAT_CRC
FEAT_SHA1
FEAT_SHA2
FEAT_SHA3
FEAT_AES
FEAT_PMULL
FEAT_FP16
FEAT_DIT
FEAT_DPB
FEAT_DPB2
FEAT_JSCVT
FEAT_FCMA
FEAT_RCPC
FEAT_RCPC2
FEAT_FRINTTS
FEAT_DGH
FEAT_I8MM
FEAT_BF16
FEAT_EBF16
FEAT_RPRES
FEAT_SVE
FEAT_SVE_BF16
FEAT_SVE_EBF16
FEAT_SVE_I8MM
FEAT_SVE_F32MM
FEAT_SVE_F64MM
FEAT_SVE2
FEAT_SVE_AES
FEAT_SVE_PMULL128
FEAT_SVE_BITPERM
FEAT_SVE_SHA3
FEAT_SVE_SM4
FEAT_SME
FEAT_MEMTAG
FEAT_MEMTAG2
FEAT_MEMTAG3
FEAT_SB
FEAT_PREDRES
FEAT_SSBS
FEAT_SSBS2
FEAT_BTI
FEAT_LS64
FEAT_LS64_V
FEAT_LS64_ACCDATA
FEAT_WFXT
FEAT_SME_F64
FEAT_SME_I64
FEAT_SME2
FEAT_MAX

Definition at line 33 of file AArch64TargetParser.h.

DestructiveInstType

enum llvm::AArch64::DestructiveInstType

Enumerator
DestructiveInstTypeMask
NotDestructive
DestructiveOther
DestructiveUnary
DestructiveBinaryImm
DestructiveBinaryShImmUnpred
DestructiveBinary
DestructiveBinaryComm
DestructiveBinaryCommWithRev
DestructiveTernaryCommWithRev
DestructiveUnaryPassthru

Definition at line 601 of file AArch64InstrInfo.h.

ElementSizeType

enum llvm::AArch64::ElementSizeType

Enumerator
ElementSizeMask
ElementSizeNone
ElementSizeB
ElementSizeH
ElementSizeS
ElementSizeD

Definition at line 592 of file AArch64InstrInfo.h.

FalseLaneType

enum llvm::AArch64::FalseLaneType

Enumerator
FalseLanesMask
FalseLanesZero
FalseLanesUndef

Definition at line 615 of file AArch64InstrInfo.h.

Fixups

enum llvm::AArch64::Fixups

Enumerator
fixup_aarch64_pcrel_adr_imm21
fixup_aarch64_pcrel_adrp_imm21
fixup_aarch64_add_imm12
fixup_aarch64_ldst_imm12_scale1
fixup_aarch64_ldst_imm12_scale2
fixup_aarch64_ldst_imm12_scale4
fixup_aarch64_ldst_imm12_scale8
fixup_aarch64_ldst_imm12_scale16
fixup_aarch64_ldr_pcrel_imm19
fixup_aarch64_movw
fixup_aarch64_pcrel_branch14
fixup_aarch64_pcrel_branch19
fixup_aarch64_pcrel_branch26
fixup_aarch64_pcrel_call26
LastTargetFixupKind
NumTargetFixupKinds

Definition at line 17 of file AArch64FixupKinds.h.

OperandType

enum llvm::AArch64::OperandType

Enumerator
OPERAND_IMPLICIT_IMM_0

Definition at line 72 of file AArch64MCTargetDesc.h.

Rounding

enum llvm::AArch64::Rounding

Possible values of current rounding mode, which is specified in bits 23:22 of FPCR.

Enumerator
RN
RP
RM
RZ
rmMask

Definition at line 492 of file AArch64ISelLowering.h.

SMEMatrixType

enum llvm::AArch64::SMEMatrixType

Enumerator
SMEMatrixTypeMask
SMEMatrixNone
SMEMatrixTileB
SMEMatrixTileH
SMEMatrixTileS
SMEMatrixTileD
SMEMatrixTileQ
SMEMatrixArray

Definition at line 625 of file AArch64InstrInfo.h.

Function Documentation

createFastISel()

FastISel * llvm::AArch64::createFastISel	(	FunctionLoweringInfo &	funcInfo,
		const TargetLibraryInfo *	libInfo
	)

Definition at line 5186 of file AArch64FastISel.cpp.

References llvm::FunctionLoweringInfo::Fn, llvm::SMEAttrs::hasStreamingCompatibleInterface(), llvm::SMEAttrs::hasStreamingInterfaceOrBody(), and llvm::SMEAttrs::hasZAState().

Referenced by llvm::AArch64TargetLowering::createFastISel().

fillValidCPUArchList()

void llvm::AArch64::fillValidCPUArchList

(

SmallVectorImpl< StringRef > &

Values

)

Definition at line 92 of file AArch64TargetParser.cpp.

References llvm::CallingConv::C, CpuAliases, CpuInfos, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

getArchExtFeature()

StringRef llvm::AArch64::getArchExtFeature

(

StringRef

ArchExt

)

Definition at line 77 of file AArch64TargetParser.cpp.

References Extensions, llvm::StringRef::startswith(), and llvm::StringRef::substr().

getArchForCpu()

std::optional< AArch64::ArchInfo > llvm::AArch64::getArchForCpu

(

StringRef

CPU

)

Definition at line 29 of file AArch64TargetParser.cpp.

References ARMV8A, and parseCpu().

getCpuSupportsMask()

uint64_t llvm::AArch64::getCpuSupportsMask

(

ArrayRef< StringRef >

FeatureStrs

)

Definition at line 47 of file AArch64TargetParser.cpp.

References E, and Extensions.

getExtensionFeatures()

bool llvm::AArch64::getExtensionFeatures	(	const AArch64::ExtensionBitset &	Extensions,
		std::vector< StringRef > &	Features
	)

Definition at line 59 of file AArch64TargetParser.cpp.

References E, Extensions, and llvm::Bitset< NumBits >::test().

getFPRArgRegs()

ArrayRef< MCPhysReg > llvm::AArch64::getFPRArgRegs

(

)

Definition at line 156 of file AArch64ISelLowering.cpp.

References FPRArgRegs.

getGPRArgRegs()

ArrayRef< MCPhysReg > llvm::AArch64::getGPRArgRegs

(

)

Definition at line 154 of file AArch64ISelLowering.cpp.

References GPRArgRegs.

getSMEPseudoMap()

int llvm::AArch64::getSMEPseudoMap

(

uint16_t

Opcode

)

Referenced by llvm::AArch64TargetLowering::EmitInstrWithCustomInserter().

getSVENonRevInstr()

int llvm::AArch64::getSVENonRevInstr

(

uint16_t

Opcode

)

getSVEPseudoMap()

int llvm::AArch64::getSVEPseudoMap

(

uint16_t

Opcode

)

getSVERevInstr()

int llvm::AArch64::getSVERevInstr

(

uint16_t

Opcode

)

isX18ReservedByDefault()

bool llvm::AArch64::isX18ReservedByDefault

(

const Triple &

TT

)

Definition at line 100 of file AArch64TargetParser.cpp.

Referenced by llvm::AArch64Subtarget::AArch64Subtarget().

parseArch()

std::optional< AArch64::ArchInfo > llvm::AArch64::parseArch

(

StringRef

Arch

)

Definition at line 106 of file AArch64TargetParser.cpp.

References A, ArchInfos, checkArchVersion(), llvm::ARM::getArchSynonym(), and llvm::ARM::getCanonicalArchName().

parseArchExtension()

std::optional< AArch64::ExtensionInfo > llvm::AArch64::parseArchExtension

(

StringRef

Extension

)

Definition at line 119 of file AArch64TargetParser.cpp.

References A, and Extensions.

parseCpu()

std::optional< AArch64::CpuInfo > llvm::AArch64::parseCpu

(

StringRef

Name

)

Definition at line 127 of file AArch64TargetParser.cpp.

References llvm::CallingConv::C, CpuInfos, Name, and resolveCPUAlias().

Referenced by getArchForCpu().

PrintSupportedExtensions()

void llvm::AArch64::PrintSupportedExtensions

(

StringMap< StringRef >

DescMap

)

Definition at line 139 of file AArch64TargetParser.cpp.

References llvm::StringMapImpl::empty(), Extensions, llvm::format(), llvm::left_justify(), and llvm::outs().

resolveCPUAlias()

StringRef llvm::AArch64::resolveCPUAlias

(

StringRef

CPU

)

Definition at line 70 of file AArch64TargetParser.cpp.

References A, CpuAliases, and Name.

Referenced by parseCpu().

Variable Documentation

ArchInfos

constexpr std::array<const ArchInfo *, 16> llvm::AArch64::ArchInfos

staticconstexpr

Initial value:

= {
    &ARMV8A,   &ARMV8_1A, &ARMV8_2A, &ARMV8_3A, &ARMV8_4A, &ARMV8_5A,
    &ARMV8_6A, &ARMV8_7A, &ARMV8_8A, &ARMV8_9A, &ARMV9A, &ARMV9_1A,
    &ARMV9_2A, &ARMV9_3A, &ARMV9_4A, &ARMV8R,
}

Definition at line 357 of file AArch64TargetParser.h.

Referenced by llvm::AArch64::ArchInfo::findBySubArch(), and parseArch().

ARMV8_1A

constexpr ArchInfo llvm::AArch64::ARMV8_1A

inlineconstexpr

Initial value:

= { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_LSE, AArch64::AEK_RDM}))}

Definition at line 325 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_2A

constexpr ArchInfo llvm::AArch64::ARMV8_2A

inlineconstexpr

Initial value:

= { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_RAS}))}

Definition at line 327 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_3A

constexpr ArchInfo llvm::AArch64::ARMV8_3A

inlineconstexpr

Initial value:

= { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_RCPC}))}

Definition at line 329 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_4A

constexpr ArchInfo llvm::AArch64::ARMV8_4A

inlineconstexpr

Initial value:

= { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_DOTPROD}))}

Definition at line 331 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_5A

constexpr ArchInfo llvm::AArch64::ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)}

inlineconstexpr

Definition at line 333 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_6A

constexpr ArchInfo llvm::AArch64::ARMV8_6A

inlineconstexpr

Initial value:

= { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_BF16, AArch64::AEK_I8MM}))}

Definition at line 334 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_7A

constexpr ArchInfo llvm::AArch64::ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)}

inlineconstexpr

Definition at line 336 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_8A

constexpr ArchInfo llvm::AArch64::ARMV8_8A

inlineconstexpr

Initial value:

= { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))}

Definition at line 337 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8_9A

constexpr ArchInfo llvm::AArch64::ARMV8_9A

inlineconstexpr

Initial value:

= { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))}

Definition at line 339 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV8A

constexpr ArchInfo llvm::AArch64::ARMV8A

inlineconstexpr

Initial value:

= { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (
                                        AArch64::ExtensionBitset({AArch64::AEK_FP, AArch64::AEK_SIMD})), }

Definition at line 323 of file AArch64TargetParser.h.

Referenced by getArchForCpu().

ARMV8R

constexpr ArchInfo llvm::AArch64::ARMV8R

inlineconstexpr

Initial value:

= { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_SSBS,
                                        AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_SB}).flip(AArch64::AEK_LSE))}

Definition at line 351 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV9_1A

constexpr ArchInfo llvm::AArch64::ARMV9_1A

inlineconstexpr

Initial value:

= { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_BF16, AArch64::AEK_I8MM}))}

Definition at line 343 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV9_2A

constexpr ArchInfo llvm::AArch64::ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)}

inlineconstexpr

Definition at line 345 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV9_3A

constexpr ArchInfo llvm::AArch64::ARMV9_3A

inlineconstexpr

Initial value:

= { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))}

Definition at line 346 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV9_4A

constexpr ArchInfo llvm::AArch64::ARMV9_4A

inlineconstexpr

Initial value:

= { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))}

Definition at line 348 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

ARMV9A

constexpr ArchInfo llvm::AArch64::ARMV9A

inlineconstexpr

Initial value:

= { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts |
                                        AArch64::ExtensionBitset({AArch64::AEK_FP16, AArch64::AEK_SVE, AArch64::AEK_SVE2}))}

Definition at line 341 of file AArch64TargetParser.h.

Referenced by ExpandCryptoAEK().

CpuAliases

constexpr CpuAlias llvm::AArch64::CpuAliases[] = {{"grace", "neoverse-v2"}}

inlineconstexpr

Definition at line 640 of file AArch64TargetParser.h.

Referenced by fillValidCPUArchList(), and resolveCPUAlias().

CpuInfos

constexpr CpuInfo llvm::AArch64::CpuInfos[]

inlineconstexpr

Definition at line 379 of file AArch64TargetParser.h.

Referenced by fillValidCPUArchList(), and parseCpu().

Extensions

constexpr ExtensionInfo llvm::AArch64::Extensions[]

inlineconstexpr

Definition at line 186 of file AArch64TargetParser.h.

Referenced by getArchExtFeature(), getCpuSupportsMask(), getExtensionFeatures(), parseArchExtension(), and PrintSupportedExtensions().

InstrFlagIsPTestLike

const uint64_t llvm::AArch64::InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)

static

Definition at line 623 of file AArch64InstrInfo.h.

Referenced by llvm::AArch64InstrInfo::isPTestLikeOpcode().

InstrFlagIsWhile

const uint64_t llvm::AArch64::InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)

static

Definition at line 622 of file AArch64InstrInfo.h.

Referenced by llvm::AArch64InstrInfo::isWhileOpcode().

RoundingBitsPos

const unsigned llvm::AArch64::RoundingBitsPos = 22

Definition at line 501 of file AArch64ISelLowering.h.

SVEBitsPerBlock

constexpr unsigned llvm::AArch64::SVEBitsPerBlock = 128

staticconstexpr

Definition at line 858 of file AArch64BaseInfo.h.

Referenced by findMoreOptimalIndexType(), llvm::AArch64TTIImpl::getCastInstrCost(), getPackedVectorTypeFromPredicateType(), instCombineSVECmpNE(), isAllActivePredicate(), isPackedVectorType(), LowerSVEIntrinsicEXT(), performGatherLoadCombine(), performLD1Combine(), performScatterStoreCombine(), and llvm::AArch64Subtarget::useSVEForFixedLengthVectors().

SVEMaxBitsPerVector

constexpr unsigned llvm::AArch64::SVEMaxBitsPerVector = 2048

staticconstexpr

Definition at line 859 of file AArch64BaseInfo.h.

Referenced by llvm::AArch64InstrInfo::getMemOpInfo().