LLVM
15.0.0git
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#include "AArch64.h"
#include "AArch64RegisterInfo.h"
#include "llvm/ADT/Optional.h"
#include "llvm/CodeGen/MachineCombinerPattern.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/Support/TypeSize.h"
#include "AArch64GenInstrInfo.inc"
Go to the source code of this file.
Classes | |
class | llvm::AArch64InstrInfo |
struct | llvm::UsedNZCV |
Namespaces | |
llvm | |
This is an optimization pass for GlobalISel generic memory operations. | |
llvm::AArch64 | |
Macros | |
#define | GET_INSTRINFO_HEADER |
#define | FALKOR_STRIDED_ACCESS_MD "falkor.strided.access" |
#define | GET_INSTRINFO_HELPER_DECLS |
#define | TSFLAG_ELEMENT_SIZE_TYPE(X) (X) |
#define | TSFLAG_DESTRUCTIVE_INST_TYPE(X) ((X) << 3) |
#define | TSFLAG_FALSE_LANE_TYPE(X) ((X) << 7) |
#define | TSFLAG_INSTR_FLAGS(X) ((X) << 9) |
Functions | |
Optional< UsedNZCV > | llvm::examineCFlagsUse (MachineInstr &MI, MachineInstr &CmpInstr, const TargetRegisterInfo &TRI, SmallVectorImpl< MachineInstr * > *CCUseInstrs=nullptr) |
bool | llvm::isNZCVTouchedInInstructionRange (const MachineInstr &DefMI, const MachineInstr &UseMI, const TargetRegisterInfo *TRI) |
Return true if there is an instruction /after/ DefMI and before UseMI which either reads or clobbers NZCV. More... | |
MCCFIInstruction | llvm::createDefCFA (const TargetRegisterInfo &TRI, unsigned FrameReg, unsigned Reg, const StackOffset &Offset, bool LastAdjustmentWasScalable=true) |
MCCFIInstruction | llvm::createCFAOffset (const TargetRegisterInfo &MRI, unsigned Reg, const StackOffset &OffsetFromDefCFA) |
void | llvm::emitFrameOffset (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, StackOffset Offset, const TargetInstrInfo *TII, MachineInstr::MIFlag=MachineInstr::NoFlags, bool SetNZCV=false, bool NeedsWinCFI=false, bool *HasWinCFI=nullptr, bool EmitCFAOffset=false, StackOffset InitialOffset={}, unsigned FrameReg=AArch64::SP) |
emitFrameOffset - Emit instructions as needed to set DestReg to SrcReg plus Offset. More... | |
bool | llvm::rewriteAArch64FrameIndex (MachineInstr &MI, unsigned FrameRegIdx, unsigned FrameReg, StackOffset &Offset, const AArch64InstrInfo *TII) |
rewriteAArch64FrameIndex - Rewrite MI to access 'Offset' bytes from the FP. More... | |
int | llvm::isAArch64FrameOffsetLegal (const MachineInstr &MI, StackOffset &Offset, bool *OutUseUnscaledOp=nullptr, unsigned *OutUnscaledOp=nullptr, int64_t *EmittableOffset=nullptr) |
Check if the Offset is a valid frame offset for MI . More... | |
static bool | llvm::isUncondBranchOpcode (int Opc) |
static bool | llvm::isCondBranchOpcode (int Opc) |
static bool | llvm::isIndirectBranchOpcode (int Opc) |
static bool | llvm::isPTrueOpcode (unsigned Opc) |
unsigned | llvm::getBLRCallOpcode (const MachineFunction &MF) |
Return opcode to be used for indirect calls. More... | |
int | llvm::AArch64::getSVEPseudoMap (uint16_t Opcode) |
int | llvm::AArch64::getSVERevInstr (uint16_t Opcode) |
int | llvm::AArch64::getSVENonRevInstr (uint16_t Opcode) |
Variables | |
static const MachineMemOperand::Flags | llvm::MOSuppressPair |
static const MachineMemOperand::Flags | llvm::MOStridedAccess |
static const uint64_t | llvm::AArch64::InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1) |
static const uint64_t | llvm::AArch64::InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2) |
#define FALKOR_STRIDED_ACCESS_MD "falkor.strided.access" |
Definition at line 35 of file AArch64InstrInfo.h.
#define GET_INSTRINFO_HEADER |
Definition at line 23 of file AArch64InstrInfo.h.
#define GET_INSTRINFO_HELPER_DECLS |
Definition at line 336 of file AArch64InstrInfo.h.
Definition at line 507 of file AArch64InstrInfo.h.
Definition at line 506 of file AArch64InstrInfo.h.
Definition at line 508 of file AArch64InstrInfo.h.
Definition at line 509 of file AArch64InstrInfo.h.