LLVM  12.0.0git
Go to the documentation of this file.
1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl --*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the AArch64 implementation of the MRegisterInfo class.
10 //
11 //===----------------------------------------------------------------------===//
17 #include "AArch64GenRegisterInfo.inc"
19 namespace llvm {
21 class MachineFunction;
22 class RegScavenger;
23 class TargetRegisterClass;
24 class Triple;
27  const Triple &TT;
29 public:
30  AArch64RegisterInfo(const Triple &TT);
32  // FIXME: This should be tablegen'd like getDwarfRegNum is
33  int getSEHRegNum(unsigned i) const {
34  return getEncodingValue(i);
35  }
37  bool isReservedReg(const MachineFunction &MF, MCRegister Reg) const;
38  bool isAnyArgRegReserved(const MachineFunction &MF) const;
39  void emitReservedArgRegCallError(const MachineFunction &MF) const;
43  const uint32_t **Mask) const;
45  /// Code Generation virtual methods...
46  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
47  const MCPhysReg *getDarwinCalleeSavedRegs(const MachineFunction *MF) const;
48  const MCPhysReg *
51  CallingConv::ID) const override;
53  CallingConv::ID) const;
55  unsigned getCSRFirstUseCost() const override {
56  // The cost will be compared against BlockFrequency where entry has the
57  // value of 1 << 14. A value of 5 will choose to spill or split really
58  // cold path instead of using a callee-saved register.
59  return 5;
60  }
62  const TargetRegisterClass *
64  unsigned Idx) const override;
66  // Calls involved in thread-local variable lookup save more registers than
67  // normal calls, so they need a different mask to represent this.
68  const uint32_t *getTLSCallPreservedMask() const;
70  // Funclets on ARM64 Windows don't preserve any registers.
71  const uint32_t *getNoPreservedMask() const override;
73  /// getThisReturnPreservedMask - Returns a call preserved mask specific to the
74  /// case that 'returned' is on an i64 first argument if the calling convention
75  /// is one that can (partially) model this attribute with a preserved mask
76  /// (i.e. it is a calling convention that uses the same register for the first
77  /// i64 argument and an i64 return value)
78  ///
79  /// Should return NULL in the case that the calling convention does not have
80  /// this property
82  CallingConv::ID) const;
84  /// Stack probing calls preserve different CSRs to the normal CC.
87  BitVector getReservedRegs(const MachineFunction &MF) const override;
88  bool isAsmClobberable(const MachineFunction &MF,
89  MCRegister PhysReg) const override;
90  bool isConstantPhysReg(MCRegister PhysReg) const override;
91  const TargetRegisterClass *
93  unsigned Kind = 0) const override;
94  const TargetRegisterClass *
95  getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
97  bool requiresRegisterScavenging(const MachineFunction &MF) const override;
98  bool useFPForScavengingIndex(const MachineFunction &MF) const override;
99  bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
101  bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
102  bool isFrameOffsetLegal(const MachineInstr *MI, Register BaseReg,
103  int64_t Offset) const override;
105  int FrameIdx,
106  int64_t Offset) const override;
107  void resolveFrameIndex(MachineInstr &MI, Register BaseReg,
108  int64_t Offset) const override;
110  unsigned FIOperandNum,
111  RegScavenger *RS = nullptr) const override;
112  bool cannotEliminateFrame(const MachineFunction &MF) const;
114  bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
115  bool hasBasePointer(const MachineFunction &MF) const;
116  unsigned getBaseRegister() const;
118  // Debug information queries.
119  Register getFrameRegister(const MachineFunction &MF) const override;
121  unsigned getRegPressureLimit(const TargetRegisterClass *RC,
122  MachineFunction &MF) const override;
124  unsigned getLocalAddressRegister(const MachineFunction &MF) const;
125 };
127 } // end namespace llvm
129 #endif
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:22
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool cannotEliminateFrame(const MachineFunction &MF) const
unsigned Reg
bool isAnyArgRegReserved(const MachineFunction &MF) const
void resolveFrameIndex(MachineInstr &MI, Register BaseReg, int64_t Offset) const override
unsigned getCSRFirstUseCost() const override
MachineBasicBlock & MBB
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
const uint32_t * getNoPreservedMask() const override
AArch64RegisterInfo(const Triple &TT)
bool isConstantPhysReg(MCRegister PhysReg) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
const uint32_t * getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID) const
getThisReturnPreservedMask - Returns a call preserved mask specific to the case that &#39;returned&#39; is on...
bool isReservedReg(const MachineFunction &MF, MCRegister Reg) const
Register getFrameRegister(const MachineFunction &MF) const override
const MCPhysReg * getCalleeSavedRegsViaCopy(const MachineFunction *MF) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Code Generation virtual methods...
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
const uint32_t * getDarwinCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const
const TargetRegisterClass * getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const override
void UpdateCustomCallPreservedMask(MachineFunction &MF, const uint32_t **Mask) const
const uint32_t * getWindowsStackProbePreservedMask() const
Stack probing calls preserve different CSRs to the normal CC.
const MCPhysReg * getDarwinCalleeSavedRegs(const MachineFunction *MF) const
Representation of each machine instruction.
Definition: MachineInstr.h:62
BitVector getReservedRegs(const MachineFunction &MF) const override
void UpdateCustomCalleeSavedRegs(MachineFunction &MF) const
bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override
void emitReservedArgRegCallError(const MachineFunction &MF) const
int getSEHRegNum(unsigned i) const
unsigned getLocalAddressRegister(const MachineFunction &MF) const
bool useFPForScavengingIndex(const MachineFunction &MF) const override
bool isFrameOffsetLegal(const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
bool requiresRegisterScavenging(const MachineFunction &MF) const override
const uint32_t * getTLSCallPreservedMask() const
void materializeFrameBaseRegister(MachineBasicBlock *MBB, Register BaseReg, int FrameIdx, int64_t Offset) const override
Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic ...
bool isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const override
unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override
bool hasBasePointer(const MachineFunction &MF) const
IRTranslator LLVM IR MI
const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const override
bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override
needsFrameBaseReg - Returns true if the instruction&#39;s frame index reference would be better served by...
Wrapper class representing virtual and physical registers.
Definition: Register.h:19