LLVM 22.0.0git
Public Member Functions | List of all members
llvm::AArch64RegisterInfo Class Referencefinal

#include "Target/AArch64/AArch64RegisterInfo.h"

Inheritance diagram for llvm::AArch64RegisterInfo:
[legend]

Public Member Functions

 AArch64RegisterInfo (const Triple &TT, unsigned HwMode)
int getSEHRegNum (unsigned i) const
bool isReservedReg (const MachineFunction &MF, MCRegister Reg) const
bool isUserReservedReg (const MachineFunction &MF, MCRegister Reg) const
bool isStrictlyReservedReg (const MachineFunction &MF, MCRegister Reg) const
bool isAnyArgRegReserved (const MachineFunction &MF) const
void emitReservedArgRegCallError (const MachineFunction &MF) const
void UpdateCustomCalleeSavedRegs (MachineFunction &MF) const
void UpdateCustomCallPreservedMask (MachineFunction &MF, const uint32_t **Mask) const
const MCPhysReg * getCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods...
const MCPhysReg * getDarwinCalleeSavedRegs (const MachineFunction *MF) const
const MCPhysReg * getCalleeSavedRegsViaCopy (const MachineFunction *MF) const
const uint32_t * getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
const uint32_t * getDarwinCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const
unsigned getCSRFirstUseCost () const override
const TargetRegisterClass * getSubClassWithSubReg (const TargetRegisterClass *RC, unsigned Idx) const override
const uint32_t * getTLSCallPreservedMask () const
const uint32_t * getSMStartStopCallPreservedMask () const
const uint32_t * SMEABISupportRoutinesCallPreservedMaskFromX0 () const
const uint32_t * getNoPreservedMask () const override
const uint32_t * getCustomEHPadPreservedMask (const MachineFunction &MF) const override
const uint32_t * getThisReturnPreservedMask (const MachineFunction &MF, CallingConv::ID) const
 getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i64 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.
const uint32_t * getWindowsStackProbePreservedMask () const
 Stack probing calls preserve different CSRs to the normal CC.
BitVector getStrictlyReservedRegs (const MachineFunction &MF) const
BitVector getUserReservedRegs (const MachineFunction &MF) const
BitVector getReservedRegs (const MachineFunction &MF) const override
std::optional< std::string > explainReservedReg (const MachineFunction &MF, MCRegister PhysReg) const override
bool isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
const TargetRegisterClass * getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
const TargetRegisterClass * getCrossCopyRegClass (const TargetRegisterClass *RC) const override
bool requiresRegisterScavenging (const MachineFunction &MF) const override
bool useFPForScavengingIndex (const MachineFunction &MF) const override
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.
bool isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
Register materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
 Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.
void resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
bool eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool cannotEliminateFrame (const MachineFunction &MF) const
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
bool hasBasePointer (const MachineFunction &MF) const
unsigned getBaseRegister () const
bool isArgumentRegister (const MachineFunction &MF, MCRegister Reg) const override
Register getFrameRegister (const MachineFunction &MF) const override
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
bool getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
unsigned getLocalAddressRegister (const MachineFunction &MF) const
bool regNeedsCFI (MCRegister Reg, MCRegister &RegToUseForCFI) const
 Return whether the register needs a CFI entry.
bool shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
 SrcRC and DstRC will be morphed into NewRC if this returns true.
void getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override
bool shouldAnalyzePhysregInMachineLoopInfo (MCRegister R) const override
virtual bool isIgnoredCVReg (MCRegister LLVMReg) const override

Detailed Description

Definition at line 26 of file AArch64RegisterInfo.h.

Constructor & Destructor Documentation

◆ AArch64RegisterInfo()

AArch64RegisterInfo::AArch64RegisterInfo ( const Triple & TT,
unsigned HwMode )

Definition at line 43 of file AArch64RegisterInfo.cpp.

References llvm::AArch64_MC::initLLVMToCVRegMapping().

Member Function Documentation

◆ cannotEliminateFrame()

bool AArch64RegisterInfo::cannotEliminateFrame ( const MachineFunction & MF) const

Definition at line 797 of file AArch64RegisterInfo.cpp.

References llvm::MachineFrameInfo::adjustsStack(), llvm::TargetOptions::DisableFramePointerElim(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getTarget(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineFrameInfo::isFrameAddressTaken(), and llvm::TargetMachine::Options.

◆ eliminateFrameIndex()

bool AArch64RegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator II,
int SPAdj,
unsigned FIOperandNum,
RegScavenger * RS = nullptr ) const
override

Definition at line 982 of file AArch64RegisterInfo.cpp.

References llvm::AArch64FrameOffsetCanUpdate, llvm::AArch64FrameOffsetIsLegal, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), createScratchRegisterForInstruction(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::emitFrameOffset(), llvm::StackOffset::getFixed(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::AArch64FrameLowering::getNonLocalFrameIndexReference(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::AArch64FunctionInfo::getTaggedBasePointerOffset(), llvm::MachineFrameInfo::hasVarSizedObjects(), II, llvm::isAArch64FrameOffsetLegal(), llvm::RegScavenger::isScavengingFrameIndex(), MBB, MI, llvm::AArch64II::MO_TAGGED, llvm::Offset, llvm::AArch64FrameLowering::resolveFrameIndexReference(), llvm::rewriteAArch64FrameIndex(), and TII.

◆ emitReservedArgRegCallError()

void AArch64RegisterInfo::emitReservedArgRegCallError ( const MachineFunction & MF) const

Definition at line 589 of file AArch64RegisterInfo.cpp.

References F, and llvm::MachineFunction::getFunction().

◆ explainReservedReg()

std::optional< std::string > AArch64RegisterInfo::explainReservedReg ( const MachineFunction & MF,
MCRegister PhysReg ) const
override

Definition at line 409 of file AArch64RegisterInfo.cpp.

References llvm::AArch64InstPrinter::getRegisterName(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::AArch64Subtarget::isWindowsArm64EC(), and llvm::MCRegisterInfo::regsOverlap().

◆ getBaseRegister()

unsigned AArch64RegisterInfo::getBaseRegister ( ) const

Definition at line 625 of file AArch64RegisterInfo.cpp.

Referenced by getLocalAddressRegister().

◆ getCalleeSavedRegs()

const MCPhysReg * AArch64RegisterInfo::getCalleeSavedRegs ( const MachineFunction * MF) const
override

Code Generation virtual methods...

Definition at line 72 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2, llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, llvm::CallingConv::AnyReg, llvm::CallingConv::ARM64EC_Thunk_X64, assert(), llvm::CallingConv::CFGuard_Check, llvm::Function::getAttributes(), llvm::Function::getCallingConv(), getDarwinCalleeSavedRegs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::CallingConv::GHC, llvm::AArch64FunctionInfo::isSVECC(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::AArch64Subtarget::isTargetWindows(), llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::CallingConv::PreserveNone, llvm::report_fatal_error(), llvm::AArch64TargetLowering::supportSwiftError(), llvm::CallingConv::SwiftTail, and llvm::CallingConv::Win64.

Referenced by UpdateCustomCalleeSavedRegs().

◆ getCalleeSavedRegsViaCopy()

const MCPhysReg * AArch64RegisterInfo::getCalleeSavedRegsViaCopy ( const MachineFunction * MF) const

Definition at line 213 of file AArch64RegisterInfo.cpp.

References assert(), llvm::CallingConv::CXX_FAST_TLS, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), and llvm::AArch64FunctionInfo::isSplitCSR().

◆ getCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getCallPreservedMask ( const MachineFunction & MF,
CallingConv::ID CC ) const
override

Definition at line 288 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2, llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, llvm::CallingConv::AnyReg, llvm::CallingConv::CFGuard_Check, llvm::Function::getAttributes(), getDarwinCallPreservedMask(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::CallingConv::GHC, llvm::Function::hasFnAttribute(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::CallingConv::PreserveNone, llvm::report_fatal_error(), llvm::AArch64TargetLowering::supportSwiftError(), and llvm::CallingConv::SwiftTail.

◆ getCrossCopyRegClass()

const TargetRegisterClass * AArch64RegisterInfo::getCrossCopyRegClass ( const TargetRegisterClass * RC) const
override

Definition at line 619 of file AArch64RegisterInfo.cpp.

◆ getCSRFirstUseCost()

unsigned llvm::AArch64RegisterInfo::getCSRFirstUseCost ( ) const
inlineoverride

Definition at line 57 of file AArch64RegisterInfo.h.

◆ getCustomEHPadPreservedMask()

const uint32_t * AArch64RegisterInfo::getCustomEHPadPreservedMask ( const MachineFunction & MF) const
override

Definition at line 340 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget(), and llvm::AArch64Subtarget::isTargetLinux().

◆ getDarwinCalleeSavedRegs()

const MCPhysReg * AArch64RegisterInfo::getDarwinCalleeSavedRegs ( const MachineFunction * MF) const

Definition at line 157 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2, llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, assert(), llvm::CallingConv::CFGuard_Check, llvm::CallingConv::CXX_FAST_TLS, llvm::Function::getAttributes(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::AArch64FunctionInfo::isSVECC(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::report_fatal_error(), llvm::AArch64TargetLowering::supportSwiftError(), llvm::CallingConv::SwiftTail, and llvm::CallingConv::Win64.

Referenced by getCalleeSavedRegs().

◆ getDarwinCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getDarwinCallPreservedMask ( const MachineFunction & MF,
CallingConv::ID CC ) const

Definition at line 253 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2, llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, assert(), llvm::CallingConv::CFGuard_Check, llvm::CallingConv::CXX_FAST_TLS, llvm::Function::getAttributes(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::getTargetLowering(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::report_fatal_error(), llvm::AArch64TargetLowering::supportSwiftError(), and llvm::CallingConv::SwiftTail.

Referenced by getCallPreservedMask().

◆ getFrameRegister()

Register AArch64RegisterInfo::getFrameRegister ( const MachineFunction & MF) const
override

Definition at line 757 of file AArch64RegisterInfo.cpp.

References llvm::TargetFrameLowering::hasFP().

Referenced by getLocalAddressRegister().

◆ getLocalAddressRegister()

unsigned AArch64RegisterInfo::getLocalAddressRegister ( const MachineFunction & MF) const

Definition at line 1308 of file AArch64RegisterInfo.cpp.

References getBaseRegister(), llvm::MachineFunction::getFrameInfo(), getFrameRegister(), and llvm::MachineFunction::hasEHFunclets().

◆ getNoPreservedMask()

const uint32_t * AArch64RegisterInfo::getNoPreservedMask ( ) const
override

Definition at line 384 of file AArch64RegisterInfo.cpp.

◆ getOffsetOpcodes()

void AArch64RegisterInfo::getOffsetOpcodes ( const StackOffset & Offset,
SmallVectorImpl< uint64_t > & Ops ) const
override

Definition at line 955 of file AArch64RegisterInfo.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::DIExpression::appendOffset(), assert(), getDwarfRegNum(), and llvm::Offset.

◆ getPointerRegClass()

const TargetRegisterClass * AArch64RegisterInfo::getPointerRegClass ( const MachineFunction & MF,
unsigned Kind = 0 ) const
override

Definition at line 613 of file AArch64RegisterInfo.cpp.

◆ getRegAllocationHints()

bool AArch64RegisterInfo::getRegAllocationHints ( Register VirtReg,
ArrayRef< MCPhysReg > Order,
SmallVectorImpl< MCPhysReg > & Hints,
const MachineFunction & MF,
const VirtRegMap * VRM,
const LiveRegMatrix * Matrix ) const
override

Definition at line 1134 of file AArch64RegisterInfo.cpp.

References llvm::all_of(), assert(), llvm::TargetRegisterClass::contains(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::find_if(), llvm::MachineOperand::getOperandNo(), llvm::VirtRegMap::getPhys(), llvm::MachineOperand::getReg(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::VirtRegMap::hasPhys(), I, llvm_unreachable, llvm::make_range(), Matrix, MI, MRI, OpIdx, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::ArrayRef< T >::size(), and llvm::SmallVectorTemplateCommon< T, typename >::size().

◆ getRegPressureLimit()

unsigned AArch64RegisterInfo::getRegPressureLimit ( const TargetRegisterClass * RC,
MachineFunction & MF ) const
override

Definition at line 1075 of file AArch64RegisterInfo.cpp.

References llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), and llvm::TargetFrameLowering::hasFP().

◆ getReservedRegs()

BitVector AArch64RegisterInfo::getReservedRegs ( const MachineFunction & MF) const
override

Definition at line 542 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getProperties(), getStrictlyReservedRegs(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::isLRReservedForRA(), llvm::AArch64Subtarget::isXRegisterReservedForRA(), and llvm::Reserved.

Referenced by isReservedReg().

◆ getSEHRegNum()

int llvm::AArch64RegisterInfo::getSEHRegNum ( unsigned i) const
inline

Definition at line 33 of file AArch64RegisterInfo.h.

◆ getSMStartStopCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getSMStartStopCallPreservedMask ( ) const

Definition at line 375 of file AArch64RegisterInfo.cpp.

◆ getStrictlyReservedRegs()

BitVector AArch64RegisterInfo::getStrictlyReservedRegs ( const MachineFunction & MF) const

Definition at line 436 of file AArch64RegisterInfo.cpp.

References assert(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GRAAL, hasBasePointer(), llvm::Function::hasFnAttribute(), llvm::AArch64FrameLowering::isFPReserved(), llvm::AArch64Subtarget::isWindowsArm64EC(), llvm::AArch64Subtarget::isXRegisterReserved(), llvm::Reserved, and SubReg.

Referenced by getReservedRegs(), and isStrictlyReservedReg().

◆ getSubClassWithSubReg()

const TargetRegisterClass * AArch64RegisterInfo::getSubClassWithSubReg ( const TargetRegisterClass * RC,
unsigned Idx ) const
override

Definition at line 240 of file AArch64RegisterInfo.cpp.

◆ getThisReturnPreservedMask()

const uint32_t * AArch64RegisterInfo::getThisReturnPreservedMask ( const MachineFunction & MF,
CallingConv::ID CC ) const

getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i64 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.

it is a calling convention that uses the same register for the first i64 argument and an i64 return value)

Should return NULL in the case that the calling convention does not have this property

Definition at line 389 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, and llvm::AArch64Subtarget::isTargetDarwin().

◆ getTLSCallPreservedMask()

const uint32_t * AArch64RegisterInfo::getTLSCallPreservedMask ( ) const

Definition at line 348 of file AArch64RegisterInfo.cpp.

References assert().

◆ getUserReservedRegs()

BitVector AArch64RegisterInfo::getUserReservedRegs ( const MachineFunction & MF) const

Definition at line 530 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::isXRegisterReserved(), and llvm::Reserved.

Referenced by isUserReservedReg().

◆ getWindowsStackProbePreservedMask()

const uint32_t * AArch64RegisterInfo::getWindowsStackProbePreservedMask ( ) const

Stack probing calls preserve different CSRs to the normal CC.

Definition at line 404 of file AArch64RegisterInfo.cpp.

◆ hasBasePointer()

bool AArch64RegisterInfo::hasBasePointer ( const MachineFunction & MF) const

Definition at line 627 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::hasEHFunclets(), and llvm::MachineFrameInfo::hasVarSizedObjects().

Referenced by explainReservedReg(), getRegPressureLimit(), and getStrictlyReservedRegs().

◆ isAnyArgRegReserved()

bool AArch64RegisterInfo::isAnyArgRegReserved ( const MachineFunction & MF) const

Definition at line 583 of file AArch64RegisterInfo.cpp.

References llvm::any_of(), and isStrictlyReservedReg().

◆ isArgumentRegister()

bool AArch64RegisterInfo::isArgumentRegister ( const MachineFunction & MF,
MCRegister Reg ) const
override

Definition at line 676 of file AArch64RegisterInfo.cpp.

References llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1, llvm::CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2, llvm::CallingConv::AArch64_SVE_VectorCall, llvm::CallingConv::AArch64_VectorCall, llvm::CallingConv::C, llvm::CallingConv::CFGuard_Check, llvm::CallingConv::CXX_FAST_TLS, llvm::CallingConv::Fast, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, llvm::is_contained(), llvm::AArch64Subtarget::isCallingConvWin64(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::AArch64Subtarget::isTargetILP32(), llvm::AArch64Subtarget::isTargetWindows(), llvm::Function::isVarArg(), llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::CallingConv::PreserveNone, llvm::report_fatal_error(), llvm::CallingConv::Swift, llvm::CallingConv::SwiftTail, llvm::CallingConv::Tail, and llvm::CallingConv::Win64.

◆ isAsmClobberable()

bool AArch64RegisterInfo::isAsmClobberable ( const MachineFunction & MF,
MCRegister PhysReg ) const
override

Definition at line 596 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::getFunction(), llvm::Function::hasFnAttribute(), isReservedReg(), and llvm::MCRegisterInfo::regsOverlap().

◆ isFrameOffsetLegal()

bool AArch64RegisterInfo::isFrameOffsetLegal ( const MachineInstr * MI,
Register BaseReg,
int64_t Offset ) const
override

Definition at line 872 of file AArch64RegisterInfo.cpp.

References llvm::AArch64FrameOffsetIsLegal, assert(), llvm::StackOffset::getFixed(), llvm::isAArch64FrameOffsetLegal(), MI, and llvm::Offset.

Referenced by needsFrameBaseReg().

◆ isIgnoredCVReg()

bool AArch64RegisterInfo::isIgnoredCVReg ( MCRegister LLVMReg) const
overridevirtual

Definition at line 1374 of file AArch64RegisterInfo.cpp.

◆ isReservedReg()

bool AArch64RegisterInfo::isReservedReg ( const MachineFunction & MF,
MCRegister Reg ) const

Definition at line 568 of file AArch64RegisterInfo.cpp.

References getReservedRegs().

Referenced by isAsmClobberable().

◆ isStrictlyReservedReg()

bool AArch64RegisterInfo::isStrictlyReservedReg ( const MachineFunction & MF,
MCRegister Reg ) const

Definition at line 578 of file AArch64RegisterInfo.cpp.

References getStrictlyReservedRegs().

Referenced by isAnyArgRegReserved().

◆ isUserReservedReg()

bool AArch64RegisterInfo::isUserReservedReg ( const MachineFunction & MF,
MCRegister Reg ) const

Definition at line 573 of file AArch64RegisterInfo.cpp.

References getUserReservedRegs().

◆ materializeFrameBaseRegister()

Register AArch64RegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock * MBB,
int FrameIdx,
int64_t Offset ) const
override

Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.

Definition at line 883 of file AArch64RegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), DL, llvm::AArch64_AM::getShifterImm(), llvm::MachineFunction::getSubtarget(), llvm::AArch64_AM::LSL, MBB, MRI, llvm::Offset, and TII.

◆ needsFrameBaseReg()

bool AArch64RegisterInfo::needsFrameBaseReg ( MachineInstr * MI,
int64_t Offset ) const
override

needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.

Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 808 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::TargetFrameLowering::hasFP(), isFrameOffsetLegal(), MI, and llvm::Offset.

◆ regNeedsCFI()

bool AArch64RegisterInfo::regNeedsCFI ( MCRegister Reg,
MCRegister & RegToUseForCFI ) const

Return whether the register needs a CFI entry.

Not all unwinders may know about SVE registers, so we assume the lowest common denominator, i.e. the callee-saves required by the base ABI. For the SVE registers z8-z15 only the lower 64-bits (d8-d15) need to be saved. The lower 64-bits subreg is returned in RegToUseForCFI.

Definition at line 53 of file AArch64RegisterInfo.cpp.

References contains(), and I.

◆ requiresFrameIndexScavenging()

bool AArch64RegisterInfo::requiresFrameIndexScavenging ( const MachineFunction & MF) const
override

Definition at line 791 of file AArch64RegisterInfo.cpp.

◆ requiresRegisterScavenging()

bool AArch64RegisterInfo::requiresRegisterScavenging ( const MachineFunction & MF) const
override

Definition at line 762 of file AArch64RegisterInfo.cpp.

◆ requiresVirtualBaseRegisters()

bool AArch64RegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction & MF) const
override

Definition at line 767 of file AArch64RegisterInfo.cpp.

◆ resolveFrameIndex()

void AArch64RegisterInfo::resolveFrameIndex ( MachineInstr & MI,
Register BaseReg,
int64_t Offset ) const
override

Definition at line 907 of file AArch64RegisterInfo.cpp.

References assert(), llvm::Done, llvm::StackOffset::getFixed(), llvm::MachineFunction::getSubtarget(), MI, llvm::Offset, llvm::rewriteAArch64FrameIndex(), and TII.

◆ shouldAnalyzePhysregInMachineLoopInfo()

bool AArch64RegisterInfo::shouldAnalyzePhysregInMachineLoopInfo ( MCRegister R) const
override

Definition at line 1369 of file AArch64RegisterInfo.cpp.

◆ shouldCoalesce()

bool AArch64RegisterInfo::shouldCoalesce ( MachineInstr * MI,
const TargetRegisterClass * SrcRC,
unsigned SubReg,
const TargetRegisterClass * DstRC,
unsigned DstSubReg,
const TargetRegisterClass * NewRC,
LiveIntervals & LIS ) const
override

SrcRC and DstRC will be morphed into NewRC if this returns true.

Definition at line 1319 of file AArch64RegisterInfo.cpp.

References llvm::any_of(), llvm::TargetRegisterClass::getID(), MI, MRI, and SubReg.

◆ SMEABISupportRoutinesCallPreservedMaskFromX0()

const uint32_t * AArch64RegisterInfo::SMEABISupportRoutinesCallPreservedMaskFromX0 ( ) const

Definition at line 380 of file AArch64RegisterInfo.cpp.

◆ UpdateCustomCalleeSavedRegs()

void AArch64RegisterInfo::UpdateCustomCalleeSavedRegs ( MachineFunction & MF) const

Definition at line 222 of file AArch64RegisterInfo.cpp.

References getCalleeSavedRegs(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), I, llvm::AArch64Subtarget::isXRegCustomCalleeSaved(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::MachineRegisterInfo::setCalleeSavedRegs().

◆ UpdateCustomCallPreservedMask()

void AArch64RegisterInfo::UpdateCustomCallPreservedMask ( MachineFunction & MF,
const uint32_t ** Mask ) const

Definition at line 356 of file AArch64RegisterInfo.cpp.

References llvm::MachineFunction::allocateRegMask(), llvm::MachineOperand::getRegMaskSize(), llvm::MachineFunction::getSubtarget(), llvm::AArch64Subtarget::isXRegCustomCalleeSaved(), and SubReg.

◆ useFPForScavengingIndex()

bool AArch64RegisterInfo::useFPForScavengingIndex ( const MachineFunction & MF) const
override

Definition at line 773 of file AArch64RegisterInfo.cpp.

References assert(), llvm::MachineFunction::getInfo(), llvm::AArch64FunctionInfo::getStackSizeSVE(), llvm::MachineFunction::getSubtarget(), llvm::AArch64FunctionInfo::hasCalculatedStackSizeSVE(), llvm::TargetFrameLowering::hasFP(), and llvm::AArch64FunctionInfo::hasStackHazardSlotIndex().

The documentation for this class was generated from the following files:
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