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34 "This is not a subregister index");
58 "This is not a subregister index");
59 return SubRegIdxRanges[Idx].
Size;
64 "This is not a subregister index");
65 return SubRegIdxRanges[Idx].
Offset;
70 unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
76 if (
I ==
M+Size ||
I->FromReg != RegNum)
84 unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
90 if (
I !=
M + Size &&
I->FromReg == RegNum)
111 if (
I == L2SEHRegs.end())
return (
int)RegNum;
116 if (L2CVRegs.empty())
119 if (
I == L2CVRegs.end())
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const
Map a target EH register number to an equivalent DWARF register number.
This is an optimization pass for GlobalISel generic memory operations.
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
auto lower_bound(R &&Range, T &&Value)
Provide wrappers to std::lower_bound which take ranges instead of having to pass begin/end explicitly...
MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Reg
All possible values of the reg field in the ModR/M byte.
bool contains(MCRegister Reg) const
contains - Return true if the specified register is included in this register class.
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
MCRegisterClass - Base class of TargetRegisterClass.
bool regsOverlap(MCRegister RegA, MCRegister RegB) const
Returns true if the two registers are equal or alias each other.
int getSEHRegNum(MCRegister RegNum) const
Map a target register to an equivalent SEH register number.
unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary se...
Optional< unsigned > getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MCSuperRegIterator enumerates all super-registers of Reg.
const MCRegisterDesc & get(MCRegister RegNo) const
Provide a get method, equivalent to [], but more useful with a pointer to this object.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
MCSubRegIterator enumerates all sub-registers of Reg.
static bool isValid(const char C)
Returns true if C is a valid mangled character: <0-9a-zA-Z_>.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
int getCodeViewRegNum(MCRegister RegNum) const
Map a target register to an equivalent CodeView register number.
Wrapper class representing physical registers. Should be passed by value.
unsigned getSubRegIdxSize(unsigned Idx) const
Get the size of the bit range covered by a sub-register index.