LLVM 24.0.0git
LiveRegMatrix.h
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1//===- LiveRegMatrix.h - Track register interference ----------*- C++ -*---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// The LiveRegMatrix analysis pass keeps track of virtual register interference
10// along two dimensions: Slot indexes and register units. The matrix is used by
11// register allocators to ensure that no interfering virtual registers get
12// assigned to overlapping physical registers.
13//
14// Register units are defined in MCRegisterInfo.h, they represent the smallest
15// unit of interference when dealing with overlapping physical registers. The
16// LiveRegMatrix is represented as a LiveIntervalUnion per register unit. When
17// a virtual register is assigned to a physical register, the live range for
18// the virtual register is inserted into the LiveIntervalUnion for each regunit
19// in the physreg.
20//
21//===----------------------------------------------------------------------===//
22
23#ifndef LLVM_CODEGEN_LIVEREGMATRIX_H
24#define LLVM_CODEGEN_LIVEREGMATRIX_H
25
26#include "llvm/ADT/BitVector.h"
29#include <memory>
30
31namespace llvm {
32
33class AnalysisUsage;
34class LiveInterval;
35class LiveIntervals;
36class MachineFunction;
38class VirtRegMap;
39
40class LiveRegMatrix {
43 const TargetRegisterInfo *TRI = nullptr;
44 LiveIntervals *LIS = nullptr;
45 VirtRegMap *VRM = nullptr;
46
47 // UserTag changes whenever virtual registers have been modified.
48 unsigned UserTag = 0;
49
50 // The matrix is represented as a LiveIntervalUnion per register unit.
51 std::unique_ptr<LiveIntervalUnion::Allocator> LIUAlloc;
53
54 // Cached queries per register unit.
55 std::unique_ptr<LiveIntervalUnion::Query[]> Queries;
56
57 // Cached register mask interference info.
58 unsigned RegMaskTag = 0;
59 Register RegMaskVirtReg;
60 BitVector RegMaskUsable;
61
62 LiveRegMatrix()
63 : LIUAlloc(std::make_unique<LiveIntervalUnion::Allocator>()) {};
64 void releaseMemory();
65
66 /// Check regmask interference only, restricted to the segment
67 /// [Start, End). Returns true if a regmask operand in that segment
68 /// clobbers PhysReg.
69 bool checkRegMaskInterference(SlotIndex Start, SlotIndex End,
70 MCRegister PhysReg);
71
72 /// Check regunit interference only, restricted to the segment
73 /// [Start, End). Returns true if a fixed live range on one of PhysReg's
74 /// register units overlaps [Start, End).
75 bool checkRegUnitInterference(SlotIndex Start, SlotIndex End,
76 MCRegister PhysReg);
77
78public:
79 LiveRegMatrix(LiveRegMatrix &&Other) = default;
80
82
83 //===--------------------------------------------------------------------===//
84 // High-level interface.
85 //===--------------------------------------------------------------------===//
86 //
87 // Check for interference before assigning virtual registers to physical
88 // registers.
89 //
90
91 /// Invalidate cached interference queries after modifying virtual register
92 /// live ranges. Interference checks may return stale information unless
93 /// caches are invalidated.
94 void invalidateVirtRegs() { ++UserTag; }
95
97 /// No interference, go ahead and assign.
99
100 /// Virtual register interference. There are interfering virtual registers
101 /// assigned to PhysReg or its aliases. This interference could be resolved
102 /// by unassigning those other virtual registers.
104
105 /// Register unit interference. A fixed live range is in the way, typically
106 /// argument registers for a call. This can't be resolved by unassigning
107 /// other virtual registers.
109
110 /// RegMask interference. The live range is crossing an instruction with a
111 /// regmask operand that doesn't preserve PhysReg. This typically means
112 /// VirtReg is live across a call, and PhysReg isn't call-preserved.
114 };
115
116 /// Check for interference before assigning VirtReg to PhysReg.
117 /// If this function returns IK_Free, it is legal to assign(VirtReg, PhysReg).
118 /// When there is more than one kind of interference, the InterferenceKind
119 /// with the highest enum value is returned.
121 MCRegister PhysReg);
122
123 /// Check for interference in the segment [Start, End) that may prevent
124 /// assignment to PhysReg. This checks regmask interference (e.g. PhysReg
125 /// is clobbered by a call in [Start, End)), fixed register unit
126 /// interference (e.g. PhysReg is used directly by some instruction in
127 /// [Start, End)), and virtual register interference (some other interval
128 /// already assigned to PhysReg overlaps [Start, End)) -- the same kinds of
129 /// interference considered by the checkInterference(LiveInterval&, ...)
130 /// overload above, restricted to a single contiguous segment. If this
131 /// function returns true, there is interference in the segment
132 /// [Start, End). If this function returns false, PhysReg is free at the
133 /// segment [Start, End).
135 MCRegister PhysReg);
136
137 /// Check for interference in the segment [Start, End) that may prevent
138 /// assignment to PhysReg, like checkInterference. Returns a lane mask of
139 /// which lanes of the physical register interfere in the segment [Start, End)
140 /// of some other interval already assigned to PhysReg.
141 ///
142 /// If this function returns LaneBitmask::getNone(), PhysReg is completely
143 /// free at the segment [Start, End).
145 MCRegister PhysReg);
146
147 /// Assign VirtReg to PhysReg.
148 /// This will mark VirtReg's live range as occupied in the LiveRegMatrix and
149 /// update VirtRegMap. The live range is expected to be available in PhysReg.
150 LLVM_ABI void assign(const LiveInterval &VirtReg, MCRegister PhysReg);
151
152 /// Unassign VirtReg from its PhysReg.
153 /// Assuming that VirtReg was previously assigned to a PhysReg, this undoes
154 /// the assignment and updates VirtRegMap accordingly.
155 /// ClearAllReferencingSegments changes the way segments are removed from
156 /// the matrix:
157 /// - If false (default), only segments that exactly match VirtReg's live
158 /// range are removed.
159 /// - If true, all segments that reference VirtReg are removed. This is
160 /// useful when VirtReg's live range(s) is already empty.
161 LLVM_ABI void unassign(const LiveInterval &VirtReg,
162 bool ClearAllReferencingSegments = false);
163
164 /// Returns true if the given \p PhysReg has any live intervals assigned.
165 LLVM_ABI bool isPhysRegUsed(MCRegister PhysReg) const;
166
167 //===--------------------------------------------------------------------===//
168 // Low-level interface.
169 //===--------------------------------------------------------------------===//
170 //
171 // Provide access to the underlying LiveIntervalUnions.
172 //
173
174 /// Check for regmask interference only.
175 /// Return true if VirtReg crosses a regmask operand that clobbers PhysReg.
176 /// If PhysReg is null, check if VirtReg crosses any regmask operands.
177 LLVM_ABI bool
178 checkRegMaskInterference(const LiveInterval &VirtReg,
180
181 /// Check for regunit interference only.
182 /// Return true if VirtReg overlaps a fixed assignment of one of PhysRegs's
183 /// register units.
184 LLVM_ABI bool checkRegUnitInterference(const LiveInterval &VirtReg,
185 MCRegister PhysReg);
186
187 /// Query a line of the assigned virtual register matrix directly.
188 /// Use MCRegUnitIterator to enumerate all regunits in the desired PhysReg.
189 /// This returns a reference to an internal Query data structure that is only
190 /// valid until the next query() call.
192 MCRegUnit RegUnit);
193
194 /// Directly access the live interval unions per regunit.
195 /// This returns an array indexed by the regunit number.
197 return &Matrix[static_cast<MCRegUnit>(0)];
198 }
199
200 LLVM_ABI Register getOneVReg(unsigned PhysReg) const;
201
202#ifndef NDEBUG
203 /// This checks that each LiveInterval referenced in LiveIntervalUnion
204 /// actually exists in LiveIntervals and is not a dangling pointer.
205 bool isValid() const;
206#endif
207};
208
210 LiveRegMatrix LRM;
211
212public:
213 static char ID;
214
216
217 LiveRegMatrix &getLRM() { return LRM; }
218 const LiveRegMatrix &getLRM() const { return LRM; }
219
220 void getAnalysisUsage(AnalysisUsage &AU) const override;
221 bool runOnMachineFunction(MachineFunction &MF) override;
222 void releaseMemory() override;
223};
224
225class LiveRegMatrixAnalysis : public AnalysisInfoMixin<LiveRegMatrixAnalysis> {
227 static AnalysisKey Key;
228
229public:
231
234};
235
236} // end namespace llvm
237
238#endif // LLVM_CODEGEN_LIVEREGMATRIX_H
This file implements the BitVector class.
#define LLVM_ABI
Definition Compiler.h:215
Basic Register Allocator
Represent the analysis usage information of a pass.
Query interferences between a single live virtual register and a live interval union.
Union of live intervals that are strong candidates for coalescing into a single register (either phys...
LiveInterval - This class represents the liveness of a register, or stack slot.
This class represents the liveness of a register, stack slot, etc.
LLVM_ABI LiveRegMatrix run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
const LiveRegMatrix & getLRM() const
LLVM_ABI bool isPhysRegUsed(MCRegister PhysReg) const
Returns true if the given PhysReg has any live intervals assigned.
void invalidateVirtRegs()
Invalidate cached interference queries after modifying virtual register live ranges.
friend class LiveRegMatrixWrapperLegacy
LLVM_ABI Register getOneVReg(unsigned PhysReg) const
friend class LiveRegMatrixAnalysis
LLVM_ABI LiveIntervalUnion::Query & query(const LiveRange &LR, MCRegUnit RegUnit)
Query a line of the assigned virtual register matrix directly.
LLVM_ABI void unassign(const LiveInterval &VirtReg, bool ClearAllReferencingSegments=false)
Unassign VirtReg from its PhysReg.
bool isValid() const
This checks that each LiveInterval referenced in LiveIntervalUnion actually exists in LiveIntervals a...
@ IK_VirtReg
Virtual register interference.
@ IK_RegUnit
Register unit interference.
@ IK_Free
No interference, go ahead and assign.
@ IK_RegMask
RegMask interference.
LLVM_ABI void init(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM)
LLVM_ABI void assign(const LiveInterval &VirtReg, MCRegister PhysReg)
Assign VirtReg to PhysReg.
LLVM_ABI InterferenceKind checkInterference(const LiveInterval &VirtReg, MCRegister PhysReg)
Check for interference before assigning VirtReg to PhysReg.
LiveRegMatrix(LiveRegMatrix &&Other)=default
LiveIntervalUnion * getLiveUnions()
Directly access the live interval unions per regunit.
LLVM_ABI LaneBitmask checkInterferenceLanes(SlotIndex Start, SlotIndex End, MCRegister PhysReg)
Check for interference in the segment [Start, End) that may prevent assignment to PhysReg,...
Wrapper class representing physical registers. Should be passed by value.
Definition MCRegister.h:41
static constexpr unsigned NoRegister
Definition MCRegister.h:60
Wrapper class representing virtual and physical registers.
Definition Register.h:20
SlotIndex - An opaque wrapper around machine indexes.
Definition SlotIndexes.h:66
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
@ Other
Any other memory.
Definition ModRef.h:68
Implement std::hash so that hash_code can be used in STL containers.
Definition BitVector.h:878
A CRTP mix-in that provides informational APIs needed for analysis passes.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Definition Analysis.h:29