LLVM 18.0.0git
RegisterScavenging.h
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1//===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file declares the machine register scavenger class. It can provide
11/// information such as unused register at any point in a machine basic block.
12/// It also provides a mechanism to make registers available by evicting them
13/// to spill slots.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18#define LLVM_CODEGEN_REGISTERSCAVENGING_H
19
20#include "llvm/ADT/BitVector.h"
25#include "llvm/MC/LaneBitmask.h"
26
27namespace llvm {
28
29class MachineInstr;
30class TargetInstrInfo;
31class TargetRegisterClass;
32class TargetRegisterInfo;
33
35 const TargetRegisterInfo *TRI = nullptr;
36 const TargetInstrInfo *TII = nullptr;
37 MachineRegisterInfo *MRI = nullptr;
38 MachineBasicBlock *MBB = nullptr;
40
41 /// True if RegScavenger is currently tracking the liveness of registers.
42 bool Tracking = false;
43
44 /// Information on scavenged registers (held in a spill slot).
45 struct ScavengedInfo {
46 ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
47
48 /// A spill slot used for scavenging a register post register allocation.
49 int FrameIndex;
50
51 /// If non-zero, the specific register is currently being
52 /// scavenged. That is, it is spilled to this scavenging stack slot.
53 Register Reg;
54
55 /// The instruction that restores the scavenged register from stack.
56 const MachineInstr *Restore = nullptr;
57 };
58
59 /// A vector of information on scavenged registers.
61
62 LiveRegUnits LiveUnits;
63
64public:
65 RegScavenger() = default;
66
67 /// Record that \p Reg is in use at scavenging index \p FI. This is for
68 /// targets which need to directly manage the spilling process, and need to
69 /// update the scavenger's internal state. It's expected this be called a
70 /// second time with \p Restore set to a non-null value, so that the
71 /// externally inserted restore instruction resets the scavenged slot
72 /// liveness when encountered.
74 MachineInstr *Restore = nullptr) {
75 for (ScavengedInfo &Slot : Scavenged) {
76 if (Slot.FrameIndex == FI) {
77 assert(!Slot.Reg || Slot.Reg == Reg);
78 Slot.Reg = Reg;
79 Slot.Restore = Restore;
80 return;
81 }
82 }
83
84 llvm_unreachable("did not find scavenging index");
85 }
86
87 /// Start tracking liveness from the begin of basic block \p MBB.
89
90 /// Start tracking liveness from the end of basic block \p MBB.
91 /// Use backward() to move towards the beginning of the block.
93
94 /// Update internal register state and move MBB iterator backwards. This
95 /// method gives precise results even in the absence of kill flags.
96 void backward();
97
98 /// Call backward() as long as the internal iterator does not point to \p I.
100 while (MBBI != I)
101 backward();
102 }
103
104 /// Move the internal MBB iterator but do not update register states.
106 if (I == MachineBasicBlock::iterator(nullptr))
107 Tracking = false;
108 MBBI = I;
109 }
110
112
113 /// Return if a specific register is currently used.
114 bool isRegUsed(Register Reg, bool includeReserved = true) const;
115
116 /// Return all available registers in the register class in Mask.
118
119 /// Find an unused register of the specified register class.
120 /// Return 0 if none is found.
122
123 /// Add a scavenging frame index.
125 Scavenged.push_back(ScavengedInfo(FI));
126 }
127
128 /// Query whether a frame index is a scavenging frame index.
129 bool isScavengingFrameIndex(int FI) const {
130 for (const ScavengedInfo &SI : Scavenged)
131 if (SI.FrameIndex == FI)
132 return true;
133
134 return false;
135 }
136
137 /// Get an array of scavenging frame indices.
139 for (const ScavengedInfo &I : Scavenged)
140 if (I.FrameIndex >= 0)
141 A.push_back(I.FrameIndex);
142 }
143
144 /// Make a register of the specific register class available from the current
145 /// position backwards to the place before \p To. If \p RestoreAfter is true
146 /// this includes the instruction following the current position.
147 /// SPAdj is the stack adjustment due to call frame, it's passed along to
148 /// eliminateFrameIndex().
149 /// Returns the scavenged register.
150 ///
151 /// If \p AllowSpill is false, fail if a spill is required to make the
152 /// register available, and return NoRegister.
155 bool RestoreAfter, int SPAdj,
156 bool AllowSpill = true);
157
158 /// Tell the scavenger a register is used.
160
161private:
162 /// Returns true if a register is reserved. It is never "unused".
163 bool isReserved(Register Reg) const { return MRI->isReserved(Reg); }
164
165 /// Initialize RegisterScavenger.
166 void init(MachineBasicBlock &MBB);
167
168 /// Spill a register after position \p After and reload it before position
169 /// \p UseMI.
170 ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
173};
174
175/// Replaces all frame index virtual registers with physical registers. Uses the
176/// register scavenger to find an appropriate register to use.
177void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
178
179} // end namespace llvm
180
181#endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder & UseMI
MachineBasicBlock MachineBasicBlock::iterator MBBI
This file implements the BitVector class.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
A common definition of LaneBitmask for use in TableGen and CodeGen.
A set of register units.
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned Reg
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
A set of register units used to track register liveness.
Definition: LiveRegUnits.h:30
MachineInstrBundleIterator< MachineInstr > iterator
Representation of each machine instruction.
Definition: MachineInstr.h:68
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
void backward(MachineBasicBlock::iterator I)
Call backward() as long as the internal iterator does not point to I.
void enterBasicBlockEnd(MachineBasicBlock &MBB)
Start tracking liveness from the end of basic block MBB.
bool isRegUsed(Register Reg, bool includeReserved=true) const
Return if a specific register is currently used.
Register FindUnusedReg(const TargetRegisterClass *RC) const
Find an unused register of the specified register class.
void setRegUsed(Register Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Tell the scavenger a register is used.
void assignRegToScavengingIndex(int FI, Register Reg, MachineInstr *Restore=nullptr)
Record that Reg is in use at scavenging index FI.
void backward()
Update internal register state and move MBB iterator backwards.
MachineBasicBlock::iterator getCurrentPosition() const
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
Register scavengeRegisterBackwards(const TargetRegisterClass &RC, MachineBasicBlock::iterator To, bool RestoreAfter, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available from the current position backwards to the p...
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
RegScavenger()=default
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS)
Replaces all frame index virtual registers with physical registers.
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:82