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RegisterScavenging.h
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1 //===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file declares the machine register scavenger class. It can provide
11 /// information such as unused register at any point in a machine basic block.
12 /// It also provides a mechanism to make registers available by evicting them
13 /// to spill slots.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
19 
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/MC/LaneBitmask.h"
26 
27 namespace llvm {
28 
29 class MachineInstr;
30 class TargetInstrInfo;
31 class TargetRegisterClass;
32 class TargetRegisterInfo;
33 
34 class RegScavenger {
35  const TargetRegisterInfo *TRI;
36  const TargetInstrInfo *TII;
38  MachineBasicBlock *MBB = nullptr;
40  unsigned NumRegUnits = 0;
41 
42  /// True if RegScavenger is currently tracking the liveness of registers.
43  bool Tracking = false;
44 
45  /// Information on scavenged registers (held in a spill slot).
46  struct ScavengedInfo {
47  ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
48 
49  /// A spill slot used for scavenging a register post register allocation.
50  int FrameIndex;
51 
52  /// If non-zero, the specific register is currently being
53  /// scavenged. That is, it is spilled to this scavenging stack slot.
54  Register Reg;
55 
56  /// The instruction that restores the scavenged register from stack.
57  const MachineInstr *Restore = nullptr;
58  };
59 
60  /// A vector of information on scavenged registers.
62 
63  LiveRegUnits LiveUnits;
64 
65  // These BitVectors are only used internally to forward(). They are members
66  // to avoid frequent reallocations.
67  BitVector KillRegUnits, DefRegUnits;
68  BitVector TmpRegUnits;
69 
70 public:
71  RegScavenger() = default;
72 
73  /// Record that \p Reg is in use at scavenging index \p FI. This is for
74  /// targets which need to directly manage the spilling process, and need to
75  /// update the scavenger's internal state. It's expected this be called a
76  /// second time with \p Restore set to a non-null value, so that the
77  /// externally inserted restore instruction resets the scavenged slot
78  /// liveness when encountered.
80  MachineInstr *Restore = nullptr) {
81  for (ScavengedInfo &Slot : Scavenged) {
82  if (Slot.FrameIndex == FI) {
83  assert(!Slot.Reg || Slot.Reg == Reg);
84  Slot.Reg = Reg;
85  Slot.Restore = Restore;
86  return;
87  }
88  }
89 
90  llvm_unreachable("did not find scavenging index");
91  }
92 
93  /// Start tracking liveness from the begin of basic block \p MBB.
95 
96  /// Start tracking liveness from the end of basic block \p MBB.
97  /// Use backward() to move towards the beginning of the block. This is
98  /// preferred to enterBasicBlock() and forward() because it does not depend
99  /// on the presence of kill flags.
101 
102  /// Move the internal MBB iterator and update register states.
103  void forward();
104 
105  /// Move the internal MBB iterator and update register states until
106  /// it has processed the specific iterator.
108  if (!Tracking && MBB->begin() != I) forward();
109  while (MBBI != I) forward();
110  }
111 
112  /// Update internal register state and move MBB iterator backwards.
113  /// Contrary to unprocess() this method gives precise results even in the
114  /// absence of kill flags.
115  void backward();
116 
117  /// Call backward() as long as the internal iterator does not point to \p I.
119  while (MBBI != I)
120  backward();
121  }
122 
123  /// Move the internal MBB iterator but do not update register states.
125  if (I == MachineBasicBlock::iterator(nullptr))
126  Tracking = false;
127  MBBI = I;
128  }
129 
131 
132  /// Return if a specific register is currently used.
133  bool isRegUsed(Register Reg, bool includeReserved = true) const;
134 
135  /// Return all available registers in the register class in Mask.
137 
138  /// Find an unused register of the specified register class.
139  /// Return 0 if none is found.
140  Register FindUnusedReg(const TargetRegisterClass *RC) const;
141 
142  /// Add a scavenging frame index.
143  void addScavengingFrameIndex(int FI) {
144  Scavenged.push_back(ScavengedInfo(FI));
145  }
146 
147  /// Query whether a frame index is a scavenging frame index.
148  bool isScavengingFrameIndex(int FI) const {
149  for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
150  IE = Scavenged.end(); I != IE; ++I)
151  if (I->FrameIndex == FI)
152  return true;
153 
154  return false;
155  }
156 
157  /// Get an array of scavenging frame indices.
159  for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
160  IE = Scavenged.end(); I != IE; ++I)
161  if (I->FrameIndex >= 0)
162  A.push_back(I->FrameIndex);
163  }
164 
165  /// Make a register of the specific register class
166  /// available and do the appropriate bookkeeping. SPAdj is the stack
167  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
168  /// Returns the scavenged register.
169  /// This is deprecated as it depends on the quality of the kill flags being
170  /// present; Use scavengeRegisterBackwards() instead!
171  ///
172  /// If \p AllowSpill is false, fail if a spill is required to make the
173  /// register available, and return NoRegister.
175  MachineBasicBlock::iterator I, int SPAdj,
176  bool AllowSpill = true);
177  Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj,
178  bool AllowSpill = true) {
179  return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
180  }
181 
182  /// Make a register of the specific register class available from the current
183  /// position backwards to the place before \p To. If \p RestoreAfter is true
184  /// this includes the instruction following the current position.
185  /// SPAdj is the stack adjustment due to call frame, it's passed along to
186  /// eliminateFrameIndex().
187  /// Returns the scavenged register.
188  ///
189  /// If \p AllowSpill is false, fail if a spill is required to make the
190  /// register available, and return NoRegister.
193  bool RestoreAfter, int SPAdj,
194  bool AllowSpill = true);
195 
196  /// Tell the scavenger a register is used.
198 
199 private:
200  /// Returns true if a register is reserved. It is never "unused".
201  bool isReserved(Register Reg) const { return MRI->isReserved(Reg); }
202 
203  /// setUsed / setUnused - Mark the state of one or a number of register units.
204  ///
205  void setUsed(const BitVector &RegUnits) {
206  LiveUnits.addUnits(RegUnits);
207  }
208  void setUnused(const BitVector &RegUnits) {
209  LiveUnits.removeUnits(RegUnits);
210  }
211 
212  /// Processes the current instruction and fill the KillRegUnits and
213  /// DefRegUnits bit vectors.
214  void determineKillsAndDefs();
215 
216  /// Add all Reg Units that Reg contains to BV.
217  void addRegUnits(BitVector &BV, MCRegister Reg);
218 
219  /// Remove all Reg Units that \p Reg contains from \p BV.
220  void removeRegUnits(BitVector &BV, MCRegister Reg);
221 
222  /// Return the candidate register that is unused for the longest after
223  /// StartMI. UseMI is set to the instruction where the search stopped.
224  ///
225  /// No more than InstrLimit instructions are inspected.
226  Register findSurvivorReg(MachineBasicBlock::iterator StartMI,
227  BitVector &Candidates,
228  unsigned InstrLimit,
230 
231  /// Initialize RegisterScavenger.
232  void init(MachineBasicBlock &MBB);
233 
234  /// Spill a register after position \p After and reload it before position
235  /// \p UseMI.
236  ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
239 };
240 
241 /// Replaces all frame index virtual registers with physical registers. Uses the
242 /// register scavenger to find an appropriate register to use.
243 void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
244 
245 } // end namespace llvm
246 
247 #endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::RegScavenger::scavengeRegister
Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj, bool AllowSpill=true)
Definition: RegisterScavenging.h:177
UseMI
MachineInstrBuilder & UseMI
Definition: AArch64ExpandPseudoInsts.cpp:103
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::RegScavenger::scavengeRegisterBackwards
Register scavengeRegisterBackwards(const TargetRegisterClass &RC, MachineBasicBlock::iterator To, bool RestoreAfter, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available from the current position backwards to the p...
Definition: RegisterScavenging.cpp:585
llvm::SmallVector< ScavengedInfo, 2 >
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
MachineBasicBlock.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
llvm::LiveRegUnits::addUnits
void addUnits(const BitVector &RegUnits)
Adds all register units marked in the bitvector RegUnits.
Definition: LiveRegUnits.h:144
InstrLimit
static cl::opt< unsigned > InstrLimit("dfa-instr-limit", cl::Hidden, cl::init(0), cl::desc("If present, stops packetizing after N instructions"))
llvm::RegScavenger::FindUnusedReg
Register FindUnusedReg(const TargetRegisterClass *RC) const
Find an unused register of the specified register class.
Definition: RegisterScavenging.cpp:266
MachineRegisterInfo.h
llvm::RegScavenger::isScavengingFrameIndex
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
Definition: RegisterScavenging.h:148
llvm::RegScavenger::isRegUsed
bool isRegUsed(Register Reg, bool includeReserved=true) const
Return if a specific register is currently used.
Definition: RegisterScavenging.cpp:260
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::RegScavenger::scavengeRegister
Register scavengeRegister(const TargetRegisterClass *RC, MachineBasicBlock::iterator I, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available and do the appropriate bookkeeping.
Definition: RegisterScavenging.cpp:518
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
llvm::RegScavenger::getScavengingFrameIndices
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
Definition: RegisterScavenging.h:158
llvm::RegScavenger::backward
void backward()
Update internal register state and move MBB iterator backwards.
Definition: RegisterScavenging.cpp:239
llvm::RegScavenger::backward
void backward(MachineBasicBlock::iterator I)
Call backward() as long as the internal iterator does not point to I.
Definition: RegisterScavenging.h:118
llvm::RegScavenger::enterBasicBlockEnd
void enterBasicBlockEnd(MachineBasicBlock &MBB)
Start tracking liveness from the end of basic block MBB.
Definition: RegisterScavenging.cpp:87
BitVector.h
llvm::BitVector
Definition: BitVector.h:75
llvm::LiveRegUnits
A set of register units used to track register liveness.
Definition: LiveRegUnits.h:30
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::RegScavenger::skipTo
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
Definition: RegisterScavenging.h:124
llvm::RegScavenger::RegScavenger
RegScavenger()=default
llvm::ARM_PROC::IE
@ IE
Definition: ARMBaseInfo.h:27
llvm::ISD::Register
@ Register
Definition: ISDOpcodes.h:74
llvm::RegScavenger::getCurrentPosition
MachineBasicBlock::iterator getCurrentPosition() const
Definition: RegisterScavenging.h:130
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::LiveRegUnits::removeUnits
void removeUnits(const BitVector &RegUnits)
Removes all register units marked in the bitvector RegUnits.
Definition: LiveRegUnits.h:148
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::scavengeFrameVirtualRegs
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS)
Replaces all frame index virtual registers with physical registers.
Definition: RegisterScavenging.cpp:757
llvm::RegScavenger
Definition: RegisterScavenging.h:34
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:143
llvm::RegScavenger::assignRegToScavengingIndex
void assignRegToScavengingIndex(int FI, Register Reg, MachineInstr *Restore=nullptr)
Record that Reg is in use at scavenging index FI.
Definition: RegisterScavenging.h:79
llvm::MachineBasicBlock::iterator
MachineInstrBundleIterator< MachineInstr > iterator
Definition: MachineBasicBlock.h:242
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
LiveRegUnits.h
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::RegScavenger::enterBasicBlock
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
Definition: RegisterScavenging.cpp:82
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::RegScavenger::setRegUsed
void setRegUsed(Register Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Tell the scavenger a register is used.
Definition: RegisterScavenging.cpp:51
llvm::RegScavenger::forward
void forward()
Move the internal MBB iterator and update register states.
Definition: RegisterScavenging.cpp:155
llvm::RegScavenger::forward
void forward(MachineBasicBlock::iterator I)
Move the internal MBB iterator and update register states until it has processed the specific iterato...
Definition: RegisterScavenging.h:107
llvm::RegScavenger::getRegsAvailable
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
Definition: RegisterScavenging.cpp:277
SmallVector.h
LaneBitmask.h
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::LaneBitmask::getAll
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84