17#ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18#define LLVM_CODEGEN_REGISTERSCAVENGING_H
31class TargetRegisterClass;
32class TargetRegisterInfo;
42 bool Tracking =
false;
45 struct ScavengedInfo {
46 ScavengedInfo(
int FI = -1) : FrameIndex(FI) {}
75 for (ScavengedInfo &Slot : Scavenged) {
76 if (Slot.FrameIndex == FI) {
79 Slot.Restore = Restore;
130 for (
const ScavengedInfo &SI : Scavenged)
131 if (SI.FrameIndex == FI)
139 for (
const ScavengedInfo &
I : Scavenged)
140 if (
I.FrameIndex >= 0)
141 A.push_back(
I.FrameIndex);
155 bool RestoreAfter,
int SPAdj,
156 bool AllowSpill =
true);
166 void init(MachineBasicBlock &MBB);
170 ScavengedInfo &spill(Register
Reg,
const TargetRegisterClass &RC,
int SPAdj,
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder & UseMI
MachineBasicBlock MachineBasicBlock::iterator MBBI
This file implements the BitVector class.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
A common definition of LaneBitmask for use in TableGen and CodeGen.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
A set of register units used to track register liveness.
MachineInstrBundleIterator< MachineInstr > iterator
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
void backward(MachineBasicBlock::iterator I)
Call backward() as long as the internal iterator does not point to I.
void enterBasicBlockEnd(MachineBasicBlock &MBB)
Start tracking liveness from the end of basic block MBB.
bool isRegUsed(Register Reg, bool includeReserved=true) const
Return if a specific register is currently used.
Register FindUnusedReg(const TargetRegisterClass *RC) const
Find an unused register of the specified register class.
void setRegUsed(Register Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Tell the scavenger a register is used.
void assignRegToScavengingIndex(int FI, Register Reg, MachineInstr *Restore=nullptr)
Record that Reg is in use at scavenging index FI.
void backward()
Update internal register state and move MBB iterator backwards.
MachineBasicBlock::iterator getCurrentPosition() const
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
Register scavengeRegisterBackwards(const TargetRegisterClass &RC, MachineBasicBlock::iterator To, bool RestoreAfter, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available from the current position backwards to the p...
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
Wrapper class representing virtual and physical registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS)
Replaces all frame index virtual registers with physical registers.
static constexpr LaneBitmask getAll()