#include "llvm/Transforms/Utils/Mem2Reg.h"#include "llvm/ADT/Statistic.h"#include "llvm/Analysis/AssumptionCache.h"#include "llvm/IR/BasicBlock.h"#include "llvm/IR/Dominators.h"#include "llvm/IR/Function.h"#include "llvm/IR/Instructions.h"#include "llvm/IR/PassManager.h"#include "llvm/InitializePasses.h"#include "llvm/Pass.h"#include "llvm/Support/Casting.h"#include "llvm/Transforms/Utils.h"#include "llvm/Transforms/Utils/PromoteMemToReg.h"#include <vector>Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "mem2reg" |
Functions | |
| STATISTIC (NumPromoted, "Number of alloca's promoted") | |
| static bool | promoteMemoryToRegister (Function &F, DominatorTree &DT, AssumptionCache &AC) |
| INITIALIZE_PASS_BEGIN (PromoteLegacyPass, "mem2reg", "Promote Memory to " "Register", false, false) INITIALIZE_PASS_END(PromoteLegacyPass | |
Variables | |
| mem2reg | |
| Promote Memory to | Register |
| Promote Memory to | false |
Macro Definition Documentation
◆ DEBUG_TYPE
| #define DEBUG_TYPE "mem2reg" |
Definition at line 31 of file Mem2Reg.cpp.
Function Documentation
◆ INITIALIZE_PASS_BEGIN()
| INITIALIZE_PASS_BEGIN | ( | PromoteLegacyPass | , |
| "mem2reg" | , | ||
| "Promote Memory to " "Register" | , | ||
| false | , | ||
| false | ) |
References INITIALIZE_PASS_DEPENDENCY.
◆ promoteMemoryToRegister()
|
static |
Definition at line 35 of file Mem2Reg.cpp.
References llvm::BasicBlock::begin(), Changed, llvm::dyn_cast(), E(), llvm::BasicBlock::end(), F, I, llvm::isAllocaPromotable(), and llvm::PromoteMemToReg().
Referenced by llvm::PromotePass::run().
◆ STATISTIC()
| STATISTIC | ( | NumPromoted | , |
| "Number of alloca's promoted" | ) |
Variable Documentation
◆ false
| Promote Memory to false |
Definition at line 111 of file Mem2Reg.cpp.
◆ mem2reg
| mem2reg |
Definition at line 110 of file Mem2Reg.cpp.
◆ Register
Definition at line 110 of file Mem2Reg.cpp.
Referenced by llvm::LanaiInstrInfo::analyzeCompare(), llvm::SIInstrInfo::analyzeCompare(), analyzeCompressibleUses(), llvm::VirtRegOrUnit::asVirtualReg(), llvm::build2DBlockIOINTELInst(), llvm::buildAtomicFlagInst(), llvm::buildAtomicInitInst(), llvm::buildAtomicRMWInst(), llvm::buildAtomicStoreInst(), llvm::buildBarrierInst(), llvm::MachineIRBuilder::buildConstDbgValue(), llvm::SwitchCG::SwitchLowering::buildJumpTable(), llvm::AMDGPULegalizerInfo::buildMultiply(), llvm::buildNDRange(), llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::ModuloScheduleExpanderMVE::canApply(), checkFrameBase(), llvm::checkVOPDRegConstraints(), llvm::LegalizerHelper::coerceToScalar(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::CCValAssign::convertToReg(), llvm::VirtRegAuxInfo::copyHint(), llvm::SIInstrInfo::copyPhysReg(), llvm::LiveRangeEdit::eliminateDeadDefs(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitBuildPairF64Pseudo(), llvm::X86FrameLowering::emitCalleeSavedFrameMoves(), llvm::X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(), llvm::X86FrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::X86FrameLowering::emitPrologue(), llvm::M68kInstrInfo::ExpandMOVI(), llvm::FastISel::fastEmit_(), llvm::FastISel::fastEmit_f(), llvm::FastISel::fastEmit_i(), llvm::FastISel::fastEmit_r(), llvm::FastISel::fastEmit_ri(), llvm::FastISel::fastEmit_ri_(), llvm::FastISel::fastEmit_rr(), llvm::FastISel::fastMaterializeAlloca(), llvm::FastISel::fastMaterializeConstant(), llvm::FastISel::fastMaterializeFloatZero(), llvm::SPIRVIRMapping::find(), findImplicitSGPRRead(), findLocalRegDef(), findUniqueOperandDefinedInLoop(), llvm::LegalizationArtifactCombiner::ArtifactValueFinder::findValueFromDef(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::generateAsyncCopy(), llvm::generateCoopMatrInst(), llvm::generateReadImageInst(), llvm::generateWriteImageInst(), llvm::SIInstrInfo::getAddNoCarry(), getBaseWithConstantOffset(), llvm::AMDGPU::getBaseWithConstantOffset(), llvm::ARMTargetLowering::getExceptionPointerRegister(), llvm::TargetLoweringBase::getExceptionPointerRegister(), llvm::ARMTargetLowering::getExceptionSelectorRegister(), llvm::TargetLoweringBase::getExceptionSelectorRegister(), llvm::DirectXRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIMachineFunctionInfo::getGITPtrLoReg(), getInitPhiReg(), llvm::SwingSchedulerDAG::getInstrBaseReg(), llvm::MachineRegisterInfo::getLiveInVirtReg(), getLoadInfo(), LiveDebugValues::MLocTracker::getLocSizeInBits(), getLoopPhiReg(), getLoopPhiReg(), llvm::rdf::PhysicalRegisterInfo::getMaskUnits(), getPhiRegs(), getPhiRegs(), llvm::CCValAssign::getReg(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegAllocationHint(), llvm::RISCVRegisterInfo::getRegAllocationHints(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::X86RegisterInfo::getRegAllocationHints(), llvm::FastISel::getRegForGEPIndex(), llvm::FastISel::getRegForValue(), llvm::HexagonTargetLowering::getRegisterByName(), llvm::LanaiTargetLowering::getRegisterByName(), llvm::MipsTargetLowering::getRegisterByName(), llvm::SITargetLowering::getRegisterByName(), llvm::SparcTargetLowering::getRegisterByName(), llvm::SystemZTargetLowering::getRegisterByName(), llvm::VETargetLowering::getRegisterByName(), getRegistersForValue(), getRegistersForValue(), llvm::rdf::PhysicalRegisterInfo::getRegMaskBits(), llvm::AMDGPULegalizerInfo::getSegmentAperture(), llvm::MachineRegisterInfo::getSimpleHint(), llvm::getSrcRegIgnoringCopies(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), getWaveAddress(), handleMustTailForwardedRegisters(), llvm::VirtRegMap::hasPreferredPhys(), llvm::Register::index2StackSlot(), INITIALIZE_PASS(), llvm::FunctionLoweringInfo::InitializeRegForValue(), llvm::LoongArchInstrInfo::insertIndirectBranch(), llvm::RISCVInstrInfo::insertIndirectBranch(), llvm::XtensaInstrInfo::insertIndirectBranch(), llvm::GISelAddressing::instMayAlias(), llvm::CoalescerPair::isCoalescable(), isCopyOf(), isCopyOfBundle(), llvm::RISCVInstrInfo::isLoadFromStackSlot(), llvm::SIInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlot(), llvm::XtensaInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlotPostFE(), llvm::rdf::RegisterRef::isMaskId(), llvm::SIInstrInfo::isStackAccess(), llvm::RISCVInstrInfo::isStoreToStackSlot(), llvm::SIInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlot(), llvm::XtensaInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlotPostFE(), llvm::AMDGPULegalizerInfo::legalizeAddrSpaceCast(), llvm::AMDGPULegalizerInfo::legalizeIsAddrSpace(), llvm::AMDGPULegalizerInfo::legalizeWaveID(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), LookForIdenticalPHI(), llvm::TargetRegisterInfo::lookThruSingleUseCopyChain(), llvm::MipsCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::CombinerHelper::matchRedundantBinOpInEquality(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::RISCVInstrInfo::optimizeCondBranch(), llvm::rdf::PhysicalRegisterInfo::print(), llvm::printVRegOrUnit(), llvm::SIFrameLowering::processFunctionBeforeFrameFinalized(), processNewInstrs(), llvm::SwiftErrorValueTracking::propagateVRegs(), llvm::PPCFrameLowering::restoreCalleeSavedRegisters(), llvm::SIRegisterInfo::restoreSGPR(), ScopedScavengeOrSpill::ScopedScavengeOrSpill(), llvm::CoalescerPair::setRegisters(), llvm::XtensaFrameLowering::spillCalleeSavedRegisters(), llvm::SIRegisterInfo::spillEmergencySGPR(), llvm::SIRegisterInfo::spillSGPR(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), AMDGPURegBankLegalizeCombiner::tryMatch(), UseReg(), llvm::VirtRegAuxInfo::weightCalcHelper(), and ScopedScavengeOrSpill::~ScopedScavengeOrSpill().
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