27 #define GET_REGINFO_TARGET_DESC
28 #include "RISCVGenRegisterInfo.inc"
32 static_assert(RISCV::X1 == RISCV::X0 + 1,
"Register list not consecutive");
33 static_assert(RISCV::X31 == RISCV::X0 + 31,
"Register list not consecutive");
34 static_assert(RISCV::F1_H == RISCV::F0_H + 1,
"Register list not consecutive");
35 static_assert(RISCV::F31_H == RISCV::F0_H + 31,
36 "Register list not consecutive");
37 static_assert(RISCV::F1_F == RISCV::F0_F + 1,
"Register list not consecutive");
38 static_assert(RISCV::F31_F == RISCV::F0_F + 31,
39 "Register list not consecutive");
40 static_assert(RISCV::F1_D == RISCV::F0_D + 1,
"Register list not consecutive");
41 static_assert(RISCV::F31_D == RISCV::F0_D + 31,
42 "Register list not consecutive");
43 static_assert(RISCV::V1 == RISCV::V0 + 1,
"Register list not consecutive");
44 static_assert(RISCV::V31 == RISCV::V0 + 31,
"Register list not consecutive");
54 return CSR_NoRegs_SaveList;
56 if (Subtarget.hasStdExtD())
57 return CSR_XLEN_F64_Interrupt_SaveList;
58 if (Subtarget.hasStdExtF())
59 return CSR_XLEN_F32_Interrupt_SaveList;
60 return CSR_Interrupt_SaveList;
63 switch (Subtarget.getTargetABI()) {
68 return CSR_ILP32_LP64_SaveList;
71 return CSR_ILP32F_LP64F_SaveList;
74 return CSR_ILP32D_LP64D_SaveList;
83 for (
size_t Reg = 0;
Reg < getNumRegs();
Reg++) {
85 markSuperRegs(Reserved,
Reg);
89 markSuperRegs(Reserved, RISCV::X0);
90 markSuperRegs(Reserved, RISCV::X2);
91 markSuperRegs(Reserved, RISCV::X3);
92 markSuperRegs(Reserved, RISCV::X4);
94 markSuperRegs(Reserved, RISCV::X8);
101 markSuperRegs(Reserved, RISCV::VL);
102 markSuperRegs(Reserved, RISCV::VTYPE);
103 markSuperRegs(Reserved, RISCV::VXSAT);
104 markSuperRegs(Reserved, RISCV::VXRM);
105 markSuperRegs(Reserved, RISCV::VLENB);
108 markSuperRegs(Reserved, RISCV::FRM);
109 markSuperRegs(Reserved, RISCV::FFLAGS);
111 assert(checkAllSuperRegsMarked(Reserved));
121 return PhysReg == RISCV::X0 || PhysReg == RISCV::VLENB;
125 return CSR_NoRegs_RegMask;
148 int &FrameIdx)
const {
150 if (!RVFI->useSaveRestoreLibCalls(MF))
158 FrameIdx = FII->second;
163 int SPAdj,
unsigned FIOperandNum,
165 assert(SPAdj == 0 &&
"Unexpected non-zero SPAdj value");
173 int FrameIndex =
MI.getOperand(FIOperandNum).getIndex();
176 getFrameLowering(MF)->getFrameIndexReference(MF,
FrameIndex, FrameReg);
183 "Frame offsets outside of the signed 32-bit range not supported");
187 bool FrameRegIsKill =
false;
196 if (Offset.getScalable()) {
197 int64_t ScalableValue = Offset.getScalable();
198 if (ScalableValue < 0) {
199 ScalableValue = -ScalableValue;
203 ScalableFactorRegister =
204 TII->getVLENFactoredAmount(MF,
MBB, II,
DL, ScalableValue);
207 if (!isInt<12>(Offset.getFixed())) {
211 TII->movImm(
MBB, II,
DL, ScratchReg, Offset.getFixed());
212 if (
MI.getOpcode() == RISCV::ADDI && !Offset.getScalable()) {
216 MI.eraseFromParent();
223 FrameReg = ScratchReg;
224 FrameRegIsKill =
true;
227 if (!Offset.getScalable()) {
229 MI.getOperand(FIOperandNum)
230 .ChangeToRegister(FrameReg,
false,
false, FrameRegIsKill);
232 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset.getFixed());
234 if (Offset.getFixed()) {
238 .
addImm(Offset.getFixed());
239 MI.getOperand(FIOperandNum)
240 .ChangeToRegister(ScratchReg,
false,
false,
true);
246 assert(ScalableFactorRegister &&
247 "Expected pre-computation of scalable factor in earlier step");
250 if (
MI.getOpcode() == RISCV::ADDI && !Offset.getFixed()) {
254 MI.eraseFromParent();
262 if (IsRVVSpill && Offset.getFixed()) {
267 .
addImm(Offset.getFixed());
271 MI.getOperand(FIOperandNum).ChangeToRegister(VL,
false,
false,
true);
273 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset.getFixed());
281 if (ShiftAmount != 0)
288 MI.getOperand(FIOperandNum + 1).ChangeToRegister(VL,
false);
294 return TFI->
hasFP(MF) ? RISCV::X8 : RISCV::X2;
303 return CSR_NoRegs_RegMask;
304 switch (Subtarget.getTargetABI()) {
309 return CSR_ILP32_LP64_RegMask;
312 return CSR_ILP32F_LP64F_RegMask;
315 return CSR_ILP32D_LP64D_RegMask;
322 if (RC == &RISCV::VMV0RegClass)
323 return &RISCV::VRRegClass;
332 assert(Offset.getScalable() % 8 == 0 &&
"Invalid frame offset");
338 int64_t VLENBSized = Offset.getScalable() / 8;
339 if (VLENBSized > 0) {
340 Ops.push_back(dwarf::DW_OP_constu);
341 Ops.push_back(VLENBSized);
342 Ops.
append({dwarf::DW_OP_bregx, VLENB, 0ULL});
343 Ops.push_back(dwarf::DW_OP_mul);
344 Ops.push_back(dwarf::DW_OP_plus);
345 }
else if (VLENBSized < 0) {
346 Ops.push_back(dwarf::DW_OP_constu);
347 Ops.push_back(-VLENBSized);
348 Ops.
append({dwarf::DW_OP_bregx, VLENB, 0ULL});
349 Ops.push_back(dwarf::DW_OP_mul);
350 Ops.push_back(dwarf::DW_OP_minus);