LLVM  17.0.0git
RISCVFrameLowering.h
Go to the documentation of this file.
1 //===-- RISCVFrameLowering.h - Define frame lowering for RISCV -*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class implements RISCV-specific bits of TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
15 
17 #include "llvm/Support/TypeSize.h"
18 
19 namespace llvm {
20 class RISCVSubtarget;
21 
23 public:
26  /*StackAlignment=*/Align(16),
27  /*LocalAreaOffset=*/0,
28  /*TransientStackAlignment=*/Align(16)),
29  STI(STI) {}
30 
31  void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
32  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
33 
35 
37  Register &FrameReg) const override;
38 
39  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
40  RegScavenger *RS) const override;
41 
43  RegScavenger *RS) const override;
44 
45  bool hasFP(const MachineFunction &MF) const override;
46 
47  bool hasBP(const MachineFunction &MF) const;
48 
49  bool hasReservedCallFrame(const MachineFunction &MF) const override;
52  MachineBasicBlock::iterator MI) const override;
56  const TargetRegisterInfo *TRI) const override;
57  bool
61  const TargetRegisterInfo *TRI) const override;
62 
63  // Get the first stack adjustment amount for SplitSPAdjust.
64  // Return 0 if we don't want to to split the SP adjustment in prologue and
65  // epilogue.
67 
68  bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
69  bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
70 
71  bool enableShrinkWrapping(const MachineFunction &MF) const override;
72 
73  bool isSupportedStackID(TargetStackID::Value ID) const override;
75 
76  bool isStackIdSafeForLocalArea(unsigned StackId) const override {
77  // We don't support putting RISCV Vector objects into the pre-allocated
78  // local frame block at the moment.
79  return StackId != TargetStackID::ScalableVector;
80  }
81 
82 protected:
84 
85 private:
86  void determineFrameLayout(MachineFunction &MF) const;
87  void adjustStackForRVV(MachineFunction &MF, MachineBasicBlock &MBB,
89  int64_t Amount, MachineInstr::MIFlag Flag) const;
90  std::pair<int64_t, Align>
91  assignRVVStackObjectOffsets(MachineFunction &MF) const;
92 };
93 } // namespace llvm
94 #endif
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:109
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
TargetFrameLowering.h
llvm::RISCVFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: RISCVFrameLowering.cpp:1217
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
TypeSize.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:236
llvm::RISCVFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: RISCVFrameLowering.cpp:1144
llvm::RISCVFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: RISCVFrameLowering.cpp:700
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::RISCVFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: RISCVFrameLowering.cpp:394
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:27
llvm::RISCVFrameLowering::STI
const RISCVSubtarget & STI
Definition: RISCVFrameLowering.h:83
llvm::RISCVFrameLowering
Definition: RISCVFrameLowering.h:22
llvm::RISCVFrameLowering::canUseAsPrologue
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
Definition: RISCVFrameLowering.cpp:1308
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:148
llvm::RISCVFrameLowering::isStackIdSafeForLocalArea
bool isStackIdSafeForLocalArea(unsigned StackId) const override
This method returns whether or not it is safe for an object with the given stack id to be bundled int...
Definition: RISCVFrameLowering.h:76
llvm::RISCVFrameLowering::getFirstSPAdjustAmount
uint64_t getFirstSPAdjustAmount(const MachineFunction &MF) const
Definition: RISCVFrameLowering.cpp:1191
llvm::BitVector
Definition: BitVector.h:75
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::RISCVFrameLowering::enableShrinkWrapping
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
Definition: RISCVFrameLowering.cpp:1300
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
uint64_t
llvm::RISCVFrameLowering::getStackSizeWithRVVPadding
uint64_t getStackSizeWithRVVPadding(const MachineFunction &MF) const
Definition: RISCVFrameLowering.cpp:287
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::TargetStackID::ScalableVector
@ ScalableVector
Definition: TargetFrameLowering.h:30
llvm::RISCVSubtarget
Definition: RISCVSubtarget.h:35
llvm::RISCVFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: RISCVFrameLowering.cpp:1150
llvm::RISCVFrameLowering::RISCVFrameLowering
RISCVFrameLowering(const RISCVSubtarget &STI)
Definition: RISCVFrameLowering.h:24
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:82
llvm::MachineFunction
Definition: MachineFunction.h:258
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:33
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::StackOffset
StackOffset holds a fixed and a scalable offset in bytes.
Definition: TypeSize.h:36
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::RISCVFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: RISCVFrameLowering.cpp:231
llvm::RISCVFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: RISCVFrameLowering.cpp:1074
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::RISCVFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: RISCVFrameLowering.cpp:609
llvm::RISCVFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: RISCVFrameLowering.cpp:1254
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::RISCVFrameLowering::getStackIDForScalableVectors
TargetStackID::Value getStackIDForScalableVectors() const override
Returns the StackID that scalable vectors should be associated with.
Definition: RISCVFrameLowering.cpp:1367
llvm::RISCVFrameLowering::canUseAsEpilogue
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
Definition: RISCVFrameLowering.cpp:1325
llvm::TargetFrameLowering::StackGrowsDown
@ StackGrowsDown
Definition: TargetFrameLowering.h:47
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::RISCVFrameLowering::isSupportedStackID
bool isSupportedStackID(TargetStackID::Value ID) const override
Definition: RISCVFrameLowering.cpp:1354
llvm::RISCVFrameLowering::hasBP
bool hasBP(const MachineFunction &MF) const
Definition: RISCVFrameLowering.cpp:240
llvm::RISCVFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: RISCVFrameLowering.cpp:874
llvm::MachineInstrBundleIterator< MachineInstr >