LLVM 17.0.0git
Public Types | Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
llvm::RISCVSubtarget Class Reference

#include "Target/RISCV/RISCVSubtarget.h"

Inheritance diagram for llvm::RISCVSubtarget:
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Collaboration diagram for llvm::RISCVSubtarget:
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Public Types

enum  RISCVProcFamilyEnum : uint8_t { Others , SiFive7 }
 

Public Member Functions

 RISCVSubtarget (const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, StringRef ABIName, unsigned RVVVectorBitsMin, unsigned RVVVectorLMULMax, const TargetMachine &TM)
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 
const RISCVFrameLoweringgetFrameLowering () const override
 
const RISCVInstrInfogetInstrInfo () const override
 
const RISCVRegisterInfogetRegisterInfo () const override
 
const RISCVTargetLoweringgetTargetLowering () const override
 
const SelectionDAGTargetInfogetSelectionDAGInfo () const override
 
bool enableMachineScheduler () const override
 
RISCVProcFamilyEnum getProcFamily () const
 Returns RISCV processor family.
 
bool hasStdExtCOrZca () const
 
bool hasStdExtZvl () const
 
bool hasStdExtZfhOrZfhmin () const
 
bool is64Bit () const
 
MVT getXLenVT () const
 
unsigned getXLen () const
 
unsigned getFLen () const
 
unsigned getELEN () const
 
unsigned getRealMinVLen () const
 
unsigned getRealMaxVLen () const
 
RISCVABI::ABI getTargetABI () const
 
bool isRegisterReservedByUser (Register i) const
 
bool hasMacroFusion () const
 
bool hasVInstructions () const
 
bool hasVInstructionsI64 () const
 
bool hasVInstructionsF16 () const
 
bool hasVInstructionsF32 () const
 
bool hasVInstructionsF64 () const
 
bool hasVInstructionsAnyF () const
 
unsigned getMaxInterleaveFactor () const
 
const CallLoweringgetCallLowering () const override
 
InstructionSelectorgetInstructionSelector () const override
 
const LegalizerInfogetLegalizerInfo () const override
 
const RegisterBankInfogetRegBankInfo () const override
 
bool useConstantPoolForLargeInts () const
 
unsigned getMaxBuildIntsCost () const
 
unsigned getMaxLMULForFixedLengthVectors () const
 
bool useRVVForFixedLengthVectors () const
 
bool enableSubRegLiveness () const override
 
void getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override
 

Protected Member Functions

unsigned getMaxRVVVectorSizeInBits () const
 
unsigned getMinRVVVectorSizeInBits () const
 

Protected Attributes

std::unique_ptr< CallLoweringCallLoweringInfo
 
std::unique_ptr< InstructionSelectorInstSelector
 
std::unique_ptr< LegalizerInfoLegalizer
 
std::unique_ptr< RegisterBankInfoRegBankInfo
 

Detailed Description

Definition at line 35 of file RISCVSubtarget.h.

Member Enumeration Documentation

◆ RISCVProcFamilyEnum

Enumerator
Others 
SiFive7 

Definition at line 37 of file RISCVSubtarget.h.

Constructor & Destructor Documentation

◆ RISCVSubtarget()

RISCVSubtarget::RISCVSubtarget ( const Triple TT,
StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS,
StringRef  ABIName,
unsigned  RVVVectorBitsMin,
unsigned  RVVVectorLMULMax,
const TargetMachine TM 
)

Member Function Documentation

◆ enableMachineScheduler()

bool llvm::RISCVSubtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 96 of file RISCVSubtarget.h.

◆ enableSubRegLiveness()

bool RISCVSubtarget::enableSubRegLiveness ( ) const
override

Definition at line 167 of file RISCVSubtarget.cpp.

References EnableSubRegLiveness.

◆ getCallLowering()

const CallLowering * RISCVSubtarget::getCallLowering ( ) const
override

Definition at line 95 of file RISCVSubtarget.cpp.

References CallLoweringInfo.

◆ getELEN()

unsigned llvm::RISCVSubtarget::getELEN ( ) const
inline

◆ getFLen()

unsigned llvm::RISCVSubtarget::getFLen ( ) const
inline

Definition at line 114 of file RISCVSubtarget.h.

◆ getFrameLowering()

const RISCVFrameLowering * llvm::RISCVSubtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 83 of file RISCVSubtarget.h.

◆ getInstrInfo()

const RISCVInstrInfo * llvm::RISCVSubtarget::getInstrInfo ( ) const
inlineoverride

◆ getInstructionSelector()

InstructionSelector * RISCVSubtarget::getInstructionSelector ( ) const
override

Definition at line 99 of file RISCVSubtarget.cpp.

References InstSelector.

◆ getLegalizerInfo()

const LegalizerInfo * RISCVSubtarget::getLegalizerInfo ( ) const
override

Definition at line 103 of file RISCVSubtarget.cpp.

◆ getMaxBuildIntsCost()

unsigned RISCVSubtarget::getMaxBuildIntsCost ( ) const

◆ getMaxInterleaveFactor()

unsigned llvm::RISCVSubtarget::getMaxInterleaveFactor ( ) const
inline

Definition at line 155 of file RISCVSubtarget.h.

References hasVInstructions().

◆ getMaxLMULForFixedLengthVectors()

unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors ( ) const

◆ getMaxRVVVectorSizeInBits()

unsigned RISCVSubtarget::getMaxRVVVectorSizeInBits ( ) const
protected

Definition at line 126 of file RISCVSubtarget.cpp.

References assert(), hasVInstructions(), and llvm::report_fatal_error().

Referenced by getRealMaxVLen().

◆ getMinRVVVectorSizeInBits()

unsigned RISCVSubtarget::getMinRVVVectorSizeInBits ( ) const
protected

◆ getPostRAMutations()

void RISCVSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation > > &  Mutations) const
override

Definition at line 173 of file RISCVSubtarget.cpp.

References llvm::createRISCVMacroFusionDAGMutation().

◆ getProcFamily()

RISCVProcFamilyEnum llvm::RISCVSubtarget::getProcFamily ( ) const
inline

Returns RISCV processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 102 of file RISCVSubtarget.h.

◆ getRealMaxVLen()

unsigned llvm::RISCVSubtarget::getRealMaxVLen ( ) const
inline

◆ getRealMinVLen()

unsigned llvm::RISCVSubtarget::getRealMinVLen ( ) const
inline

◆ getRegBankInfo()

const RegisterBankInfo * RISCVSubtarget::getRegBankInfo ( ) const
override

Definition at line 107 of file RISCVSubtarget.cpp.

References RegBankInfo.

◆ getRegisterInfo()

const RISCVRegisterInfo * llvm::RISCVSubtarget::getRegisterInfo ( ) const
inlineoverride

◆ getSelectionDAGInfo()

const SelectionDAGTargetInfo * llvm::RISCVSubtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 93 of file RISCVSubtarget.h.

◆ getTargetABI()

RISCVABI::ABI llvm::RISCVSubtarget::getTargetABI ( ) const
inline

◆ getTargetLowering()

const RISCVTargetLowering * llvm::RISCVSubtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 90 of file RISCVSubtarget.h.

Referenced by RISCVSubtarget(), and llvm::RISCVDAGToDAGISel::Select().

◆ getXLen()

unsigned llvm::RISCVSubtarget::getXLen ( ) const
inline

◆ getXLenVT()

MVT llvm::RISCVSubtarget::getXLenVT ( ) const
inline

◆ hasMacroFusion()

bool llvm::RISCVSubtarget::hasMacroFusion ( ) const
inline

Definition at line 141 of file RISCVSubtarget.h.

◆ hasStdExtCOrZca()

bool llvm::RISCVSubtarget::hasStdExtCOrZca ( ) const
inline

◆ hasStdExtZfhOrZfhmin()

bool llvm::RISCVSubtarget::hasStdExtZfhOrZfhmin ( ) const
inline

◆ hasStdExtZvl()

bool llvm::RISCVSubtarget::hasStdExtZvl ( ) const
inline

Definition at line 109 of file RISCVSubtarget.h.

◆ hasVInstructions()

bool llvm::RISCVSubtarget::hasVInstructions ( ) const
inline

◆ hasVInstructionsAnyF()

bool llvm::RISCVSubtarget::hasVInstructionsAnyF ( ) const
inline

Definition at line 154 of file RISCVSubtarget.h.

References hasVInstructionsF32().

◆ hasVInstructionsF16()

bool llvm::RISCVSubtarget::hasVInstructionsF16 ( ) const
inline

◆ hasVInstructionsF32()

bool llvm::RISCVSubtarget::hasVInstructionsF32 ( ) const
inline

◆ hasVInstructionsF64()

bool llvm::RISCVSubtarget::hasVInstructionsF64 ( ) const
inline

◆ hasVInstructionsI64()

bool llvm::RISCVSubtarget::hasVInstructionsI64 ( ) const
inline

◆ is64Bit()

bool llvm::RISCVSubtarget::is64Bit ( ) const
inline

◆ isRegisterReservedByUser()

bool llvm::RISCVSubtarget::isRegisterReservedByUser ( Register  i) const
inline

◆ ParseSubtargetFeatures()

void llvm::RISCVSubtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

◆ useConstantPoolForLargeInts()

bool RISCVSubtarget::useConstantPoolForLargeInts ( ) const

Definition at line 111 of file RISCVSubtarget.cpp.

References RISCVDisableUsingConstantPoolForLargeInts.

Referenced by lowerConstant().

◆ useRVVForFixedLengthVectors()

bool RISCVSubtarget::useRVVForFixedLengthVectors ( ) const

Member Data Documentation

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::RISCVSubtarget::CallLoweringInfo
protected

Definition at line 161 of file RISCVSubtarget.h.

Referenced by getCallLowering(), and RISCVSubtarget().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::RISCVSubtarget::InstSelector
protected

Definition at line 162 of file RISCVSubtarget.h.

Referenced by getInstructionSelector(), and RISCVSubtarget().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::RISCVSubtarget::Legalizer
protected

Definition at line 163 of file RISCVSubtarget.h.

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::RISCVSubtarget::RegBankInfo
protected

Definition at line 164 of file RISCVSubtarget.h.

Referenced by getRegBankInfo(), and RISCVSubtarget().


The documentation for this class was generated from the following files: