LLVM 17.0.0git
Public Member Functions | List of all members
llvm::RISCVRegisterInfo Struct Reference

#include "Target/RISCV/RISCVRegisterInfo.h"

Inheritance diagram for llvm::RISCVRegisterInfo:
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Collaboration diagram for llvm::RISCVRegisterInfo:
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Public Member Functions

 RISCVRegisterInfo (unsigned HwMode)
 
const uint32_tgetCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
 
const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
bool isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
 
const uint32_tgetNoPreservedMask () const override
 
bool hasReservedSpillSlot (const MachineFunction &MF, Register Reg, int &FrameIdx) const override
 
void adjustReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, Register DestReg, Register SrcReg, StackOffset Offset, MachineInstr::MIFlag Flag, MaybeAlign RequiredAlign) const
 
bool eliminateFrameIndex (MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 
bool isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
 
Register materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
 
void resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
 
int64_t getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
 
void lowerVSPILL (MachineBasicBlock::iterator II) const
 
void lowerVRELOAD (MachineBasicBlock::iterator II) const
 
Register getFrameRegister (const MachineFunction &MF) const override
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 
const TargetRegisterClassgetLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &) const override
 
void getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override
 
unsigned getRegisterCostTableIndex (const MachineFunction &MF) const override
 
bool getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
 

Detailed Description

Definition at line 23 of file RISCVRegisterInfo.h.

Constructor & Destructor Documentation

◆ RISCVRegisterInfo()

RISCVRegisterInfo::RISCVRegisterInfo ( unsigned  HwMode)

Definition at line 52 of file RISCVRegisterInfo.cpp.

Member Function Documentation

◆ adjustReg()

void RISCVRegisterInfo::adjustReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  II,
const DebugLoc DL,
Register  DestReg,
Register  SrcReg,
StackOffset  Offset,
MachineInstr::MIFlag  Flag,
MaybeAlign  RequiredAlign 
) const

◆ eliminateFrameIndex()

bool RISCVRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  MI,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const
override

◆ getCalleeSavedRegs()

const MCPhysReg * RISCVRegisterInfo::getCalleeSavedRegs ( const MachineFunction MF) const
override

◆ getCallPreservedMask()

const uint32_t * RISCVRegisterInfo::getCallPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const
override

◆ getFrameIndexInstrOffset()

int64_t RISCVRegisterInfo::getFrameIndexInstrOffset ( const MachineInstr MI,
int  Idx 
) const
override

◆ getFrameRegister()

Register RISCVRegisterInfo::getFrameRegister ( const MachineFunction MF) const
override

Definition at line 622 of file RISCVRegisterInfo.cpp.

References llvm::TargetFrameLowering::hasFP().

◆ getLargestLegalSuperClass()

const TargetRegisterClass * RISCVRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass RC,
const MachineFunction  
) const
override

Definition at line 650 of file RISCVRegisterInfo.cpp.

◆ getNoPreservedMask()

const uint32_t * RISCVRegisterInfo::getNoPreservedMask ( ) const
override

Definition at line 126 of file RISCVRegisterInfo.cpp.

◆ getOffsetOpcodes()

void RISCVRegisterInfo::getOffsetOpcodes ( const StackOffset Offset,
SmallVectorImpl< uint64_t > &  Ops 
) const
override

◆ getPointerRegClass()

const TargetRegisterClass * llvm::RISCVRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
inlineoverride

Definition at line 84 of file RISCVRegisterInfo.h.

◆ getRegAllocationHints()

bool RISCVRegisterInfo::getRegAllocationHints ( Register  VirtReg,
ArrayRef< MCPhysReg Order,
SmallVectorImpl< MCPhysReg > &  Hints,
const MachineFunction MF,
const VirtRegMap VRM,
const LiveRegMatrix Matrix 
) const
override

◆ getRegisterCostTableIndex()

unsigned RISCVRegisterInfo::getRegisterCostTableIndex ( const MachineFunction MF) const
override

Definition at line 685 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

◆ getReservedRegs()

BitVector RISCVRegisterInfo::getReservedRegs ( const MachineFunction MF) const
override

◆ hasReservedSpillSlot()

bool RISCVRegisterInfo::hasReservedSpillSlot ( const MachineFunction MF,
Register  Reg,
int &  FrameIdx 
) const
override

◆ isAsmClobberable()

bool RISCVRegisterInfo::isAsmClobberable ( const MachineFunction MF,
MCRegister  PhysReg 
) const
override

Definition at line 121 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

◆ isFrameOffsetLegal()

bool RISCVRegisterInfo::isFrameOffsetLegal ( const MachineInstr MI,
Register  BaseReg,
int64_t  Offset 
) const
override

Definition at line 557 of file RISCVRegisterInfo.cpp.

References assert(), getFrameIndexInstrOffset(), MI, and llvm::Offset.

Referenced by needsFrameBaseReg().

◆ lowerVRELOAD()

void RISCVRegisterInfo::lowerVRELOAD ( MachineBasicBlock::iterator  II) const

◆ lowerVSPILL()

void RISCVRegisterInfo::lowerVSPILL ( MachineBasicBlock::iterator  II) const

◆ materializeFrameBaseRegister()

Register RISCVRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock MBB,
int  FrameIdx,
int64_t  Offset 
) const
override

◆ needsFrameBaseReg()

bool RISCVRegisterInfo::needsFrameBaseReg ( MachineInstr MI,
int64_t  Offset 
) const
override

◆ requiresFrameIndexScavenging()

bool llvm::RISCVRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
inlineoverride

Definition at line 79 of file RISCVRegisterInfo.h.

◆ requiresRegisterScavenging()

bool llvm::RISCVRegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
inlineoverride

Definition at line 75 of file RISCVRegisterInfo.h.

◆ requiresVirtualBaseRegisters()

bool RISCVRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction MF) const
override

Definition at line 501 of file RISCVRegisterInfo.cpp.

◆ resolveFrameIndex()

void RISCVRegisterInfo::resolveFrameIndex ( MachineInstr MI,
Register  BaseReg,
int64_t  Offset 
) const
override

Definition at line 594 of file RISCVRegisterInfo.cpp.

References assert(), getFrameIndexInstrOffset(), MI, and llvm::Offset.


The documentation for this struct was generated from the following files: