llvm::RISCVRegisterInfo Struct Reference

#include "Target/RISCV/RISCVRegisterInfo.h"

Inheritance diagram for llvm::RISCVRegisterInfo:

Collaboration diagram for llvm::RISCVRegisterInfo:

Public Member Functions
	RISCVRegisterInfo (unsigned HwMode)
const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
BitVector	getReservedRegs (const MachineFunction &MF) const override
bool	isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
bool	isConstantPhysReg (MCRegister PhysReg) const override
const uint32_t *	getNoPreservedMask () const override
bool	hasReservedSpillSlot (const MachineFunction &MF, Register Reg, int &FrameIdx) const override
void	eliminateFrameIndex (MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Register	getFrameRegister (const MachineFunction &MF) const override
bool	requiresRegisterScavenging (const MachineFunction &MF) const override
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &) const override
void	getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override
unsigned	getRegisterCostTableIndex (const MachineFunction &MF) const override

Detailed Description

Definition at line 23 of file RISCVRegisterInfo.h.

Constructor & Destructor Documentation

RISCVRegisterInfo()

RISCVRegisterInfo::RISCVRegisterInfo

(

unsigned

HwMode

)

Definition at line 46 of file RISCVRegisterInfo.cpp.

Member Function Documentation

eliminateFrameIndex()

void RISCVRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  MI, int  SPAdj, unsigned  FIOperandNum, RegScavenger *  RS = nullptr  ) const

override

Definition at line 162 of file RISCVRegisterInfo.cpp.

References llvm::ISD::ADD, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::ISD::FrameIndex, llvm::StackOffset::get(), llvm::StackOffset::getFixed(), llvm::getKillRegState(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::isInt< 32 >(), llvm::RISCV::isRVVSpill(), llvm::RISCV::isRVVSpillForZvlsseg(), llvm::RegState::Kill, llvm::Log2_32(), MBB, MI, MRI, llvm::report_fatal_error(), llvm::ISD::SUB, and TII.

getCalleeSavedRegs()

const MCPhysReg * RISCVRegisterInfo::getCalleeSavedRegs ( const MachineFunction *  MF ) const

override

Definition at line 51 of file RISCVRegisterInfo.cpp.

References llvm::RISCVABI::ABI_ILP32, llvm::RISCVABI::ABI_ILP32D, llvm::RISCVABI::ABI_ILP32F, llvm::RISCVABI::ABI_LP64, llvm::RISCVABI::ABI_LP64D, llvm::RISCVABI::ABI_LP64F, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, llvm::Function::hasFnAttribute(), and llvm_unreachable.

getCallPreservedMask()

const uint32_t * RISCVRegisterInfo::getCallPreservedMask ( const MachineFunction &  MF, CallingConv::ID  CC  ) const

override

Definition at line 298 of file RISCVRegisterInfo.cpp.

References llvm::RISCVABI::ABI_ILP32, llvm::RISCVABI::ABI_ILP32D, llvm::RISCVABI::ABI_ILP32F, llvm::RISCVABI::ABI_LP64, llvm::RISCVABI::ABI_LP64D, llvm::RISCVABI::ABI_LP64F, llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, and llvm_unreachable.

getFrameRegister()

Register RISCVRegisterInfo::getFrameRegister ( const MachineFunction &  MF ) const

override

Definition at line 292 of file RISCVRegisterInfo.cpp.

References llvm::TargetFrameLowering::hasFP().

getLargestLegalSuperClass()

const TargetRegisterClass * RISCVRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass *  RC, const MachineFunction &    ) const

override

Definition at line 320 of file RISCVRegisterInfo.cpp.

getNoPreservedMask()

const uint32_t * RISCVRegisterInfo::getNoPreservedMask ( ) const

override

Definition at line 124 of file RISCVRegisterInfo.cpp.

getOffsetOpcodes()

void RISCVRegisterInfo::getOffsetOpcodes ( const StackOffset &  Offset, SmallVectorImpl< uint64_t > &  Ops  ) const

override

Definition at line 327 of file RISCVRegisterInfo.cpp.

References llvm::SmallVectorImpl< T >::append(), llvm::DIExpression::appendOffset(), assert(), and getDwarfRegNum().

getPointerRegClass()

const TargetRegisterClass* llvm::RISCVRegisterInfo::getPointerRegClass ( const MachineFunction &  MF, unsigned  Kind = 0  ) const

inlineoverride

Definition at line 58 of file RISCVRegisterInfo.h.

getRegisterCostTableIndex()

unsigned RISCVRegisterInfo::getRegisterCostTableIndex ( const MachineFunction &  MF ) const

override

Definition at line 355 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

getReservedRegs()

BitVector RISCVRegisterInfo::getReservedRegs ( const MachineFunction &  MF ) const

override

Definition at line 78 of file RISCVRegisterInfo.cpp.

References assert(), llvm::RISCVABI::getBPReg(), llvm::MachineFunction::getSubtarget(), llvm::RISCVFrameLowering::hasBP(), llvm::RISCVFrameLowering::hasFP(), and llvm::RISCVSubtarget::isRegisterReservedByUser().

Referenced by llvm::RISCVTargetLowering::getRegisterByName().

hasReservedSpillSlot()

bool RISCVRegisterInfo::hasReservedSpillSlot ( const MachineFunction &  MF, Register  Reg, int &  FrameIdx  ) const

override

Definition at line 146 of file RISCVRegisterInfo.cpp.

References llvm::sys::path::end(), llvm::find_if(), FixedCSRFIMap, llvm::MachineFunction::getInfo(), and P.

isAsmClobberable()

bool RISCVRegisterInfo::isAsmClobberable ( const MachineFunction &  MF, MCRegister  PhysReg  ) const

override

Definition at line 115 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

isConstantPhysReg()

bool RISCVRegisterInfo::isConstantPhysReg ( MCRegister  PhysReg ) const

override

Definition at line 120 of file RISCVRegisterInfo.cpp.

requiresFrameIndexScavenging()

bool llvm::RISCVRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction &  MF ) const

inlineoverride

Definition at line 53 of file RISCVRegisterInfo.h.

requiresRegisterScavenging()

bool llvm::RISCVRegisterInfo::requiresRegisterScavenging ( const MachineFunction &  MF ) const

inlineoverride

Definition at line 49 of file RISCVRegisterInfo.h.

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The documentation for this struct was generated from the following files:

• lib/Target/RISCV/RISCVRegisterInfo.h
• lib/Target/RISCV/RISCVRegisterInfo.cpp