LLVM 20.0.0git
Public Member Functions | Static Public Member Functions | List of all members
llvm::RISCVRegisterInfo Struct Reference

#include "Target/RISCV/RISCVRegisterInfo.h"

Inheritance diagram for llvm::RISCVRegisterInfo:
Inheritance graph
[legend]

Public Member Functions

 RISCVRegisterInfo (unsigned HwMode)
 
const uint32_t * getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
 
const MCPhysReg * getCalleeSavedRegs (const MachineFunction *MF) const override
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
bool isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
 
const uint32_t * getNoPreservedMask () const override
 
void adjustReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, Register DestReg, Register SrcReg, StackOffset Offset, MachineInstr::MIFlag Flag, MaybeAlign RequiredAlign) const
 
bool eliminateFrameIndex (MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 
bool isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
 
Register materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
 
void resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
 
int64_t getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
 
void lowerVSPILL (MachineBasicBlock::iterator II) const
 
void lowerVRELOAD (MachineBasicBlock::iterator II) const
 
Register getFrameRegister (const MachineFunction &MF) const override
 
StringRef getRegAsmName (MCRegister Reg) const override
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 
const TargetRegisterClass * getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 
const TargetRegisterClass * getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &) const override
 
void getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override
 
unsigned getRegisterCostTableIndex (const MachineFunction &MF) const override
 
bool getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
 

Static Public Member Functions

static bool isVRRegClass (const TargetRegisterClass *RC)
 
static bool isVRNRegClass (const TargetRegisterClass *RC)
 
static bool isRVVRegClass (const TargetRegisterClass *RC)
 

Detailed Description

Definition at line 56 of file RISCVRegisterInfo.h.

Constructor & Destructor Documentation

◆ RISCVRegisterInfo()

RISCVRegisterInfo::RISCVRegisterInfo ( unsigned  HwMode)

Definition at line 54 of file RISCVRegisterInfo.cpp.

Member Function Documentation

◆ adjustReg()

void RISCVRegisterInfo::adjustReg ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  II,
const DebugLoc &  DL,
Register  DestReg,
Register  SrcReg,
StackOffset  Offset,
MachineInstr::MIFlag  Flag,
MaybeAlign  RequiredAlign 
) const

Definition at line 172 of file RISCVRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), DL, llvm::StackOffset::getFixed(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::RegState::Kill, MBB, MRI, llvm::Offset, llvm::report_fatal_error(), llvm::RISCV::RVVBitsPerBlock, llvm::MachineInstrBuilder::setMIFlag(), TII, llvm::Align::value(), and llvm::MaybeAlign::valueOrOne().

Referenced by llvm::RISCVFrameLowering::allocateStack(), llvm::RISCVFrameLowering::eliminateCallFramePseudoInstr(), eliminateFrameIndex(), and llvm::RISCVFrameLowering::emitEpilogue().

◆ eliminateFrameIndex()

bool RISCVRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  MI,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger *  RS = nullptr 
) const
override

Definition at line 468 of file RISCVRegisterInfo.cpp.

References adjustReg(), assert(), DL, llvm::StackOffset::get(), llvm::StackOffset::getFixed(), llvm::MachineFunction::getRegInfo(), II, llvm::RISCV::isRVVSpill(), lowerVRELOAD(), lowerVSPILL(), MI, MRI, llvm::MachineInstr::NoFlags, llvm::Offset, and llvm::report_fatal_error().

◆ getCalleeSavedRegs()

const MCPhysReg * RISCVRegisterInfo::getCalleeSavedRegs ( const MachineFunction *  MF) const
override

Definition at line 59 of file RISCVRegisterInfo.cpp.

References llvm::RISCVABI::ABI_ILP32, llvm::RISCVABI::ABI_ILP32D, llvm::RISCVABI::ABI_ILP32E, llvm::RISCVABI::ABI_ILP32F, llvm::RISCVABI::ABI_LP64, llvm::RISCVABI::ABI_LP64D, llvm::RISCVABI::ABI_LP64E, llvm::RISCVABI::ABI_LP64F, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, llvm::Function::hasFnAttribute(), llvm_unreachable, and llvm::CallingConv::RISCV_VectorCall.

◆ getCallPreservedMask()

const uint32_t * RISCVRegisterInfo::getCallPreservedMask ( const MachineFunction &  MF,
CallingConv::ID  CC 
) const
override

Definition at line 727 of file RISCVRegisterInfo.cpp.

References llvm::RISCVABI::ABI_ILP32, llvm::RISCVABI::ABI_ILP32D, llvm::RISCVABI::ABI_ILP32E, llvm::RISCVABI::ABI_ILP32F, llvm::RISCVABI::ABI_LP64, llvm::RISCVABI::ABI_LP64D, llvm::RISCVABI::ABI_LP64E, llvm::RISCVABI::ABI_LP64F, CC, llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, llvm_unreachable, and llvm::CallingConv::RISCV_VectorCall.

◆ getFrameIndexInstrOffset()

int64_t RISCVRegisterInfo::getFrameIndexInstrOffset ( const MachineInstr *  MI,
int  Idx 
) const
override

Definition at line 705 of file RISCVRegisterInfo.cpp.

References assert(), llvm::RISCVII::getFormat(), Idx, llvm::RISCVII::InstFormatI, llvm::RISCVII::InstFormatS, and MI.

Referenced by isFrameOffsetLegal(), and resolveFrameIndex().

◆ getFrameRegister()

Register RISCVRegisterInfo::getFrameRegister ( const MachineFunction &  MF) const
override

Definition at line 715 of file RISCVRegisterInfo.cpp.

References llvm::TargetFrameLowering::hasFP().

◆ getLargestLegalSuperClass()

const TargetRegisterClass * RISCVRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass *  RC,
const MachineFunction &   
) const
override

Definition at line 758 of file RISCVRegisterInfo.cpp.

◆ getNoPreservedMask()

const uint32_t * RISCVRegisterInfo::getNoPreservedMask ( ) const
override

Definition at line 168 of file RISCVRegisterInfo.cpp.

◆ getOffsetOpcodes()

void RISCVRegisterInfo::getOffsetOpcodes ( const StackOffset &  Offset,
SmallVectorImpl< uint64_t > &  Ops 
) const
override

Definition at line 773 of file RISCVRegisterInfo.cpp.

References llvm::SmallVectorImpl< T >::append(), llvm::DIExpression::appendOffset(), assert(), getDwarfRegNum(), llvm::Offset, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

◆ getPointerRegClass()

const TargetRegisterClass * llvm::RISCVRegisterInfo::getPointerRegClass ( const MachineFunction &  MF,
unsigned  Kind = 0 
) const
inlineoverride

Definition at line 116 of file RISCVRegisterInfo.h.

◆ getRegAllocationHints()

bool RISCVRegisterInfo::getRegAllocationHints ( Register  VirtReg,
ArrayRef< MCPhysReg >  Order,
SmallVectorImpl< MCPhysReg > &  Hints,
const MachineFunction &  MF,
const VirtRegMap *  VRM,
const LiveRegMatrix *  Matrix 
) const
override

Definition at line 810 of file RISCVRegisterInfo.cpp.

References contains(), llvm::SmallSet< T, N, C >::count(), DisableRegAllocHints, llvm::VirtRegMap::getPhys(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineFunction::getRegInfo(), llvm::MachineOperand::getSubReg(), llvm::MachineFunction::getSubtarget(), llvm::SmallSet< T, N, C >::insert(), llvm::is_contained(), Matrix, MI, MRI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

◆ getRegAsmName()

StringRef RISCVRegisterInfo::getRegAsmName ( MCRegister  Reg) const
override

Definition at line 720 of file RISCVRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getRegAsmName().

◆ getRegisterCostTableIndex()

unsigned RISCVRegisterInfo::getRegisterCostTableIndex ( const MachineFunction &  MF) const
override

Definition at line 801 of file RISCVRegisterInfo.cpp.

References DisableCostPerUse, and llvm::MachineFunction::getSubtarget().

◆ getReservedRegs()

BitVector RISCVRegisterInfo::getReservedRegs ( const MachineFunction &  MF) const
override

Definition at line 101 of file RISCVRegisterInfo.cpp.

References assert(), llvm::RISCVABI::getBPReg(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GRAAL, llvm::RISCVFrameLowering::hasBP(), llvm::TargetFrameLowering::hasFP(), llvm::report_fatal_error(), and llvm::Reserved.

Referenced by llvm::RISCVTargetLowering::getRegisterByName().

◆ isAsmClobberable()

bool RISCVRegisterInfo::isAsmClobberable ( const MachineFunction &  MF,
MCRegister  PhysReg 
) const
override

Definition at line 163 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget(), and llvm::TargetSubtargetInfo::isRegisterReservedByUser().

◆ isFrameOffsetLegal()

bool RISCVRegisterInfo::isFrameOffsetLegal ( const MachineInstr *  MI,
Register  BaseReg,
int64_t  Offset 
) const
override

Definition at line 650 of file RISCVRegisterInfo.cpp.

References assert(), getFrameIndexInstrOffset(), MI, and llvm::Offset.

Referenced by needsFrameBaseReg().

◆ isRVVRegClass()

static bool llvm::RISCVRegisterInfo::isRVVRegClass ( const TargetRegisterClass *  RC)
inlinestatic

Definition at line 144 of file RISCVRegisterInfo.h.

References llvm::RISCVRI::isVRegClass(), and llvm::TargetRegisterClass::TSFlags.

Referenced by llvm::RISCVFrameLowering::assignCalleeSavedSpillSlots(), and llvm::RISCVInstrInfo::copyPhysReg().

◆ isVRNRegClass()

static bool llvm::RISCVRegisterInfo::isVRNRegClass ( const TargetRegisterClass *  RC)
inlinestatic

Definition at line 140 of file RISCVRegisterInfo.h.

References llvm::RISCVRI::getNF(), llvm::RISCVRI::isVRegClass(), and llvm::TargetRegisterClass::TSFlags.

◆ isVRRegClass()

static bool llvm::RISCVRegisterInfo::isVRRegClass ( const TargetRegisterClass *  RC)
inlinestatic

Definition at line 135 of file RISCVRegisterInfo.h.

References llvm::RISCVRI::getNF(), llvm::RISCVRI::isVRegClass(), and llvm::TargetRegisterClass::TSFlags.

◆ lowerVRELOAD()

void RISCVRegisterInfo::lowerVRELOAD ( MachineBasicBlock::iterator  II) const

Definition at line 398 of file RISCVRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::sampleprof::Base, llvm::BuildMI(), DL, llvm::RISCVSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::RISCVSubtarget::getRealVLen(), llvm::MachineFunction::getRegInfo(), llvm::RISCVSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), I, II, llvm::RISCV::isRVVSpillForZvlsseg(), llvm_unreachable, llvm::Log2_32(), MBB, llvm::RISCVInstrInfo::movImm(), MRI, llvm::Offset, TII, and TRI.

Referenced by eliminateFrameIndex().

◆ lowerVSPILL()

void RISCVRegisterInfo::lowerVSPILL ( MachineBasicBlock::iterator  II) const

Definition at line 321 of file RISCVRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::sampleprof::Base, llvm::BuildMI(), DL, llvm::RISCVSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::RISCVSubtarget::getRealVLen(), llvm::MachineFunction::getRegInfo(), llvm::RISCVSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), I, II, llvm::RegState::Implicit, llvm::RISCV::isRVVSpillForZvlsseg(), llvm_unreachable, llvm::Log2_32(), MBB, llvm::RISCVInstrInfo::movImm(), MRI, llvm::Offset, TII, and TRI.

Referenced by eliminateFrameIndex().

◆ materializeFrameBaseRegister()

Register RISCVRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock *  MBB,
int  FrameIdx,
int64_t  Offset 
) const
override

Definition at line 667 of file RISCVRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::MachineBasicBlock::end(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), MBB, MBBI, llvm::Offset, and TII.

◆ needsFrameBaseReg()

bool RISCVRegisterInfo::needsFrameBaseReg ( MachineInstr *  MI,
int64_t  Offset 
) const
override

Definition at line 594 of file RISCVRegisterInfo.cpp.

References assert(), contains(), llvm::RISCVII::getFormat(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::TargetFrameLowering::hasFP(), llvm::RISCVII::InstFormatI, llvm::RISCVII::InstFormatS, isFrameOffsetLegal(), MI, MRI, and llvm::Offset.

◆ requiresFrameIndexScavenging()

bool llvm::RISCVRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction &  MF) const
inlineoverride

Definition at line 111 of file RISCVRegisterInfo.h.

◆ requiresRegisterScavenging()

bool llvm::RISCVRegisterInfo::requiresRegisterScavenging ( const MachineFunction &  MF) const
inlineoverride

Definition at line 107 of file RISCVRegisterInfo.h.

◆ requiresVirtualBaseRegisters()

bool RISCVRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction &  MF) const
override

Definition at line 585 of file RISCVRegisterInfo.cpp.

◆ resolveFrameIndex()

void RISCVRegisterInfo::resolveFrameIndex ( MachineInstr &  MI,
Register  BaseReg,
int64_t  Offset 
) const
override

Definition at line 687 of file RISCVRegisterInfo.cpp.

References assert(), getFrameIndexInstrOffset(), MI, and llvm::Offset.

The documentation for this struct was generated from the following files:
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