RISCVRegisterInfo.cpp File Reference

#include "RISCVRegisterInfo.h"
#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/Support/ErrorHandling.h"
#include "RISCVGenRegisterInfo.inc"

Go to the source code of this file.

Macros
#define	GET_REGINFO_TARGET_DESC

Functions
static std::tuple< RISCVVType::VLMUL, const TargetRegisterClass &, unsigned >	getSpillReloadInfo (unsigned NumRemaining, uint16_t RegEncoding, bool IsSpill)

Variables
static cl::opt< bool >	DisableCostPerUse ("riscv-disable-cost-per-use", cl::init(false), cl::Hidden)
static cl::opt< bool >	DisableRegAllocHints ("riscv-disable-regalloc-hints", cl::Hidden, cl::init(false), cl::desc("Disable two address hints for register " "allocation"))

Macro Definition Documentation

GET_REGINFO_TARGET_DESC

#define GET_REGINFO_TARGET_DESC

Definition at line 27 of file RISCVRegisterInfo.cpp.

Function Documentation

getSpillReloadInfo()

std::tuple< RISCVVType::VLMUL, const TargetRegisterClass &, unsigned > getSpillReloadInfo ( unsigned NumRemaining, uint16_t RegEncoding, bool IsSpill )

static

Definition at line 397 of file RISCVRegisterInfo.cpp.

References llvm::RISCVVType::LMUL_1, llvm::RISCVVType::LMUL_2, llvm::RISCVVType::LMUL_4, and llvm::RISCVVType::LMUL_8.

Referenced by llvm::RISCVRegisterInfo::lowerSegmentSpillReload().

Variable Documentation

DisableCostPerUse

cl::opt< bool > DisableCostPerUse("riscv-disable-cost-per-use", cl::init(false), cl::Hidden) ( "riscv-disable-cost-per-use" , cl::init(false) , cl::Hidden  )

static

Referenced by llvm::RISCVRegisterInfo::getRegisterCostTableIndex().

DisableRegAllocHints

cl::opt< bool > DisableRegAllocHints("riscv-disable-regalloc-hints", cl::Hidden, cl::init(false), cl::desc("Disable two address hints for register " "allocation")) ( "riscv-disable-regalloc-hints" , cl::Hidden , cl::init(false) , cl::desc("Disable two address hints for register " "allocation")  )

static

Referenced by llvm::RISCVRegisterInfo::getRegAllocationHints().