LLVM 19.0.0git
Macros | Variables
RISCVRegisterInfo.cpp File Reference
#include "RISCVRegisterInfo.h"
#include "RISCV.h"
#include "RISCVMachineFunctionInfo.h"
#include "RISCVSubtarget.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/Support/ErrorHandling.h"
#include "RISCVGenRegisterInfo.inc"

Go to the source code of this file.

Macros

#define GET_REGINFO_TARGET_DESC
 

Variables

static cl::opt< boolDisableRegAllocHints ("riscv-disable-regalloc-hints", cl::Hidden, cl::init(false), cl::desc("Disable two address hints for register " "allocation"))
 

Macro Definition Documentation

◆ GET_REGINFO_TARGET_DESC

#define GET_REGINFO_TARGET_DESC

Definition at line 28 of file RISCVRegisterInfo.cpp.

Variable Documentation

◆ DisableRegAllocHints

cl::opt< bool > DisableRegAllocHints("riscv-disable-regalloc-hints", cl::Hidden, cl::init(false), cl::desc("Disable two address hints for register " "allocation")) ( "riscv-disable-regalloc-hints"  ,
cl::Hidden  ,
cl::init(false)  ,
cl::desc("Disable two address hints for register " "allocation")   
)
static