LLVM 17.0.0git
RISCVTargetParser.h
Go to the documentation of this file.
1//===-- RISCVTargetParser - Parser for target features ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise hardware features
10// FOR RISC-V CPUS.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGETPARSER_RISCVTARGETPARSER_H
15#define LLVM_TARGETPARSER_RISCVTARGETPARSER_H
16
17#include "llvm/ADT/StringRef.h"
18#include <vector>
19
20namespace llvm {
21
22class Triple;
23
24namespace RISCV {
25
26// We use 64 bits as the known part in the scalable vector types.
27static constexpr unsigned RVVBitsPerBlock = 64;
28
29enum CPUKind : unsigned {
30#define PROC(ENUM, NAME, DEFAULT_MARCH) CK_##ENUM,
31#define TUNE_PROC(ENUM, NAME) CK_##ENUM,
32#include "llvm/TargetParser/RISCVTargetParserDef.inc"
33};
34
35bool checkCPUKind(CPUKind Kind, bool IsRV64);
36bool checkTuneCPUKind(CPUKind Kind, bool IsRV64);
37CPUKind parseCPUKind(StringRef CPU);
38CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64);
39StringRef getMArchFromMcpu(StringRef CPU);
40void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
41void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
42bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);
43
44bool isX18ReservedByDefault(const Triple &TT);
45
46} // namespace RISCV
47} // namespace llvm
48
49#endif
void fillValidTuneCPUArchList(SmallVectorImpl< StringRef > &Values, bool IsRV64)
StringRef getMArchFromMcpu(StringRef CPU)
bool isX18ReservedByDefault(const Triple &TT)
CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64)
bool checkTuneCPUKind(CPUKind Kind, bool IsRV64)
bool checkCPUKind(CPUKind Kind, bool IsRV64)
static constexpr unsigned RVVBitsPerBlock
CPUKind parseCPUKind(StringRef CPU)
bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector< StringRef > &Features)
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values, bool IsRV64)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18