LLVM 17.0.0git
Enumerations | Functions
llvm::RISCVII Namespace Reference

Enumerations

enum  {
  InstFormatPseudo = 0 , InstFormatR = 1 , InstFormatR4 = 2 , InstFormatI = 3 ,
  InstFormatS = 4 , InstFormatB = 5 , InstFormatU = 6 , InstFormatJ = 7 ,
  InstFormatCR = 8 , InstFormatCI = 9 , InstFormatCSS = 10 , InstFormatCIW = 11 ,
  InstFormatCL = 12 , InstFormatCS = 13 , InstFormatCA = 14 , InstFormatCB = 15 ,
  InstFormatCJ = 16 , InstFormatCU = 17 , InstFormatCLB = 18 , InstFormatCLH = 19 ,
  InstFormatCSB = 20 , InstFormatCSH = 21 , InstFormatOther = 22 , InstFormatMask = 31 ,
  InstFormatShift = 0 , ConstraintShift = InstFormatShift + 5 , VS2Constraint = 0b001 << ConstraintShift , VS1Constraint = 0b010 << ConstraintShift ,
  VMConstraint = 0b100 << ConstraintShift , ConstraintMask = 0b111 << ConstraintShift , VLMulShift = ConstraintShift + 3 , VLMulMask = 0b111 << VLMulShift ,
  HasDummyMaskOpShift = VLMulShift + 3 , HasDummyMaskOpMask = 1 << HasDummyMaskOpShift , ForceTailAgnosticShift = HasDummyMaskOpShift + 1 , ForceTailAgnosticMask = 1 << ForceTailAgnosticShift ,
  HasMergeOpShift = ForceTailAgnosticShift + 1 , HasMergeOpMask = 1 << HasMergeOpShift , HasSEWOpShift = HasMergeOpShift + 1 , HasSEWOpMask = 1 << HasSEWOpShift ,
  HasVLOpShift = HasSEWOpShift + 1 , HasVLOpMask = 1 << HasVLOpShift , HasVecPolicyOpShift = HasVLOpShift + 1 , HasVecPolicyOpMask = 1 << HasVecPolicyOpShift ,
  IsRVVWideningReductionShift = HasVecPolicyOpShift + 1 , IsRVVWideningReductionMask = 1 << IsRVVWideningReductionShift , UsesMaskPolicyShift = IsRVVWideningReductionShift + 1 , UsesMaskPolicyMask = 1 << UsesMaskPolicyShift ,
  IsSignExtendingOpWShift = UsesMaskPolicyShift + 1 , IsSignExtendingOpWMask = 1ULL << IsSignExtendingOpWShift
}
 
enum  VLMUL : uint8_t {
  LMUL_1 = 0 , LMUL_2 , LMUL_4 , LMUL_8 ,
  LMUL_RESERVED , LMUL_F8 , LMUL_F4 , LMUL_F2
}
 
enum  { TAIL_UNDISTURBED_MASK_UNDISTURBED = 0 , TAIL_AGNOSTIC = 1 , MASK_AGNOSTIC = 2 }
 
enum  {
  MO_None = 0 , MO_CALL = 1 , MO_PLT = 2 , MO_LO = 3 ,
  MO_HI = 4 , MO_PCREL_LO = 5 , MO_PCREL_HI = 6 , MO_GOT_HI = 7 ,
  MO_TPREL_LO = 8 , MO_TPREL_HI = 9 , MO_TPREL_ADD = 10 , MO_TLS_GOT_HI = 11 ,
  MO_TLS_GD_HI = 12 , MO_DIRECT_FLAG_MASK = 15
}
 

Functions

static unsigned getFormat (uint64_t TSFlags)
 
static VLMUL getLMul (uint64_t TSFlags)
 
static bool hasDummyMaskOp (uint64_t TSFlags)
 
static bool doesForceTailAgnostic (uint64_t TSFlags)
 
static bool hasMergeOp (uint64_t TSFlags)
 
static bool hasSEWOp (uint64_t TSFlags)
 
static bool hasVLOp (uint64_t TSFlags)
 
static bool hasVecPolicyOp (uint64_t TSFlags)
 
static bool isRVVWideningReduction (uint64_t TSFlags)
 
static bool usesMaskPolicy (uint64_t TSFlags)
 
static unsigned getMergeOpNum (const MCInstrDesc &Desc)
 
static unsigned getVLOpNum (const MCInstrDesc &Desc)
 
static unsigned getSEWOpNum (const MCInstrDesc &Desc)
 
static unsigned getVecPolicyOpNum (const MCInstrDesc &Desc)
 

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
InstFormatPseudo 
InstFormatR 
InstFormatR4 
InstFormatI 
InstFormatS 
InstFormatB 
InstFormatU 
InstFormatJ 
InstFormatCR 
InstFormatCI 
InstFormatCSS 
InstFormatCIW 
InstFormatCL 
InstFormatCS 
InstFormatCA 
InstFormatCB 
InstFormatCJ 
InstFormatCU 
InstFormatCLB 
InstFormatCLH 
InstFormatCSB 
InstFormatCSH 
InstFormatOther 
InstFormatMask 
InstFormatShift 
ConstraintShift 
VS2Constraint 
VS1Constraint 
VMConstraint 
ConstraintMask 
VLMulShift 
VLMulMask 
HasDummyMaskOpShift 
HasDummyMaskOpMask 
ForceTailAgnosticShift 
ForceTailAgnosticMask 
HasMergeOpShift 
HasMergeOpMask 
HasSEWOpShift 
HasSEWOpMask 
HasVLOpShift 
HasVLOpMask 
HasVecPolicyOpShift 
HasVecPolicyOpMask 
IsRVVWideningReductionShift 
IsRVVWideningReductionMask 
UsesMaskPolicyShift 
UsesMaskPolicyMask 
IsSignExtendingOpWShift 
IsSignExtendingOpWMask 

Definition at line 30 of file RISCVBaseInfo.h.

◆ anonymous enum

anonymous enum
Enumerator
TAIL_UNDISTURBED_MASK_UNDISTURBED 
TAIL_AGNOSTIC 
MASK_AGNOSTIC 

Definition at line 128 of file RISCVBaseInfo.h.

◆ anonymous enum

anonymous enum
Enumerator
MO_None 
MO_CALL 
MO_PLT 
MO_LO 
MO_HI 
MO_PCREL_LO 
MO_PCREL_HI 
MO_GOT_HI 
MO_TPREL_LO 
MO_TPREL_HI 
MO_TPREL_ADD 
MO_TLS_GOT_HI 
MO_TLS_GD_HI 
MO_DIRECT_FLAG_MASK 

Definition at line 208 of file RISCVBaseInfo.h.

◆ VLMUL

enum llvm::RISCVII::VLMUL : uint8_t
Enumerator
LMUL_1 
LMUL_2 
LMUL_4 
LMUL_8 
LMUL_RESERVED 
LMUL_F8 
LMUL_F4 
LMUL_F2 

Definition at line 117 of file RISCVBaseInfo.h.

Function Documentation

◆ doesForceTailAgnostic()

static bool llvm::RISCVII::doesForceTailAgnostic ( uint64_t  TSFlags)
inlinestatic
Returns
true if tail agnostic is enforced for the instruction.

Definition at line 148 of file RISCVBaseInfo.h.

References ForceTailAgnosticMask, and TSFlags.

Referenced by if().

◆ getFormat()

static unsigned llvm::RISCVII::getFormat ( uint64_t  TSFlags)
inlinestatic
Returns
the format of the instruction.

Definition at line 136 of file RISCVBaseInfo.h.

References InstFormatMask, InstFormatShift, and TSFlags.

Referenced by llvm::RISCVRegisterInfo::getFrameIndexInstrOffset(), and llvm::RISCVRegisterInfo::needsFrameBaseReg().

◆ getLMul()

static VLMUL llvm::RISCVII::getLMul ( uint64_t  TSFlags)
inlinestatic
Returns
the LMUL for the instruction.

Definition at line 140 of file RISCVBaseInfo.h.

References TSFlags, VLMulMask, and VLMulShift.

◆ getMergeOpNum()

static unsigned llvm::RISCVII::getMergeOpNum ( const MCInstrDesc &  Desc)
inlinestatic

Definition at line 176 of file RISCVBaseInfo.h.

References assert(), llvm::MCInstrDesc::getNumDefs(), hasMergeOp(), llvm::MCInstrDesc::isVariadic(), and llvm::MCInstrDesc::TSFlags.

Referenced by llvm::RISCVInstrInfo::verifyInstruction().

◆ getSEWOpNum()

static unsigned llvm::RISCVII::getSEWOpNum ( const MCInstrDesc &  Desc)
inlinestatic

Definition at line 193 of file RISCVBaseInfo.h.

References assert(), llvm::MCInstrDesc::getNumOperands(), hasSEWOp(), hasVecPolicyOp(), llvm::Offset, llvm::MCInstrDesc::TSFlags, and TSFlags.

Referenced by llvm::RISCVInstrInfo::copyPhysReg(), llvm::RISCVInstrInfo::createMIROperandComment(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ getVecPolicyOpNum()

static unsigned llvm::RISCVII::getVecPolicyOpNum ( const MCInstrDesc &  Desc)
inlinestatic

Definition at line 202 of file RISCVBaseInfo.h.

References assert(), llvm::MCInstrDesc::getNumOperands(), hasVecPolicyOp(), and llvm::MCInstrDesc::TSFlags.

Referenced by llvm::RISCVInstrInfo::createMIROperandComment(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ getVLOpNum()

static unsigned llvm::RISCVII::getVLOpNum ( const MCInstrDesc &  Desc)
inlinestatic

Definition at line 182 of file RISCVBaseInfo.h.

References assert(), llvm::MCInstrDesc::getNumOperands(), hasSEWOp(), hasVecPolicyOp(), hasVLOp(), llvm::Offset, llvm::MCInstrDesc::TSFlags, and TSFlags.

Referenced by llvm::RISCVInstrInfo::copyPhysReg(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasDummyMaskOp()

static bool llvm::RISCVII::hasDummyMaskOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a dummy mask operand for the instruction.

Definition at line 144 of file RISCVBaseInfo.h.

References HasDummyMaskOpMask, and TSFlags.

Referenced by lowerRISCVVMachineInstrToMCInst().

◆ hasMergeOp()

static bool llvm::RISCVII::hasMergeOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a merge operand for the instruction.

Definition at line 152 of file RISCVBaseInfo.h.

References HasMergeOpMask, and TSFlags.

Referenced by getMergeOpNum(), lowerRISCVVMachineInstrToMCInst(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasSEWOp()

static bool llvm::RISCVII::hasSEWOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a SEW operand for the instruction.

Definition at line 156 of file RISCVBaseInfo.h.

References HasSEWOpMask, and TSFlags.

Referenced by llvm::RISCVInstrInfo::createMIROperandComment(), getSEWOpNum(), getVLOpNum(), isConvertibleToVMV_V_V(), lowerRISCVVMachineInstrToMCInst(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasVecPolicyOp()

static bool llvm::RISCVII::hasVecPolicyOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a vector policy operand for this instruction.

Definition at line 164 of file RISCVBaseInfo.h.

References HasVecPolicyOpMask, and TSFlags.

Referenced by llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::createMIROperandComment(), llvm::RISCVInstrInfo::findCommutedOpIndices(), getSEWOpNum(), getVecPolicyOpIdx(), getVecPolicyOpNum(), getVLOpNum(), if(), lowerRISCVVMachineInstrToMCInst(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasVLOp()

static bool llvm::RISCVII::hasVLOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a VL operand for the instruction.

Definition at line 160 of file RISCVBaseInfo.h.

References HasVLOpMask, and TSFlags.

Referenced by getVLOpNum(), isConvertibleToVMV_V_V(), lowerRISCVVMachineInstrToMCInst(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ isRVVWideningReduction()

static bool llvm::RISCVII::isRVVWideningReduction ( uint64_t  TSFlags)
inlinestatic
Returns
true if it is a vector widening reduction instruction.

Definition at line 168 of file RISCVBaseInfo.h.

References IsRVVWideningReductionMask, and TSFlags.

Referenced by isConvertibleToVMV_V_V().

◆ usesMaskPolicy()

static bool llvm::RISCVII::usesMaskPolicy ( uint64_t  TSFlags)
inlinestatic
Returns
true if mask policy is valid for the instruction.

Definition at line 172 of file RISCVBaseInfo.h.

References TSFlags, and UsesMaskPolicyMask.

Referenced by if().

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