LLVM  15.0.0git
Enumerations | Functions
llvm::RISCVII Namespace Reference

Enumerations

enum  {
  InstFormatPseudo = 0, InstFormatR = 1, InstFormatR4 = 2, InstFormatI = 3,
  InstFormatS = 4, InstFormatB = 5, InstFormatU = 6, InstFormatJ = 7,
  InstFormatCR = 8, InstFormatCI = 9, InstFormatCSS = 10, InstFormatCIW = 11,
  InstFormatCL = 12, InstFormatCS = 13, InstFormatCA = 14, InstFormatCB = 15,
  InstFormatCJ = 16, InstFormatOther = 17, InstFormatMask = 31, InstFormatShift = 0,
  ConstraintShift = InstFormatShift + 5, ConstraintMask = 0b111 << ConstraintShift, VLMulShift = ConstraintShift + 3, VLMulMask = 0b111 << VLMulShift,
  HasDummyMaskOpShift = VLMulShift + 3, HasDummyMaskOpMask = 1 << HasDummyMaskOpShift, ForceTailAgnosticShift = HasDummyMaskOpShift + 1, ForceTailAgnosticMask = 1 << ForceTailAgnosticShift,
  HasMergeOpShift = ForceTailAgnosticShift + 1, HasMergeOpMask = 1 << HasMergeOpShift, HasSEWOpShift = HasMergeOpShift + 1, HasSEWOpMask = 1 << HasSEWOpShift,
  HasVLOpShift = HasSEWOpShift + 1, HasVLOpMask = 1 << HasVLOpShift, HasVecPolicyOpShift = HasVLOpShift + 1, HasVecPolicyOpMask = 1 << HasVecPolicyOpShift,
  IsRVVWideningReductionShift = HasVecPolicyOpShift + 1, IsRVVWideningReductionMask = 1 << IsRVVWideningReductionShift, UsesMaskPolicyShift = IsRVVWideningReductionShift + 1, UsesMaskPolicyMask = 1 << UsesMaskPolicyShift
}
 
enum  VConstraintType { NoConstraint = 0, VS2Constraint = 0b001, VS1Constraint = 0b010, VMConstraint = 0b100 }
 
enum  VLMUL : uint8_t {
  LMUL_1 = 0, LMUL_2, LMUL_4, LMUL_8,
  LMUL_RESERVED, LMUL_F8, LMUL_F4, LMUL_F2
}
 
enum  { TAIL_AGNOSTIC = 1, MASK_AGNOSTIC = 2 }
 
enum  {
  MO_None = 0, MO_CALL = 1, MO_PLT = 2, MO_LO = 3,
  MO_HI = 4, MO_PCREL_LO = 5, MO_PCREL_HI = 6, MO_GOT_HI = 7,
  MO_TPREL_LO = 8, MO_TPREL_HI = 9, MO_TPREL_ADD = 10, MO_TLS_GOT_HI = 11,
  MO_TLS_GD_HI = 12, MO_DIRECT_FLAG_MASK = 15
}
 

Functions

static unsigned getFormat (uint64_t TSFlags)
 
static VConstraintType getConstraint (uint64_t TSFlags)
 
static VLMUL getLMul (uint64_t TSFlags)
 
static bool hasDummyMaskOp (uint64_t TSFlags)
 
static bool doesForceTailAgnostic (uint64_t TSFlags)
 
static bool hasMergeOp (uint64_t TSFlags)
 
static bool hasSEWOp (uint64_t TSFlags)
 
static bool hasVLOp (uint64_t TSFlags)
 
static bool hasVecPolicyOp (uint64_t TSFlags)
 
static bool isRVVWideningReduction (uint64_t TSFlags)
 
static bool usesMaskPolicy (uint64_t TSFlags)
 
static unsigned getVLOpNum (const MCInstrDesc &Desc)
 
static unsigned getSEWOpNum (const MCInstrDesc &Desc)
 

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
InstFormatPseudo 
InstFormatR 
InstFormatR4 
InstFormatI 
InstFormatS 
InstFormatB 
InstFormatU 
InstFormatJ 
InstFormatCR 
InstFormatCI 
InstFormatCSS 
InstFormatCIW 
InstFormatCL 
InstFormatCS 
InstFormatCA 
InstFormatCB 
InstFormatCJ 
InstFormatOther 
InstFormatMask 
InstFormatShift 
ConstraintShift 
ConstraintMask 
VLMulShift 
VLMulMask 
HasDummyMaskOpShift 
HasDummyMaskOpMask 
ForceTailAgnosticShift 
ForceTailAgnosticMask 
HasMergeOpShift 
HasMergeOpMask 
HasSEWOpShift 
HasSEWOpMask 
HasVLOpShift 
HasVLOpMask 
HasVecPolicyOpShift 
HasVecPolicyOpMask 
IsRVVWideningReductionShift 
IsRVVWideningReductionMask 
UsesMaskPolicyShift 
UsesMaskPolicyMask 

Definition at line 28 of file RISCVBaseInfo.h.

◆ anonymous enum

anonymous enum
Enumerator
TAIL_AGNOSTIC 
MASK_AGNOSTIC 

Definition at line 119 of file RISCVBaseInfo.h.

◆ anonymous enum

anonymous enum
Enumerator
MO_None 
MO_CALL 
MO_PLT 
MO_LO 
MO_HI 
MO_PCREL_LO 
MO_PCREL_HI 
MO_GOT_HI 
MO_TPREL_LO 
MO_TPREL_HI 
MO_TPREL_ADD 
MO_TLS_GOT_HI 
MO_TLS_GD_HI 
MO_DIRECT_FLAG_MASK 

Definition at line 192 of file RISCVBaseInfo.h.

◆ VConstraintType

Enumerator
NoConstraint 
VS2Constraint 
VS1Constraint 
VMConstraint 

Definition at line 101 of file RISCVBaseInfo.h.

◆ VLMUL

enum llvm::RISCVII::VLMUL : uint8_t
Enumerator
LMUL_1 
LMUL_2 
LMUL_4 
LMUL_8 
LMUL_RESERVED 
LMUL_F8 
LMUL_F4 
LMUL_F2 

Definition at line 108 of file RISCVBaseInfo.h.

Function Documentation

◆ doesForceTailAgnostic()

static bool llvm::RISCVII::doesForceTailAgnostic ( uint64_t  TSFlags)
inlinestatic
Returns
true if tail agnostic is enforced for the instruction.

Definition at line 143 of file RISCVBaseInfo.h.

References ForceTailAgnosticMask.

Referenced by computeInfoForInstr().

◆ getConstraint()

static VConstraintType llvm::RISCVII::getConstraint ( uint64_t  TSFlags)
inlinestatic
Returns
the constraint for the instruction.

Definition at line 130 of file RISCVBaseInfo.h.

References ConstraintMask, and ConstraintShift.

◆ getFormat()

static unsigned llvm::RISCVII::getFormat ( uint64_t  TSFlags)
inlinestatic
Returns
the format of the instruction.

Definition at line 126 of file RISCVBaseInfo.h.

References InstFormatMask, and InstFormatShift.

◆ getLMul()

static VLMUL llvm::RISCVII::getLMul ( uint64_t  TSFlags)
inlinestatic
Returns
the LMUL for the instruction.

Definition at line 135 of file RISCVBaseInfo.h.

References VLMulMask, and VLMulShift.

Referenced by computeInfoForInstr().

◆ getSEWOpNum()

static unsigned llvm::RISCVII::getSEWOpNum ( const MCInstrDesc Desc)
inlinestatic

◆ getVLOpNum()

static unsigned llvm::RISCVII::getVLOpNum ( const MCInstrDesc Desc)
inlinestatic

◆ hasDummyMaskOp()

static bool llvm::RISCVII::hasDummyMaskOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a dummy mask operand for the instruction.

Definition at line 139 of file RISCVBaseInfo.h.

References HasDummyMaskOpMask.

Referenced by lowerRISCVVMachineInstrToMCInst().

◆ hasMergeOp()

static bool llvm::RISCVII::hasMergeOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a merge operand for the instruction.

Definition at line 147 of file RISCVBaseInfo.h.

References HasMergeOpMask.

Referenced by lowerRISCVVMachineInstrToMCInst().

◆ hasSEWOp()

static bool llvm::RISCVII::hasSEWOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a SEW operand for the instruction.

Definition at line 151 of file RISCVBaseInfo.h.

References HasSEWOpMask.

Referenced by llvm::RISCVInstrInfo::createMIROperandComment(), getSEWOpNum(), getVLOpNum(), isConvertibleToVMV_V_V(), and lowerRISCVVMachineInstrToMCInst().

◆ hasVecPolicyOp()

static bool llvm::RISCVII::hasVecPolicyOp ( uint64_t  TSFlags)
inlinestatic

◆ hasVLOp()

static bool llvm::RISCVII::hasVLOp ( uint64_t  TSFlags)
inlinestatic
Returns
true if there is a VL operand for the instruction.

Definition at line 155 of file RISCVBaseInfo.h.

References HasVLOpMask.

Referenced by computeInfoForInstr(), getVLOpNum(), and lowerRISCVVMachineInstrToMCInst().

◆ isRVVWideningReduction()

static bool llvm::RISCVII::isRVVWideningReduction ( uint64_t  TSFlags)
inlinestatic
Returns
true if it is a vector widening reduction instruction.

Definition at line 163 of file RISCVBaseInfo.h.

References IsRVVWideningReductionMask.

Referenced by isConvertibleToVMV_V_V().

◆ usesMaskPolicy()

static bool llvm::RISCVII::usesMaskPolicy ( uint64_t  TSFlags)
inlinestatic
Returns
true if mask policy is valid for the instruction.

Definition at line 167 of file RISCVBaseInfo.h.

References UsesMaskPolicyMask.

Referenced by computeInfoForInstr().