LLVM 22.0.0git
RISCVTargetParser.h File Reference

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Classes

struct  llvm::RISCV::CPUModel
struct  llvm::RISCV::CPUInfo

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
namespace  llvm::RISCV
namespace  llvm::RISCVVType

Enumerations

enum  llvm::RISCVVType::VLMUL : uint8_t {
  llvm::RISCVVType::LMUL_1 = 0 , llvm::RISCVVType::LMUL_2 , llvm::RISCVVType::LMUL_4 , llvm::RISCVVType::LMUL_8 ,
  llvm::RISCVVType::LMUL_RESERVED , llvm::RISCVVType::LMUL_F8 , llvm::RISCVVType::LMUL_F4 , llvm::RISCVVType::LMUL_F2
}
enum  { llvm::RISCVVType::TAIL_UNDISTURBED_MASK_UNDISTURBED = 0 , llvm::RISCVVType::TAIL_AGNOSTIC = 1 , llvm::RISCVVType::MASK_AGNOSTIC = 2 }

Functions

LLVM_ABI void llvm::RISCV::getFeaturesForCPU (StringRef CPU, SmallVectorImpl< std::string > &EnabledFeatures, bool NeedPlus=false)
LLVM_ABI bool llvm::RISCV::parseCPU (StringRef CPU, bool IsRV64)
LLVM_ABI bool llvm::RISCV::parseTuneCPU (StringRef CPU, bool IsRV64)
LLVM_ABI StringRef llvm::RISCV::getMArchFromMcpu (StringRef CPU)
LLVM_ABI void llvm::RISCV::fillValidCPUArchList (SmallVectorImpl< StringRef > &Values, bool IsRV64)
LLVM_ABI void llvm::RISCV::fillValidTuneCPUArchList (SmallVectorImpl< StringRef > &Values, bool IsRV64)
LLVM_ABI bool llvm::RISCV::hasFastScalarUnalignedAccess (StringRef CPU)
LLVM_ABI bool llvm::RISCV::hasFastVectorUnalignedAccess (StringRef CPU)
LLVM_ABI bool llvm::RISCV::hasValidCPUModel (StringRef CPU)
LLVM_ABI CPUModel llvm::RISCV::getCPUModel (StringRef CPU)
LLVM_ABI StringRef llvm::RISCV::getCPUNameFromCPUModel (const CPUModel &Model)
static bool llvm::RISCVVType::isValidSEW (unsigned SEW)
static bool llvm::RISCVVType::isValidLMUL (unsigned LMUL, bool Fractional)
LLVM_ABI unsigned llvm::RISCVVType::encodeVTYPE (VLMUL VLMUL, unsigned SEW, bool TailAgnostic, bool MaskAgnostic, bool AltFmt=false)
LLVM_ABI unsigned llvm::RISCVVType::encodeXSfmmVType (unsigned SEW, unsigned Widen, bool AltFmt)
static VLMUL llvm::RISCVVType::getVLMUL (unsigned VType)
LLVM_ABI std::pair< unsigned, boolllvm::RISCVVType::decodeVLMUL (VLMUL VLMul)
static VLMUL llvm::RISCVVType::encodeLMUL (unsigned LMUL, bool Fractional)
static unsigned llvm::RISCVVType::decodeVSEW (unsigned VSEW)
static unsigned llvm::RISCVVType::encodeSEW (unsigned SEW)
static unsigned llvm::RISCVVType::getSEW (unsigned VType)
static unsigned llvm::RISCVVType::decodeTWiden (unsigned TWiden)
static bool llvm::RISCVVType::hasXSfmmWiden (unsigned VType)
static unsigned llvm::RISCVVType::getXSfmmWiden (unsigned VType)
static bool llvm::RISCVVType::isValidXSfmmVType (unsigned VTypeI)
static bool llvm::RISCVVType::isTailAgnostic (unsigned VType)
static bool llvm::RISCVVType::isMaskAgnostic (unsigned VType)
static bool llvm::RISCVVType::isAltFmt (unsigned VType)
LLVM_ABI void llvm::RISCVVType::printVType (unsigned VType, raw_ostream &OS)
LLVM_ABI unsigned llvm::RISCVVType::getSEWLMULRatio (unsigned SEW, VLMUL VLMul)
LLVM_ABI std::optional< VLMULllvm::RISCVVType::getSameRatioLMUL (unsigned SEW, VLMUL VLMUL, unsigned EEW)

Variables

static constexpr unsigned llvm::RISCV::RVVBitsPerBlock = 64
static constexpr unsigned llvm::RISCV::RVVBytesPerBlock = RVVBitsPerBlock / 8