LLVM 20.0.0git
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Enumerations | |
enum | { IsVRegClassShift = 0 , IsVRegClassShiftMask = 0b1 << IsVRegClassShift , VLMulShift = IsVRegClassShift + 1 , VLMulShiftMask = 0b111 << VLMulShift , NFShift = VLMulShift + 3 , NFShiftMask = 0b111 << NFShift } |
Functions | |
static bool | isVRegClass (uint64_t TSFlags) |
static RISCVII::VLMUL | getLMul (uint64_t TSFlags) |
static unsigned | getNF (uint64_t TSFlags) |
anonymous enum |
Enumerator | |
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IsVRegClassShift | |
IsVRegClassShiftMask | |
VLMulShift | |
VLMulShiftMask | |
NFShift | |
NFShiftMask |
Definition at line 25 of file RISCVRegisterInfo.h.
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inlinestatic |
Definition at line 46 of file RISCVRegisterInfo.h.
References VLMulShift, and VLMulShiftMask.
Referenced by llvm::RISCVInstrInfo::copyPhysRegVector().
Definition at line 51 of file RISCVRegisterInfo.h.
References NFShift, and NFShiftMask.
Referenced by llvm::RISCVInstrInfo::copyPhysRegVector(), llvm::RISCVRegisterInfo::isVRNRegClass(), and llvm::RISCVRegisterInfo::isVRRegClass().
Definition at line 41 of file RISCVRegisterInfo.h.
References IsVRegClassShift, and IsVRegClassShiftMask.
Referenced by llvm::RISCVRegisterInfo::isRVVRegClass(), isVectorRegClass(), llvm::RISCVRegisterInfo::isVRNRegClass(), and llvm::RISCVRegisterInfo::isVRRegClass().