LLVM 19.0.0git
MipsCallLowering.cpp
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1//===- MipsCallLowering.cpp -------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file implements the lowering of LLVM calls to machine code calls for
11/// GlobalISel.
12//
13//===----------------------------------------------------------------------===//
14
15#include "MipsCallLowering.h"
16#include "MipsCCState.h"
17#include "MipsMachineFunction.h"
18#include "MipsTargetMachine.h"
22
23using namespace llvm;
24
26 : CallLowering(&TLI) {}
27
28namespace {
29struct MipsOutgoingValueAssigner : public CallLowering::OutgoingValueAssigner {
30 /// This is the name of the function being called
31 /// FIXME: Relying on this is unsound
32 const char *Func = nullptr;
33
34 /// Is this a return value, or an outgoing call operand.
35 bool IsReturn;
36
37 MipsOutgoingValueAssigner(CCAssignFn *AssignFn_, const char *Func,
38 bool IsReturn)
39 : OutgoingValueAssigner(AssignFn_), Func(Func), IsReturn(IsReturn) {}
40
41 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
44 CCState &State_) override {
45 MipsCCState &State = static_cast<MipsCCState &>(State_);
46
47 if (IsReturn)
49 else
50 State.PreAnalyzeCallOperand(Info.Ty, Info.IsFixed, Func);
51
52 return CallLowering::OutgoingValueAssigner::assignArg(
53 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State);
54 }
55};
56
57struct MipsIncomingValueAssigner : public CallLowering::IncomingValueAssigner {
58 /// This is the name of the function being called
59 /// FIXME: Relying on this is unsound
60 const char *Func = nullptr;
61
62 /// Is this a call return value, or an incoming function argument.
63 bool IsReturn;
64
65 MipsIncomingValueAssigner(CCAssignFn *AssignFn_, const char *Func,
66 bool IsReturn)
67 : IncomingValueAssigner(AssignFn_), Func(Func), IsReturn(IsReturn) {}
68
69 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
72 CCState &State_) override {
73 MipsCCState &State = static_cast<MipsCCState &>(State_);
74
75 if (IsReturn)
76 State.PreAnalyzeCallResult(Info.Ty, Func);
77 else
78 State.PreAnalyzeFormalArgument(Info.Ty, Flags);
79
80 return CallLowering::IncomingValueAssigner::assignArg(
81 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State);
82 }
83};
84
85class MipsIncomingValueHandler : public CallLowering::IncomingValueHandler {
86 const MipsSubtarget &STI;
87
88public:
89 MipsIncomingValueHandler(MachineIRBuilder &MIRBuilder,
91 : IncomingValueHandler(MIRBuilder, MRI),
92 STI(MIRBuilder.getMF().getSubtarget<MipsSubtarget>()) {}
93
94private:
95 void assignValueToReg(Register ValVReg, Register PhysReg,
96 const CCValAssign &VA) override;
97
98 Register getStackAddress(uint64_t Size, int64_t Offset,
100 ISD::ArgFlagsTy Flags) override;
101 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy,
102 const MachinePointerInfo &MPO,
103 const CCValAssign &VA) override;
104
105 unsigned assignCustomValue(CallLowering::ArgInfo &Arg,
107 std::function<void()> *Thunk = nullptr) override;
108
109 virtual void markPhysRegUsed(unsigned PhysReg) {
110 MIRBuilder.getMRI()->addLiveIn(PhysReg);
111 MIRBuilder.getMBB().addLiveIn(PhysReg);
112 }
113};
114
115class CallReturnHandler : public MipsIncomingValueHandler {
116public:
117 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
119 : MipsIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {}
120
121private:
122 void markPhysRegUsed(unsigned PhysReg) override {
123 MIB.addDef(PhysReg, RegState::Implicit);
124 }
125
127};
128
129} // end anonymous namespace
130
131void MipsIncomingValueHandler::assignValueToReg(Register ValVReg,
132 Register PhysReg,
133 const CCValAssign &VA) {
134 markPhysRegUsed(PhysReg);
135 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
136}
137
138Register MipsIncomingValueHandler::getStackAddress(uint64_t Size,
139 int64_t Offset,
141 ISD::ArgFlagsTy Flags) {
142
143 MachineFunction &MF = MIRBuilder.getMF();
144 MachineFrameInfo &MFI = MF.getFrameInfo();
145
146 // FIXME: This should only be immutable for non-byval memory arguments.
147 int FI = MFI.CreateFixedObject(Size, Offset, true);
148 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI);
149
150 return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0);
151}
152
153void MipsIncomingValueHandler::assignValueToAddress(
154 Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO,
155 const CCValAssign &VA) {
156 MachineFunction &MF = MIRBuilder.getMF();
157 auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy,
158 inferAlignFromPtrInfo(MF, MPO));
159 MIRBuilder.buildLoad(ValVReg, Addr, *MMO);
160}
161
162/// Handle cases when f64 is split into 2 32-bit GPRs. This is a custom
163/// assignment because generic code assumes getNumRegistersForCallingConv is
164/// accurate. In this case it is not because the type/number are context
165/// dependent on other arguments.
166unsigned
167MipsIncomingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg,
169 std::function<void()> *Thunk) {
170 const CCValAssign &VALo = VAs[0];
171 const CCValAssign &VAHi = VAs[1];
172
173 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 &&
174 VALo.getValVT() == MVT::f64 && VAHi.getValVT() == MVT::f64 &&
175 "unexpected custom value");
176
177 auto CopyLo = MIRBuilder.buildCopy(LLT::scalar(32), VALo.getLocReg());
178 auto CopyHi = MIRBuilder.buildCopy(LLT::scalar(32), VAHi.getLocReg());
179 if (!STI.isLittle())
180 std::swap(CopyLo, CopyHi);
181
182 Arg.OrigRegs.assign(Arg.Regs.begin(), Arg.Regs.end());
183 Arg.Regs = { CopyLo.getReg(0), CopyHi.getReg(0) };
184 MIRBuilder.buildMergeLikeInstr(Arg.OrigRegs[0], {CopyLo, CopyHi});
185
186 markPhysRegUsed(VALo.getLocReg());
187 markPhysRegUsed(VAHi.getLocReg());
188 return 2;
189}
190
191namespace {
192class MipsOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
193 const MipsSubtarget &STI;
194
195public:
196 MipsOutgoingValueHandler(MachineIRBuilder &MIRBuilder,
198 : OutgoingValueHandler(MIRBuilder, MRI),
199 STI(MIRBuilder.getMF().getSubtarget<MipsSubtarget>()), MIB(MIB) {}
200
201private:
202 void assignValueToReg(Register ValVReg, Register PhysReg,
203 const CCValAssign &VA) override;
204
205 Register getStackAddress(uint64_t Size, int64_t Offset,
207 ISD::ArgFlagsTy Flags) override;
208
209 void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy,
210 const MachinePointerInfo &MPO,
211 const CCValAssign &VA) override;
212 unsigned assignCustomValue(CallLowering::ArgInfo &Arg,
214 std::function<void()> *Thunk) override;
215
217};
218} // end anonymous namespace
219
220void MipsOutgoingValueHandler::assignValueToReg(Register ValVReg,
221 Register PhysReg,
222 const CCValAssign &VA) {
223 Register ExtReg = extendRegister(ValVReg, VA);
224 MIRBuilder.buildCopy(PhysReg, ExtReg);
225 MIB.addUse(PhysReg, RegState::Implicit);
226}
227
228Register MipsOutgoingValueHandler::getStackAddress(uint64_t Size,
229 int64_t Offset,
231 ISD::ArgFlagsTy Flags) {
232 MachineFunction &MF = MIRBuilder.getMF();
234
235 LLT p0 = LLT::pointer(0, 32);
236 LLT s32 = LLT::scalar(32);
237 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP));
238
239 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset);
240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
241 return AddrReg.getReg(0);
242}
243
244void MipsOutgoingValueHandler::assignValueToAddress(
245 Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO,
246 const CCValAssign &VA) {
247 MachineFunction &MF = MIRBuilder.getMF();
248 uint64_t LocMemOffset = VA.getLocMemOffset();
249
250 auto MMO = MF.getMachineMemOperand(
251 MPO, MachineMemOperand::MOStore, MemTy,
252 commonAlignment(STI.getStackAlignment(), LocMemOffset));
253
254 Register ExtReg = extendRegister(ValVReg, VA);
255 MIRBuilder.buildStore(ExtReg, Addr, *MMO);
256}
257
258unsigned
259MipsOutgoingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg,
261 std::function<void()> *Thunk) {
262 const CCValAssign &VALo = VAs[0];
263 const CCValAssign &VAHi = VAs[1];
264
265 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 &&
266 VALo.getValVT() == MVT::f64 && VAHi.getValVT() == MVT::f64 &&
267 "unexpected custom value");
268
269 auto Unmerge =
270 MIRBuilder.buildUnmerge({LLT::scalar(32), LLT::scalar(32)}, Arg.Regs[0]);
271 Register Lo = Unmerge.getReg(0);
272 Register Hi = Unmerge.getReg(1);
273
274 Arg.OrigRegs.assign(Arg.Regs.begin(), Arg.Regs.end());
275 Arg.Regs = { Lo, Hi };
276 if (!STI.isLittle())
277 std::swap(Lo, Hi);
278
279 // If we can return a thunk, just include the register copies. The unmerge can
280 // be emitted earlier.
281 if (Thunk) {
282 *Thunk = [=]() {
283 MIRBuilder.buildCopy(VALo.getLocReg(), Lo);
284 MIRBuilder.buildCopy(VAHi.getLocReg(), Hi);
285 };
286 return 2;
287 }
288 MIRBuilder.buildCopy(VALo.getLocReg(), Lo);
289 MIRBuilder.buildCopy(VAHi.getLocReg(), Hi);
290 return 2;
291}
292
294 if (T->isIntegerTy())
295 return true;
296 if (T->isPointerTy())
297 return true;
298 if (T->isFloatingPointTy())
299 return true;
300 return false;
301}
302
304 if (T->isIntegerTy())
305 return true;
306 if (T->isPointerTy())
307 return true;
308 if (T->isFloatingPointTy())
309 return true;
310 if (T->isAggregateType())
311 return true;
312 return false;
313}
314
316 const Value *Val, ArrayRef<Register> VRegs,
317 FunctionLoweringInfo &FLI) const {
318
319 MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
320
321 if (Val != nullptr && !isSupportedReturnType(Val->getType()))
322 return false;
323
324 if (!VRegs.empty()) {
325 MachineFunction &MF = MIRBuilder.getMF();
326 const Function &F = MF.getFunction();
327 const DataLayout &DL = MF.getDataLayout();
328 const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
329
331
332 ArgInfo ArgRetInfo(VRegs, *Val, 0);
334 splitToValueTypes(ArgRetInfo, RetInfos, DL, F.getCallingConv());
335
338
339 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
340 F.getContext());
341
342 MipsOutgoingValueHandler RetHandler(MIRBuilder, MF.getRegInfo(), Ret);
343 std::string FuncName = F.getName().str();
344 MipsOutgoingValueAssigner Assigner(TLI.CCAssignFnForReturn(),
345 FuncName.c_str(), /*IsReturn*/ true);
346
347 if (!determineAssignments(Assigner, RetInfos, CCInfo))
348 return false;
349
350 if (!handleAssignments(RetHandler, RetInfos, CCInfo, ArgLocs, MIRBuilder))
351 return false;
352 }
353
354 MIRBuilder.insertInstr(Ret);
355 return true;
356}
357
359 const Function &F,
361 FunctionLoweringInfo &FLI) const {
362
363 // Quick exit if there aren't any args.
364 if (F.arg_empty())
365 return true;
366
367 for (auto &Arg : F.args()) {
368 if (!isSupportedArgumentType(Arg.getType()))
369 return false;
370 }
371
372 MachineFunction &MF = MIRBuilder.getMF();
373 const DataLayout &DL = MF.getDataLayout();
374 const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
375
377 unsigned i = 0;
378 for (auto &Arg : F.args()) {
379 ArgInfo AInfo(VRegs[i], Arg, i);
381
382 splitToValueTypes(AInfo, ArgInfos, DL, F.getCallingConv());
383 ++i;
384 }
385
387
389 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
390 F.getContext());
391
392 const MipsTargetMachine &TM =
393 static_cast<const MipsTargetMachine &>(MF.getTarget());
394 const MipsABIInfo &ABI = TM.getABI();
395 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(F.getCallingConv()),
396 Align(1));
397
398 const std::string FuncName = F.getName().str();
399 MipsIncomingValueAssigner Assigner(TLI.CCAssignFnForCall(), FuncName.c_str(),
400 /*IsReturn*/ false);
401 if (!determineAssignments(Assigner, ArgInfos, CCInfo))
402 return false;
403
404 MipsIncomingValueHandler Handler(MIRBuilder, MF.getRegInfo());
405 if (!handleAssignments(Handler, ArgInfos, CCInfo, ArgLocs, MIRBuilder))
406 return false;
407
408 if (F.isVarArg()) {
409 ArrayRef<MCPhysReg> ArgRegs = ABI.GetVarArgRegs();
410 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);
411
412 int VaArgOffset;
413 unsigned RegSize = 4;
414 if (ArgRegs.size() == Idx)
415 VaArgOffset = alignTo(CCInfo.getStackSize(), RegSize);
416 else {
417 VaArgOffset =
418 (int)ABI.GetCalleeAllocdArgSizeInBytes(CCInfo.getCallingConv()) -
419 (int)(RegSize * (ArgRegs.size() - Idx));
420 }
421
422 MachineFrameInfo &MFI = MF.getFrameInfo();
423 int FI = MFI.CreateFixedObject(RegSize, VaArgOffset, true);
424 MF.getInfo<MipsFunctionInfo>()->setVarArgsFrameIndex(FI);
425
426 for (unsigned I = Idx; I < ArgRegs.size(); ++I, VaArgOffset += RegSize) {
427 MIRBuilder.getMBB().addLiveIn(ArgRegs[I]);
428 LLT RegTy = LLT::scalar(RegSize * 8);
430 MIRBuilder.buildCopy(RegTy, Register(ArgRegs[I]));
431 FI = MFI.CreateFixedObject(RegSize, VaArgOffset, true);
433
434 const LLT PtrTy = LLT::pointer(MPO.getAddrSpace(), 32);
435 auto FrameIndex = MIRBuilder.buildFrameIndex(PtrTy, FI);
438 MIRBuilder.buildStore(Copy, FrameIndex, *MMO);
439 }
440 }
441
442 return true;
443}
444
446 CallLoweringInfo &Info) const {
447
448 if (Info.CallConv != CallingConv::C)
449 return false;
450
451 for (auto &Arg : Info.OrigArgs) {
452 if (!isSupportedArgumentType(Arg.Ty))
453 return false;
454 if (Arg.Flags[0].isByVal())
455 return false;
456 if (Arg.Flags[0].isSRet() && !Arg.Ty->isPointerTy())
457 return false;
458 }
459
460 if (!Info.OrigRet.Ty->isVoidTy() && !isSupportedReturnType(Info.OrigRet.Ty))
461 return false;
462
463 MachineFunction &MF = MIRBuilder.getMF();
464 const Function &F = MF.getFunction();
465 const DataLayout &DL = MF.getDataLayout();
466 const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
467 const MipsTargetMachine &TM =
468 static_cast<const MipsTargetMachine &>(MF.getTarget());
469 const MipsABIInfo &ABI = TM.getABI();
470
471 MachineInstrBuilder CallSeqStart =
472 MIRBuilder.buildInstr(Mips::ADJCALLSTACKDOWN);
473
474 const bool IsCalleeGlobalPIC =
475 Info.Callee.isGlobal() && TM.isPositionIndependent();
476
478 Info.Callee.isReg() || IsCalleeGlobalPIC ? Mips::JALRPseudo : Mips::JAL);
479 MIB.addDef(Mips::SP, RegState::Implicit);
480 if (IsCalleeGlobalPIC) {
481 Register CalleeReg =
483 MachineInstr *CalleeGlobalValue =
484 MIRBuilder.buildGlobalValue(CalleeReg, Info.Callee.getGlobal());
485 if (!Info.Callee.getGlobal()->hasLocalLinkage())
486 CalleeGlobalValue->getOperand(1).setTargetFlags(MipsII::MO_GOT_CALL);
487 MIB.addUse(CalleeReg);
488 } else
489 MIB.add(Info.Callee);
491 MIB.addRegMask(TRI->getCallPreservedMask(MF, Info.CallConv));
492
493 TargetLowering::ArgListTy FuncOrigArgs;
494 FuncOrigArgs.reserve(Info.OrigArgs.size());
495
497 for (auto &Arg : Info.OrigArgs)
498 splitToValueTypes(Arg, ArgInfos, DL, Info.CallConv);
499
501 bool IsCalleeVarArg = false;
502 if (Info.Callee.isGlobal()) {
503 const Function *CF = static_cast<const Function *>(Info.Callee.getGlobal());
504 IsCalleeVarArg = CF->isVarArg();
505 }
506
507 // FIXME: Should use MipsCCState::getSpecialCallingConvForCallee, but it
508 // depends on looking directly at the call target.
509 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs,
510 F.getContext());
511
512 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(Info.CallConv),
513 Align(1));
514
515 const char *Call =
516 Info.Callee.isSymbol() ? Info.Callee.getSymbolName() : nullptr;
517
518 MipsOutgoingValueAssigner Assigner(TLI.CCAssignFnForCall(), Call,
519 /*IsReturn*/ false);
520 if (!determineAssignments(Assigner, ArgInfos, CCInfo))
521 return false;
522
523 MipsOutgoingValueHandler ArgHandler(MIRBuilder, MF.getRegInfo(), MIB);
524 if (!handleAssignments(ArgHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder))
525 return false;
526
527 unsigned StackSize = CCInfo.getStackSize();
528 unsigned StackAlignment = F.getParent()->getOverrideStackAlignment();
529 if (!StackAlignment) {
531 StackAlignment = TFL->getStackAlignment();
532 }
533 StackSize = alignTo(StackSize, StackAlignment);
534 CallSeqStart.addImm(StackSize).addImm(0);
535
536 if (IsCalleeGlobalPIC) {
537 MIRBuilder.buildCopy(
538 Register(Mips::GP),
540 MIB.addDef(Mips::GP, RegState::Implicit);
541 }
542 MIRBuilder.insertInstr(MIB);
543 if (MIB->getOpcode() == Mips::JALRPseudo) {
544 const MipsSubtarget &STI = MIRBuilder.getMF().getSubtarget<MipsSubtarget>();
545 MIB.constrainAllUses(MIRBuilder.getTII(), *STI.getRegisterInfo(),
546 *STI.getRegBankInfo());
547 }
548
549 if (!Info.OrigRet.Ty->isVoidTy()) {
550 ArgInfos.clear();
551
552 CallLowering::splitToValueTypes(Info.OrigRet, ArgInfos, DL,
553 F.getCallingConv());
554
555 const std::string FuncName = F.getName().str();
558 MipsIncomingValueAssigner Assigner(TLI.CCAssignFnForReturn(),
559 FuncName.c_str(),
560 /*IsReturn*/ true);
561 CallReturnHandler RetHandler(MIRBuilder, MF.getRegInfo(), MIB);
562
563 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
564 F.getContext());
565
566 if (!determineAssignments(Assigner, ArgInfos, CCInfo))
567 return false;
568
569 if (!handleAssignments(RetHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder))
570 return false;
571 }
572
573 MIRBuilder.buildInstr(Mips::ADJCALLSTACKUP).addImm(StackSize).addImm(0);
574
575 return true;
576}
unsigned const MachineRegisterInfo * MRI
unsigned RegSize
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
uint64_t Addr
uint64_t Size
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
This file declares the MachineIRBuilder class.
unsigned const TargetRegisterInfo * TRI
static bool isSupportedReturnType(Type *T)
static bool isSupportedArgumentType(Type *T)
This file describes how to lower LLVM calls to machine code calls.
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:160
CCState - This class holds information needed while lowering arguments and return values.
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set,...
CallingConv::ID getCallingConv() const
int64_t AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
uint64_t getStackSize() const
Returns the size of the currently allocated portion of the stack.
CCValAssign - Represent assignment of one arg/retval to a location.
Register getLocReg() const
int64_t getLocMemOffset() const
bool handleAssignments(ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs=std::nullopt) const
Use Handler to insert code to handle the argument/return values represented by Args.
void splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const
Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs.
bool determineAssignments(ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const
Analyze the argument list in Args, using Assigner to populate CCInfo.
void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:110
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:213
static constexpr LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Definition: LowLevelType.h:42
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
Definition: LowLevelType.h:49
Machine Value Type.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Helper class to build MachineInstr.
MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)
Insert an existing instruction at the insertion point.
MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV)
Build and insert Res = G_GLOBAL_VALUE GV.
const TargetInstrInfo & getTII()
MachineInstrBuilder buildStore(const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO)
Build and insert G_STORE Val, Addr, MMO.
MachineInstrBuilder buildInstr(unsigned Opcode)
Build and insert <empty> = Opcode <empty>.
MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx)
Build and insert Res = G_FRAME_INDEX Idx.
MachineFunction & getMF()
Getter for the function we currently build.
const MachineBasicBlock & getMBB() const
Getter for the basic block we currently build.
MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)
Build but don't insert <empty> = Opcode <empty>.
MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op)
Build and insert Res = COPY Op.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & add(const MachineOperand &MO) const
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Representation of each machine instruction.
Definition: MachineInstr.h:68
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:543
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:553
A description of a memory reference used in the backend.
@ MOLoad
The memory access reads data.
@ MOStore
The memory access writes data.
void setTargetFlags(unsigned F)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register createGenericVirtualRegister(LLT Ty, StringRef Name="")
Create and return a new generic virtual register with low-level type Ty.
void PreAnalyzeReturnValue(EVT ArgVT)
void PreAnalyzeCallOperand(const Type *ArgTy, bool IsFixed, const char *Func)
void PreAnalyzeFormalArgument(const Type *ArgTy, ISD::ArgFlagsTy Flags)
void PreAnalyzeCallResult(const Type *RetTy, const char *Func)
Definition: MipsCCState.h:145
MipsCallLowering(const MipsTargetLowering &TLI)
bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...
bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override
This hook must be implemented to lower the given call instruction, including argument and return valu...
bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterro...
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Register getGlobalBaseRegForGlobalISel(MachineFunction &MF)
bool isLittle() const
const MipsRegisterInfo * getRegisterInfo() const override
const RegisterBankInfo * getRegBankInfo() const override
Align getStackAlignment() const
CCAssignFn * CCAssignFnForReturn() const
CCAssignFn * CCAssignFnForCall() const
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
Information about stack frame layout on the target.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
std::vector< ArgListEntry > ArgListTy
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetFrameLowering * getFrameLowering() const
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:255
LLVM Value Representation.
Definition: Value.h:74
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
Definition: MipsBaseInfo.h:44
@ Implicit
Not emitted register (e.g. carry, or temporary result).
NodeAddr< FuncNode * > Func
Definition: RDFGraph.h:393
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
Align commonAlignment(Align A, uint64_t Offset)
Returns the alignment that satisfies both alignments.
Definition: Alignment.h:212
Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO)
Definition: Utils.cpp:866
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:860
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
SmallVector< Register, 4 > Regs
Definition: CallLowering.h:63
SmallVector< Register, 2 > OrigRegs
Definition: CallLowering.h:67
SmallVector< ISD::ArgFlagsTy, 4 > Flags
Definition: CallLowering.h:51
Base class for ValueHandlers used for arguments coming into the current function, or for return value...
Definition: CallLowering.h:320
Base class for ValueHandlers used for arguments passed to a function call, or for return values.
Definition: CallLowering.h:336
Extended Value Type.
Definition: ValueTypes.h:34
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
Definition: ValueTypes.cpp:626
This class contains a discriminated union of information about pointers in memory operands,...
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.