Go to the documentation of this file.
14 #ifndef LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
15 #define LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
199 bool IsOpaque =
false)
const;
223 #endif // LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
This is an optimization pass for GlobalISel generic memory operations.
SDValue getNodeChain(SDValue Op)
Node Properties {.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
SDValue getNodeMask(SDValue Op)
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
SDValue getMergeValues(ArrayRef< SDValue > Values) const
} Packing
bool isPackedVectorType(EVT SomeVT)
SDValue getMaskBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const
bool isMaskArithmetic(SDValue Op)
Represents one node in the SelectionDAG.
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements, bool IsScalable=false)
Returns the EVT that represents a vector NumElements in length, where each element is of type VT.
MVT splitVectorType(MVT VT)
Packing getTypePacking(EVT VT)
SDValue getPack(EVT DestVT, SDValue LoVec, SDValue HiVec, SDValue AVL) const
Optional< int > getMaskPos(unsigned Opc)
LLVMContext * getContext() const
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
SelectionDAG * getDAG() const
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
SDValue getStoredValue(SDValue Op)
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
VECustomDAG(SelectionDAG &DAG, const SDNode *WhereN)
SDValue getGatherScatterAddress(SDValue BasePtr, SDValue Scale, SDValue Index, SDValue Mask, SDValue AVL) const
SDValue getBroadcast(EVT ResultVT, SDValue Scalar, SDValue AVL) const
SDValue getNode(unsigned OC, EVT ResVT, ArrayRef< SDValue > OpV, Optional< SDNodeFlags > Flags=None) const
SDValue getNodeAVL(SDValue Op)
} Node Properties
VETargetMasks(SDValue Mask=SDValue(), SDValue AVL=SDValue())
VECustomDAG(SelectionDAG &DAG, SDValue WhereOp)
std::pair< SDValue, bool > getAnnotatedNodeAVL(SDValue Op)
bool isPackingSupportOpcode(unsigned Opc)
SDValue getNode(unsigned OC, ArrayRef< EVT > ResVT, ArrayRef< SDValue > OpV, Optional< SDNodeFlags > Flags=None) const
SDValue getConstantMask(Packing Packing, bool AllTrue) const
bool supportsPackedMode(unsigned Opcode, EVT IdiomVT)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
SDValue getUNDEF(EVT VT) const
SDValue annotateLegalAVL(SDValue AVL) const
SDValue getUnpack(EVT DestVT, SDValue Vec, PackElem Part, SDValue AVL) const
} Legalizing getNode
SDValue getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, SDValue StartV, SDValue VectorV, SDValue Mask, SDValue AVL, SDNodeFlags Flags) const
} getNode
SDValue getSplitPtrOffset(SDValue Ptr, SDValue ByteStride, PackElem Part) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Optional< EVT > getIdiomaticVectorType(SDNode *Op)
} AVL Functions
bool isLegalAVL(SDValue AVL)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
bool isVVPOrVEC(unsigned Opcode)
bool maySafelyIgnoreMask(SDValue Op)
SDValue getGatherScatterIndex(SDValue Op)
EVT getVectorVT(EVT ElemVT, unsigned NumElems) const
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
bool isVVPBinaryOp(unsigned VVPOpcode)
unsigned getScalarReductionOpcode(unsigned VVPOC, bool IsMask)
bool isVVPUnaryOp(unsigned VVPOpcode)
SDValue getNodePassthru(SDValue Op)
SDValue getConstant(uint64_t Val, EVT VT, bool IsTarget=false, bool IsOpaque=false) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Optional< unsigned > getVVPOpcode(unsigned Opcode)
These are IR-level optimization flags that may be propagated to SDNodes.
bool isVVPReductionOp(unsigned Opcode)
SDValue getSplitPtrStride(SDValue PackStride) const
SDValue getNode(unsigned OC, SDVTList VTL, ArrayRef< SDValue > OpV, Optional< SDNodeFlags > Flags=None) const
getNode {
SDValue getGatherScatterScale(SDValue Op)
Optional< int > getAVLPos(unsigned Opc)
The VE backend uses a two-staged process to lower and legalize vector instructions:
MVT getLegalVectorType(Packing P, MVT ElemVT)
SDValue getLoadStoreStride(SDValue Op, VECustomDAG &CDAG)
bool isMaskType(EVT SomeVT)
VECustomDAG(SelectionDAG &DAG, SDLoc DL)
bool hasReductionStartParam(unsigned OPC)
SDValue getMemoryPtr(SDValue Op)
SDValue getMergeValues(ArrayRef< SDValue > Ops, const SDLoc &dl)
Create a MERGE_VALUES node from the given operands.
VETargetMasks getTargetSplitMask(SDValue RawMask, SDValue RawAVL, PackElem Part) const