LLVM 17.0.0git
DWARFExpression.cpp
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1//===-- DWARFExpression.cpp -----------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
11#include "llvm/Support/Format.h"
12#include <cassert>
13#include <cstdint>
14#include <vector>
15
16using namespace llvm;
17using namespace dwarf;
18
19namespace llvm {
20
21typedef std::vector<DWARFExpression::Operation::Description> DescVector;
22
24 DescVector Descriptions;
26 typedef Op::Description Desc;
27
28 Descriptions.resize(0xff);
29 Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
30 Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
31 Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
32 Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
33 Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
34 Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
35 Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
36 Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
37 Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
38 Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
39 Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
40 Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
41 Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
42 Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
43 Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
44 Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
45 Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
46 Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
47 Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
48 Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
49 Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
50 Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
51 Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
52 Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
53 Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
54 Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
55 Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
56 Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
57 Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
58 Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
59 Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
60 Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
61 Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
62 Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
63 Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
64 Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
65 Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
66 Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
67 Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
68 Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
69 Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
70 Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
71 for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
72 Descriptions[LA] = Desc(Op::Dwarf2);
73 for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
74 Descriptions[LA] = Desc(Op::Dwarf2);
75 for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
76 Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
77 Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
78 Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
79 Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
80 Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
81 Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
82 Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
83 Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
84 Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
85 Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
86 Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
87 Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
88 Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
89 Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
90 Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
91 Descriptions[DW_OP_implicit_value] =
92 Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
93 Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
94 Descriptions[DW_OP_WASM_location] =
95 Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg);
96 Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
97 Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
98 Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
99 Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
100
101 Descriptions[DW_OP_addrx] = Desc(Op::Dwarf5, Op::SizeLEB);
102 Descriptions[DW_OP_constx] = Desc(Op::Dwarf5, Op::SizeLEB);
103 Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
104 Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
105 Descriptions[DW_OP_regval_type] =
106 Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef);
107
108 return Descriptions;
109}
110
112 // FIXME: Make this constexpr once all compilers are smart enough to do it.
113 static DescVector Descriptions = getDescriptions();
114 // Handle possible corrupted or unsupported operation.
115 if (OpCode >= Descriptions.size())
116 return {};
117 return Descriptions[OpCode];
118}
119
120bool DWARFExpression::Operation::extract(DataExtractor Data,
121 uint8_t AddressSize, uint64_t Offset,
122 std::optional<DwarfFormat> Format) {
123 EndOffset = Offset;
124 Opcode = Data.getU8(&Offset);
125
126 Desc = getOpDesc(Opcode);
127 if (Desc.Version == Operation::DwarfNA)
128 return false;
129
130 for (unsigned Operand = 0; Operand < 2; ++Operand) {
131 unsigned Size = Desc.Op[Operand];
132 unsigned Signed = Size & Operation::SignBit;
133
134 if (Size == Operation::SizeNA)
135 break;
136
137 switch (Size & ~Operation::SignBit) {
138 case Operation::Size1:
139 Operands[Operand] = Data.getU8(&Offset);
140 if (Signed)
141 Operands[Operand] = (int8_t)Operands[Operand];
142 break;
143 case Operation::Size2:
144 Operands[Operand] = Data.getU16(&Offset);
145 if (Signed)
146 Operands[Operand] = (int16_t)Operands[Operand];
147 break;
148 case Operation::Size4:
149 Operands[Operand] = Data.getU32(&Offset);
150 if (Signed)
151 Operands[Operand] = (int32_t)Operands[Operand];
152 break;
153 case Operation::Size8:
154 Operands[Operand] = Data.getU64(&Offset);
155 break;
157 Operands[Operand] = Data.getUnsigned(&Offset, AddressSize);
158 break;
160 if (!Format)
161 return false;
162 Operands[Operand] =
163 Data.getUnsigned(&Offset, dwarf::getDwarfOffsetByteSize(*Format));
164 break;
166 if (Signed)
167 Operands[Operand] = Data.getSLEB128(&Offset);
168 else
169 Operands[Operand] = Data.getULEB128(&Offset);
170 break;
172 Operands[Operand] = Data.getULEB128(&Offset);
173 break;
175 assert(Operand == 1);
176 switch (Operands[0]) {
177 case 0:
178 case 1:
179 case 2:
180 case 4:
181 Operands[Operand] = Data.getULEB128(&Offset);
182 break;
183 case 3: // global as uint32
184 Operands[Operand] = Data.getU32(&Offset);
185 break;
186 default:
187 return false; // Unknown Wasm location
188 }
189 break;
191 // We need a size, so this cannot be the first operand
192 if (Operand == 0)
193 return false;
194 // Store the offset of the block as the value.
195 Operands[Operand] = Offset;
196 Offset += Operands[Operand - 1];
197 break;
198 default:
199 llvm_unreachable("Unknown DWARFExpression Op size");
200 }
201
202 OperandEndOffsets[Operand] = Offset;
203 }
204
205 EndOffset = Offset;
206 return true;
207}
208
210 DIDumpOptions DumpOpts,
211 const uint64_t Operands[2],
212 unsigned Operand) {
213 assert(Operand < 2 && "operand out of bounds");
214 auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
215 if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
216 OS << " (";
217 if (DumpOpts.Verbose)
218 OS << format("0x%08" PRIx64 " -> ", Operands[Operand]);
219 OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);
220 if (auto Name = dwarf::toString(Die.find(dwarf::DW_AT_name)))
221 OS << " \"" << *Name << "\"";
222 } else {
223 OS << format(" <invalid base_type ref: 0x%" PRIx64 ">",
224 Operands[Operand]);
225 }
226}
227
229 DIDumpOptions DumpOpts,
230 uint8_t Opcode,
231 const uint64_t Operands[2]) {
232 if (!DumpOpts.GetNameForDWARFReg)
233 return false;
234
235 uint64_t DwarfRegNum;
236 unsigned OpNum = 0;
237
238 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
239 Opcode == DW_OP_regval_type)
240 DwarfRegNum = Operands[OpNum++];
241 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
242 DwarfRegNum = Opcode - DW_OP_breg0;
243 else
244 DwarfRegNum = Opcode - DW_OP_reg0;
245
246 auto RegName = DumpOpts.GetNameForDWARFReg(DwarfRegNum, DumpOpts.IsEH);
247 if (!RegName.empty()) {
248 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
249 Opcode == DW_OP_bregx)
250 OS << ' ' << RegName << format("%+" PRId64, Operands[OpNum]);
251 else
252 OS << ' ' << RegName.data();
253
254 if (Opcode == DW_OP_regval_type)
255 prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);
256 return true;
257 }
258
259 return false;
260}
261
263 const DWARFExpression *Expr,
264 DWARFUnit *U) const {
265 if (Error) {
266 OS << "<decoding error>";
267 return false;
268 }
269
271 assert(!Name.empty() && "DW_OP has no name!");
272 OS << Name;
273
274 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
275 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
276 Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
277 Opcode == DW_OP_regval_type)
278 if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands))
279 return true;
280
281 for (unsigned Operand = 0; Operand < 2; ++Operand) {
282 unsigned Size = Desc.Op[Operand];
283 unsigned Signed = Size & Operation::SignBit;
284
285 if (Size == Operation::SizeNA)
286 break;
287
288 if (Size == Operation::BaseTypeRef && U) {
289 // For DW_OP_convert the operand may be 0 to indicate that conversion to
290 // the generic type should be done. The same holds for DW_OP_reinterpret,
291 // which is currently not supported.
292 if (Opcode == DW_OP_convert && Operands[Operand] == 0)
293 OS << " 0x0";
294 else
295 prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand);
296 } else if (Size == Operation::WasmLocationArg) {
297 assert(Operand == 1);
298 switch (Operands[0]) {
299 case 0:
300 case 1:
301 case 2:
302 case 3: // global as uint32
303 case 4:
304 OS << format(" 0x%" PRIx64, Operands[Operand]);
305 break;
306 default: assert(false);
307 }
308 } else if (Size == Operation::SizeBlock) {
309 uint64_t Offset = Operands[Operand];
310 for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
311 OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
312 } else {
313 if (Signed)
314 OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
315 else if (Opcode != DW_OP_entry_value &&
316 Opcode != DW_OP_GNU_entry_value)
317 OS << format(" 0x%" PRIx64, Operands[Operand]);
318 }
319 }
320 return true;
321}
322
324 DWARFUnit *U, bool IsEH) const {
325 uint32_t EntryValExprSize = 0;
326 uint64_t EntryValStartOffset = 0;
327 if (Data.getData().empty())
328 OS << "<empty>";
329
330 for (auto &Op : *this) {
331 DumpOpts.IsEH = IsEH;
332 if (!Op.print(OS, DumpOpts, this, U)) {
333 uint64_t FailOffset = Op.getEndOffset();
334 while (FailOffset < Data.getData().size())
335 OS << format(" %02x", Data.getU8(&FailOffset));
336 return;
337 }
338
339 if (Op.getCode() == DW_OP_entry_value ||
340 Op.getCode() == DW_OP_GNU_entry_value) {
341 OS << "(";
342 EntryValExprSize = Op.getRawOperand(0);
343 EntryValStartOffset = Op.getEndOffset();
344 continue;
345 }
346
347 if (EntryValExprSize) {
348 EntryValExprSize -= Op.getEndOffset() - EntryValStartOffset;
349 if (EntryValExprSize == 0)
350 OS << ")";
351 }
352
353 if (Op.getEndOffset() < Data.getData().size())
354 OS << ", ";
355 }
356}
357
359 for (unsigned Operand = 0; Operand < 2; ++Operand) {
360 unsigned Size = Op.Desc.Op[Operand];
361
362 if (Size == Operation::SizeNA)
363 break;
364
366 // For DW_OP_convert the operand may be 0 to indicate that conversion to
367 // the generic type should be done, so don't look up a base type in that
368 // case. The same holds for DW_OP_reinterpret, which is currently not
369 // supported.
370 if (Op.Opcode == DW_OP_convert && Op.Operands[Operand] == 0)
371 continue;
372 auto Die = U->getDIEForOffset(U->getOffset() + Op.Operands[Operand]);
373 if (!Die || Die.getTag() != dwarf::DW_TAG_base_type)
374 return false;
375 }
376 }
377
378 return true;
379}
380
382 for (auto &Op : *this)
383 if (!Operation::verify(Op, U))
384 return false;
385
386 return true;
387}
388
389/// A user-facing string representation of a DWARF expression. This might be an
390/// Address expression, in which case it will be implicitly dereferenced, or a
391/// Value expression.
393 enum ExprKind {
396 };
399
400 PrintedExpr(ExprKind K = Address) : Kind(K) {}
401};
402
406 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg =
407 nullptr) {
409
410 while (I != E) {
411 const DWARFExpression::Operation &Op = *I;
412 uint8_t Opcode = Op.getCode();
413 switch (Opcode) {
414 case dwarf::DW_OP_regx: {
415 // DW_OP_regx: A register, with the register num given as an operand.
416 // Printed as the plain register name.
417 uint64_t DwarfRegNum = Op.getRawOperand(0);
418 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
419 if (RegName.empty())
420 return false;
421 raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
422 S << RegName;
423 break;
424 }
425 case dwarf::DW_OP_bregx: {
426 int DwarfRegNum = Op.getRawOperand(0);
427 int64_t Offset = Op.getRawOperand(1);
428 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
429 if (RegName.empty())
430 return false;
431 raw_svector_ostream S(Stack.emplace_back().String);
432 S << RegName;
433 if (Offset)
434 S << format("%+" PRId64, Offset);
435 break;
436 }
437 case dwarf::DW_OP_entry_value:
438 case dwarf::DW_OP_GNU_entry_value: {
439 // DW_OP_entry_value contains a sub-expression which must be rendered
440 // separately.
441 uint64_t SubExprLength = Op.getRawOperand(0);
442 DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength);
443 ++I;
444 raw_svector_ostream S(Stack.emplace_back().String);
445 S << "entry(";
446 printCompactDWARFExpr(S, I, SubExprEnd, GetNameForDWARFReg);
447 S << ")";
448 I = SubExprEnd;
449 continue;
450 }
451 case dwarf::DW_OP_stack_value: {
452 // The top stack entry should be treated as the actual value of tne
453 // variable, rather than the address of the variable in memory.
454 assert(!Stack.empty());
455 Stack.back().Kind = PrintedExpr::Value;
456 break;
457 }
458 case dwarf::DW_OP_nop: {
459 break;
460 }
461 default:
462 if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
463 // DW_OP_reg<N>: A register, with the register num implied by the
464 // opcode. Printed as the plain register name.
465 uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
466 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
467 if (RegName.empty())
468 return false;
469 raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String);
470 S << RegName;
471 } else if (Opcode >= dwarf::DW_OP_breg0 &&
472 Opcode <= dwarf::DW_OP_breg31) {
473 int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;
474 int64_t Offset = Op.getRawOperand(0);
475 auto RegName = GetNameForDWARFReg(DwarfRegNum, false);
476 if (RegName.empty())
477 return false;
478 raw_svector_ostream S(Stack.emplace_back().String);
479 S << RegName;
480 if (Offset)
481 S << format("%+" PRId64, Offset);
482 } else {
483 // If we hit an unknown operand, we don't know its effect on the stack,
484 // so bail out on the whole expression.
485 OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " ("
486 << (int)Opcode << ")>";
487 return false;
488 }
489 break;
490 }
491 ++I;
492 }
493
494 if (Stack.size() != 1) {
495 OS << "<stack of size " << Stack.size() << ", expected 1>";
496 return false;
497 }
498
499 if (Stack.front().Kind == PrintedExpr::Address)
500 OS << "[" << Stack.front().String << "]";
501 else
502 OS << Stack.front().String;
503
504 return true;
505}
506
509 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) {
510 return printCompactDWARFExpr(OS, begin(), end(), GetNameForDWARFReg);
511}
512
514 if (AddressSize != RHS.AddressSize || Format != RHS.Format)
515 return false;
516 return Data.getData() == RHS.Data.getData();
517}
518
519} // namespace llvm
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
std::string Name
uint64_t Size
#define RegName(no)
#define I(x, y, z)
Definition: MD5.cpp:58
mir Rename Register Operands
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
Value * RHS
This class represents an Operation in the Expression.
@ DwarfNA
Serves as a marker for unused entries.
static bool verify(const Operation &Op, DWARFUnit *U)
Verify Op. Does not affect the return of isError().
bool print(raw_ostream &OS, DIDumpOptions DumpOpts, const DWARFExpression *Expr, DWARFUnit *U) const
@ SizeBlock
Preceding operand contains block size.
@ SizeNA
Unused operands get this encoding.
An iterator to go through the expression operations.
bool verify(DWARFUnit *U)
iterator end() const
static bool prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, uint8_t Opcode, const uint64_t Operands[2])
iterator begin() const
bool printCompact(raw_ostream &OS, std::function< StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg=nullptr)
Print the expression in a format intended to be compact and useful to a user, but not perfectly unamb...
bool operator==(const DWARFExpression &RHS) const
void print(raw_ostream &OS, DIDumpOptions DumpOpts, DWARFUnit *U, bool IsEH=false) const
uint8_t getU8(uint64_t *offset_ptr, Error *Err=nullptr) const
Extract a uint8_t value from *offset_ptr.
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:26
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:672
StringRef OperationEncodingString(unsigned Encoding)
Definition: Dwarf.cpp:138
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
std::optional< const char * > toString(const std::optional< DWARFFormValue > &V)
Take an optional DWARFFormValue and try to extract a string value from it.
uint8_t getDwarfOffsetByteSize(DwarfFormat Format)
The size of a reference determined by the DWARF 32/64-bit format.
Definition: Dwarf.h:718
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:440
static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode)
static bool printCompactDWARFExpr(raw_ostream &OS, DWARFExpression::iterator I, const DWARFExpression::iterator E, std::function< StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg=nullptr)
static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS, DIDumpOptions DumpOpts, const uint64_t Operands[2], unsigned Operand)
std::vector< DWARFExpression::Operation::Description > DescVector
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
static DescVector getDescriptions()
Container for dump options that control which debug information will be dumped.
Definition: DIContext.h:189
std::function< llvm::StringRef(uint64_t DwarfRegNum, bool IsEH)> GetNameForDWARFReg
Definition: DIContext.h:204
Description of the encoding of one expression Op.
DwarfVersion Version
Dwarf version where the Op was introduced.
Encoding Op[2]
Encoding for Op operands, or SizeNA.
A user-facing string representation of a DWARF expression.
PrintedExpr(ExprKind K=Address)
SmallString< 16 > String