17 using namespace dwarf;
21 typedef std::vector<DWARFExpression::Operation::Description>
DescVector;
26 typedef Op::Description Desc;
28 Descriptions.resize(0xff);
29 Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
30 Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
31 Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
32 Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
33 Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
34 Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
35 Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
36 Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
37 Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
38 Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
39 Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
40 Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
41 Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
42 Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
43 Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
44 Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
45 Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
46 Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
47 Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
48 Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
49 Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
50 Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
51 Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
52 Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
53 Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
54 Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
55 Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
56 Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
57 Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
58 Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
59 Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
60 Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
61 Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
62 Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
63 Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
64 Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
65 Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
66 Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
67 Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
68 Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
69 Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
70 Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
72 Descriptions[
LA] = Desc(Op::Dwarf2);
74 Descriptions[
LA] = Desc(Op::Dwarf2);
76 Descriptions[
LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
77 Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
78 Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
79 Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
80 Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
81 Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
82 Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
83 Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
84 Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
85 Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
86 Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
87 Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
88 Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
89 Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
90 Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
91 Descriptions[DW_OP_implicit_value] =
92 Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
93 Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
94 Descriptions[DW_OP_WASM_location] =
95 Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg);
96 Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
97 Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
98 Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
99 Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
100 Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
102 Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
103 Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
104 Descriptions[DW_OP_regval_type] =
105 Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef);
114 if (OpCode >= Descriptions.size())
116 return Descriptions[OpCode];
120 uint8_t AddressSize,
uint64_t Offset,
121 std::optional<DwarfFormat> Format) {
123 Opcode =
Data.getU8(&Offset);
126 if (Desc.Version == Operation::DwarfNA)
129 for (
unsigned Operand = 0; Operand < 2; ++Operand) {
130 unsigned Size = Desc.Op[Operand];
131 unsigned Signed = Size & Operation::SignBit;
133 if (Size == Operation::SizeNA)
136 switch (Size & ~Operation::SignBit) {
137 case Operation::Size1:
142 case Operation::Size2:
147 case Operation::Size4:
152 case Operation::Size8:
155 case Operation::SizeAddr:
156 Operands[Operand] =
Data.getUnsigned(&Offset, AddressSize);
158 case Operation::SizeRefAddr:
164 case Operation::SizeLEB:
170 case Operation::BaseTypeRef:
173 case Operation::WasmLocationArg:
189 case Operation::SizeBlock:
201 OperandEndOffsets[Operand] =
Offset;
212 assert(Operand < 2 &&
"operand out of bounds");
214 if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
220 OS <<
" \"" << *Name <<
"\"";
222 OS <<
format(
" <invalid base_type ref: 0x%" PRIx64
">",
237 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
238 Opcode == DW_OP_regval_type)
240 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
241 DwarfRegNum = Opcode - DW_OP_breg0;
243 DwarfRegNum = Opcode - DW_OP_reg0;
247 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
248 Opcode == DW_OP_bregx)
253 if (Opcode == DW_OP_regval_type)
265 OS <<
"<decoding error>";
270 assert(!Name.empty() &&
"DW_OP has no name!");
273 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
274 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
275 Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
276 Opcode == DW_OP_regval_type)
277 if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode,
Operands))
280 for (
unsigned Operand = 0; Operand < 2; ++Operand) {
281 unsigned Size = Desc.Op[Operand];
282 unsigned Signed = Size & Operation::SignBit;
284 if (Size == Operation::SizeNA)
287 if (Size == Operation::BaseTypeRef && U) {
291 if (Opcode == DW_OP_convert &&
Operands[Operand] == 0)
295 }
else if (Size == Operation::WasmLocationArg) {
307 }
else if (Size == Operation::SizeBlock) {
309 for (
unsigned i = 0;
i <
Operands[Operand - 1]; ++
i)
310 OS <<
format(
" 0x%02x", Expr->Data.
getU8(&Offset));
314 else if (Opcode != DW_OP_entry_value &&
315 Opcode != DW_OP_GNU_entry_value)
326 if (
Data.getData().empty())
329 for (
auto &
Op : *
this) {
330 DumpOpts.
IsEH = IsEH;
331 if (!
Op.print(OS, DumpOpts,
this, U)) {
333 while (FailOffset <
Data.getData().size())
334 OS <<
format(
" %02x",
Data.getU8(&FailOffset));
338 if (
Op.getCode() == DW_OP_entry_value ||
339 Op.getCode() == DW_OP_GNU_entry_value) {
341 EntryValExprSize =
Op.getRawOperand(0);
342 EntryValStartOffset =
Op.getEndOffset();
346 if (EntryValExprSize) {
347 EntryValExprSize -=
Op.getEndOffset() - EntryValStartOffset;
348 if (EntryValExprSize == 0)
352 if (
Op.getEndOffset() <
Data.getData().size())
358 for (
unsigned Operand = 0; Operand < 2; ++Operand) {
359 unsigned Size =
Op.Desc.Op[Operand];
361 if (Size == Operation::SizeNA)
364 if (Size == Operation::BaseTypeRef) {
369 if (
Op.Opcode == DW_OP_convert &&
Op.Operands[Operand] == 0)
372 if (!Die || Die.getTag() != dwarf::DW_TAG_base_type)
381 for (
auto &
Op : *
this)
411 uint8_t Opcode =
Op.getCode();
413 case dwarf::DW_OP_regx: {
417 auto RegName = GetNameForDWARFReg(DwarfRegNum,
false);
424 case dwarf::DW_OP_bregx: {
425 int DwarfRegNum =
Op.getRawOperand(0);
426 int64_t Offset =
Op.getRawOperand(1);
427 auto RegName = GetNameForDWARFReg(DwarfRegNum,
false);
433 S <<
format(
"%+" PRId64, Offset);
436 case dwarf::DW_OP_entry_value:
437 case dwarf::DW_OP_GNU_entry_value: {
450 case dwarf::DW_OP_stack_value: {
458 if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
461 uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
462 auto RegName = GetNameForDWARFReg(DwarfRegNum,
false);
467 }
else if (Opcode >= dwarf::DW_OP_breg0 &&
468 Opcode <= dwarf::DW_OP_breg31) {
469 int DwarfRegNum = Opcode - dwarf::DW_OP_breg0;
470 int64_t Offset =
Op.getRawOperand(0);
471 auto RegName = GetNameForDWARFReg(DwarfRegNum,
false);
477 S <<
format(
"%+" PRId64, Offset);
482 << (
int)Opcode <<
")>";
490 assert(Stack.size() == 1 &&
"expected one value on stack");
493 OS <<
"[" << Stack.front().String <<
"]";
495 OS << Stack.front().String;
507 if (AddressSize !=
RHS.AddressSize || Format !=
RHS.Format)
509 return Data.getData() ==
RHS.Data.getData();