LLVM 18.0.0git
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Helper class to build MachineInstr. More...
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
Public Member Functions | |
MachineIRBuilder ()=default | |
Some constructors for easy use. | |
MachineIRBuilder (MachineFunction &MF) | |
MachineIRBuilder (MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt) | |
MachineIRBuilder (MachineInstr &MI) | |
MachineIRBuilder (MachineInstr &MI, GISelChangeObserver &Observer) | |
virtual | ~MachineIRBuilder ()=default |
MachineIRBuilder (const MachineIRBuilderState &BState) | |
const TargetInstrInfo & | getTII () |
MachineFunction & | getMF () |
Getter for the function we currently build. | |
const MachineFunction & | getMF () const |
const DataLayout & | getDataLayout () const |
LLVMContext & | getContext () const |
const DebugLoc & | getDL () |
Getter for DebugLoc. | |
MachineRegisterInfo * | getMRI () |
Getter for MRI. | |
const MachineRegisterInfo * | getMRI () const |
MachineIRBuilderState & | getState () |
Getter for the State. | |
const MachineBasicBlock & | getMBB () const |
Getter for the basic block we currently build. | |
MachineBasicBlock & | getMBB () |
GISelCSEInfo * | getCSEInfo () |
const GISelCSEInfo * | getCSEInfo () const |
MachineBasicBlock::iterator | getInsertPt () |
Current insertion point for new instructions. | |
void | setInsertPt (MachineBasicBlock &MBB, MachineBasicBlock::iterator II) |
Set the insertion point before the specified position. | |
void | setCSEInfo (GISelCSEInfo *Info) |
void | setInstrAndDebugLoc (MachineInstr &MI) |
Set the insertion point to before MI, and set the debug loc to MI's loc. | |
void | setChangeObserver (GISelChangeObserver &Observer) |
GISelChangeObserver * | getObserver () |
void | stopObservingChanges () |
bool | isObservingChanges () const |
void | setDebugLoc (const DebugLoc &DL) |
Set the debug location to DL for all the next build instructions. | |
const DebugLoc & | getDebugLoc () |
Get the current instruction's debug location. | |
void | setPCSections (MDNode *MD) |
Set the PC sections metadata to MD for all the next build instructions. | |
MDNode * | getPCSections () |
Get the current instruction's PC sections metadata. | |
MachineInstrBuilder | buildInstr (unsigned Opcode) |
Build and insert <empty> = Opcode <empty>. | |
MachineInstrBuilder | buildInstrNoInsert (unsigned Opcode) |
Build but don't insert <empty> = Opcode <empty>. | |
MachineInstrBuilder | insertInstr (MachineInstrBuilder MIB) |
Insert an existing instruction at the insertion point. | |
MachineInstrBuilder | buildDirectDbgValue (Register Reg, const MDNode *Variable, const MDNode *Expr) |
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in Reg (suitably modified by Expr ). | |
MachineInstrBuilder | buildIndirectDbgValue (Register Reg, const MDNode *Variable, const MDNode *Expr) |
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in memory at Reg (suitably modified by Expr ). | |
MachineInstrBuilder | buildFIDbgValue (int FI, const MDNode *Variable, const MDNode *Expr) |
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in the stack slot specified by FI (suitably modified by Expr ). | |
MachineInstrBuilder | buildConstDbgValue (const Constant &C, const MDNode *Variable, const MDNode *Expr) |
Build and insert a DBG_VALUE instructions specifying that Variable is given by C (suitably modified by Expr ). | |
MachineInstrBuilder | buildDbgLabel (const MDNode *Label) |
Build and insert a DBG_LABEL instructions specifying that Label is given. | |
MachineInstrBuilder | buildDynStackAlloc (const DstOp &Res, const SrcOp &Size, Align Alignment) |
Build and insert Res = G_DYN_STACKALLOC Size , Align . | |
MachineInstrBuilder | buildFrameIndex (const DstOp &Res, int Idx) |
Build and insert Res = G_FRAME_INDEX Idx . | |
MachineInstrBuilder | buildGlobalValue (const DstOp &Res, const GlobalValue *GV) |
Build and insert Res = G_GLOBAL_VALUE GV . | |
MachineInstrBuilder | buildConstantPool (const DstOp &Res, unsigned Idx) |
Build and insert Res = G_CONSTANT_POOL Idx . | |
MachineInstrBuilder | buildPtrAdd (const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_PTR_ADD Op0 , Op1 . | |
std::optional< MachineInstrBuilder > | materializePtrAdd (Register &Res, Register Op0, const LLT ValueTy, uint64_t Value) |
Materialize and insert Res = G_PTR_ADD Op0 , (G_CONSTANT Value ) | |
MachineInstrBuilder | buildPtrMask (const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1) |
Build and insert Res = G_PTRMASK Op0 , Op1 . | |
MachineInstrBuilder | buildMaskLowPtrBits (const DstOp &Res, const SrcOp &Op0, uint32_t NumBits) |
Build and insert Res = G_PTRMASK Op0 , G_CONSTANT (1 << NumBits) - 1. | |
MachineInstrBuilder | buildPadVectorWithUndefElements (const DstOp &Res, const SrcOp &Op0) |
Build and insert a, b, ..., x = G_UNMERGE_VALUES Op0 Res = G_BUILD_VECTOR a, b, ..., x, undef, ..., undef. | |
MachineInstrBuilder | buildDeleteTrailingVectorElements (const DstOp &Res, const SrcOp &Op0) |
Build and insert a, b, ..., x, y, z = G_UNMERGE_VALUES Op0 Res = G_BUILD_VECTOR a, b, ..., x. | |
MachineInstrBuilder | buildUAddo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) |
Build and insert Res , CarryOut = G_UADDO Op0 , Op1 . | |
MachineInstrBuilder | buildUSubo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) |
Build and insert Res , CarryOut = G_USUBO Op0 , Op1 . | |
MachineInstrBuilder | buildSAddo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) |
Build and insert Res , CarryOut = G_SADDO Op0 , Op1 . | |
MachineInstrBuilder | buildSSubo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) |
Build and insert Res , CarryOut = G_SUBO Op0 , Op1 . | |
MachineInstrBuilder | buildUAdde (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) |
Build and insert Res , CarryOut = G_UADDE Op0 , Op1 , CarryIn . | |
MachineInstrBuilder | buildUSube (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) |
Build and insert Res , CarryOut = G_USUBE Op0 , Op1 , CarryInp . | |
MachineInstrBuilder | buildSAdde (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) |
Build and insert Res , CarryOut = G_SADDE Op0 , Op1 , CarryInp . | |
MachineInstrBuilder | buildSSube (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) |
Build and insert Res , CarryOut = G_SSUBE Op0 , Op1 , CarryInp . | |
MachineInstrBuilder | buildAnyExt (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = G_ANYEXT Op0 . | |
MachineInstrBuilder | buildSExt (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = G_SEXT Op . | |
MachineInstrBuilder | buildSExtInReg (const DstOp &Res, const SrcOp &Op, int64_t ImmOp) |
Build and insert Res = G_SEXT_INREG Op , ImmOp. | |
MachineInstrBuilder | buildFPExt (const DstOp &Res, const SrcOp &Op, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FPEXT Op . | |
MachineInstrBuilder | buildPtrToInt (const DstOp &Dst, const SrcOp &Src) |
Build and insert a G_PTRTOINT instruction. | |
MachineInstrBuilder | buildIntToPtr (const DstOp &Dst, const SrcOp &Src) |
Build and insert a G_INTTOPTR instruction. | |
MachineInstrBuilder | buildBitcast (const DstOp &Dst, const SrcOp &Src) |
Build and insert Dst = G_BITCAST Src . | |
MachineInstrBuilder | buildAddrSpaceCast (const DstOp &Dst, const SrcOp &Src) |
Build and insert Dst = G_ADDRSPACE_CAST Src . | |
unsigned | getBoolExtOp (bool IsVec, bool IsFP) const |
MachineInstrBuilder | buildBoolExt (const DstOp &Res, const SrcOp &Op, bool IsFP) |
MachineInstrBuilder | buildBoolExtInReg (const DstOp &Res, const SrcOp &Op, bool IsVector, bool IsFP) |
MachineInstrBuilder | buildZExt (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = G_ZEXT Op . | |
MachineInstrBuilder | buildSExtOrTrunc (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = G_SEXT Op , Res = G_TRUNC Op , or Res = COPY Op depending on the differing sizes of Res and Op . | |
MachineInstrBuilder | buildZExtOrTrunc (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = G_ZEXT Op , Res = G_TRUNC Op , or Res = COPY Op depending on the differing sizes of Res and Op . | |
MachineInstrBuilder | buildAnyExtOrTrunc (const DstOp &Res, const SrcOp &Op) |
Res = COPY Op depending on the differing sizes of Res and Op . | |
MachineInstrBuilder | buildExtOrTrunc (unsigned ExtOpc, const DstOp &Res, const SrcOp &Op) |
Build and insert Res = ExtOpc , Res = G_TRUNC Op , or Res = COPY Op depending on the differing sizes of Res and Op . | |
MachineInstrBuilder | buildZExtInReg (const DstOp &Res, const SrcOp &Op, int64_t ImmOp) |
Build and inserts Res = G_AND Op , LowBitsSet(ImmOp) Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is emulated using G_AND. | |
MachineInstrBuilder | buildCast (const DstOp &Dst, const SrcOp &Src) |
Build and insert an appropriate cast between two registers of equal size. | |
MachineInstrBuilder | buildBr (MachineBasicBlock &Dest) |
Build and insert G_BR Dest . | |
MachineInstrBuilder | buildBrCond (const SrcOp &Tst, MachineBasicBlock &Dest) |
Build and insert G_BRCOND Tst , Dest . | |
MachineInstrBuilder | buildBrIndirect (Register Tgt) |
Build and insert G_BRINDIRECT Tgt . | |
MachineInstrBuilder | buildBrJT (Register TablePtr, unsigned JTI, Register IndexReg) |
Build and insert G_BRJT TablePtr , JTI , IndexReg . | |
virtual MachineInstrBuilder | buildConstant (const DstOp &Res, const ConstantInt &Val) |
Build and insert Res = G_CONSTANT Val . | |
MachineInstrBuilder | buildConstant (const DstOp &Res, int64_t Val) |
Build and insert Res = G_CONSTANT Val . | |
MachineInstrBuilder | buildConstant (const DstOp &Res, const APInt &Val) |
virtual MachineInstrBuilder | buildFConstant (const DstOp &Res, const ConstantFP &Val) |
Build and insert Res = G_FCONSTANT Val . | |
MachineInstrBuilder | buildFConstant (const DstOp &Res, double Val) |
MachineInstrBuilder | buildFConstant (const DstOp &Res, const APFloat &Val) |
MachineInstrBuilder | buildCopy (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = COPY Op. | |
MachineInstrBuilder | buildAssertInstr (unsigned Opc, const DstOp &Res, const SrcOp &Op, unsigned Val) |
Build and insert G_ASSERT_SEXT, G_ASSERT_ZEXT, or G_ASSERT_ALIGN. | |
MachineInstrBuilder | buildAssertZExt (const DstOp &Res, const SrcOp &Op, unsigned Size) |
Build and insert Res = G_ASSERT_ZEXT Op, Size. | |
MachineInstrBuilder | buildAssertSExt (const DstOp &Res, const SrcOp &Op, unsigned Size) |
Build and insert Res = G_ASSERT_SEXT Op, Size. | |
MachineInstrBuilder | buildAssertAlign (const DstOp &Res, const SrcOp &Op, Align AlignVal) |
Build and insert Res = G_ASSERT_ALIGN Op, AlignVal. | |
MachineInstrBuilder | buildLoad (const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO) |
Build and insert Res = G_LOAD Addr, MMO . | |
MachineInstrBuilder | buildLoad (const DstOp &Res, const SrcOp &Addr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes()) |
Build and insert a G_LOAD instruction, while constructing the MachineMemOperand. | |
MachineInstrBuilder | buildLoadInstr (unsigned Opcode, const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO) |
Build and insert Res = <opcode> Addr, MMO . | |
MachineInstrBuilder | buildLoadFromOffset (const DstOp &Dst, const SrcOp &BasePtr, MachineMemOperand &BaseMMO, int64_t Offset) |
Helper to create a load from a constant offset given a base address. | |
MachineInstrBuilder | buildStore (const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO) |
Build and insert G_STORE Val, Addr, MMO . | |
MachineInstrBuilder | buildStore (const SrcOp &Val, const SrcOp &Addr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes()) |
Build and insert a G_STORE instruction, while constructing the MachineMemOperand. | |
MachineInstrBuilder | buildExtract (const DstOp &Res, const SrcOp &Src, uint64_t Index) |
Build and insert Res0, ... = G_EXTRACT Src, Idx0 . | |
MachineInstrBuilder | buildUndef (const DstOp &Res) |
Build and insert Res = IMPLICIT_DEF. | |
MachineInstrBuilder | buildMergeValues (const DstOp &Res, ArrayRef< Register > Ops) |
Build and insert Res = G_MERGE_VALUES Op0 , ... | |
MachineInstrBuilder | buildMergeLikeInstr (const DstOp &Res, ArrayRef< Register > Ops) |
Build and insert Res = G_MERGE_VALUES Op0 , ... or Res = G_BUILD_VECTOR Op0 , ... or Res = G_CONCAT_VECTORS Op0 , ... | |
MachineInstrBuilder | buildMergeLikeInstr (const DstOp &Res, std::initializer_list< SrcOp > Ops) |
MachineInstrBuilder | buildUnmerge (ArrayRef< LLT > Res, const SrcOp &Op) |
Build and insert Res0 , ... = G_UNMERGE_VALUES Op . | |
MachineInstrBuilder | buildUnmerge (ArrayRef< Register > Res, const SrcOp &Op) |
MachineInstrBuilder | buildUnmerge (LLT Res, const SrcOp &Op) |
Build and insert an unmerge of Res sized pieces to cover Op . | |
MachineInstrBuilder | buildBuildVector (const DstOp &Res, ArrayRef< Register > Ops) |
Build and insert Res = G_BUILD_VECTOR Op0 , ... | |
MachineInstrBuilder | buildBuildVectorConstant (const DstOp &Res, ArrayRef< APInt > Ops) |
Build and insert Res = G_BUILD_VECTOR Op0 , ... where each OpN is built with G_CONSTANT. | |
MachineInstrBuilder | buildSplatVector (const DstOp &Res, const SrcOp &Src) |
Build and insert Res = G_BUILD_VECTOR with Src replicated to fill the number of elements. | |
MachineInstrBuilder | buildBuildVectorTrunc (const DstOp &Res, ArrayRef< Register > Ops) |
Build and insert Res = G_BUILD_VECTOR_TRUNC Op0 , ... | |
MachineInstrBuilder | buildShuffleSplat (const DstOp &Res, const SrcOp &Src) |
Build and insert a vector splat of a scalar Src using a G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom. | |
MachineInstrBuilder | buildShuffleVector (const DstOp &Res, const SrcOp &Src1, const SrcOp &Src2, ArrayRef< int > Mask) |
Build and insert Res = G_SHUFFLE_VECTOR Src1 , Src2 , Mask . | |
MachineInstrBuilder | buildConcatVectors (const DstOp &Res, ArrayRef< Register > Ops) |
Build and insert Res = G_CONCAT_VECTORS Op0 , ... | |
MachineInstrBuilder | buildInsert (const DstOp &Res, const SrcOp &Src, const SrcOp &Op, unsigned Index) |
MachineInstrBuilder | buildIntrinsic (Intrinsic::ID ID, ArrayRef< Register > Res, bool HasSideEffects, bool isConvergent) |
Build and insert a G_INTRINSIC instruction. | |
MachineInstrBuilder | buildIntrinsic (Intrinsic::ID ID, ArrayRef< Register > Res) |
MachineInstrBuilder | buildIntrinsic (Intrinsic::ID ID, ArrayRef< DstOp > Res, bool HasSideEffects, bool isConvergent) |
MachineInstrBuilder | buildIntrinsic (Intrinsic::ID ID, ArrayRef< DstOp > Res) |
MachineInstrBuilder | buildFPTrunc (const DstOp &Res, const SrcOp &Op, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FPTRUNC Op . | |
MachineInstrBuilder | buildTrunc (const DstOp &Res, const SrcOp &Op) |
Build and insert Res = G_TRUNC Op . | |
MachineInstrBuilder | buildICmp (CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1) |
Build and insert a Res = G_ICMP Pred , Op0 , Op1 . | |
MachineInstrBuilder | buildFCmp (CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert a Res = G_FCMP Pred Op1 . | |
MachineInstrBuilder | buildIsFPClass (const DstOp &Res, const SrcOp &Src, unsigned Mask) |
Build and insert a Res = G_IS_FPCLASS Pred , Src , Mask . | |
MachineInstrBuilder | buildSelect (const DstOp &Res, const SrcOp &Tst, const SrcOp &Op0, const SrcOp &Op1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert a Res = G_SELECT Tst , Op0 , Op1 . | |
MachineInstrBuilder | buildInsertVectorElement (const DstOp &Res, const SrcOp &Val, const SrcOp &Elt, const SrcOp &Idx) |
Build and insert Res = G_INSERT_VECTOR_ELT Val , Elt , Idx . | |
MachineInstrBuilder | buildExtractVectorElementConstant (const DstOp &Res, const SrcOp &Val, const int Idx) |
Build and insert Res = G_EXTRACT_VECTOR_ELT Val , Idx . | |
MachineInstrBuilder | buildExtractVectorElement (const DstOp &Res, const SrcOp &Val, const SrcOp &Idx) |
Build and insert Res = G_EXTRACT_VECTOR_ELT Val , Idx . | |
MachineInstrBuilder | buildAtomicCmpXchgWithSuccess (Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO) |
Build and insert OldValRes<def>, SuccessRes<def> = G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO . | |
MachineInstrBuilder | buildAtomicCmpXchg (Register OldValRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO . | |
MachineInstrBuilder | buildAtomicRMW (unsigned Opcode, const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWXchg (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWAdd (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWSub (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWAnd (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWNand (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWOr (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWXor (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWMax (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWMin (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWUmax (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWUmin (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWFAdd (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWFSub (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWFMax (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_FMAX Addr, Val, MMO . | |
MachineInstrBuilder | buildAtomicRMWFMin (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO) |
Build and insert OldValRes<def> = G_ATOMICRMW_FMIN Addr, Val, MMO . | |
MachineInstrBuilder | buildFence (unsigned Ordering, unsigned Scope) |
Build and insert G_FENCE Ordering, Scope . | |
MachineInstrBuilder | buildFreeze (const DstOp &Dst, const SrcOp &Src) |
Build and insert Dst = G_FREEZE Src . | |
MachineInstrBuilder | buildBlockAddress (Register Res, const BlockAddress *BA) |
Build and insert Res = G_BLOCK_ADDR BA . | |
MachineInstrBuilder | buildAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_ADD Op0 , Op1 . | |
MachineInstrBuilder | buildSub (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_SUB Op0 , Op1 . | |
MachineInstrBuilder | buildMul (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_MUL Op0 , Op1 . | |
MachineInstrBuilder | buildUMulH (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildSMulH (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildURem (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_UREM Op0 , Op1 . | |
MachineInstrBuilder | buildFMul (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildFMinNum (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildFMaxNum (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildFMinNumIEEE (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildFMaxNumIEEE (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildShl (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildLShr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildAShr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
MachineInstrBuilder | buildAnd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_AND Op0 , Op1 . | |
MachineInstrBuilder | buildOr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_OR Op0 , Op1 . | |
MachineInstrBuilder | buildXor (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_XOR Op0 , Op1 . | |
MachineInstrBuilder | buildNot (const DstOp &Dst, const SrcOp &Src0) |
Build and insert a bitwise not, NegOne = G_CONSTANT -1 Res = G_OR Op0 , NegOne. | |
MachineInstrBuilder | buildNeg (const DstOp &Dst, const SrcOp &Src0) |
Build and insert integer negation Zero = G_CONSTANT 0 Res = G_SUB Zero, Op0 . | |
MachineInstrBuilder | buildCTPOP (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_CTPOP Op0 , Src0 . | |
MachineInstrBuilder | buildCTLZ (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_CTLZ Op0 , Src0 . | |
MachineInstrBuilder | buildCTLZ_ZERO_UNDEF (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_CTLZ_ZERO_UNDEF Op0 , Src0 . | |
MachineInstrBuilder | buildCTTZ (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_CTTZ Op0 , Src0 . | |
MachineInstrBuilder | buildCTTZ_ZERO_UNDEF (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_CTTZ_ZERO_UNDEF Op0 , Src0 . | |
MachineInstrBuilder | buildBSwap (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Dst = G_BSWAP Src0 . | |
MachineInstrBuilder | buildFAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FADD Op0 , Op1 . | |
MachineInstrBuilder | buildStrictFAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_STRICT_FADD Op0 , Op1 . | |
MachineInstrBuilder | buildFSub (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FSUB Op0 , Op1 . | |
MachineInstrBuilder | buildFDiv (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FDIV Op0 , Op1 . | |
MachineInstrBuilder | buildFMA (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FMA Op0 , Op1 , Op2 . | |
MachineInstrBuilder | buildFMAD (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FMAD Op0 , Op1 , Op2 . | |
MachineInstrBuilder | buildFNeg (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FNEG Op0 . | |
MachineInstrBuilder | buildFAbs (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = G_FABS Op0 . | |
MachineInstrBuilder | buildFCanonicalize (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FCANONICALIZE Src0 . | |
MachineInstrBuilder | buildIntrinsicTrunc (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_INTRINSIC_TRUNC Src0 . | |
MachineInstrBuilder | buildFFloor (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Res = GFFLOOR Op0 , Op1 . | |
MachineInstrBuilder | buildFLog (const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FLOG Src . | |
MachineInstrBuilder | buildFLog2 (const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FLOG2 Src . | |
MachineInstrBuilder | buildFExp2 (const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FEXP2 Src . | |
MachineInstrBuilder | buildFPow (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FPOW Src0 , Src1 . | |
MachineInstrBuilder | buildFLdexp (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FLDEXP Src0 , Src1 . | |
MachineInstrBuilder | buildFFrexp (const DstOp &Fract, const DstOp &Exp, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Fract , Exp = G_FFREXP Src . | |
MachineInstrBuilder | buildFCopysign (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_FCOPYSIGN Op0 , Op1 . | |
MachineInstrBuilder | buildUITOFP (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_UITOFP Src0 . | |
MachineInstrBuilder | buildSITOFP (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_SITOFP Src0 . | |
MachineInstrBuilder | buildFPTOUI (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_FPTOUI Src0 . | |
MachineInstrBuilder | buildFPTOSI (const DstOp &Dst, const SrcOp &Src0) |
Build and insert Res = G_FPTOSI Src0 . | |
MachineInstrBuilder | buildFRint (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt) |
Build and insert Dst = G_FRINT Src0 , Src1 . | |
MachineInstrBuilder | buildSMin (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_SMIN Op0 , Op1 . | |
MachineInstrBuilder | buildSMax (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_SMAX Op0 , Op1 . | |
MachineInstrBuilder | buildUMin (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_UMIN Op0 , Op1 . | |
MachineInstrBuilder | buildUMax (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) |
Build and insert Res = G_UMAX Op0 , Op1 . | |
MachineInstrBuilder | buildAbs (const DstOp &Dst, const SrcOp &Src) |
Build and insert Dst = G_ABS Src . | |
MachineInstrBuilder | buildJumpTable (const LLT PtrTy, unsigned JTI) |
Build and insert Res = G_JUMP_TABLE JTI . | |
MachineInstrBuilder | buildVecReduceSeqFAdd (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn) |
Build and insert Res = G_VECREDUCE_SEQ_FADD ScalarIn , VecIn . | |
MachineInstrBuilder | buildVecReduceSeqFMul (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn) |
Build and insert Res = G_VECREDUCE_SEQ_FMUL ScalarIn , VecIn . | |
MachineInstrBuilder | buildVecReduceFAdd (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn) |
Build and insert Res = G_VECREDUCE_FADD Src . | |
MachineInstrBuilder | buildVecReduceFMul (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn) |
Build and insert Res = G_VECREDUCE_FMUL Src . | |
MachineInstrBuilder | buildVecReduceFMax (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_FMAX Src . | |
MachineInstrBuilder | buildVecReduceFMin (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_FMIN Src . | |
MachineInstrBuilder | buildVecReduceFMaximum (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_FMAXIMUM Src . | |
MachineInstrBuilder | buildVecReduceFMinimum (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_FMINIMUM Src . | |
MachineInstrBuilder | buildVecReduceAdd (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_ADD Src . | |
MachineInstrBuilder | buildVecReduceMul (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_MUL Src . | |
MachineInstrBuilder | buildVecReduceAnd (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_AND Src . | |
MachineInstrBuilder | buildVecReduceOr (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_OR Src . | |
MachineInstrBuilder | buildVecReduceXor (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_XOR Src . | |
MachineInstrBuilder | buildVecReduceSMax (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_SMAX Src . | |
MachineInstrBuilder | buildVecReduceSMin (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_SMIN Src . | |
MachineInstrBuilder | buildVecReduceUMax (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_UMAX Src . | |
MachineInstrBuilder | buildVecReduceUMin (const DstOp &Dst, const SrcOp &Src) |
Build and insert Res = G_VECREDUCE_UMIN Src . | |
MachineInstrBuilder | buildMemTransferInst (unsigned Opcode, const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO) |
Build and insert G_MEMCPY or G_MEMMOVE. | |
MachineInstrBuilder | buildMemCpy (const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO) |
MachineInstrBuilder | buildSbfx (const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width) |
Build and insert Dst = G_SBFX Src , LSB , Width . | |
MachineInstrBuilder | buildUbfx (const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width) |
Build and insert Dst = G_UBFX Src , LSB , Width . | |
MachineInstrBuilder | buildRotateRight (const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt) |
Build and insert Dst = G_ROTR Src , Amt . | |
MachineInstrBuilder | buildRotateLeft (const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt) |
Build and insert Dst = G_ROTL Src , Amt . | |
MachineInstrBuilder | buildBitReverse (const DstOp &Dst, const SrcOp &Src) |
Build and insert Dst = G_BITREVERSE Src . | |
virtual MachineInstrBuilder | buildInstr (unsigned Opc, ArrayRef< DstOp > DstOps, ArrayRef< SrcOp > SrcOps, std::optional< unsigned > Flags=std::nullopt) |
Setters for the insertion point. | |
Set the MachineFunction where to build instructions. | |
void | setMF (MachineFunction &MF) |
void | setMBB (MachineBasicBlock &MBB) |
Set the insertion point to the end of MBB . | |
void | setInstr (MachineInstr &MI) |
Set the insertion point to before MI. | |
Protected Member Functions | |
void | validateTruncExt (const LLT Dst, const LLT Src, bool IsExtend) |
void | validateUnaryOp (const LLT Res, const LLT Op0) |
void | validateBinaryOp (const LLT Res, const LLT Op0, const LLT Op1) |
void | validateShiftOp (const LLT Res, const LLT Op0, const LLT Op1) |
void | validateSelectOp (const LLT ResTy, const LLT TstTy, const LLT Op0Ty, const LLT Op1Ty) |
void | recordInsertion (MachineInstr *InsertedInstr) const |
Helper class to build MachineInstr.
It keeps internally the insertion point and debug location for all the new instructions we want to create. This information can be modified via the related setters.
Definition at line 221 of file MachineIRBuilder.h.
|
default |
Some constructors for easy use.
|
inline |
Definition at line 245 of file MachineIRBuilder.h.
References setMF().
|
inline |
Definition at line 247 of file MachineIRBuilder.h.
References MBB, setInsertPt(), and setMF().
|
inline |
Definition at line 252 of file MachineIRBuilder.h.
References MI, setDebugLoc(), and setInstr().
|
inline |
Definition at line 258 of file MachineIRBuilder.h.
References setChangeObserver().
|
virtualdefault |
|
inline |
Definition at line 265 of file MachineIRBuilder.h.
|
inline |
Build and insert Dst
= G_ABS Src
.
Definition at line 1916 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_ADD Op0
, Op1
.
G_ADD sets Res
to the sum of integer parameters Op0
and Op1
, truncated to their width.
Res
, Op0
and Op1
must be generic virtual registers with the same (scalar or vector) type).Definition at line 1555 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), and llvm::LegalizerHelper::narrowScalarCTPOP().
|
inline |
Build and insert Dst
= G_ADDRSPACE_CAST Src
.
Definition at line 704 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_AND Op0
, Op1
.
G_AND sets Res
to the bitwise and of integer parameters Op0
and Op1
.
Res
, Op0
and Op1
must be generic virtual registers with the same (scalar or vector) type).Definition at line 1672 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applySimplifyURemByPow2(), buildZExtInReg(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizerHelper::lowerU64ToF32BitOps().
MachineInstrBuilder MachineIRBuilder::buildAnyExt | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= G_ANYEXT Op0
.
G_ANYEXT produces a register of the specified width, with bits 0 to sizeof(Ty
) * 8 set to Op
. The remaining bits are unspecified (i.e. this is neither zero nor sign-extension). For a vector register, each element is extended individually.
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type. Op
must be smaller than Res
Definition at line 469 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by buildAnyextOrCopy(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarInsert().
MachineInstrBuilder MachineIRBuilder::buildAnyExtOrTrunc | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Res
= COPY Op
depending on the differing sizes of Res
and Op
.
///
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type.Definition at line 554 of file MachineIRBuilder.cpp.
References buildExtOrTrunc().
Referenced by llvm::LegalizerHelper::lowerStore().
|
inline |
Definition at line 1655 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarShift(), and llvm::LegalizerHelper::narrowScalarShiftByConstant().
|
inline |
Build and insert Res
= G_ASSERT_ALIGN Op, AlignVal.
Definition at line 912 of file MachineIRBuilder.h.
References buildAssertInstr(), and llvm::Align::value().
Referenced by llvm::CallLowering::lowerCall().
|
inline |
Build and insert G_ASSERT_SEXT, G_ASSERT_ZEXT, or G_ASSERT_ALIGN.
Definition at line 888 of file MachineIRBuilder.h.
References llvm::MachineInstrBuilder::addImm(), and buildInstr().
Referenced by buildAssertAlign(), buildAssertSExt(), and buildAssertZExt().
|
inline |
Build and insert Res
= G_ASSERT_SEXT Op, Size.
Definition at line 904 of file MachineIRBuilder.h.
References buildAssertInstr(), and Size.
Referenced by llvm::CallLowering::IncomingValueHandler::buildExtensionHint().
|
inline |
Build and insert Res
= G_ASSERT_ZEXT Op, Size.
Definition at line 896 of file MachineIRBuilder.h.
References buildAssertInstr(), and Size.
Referenced by llvm::CallLowering::IncomingValueHandler::buildExtensionHint(), llvm::AArch64CallLowering::lowerFormalArguments(), and llvm::LegalizerHelper::lowerLoad().
MachineInstrBuilder MachineIRBuilder::buildAtomicCmpXchg | ( | Register | OldValRes, |
Register | Addr, | ||
Register | CmpVal, | ||
Register | NewVal, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO
.
Atomically replace the value at Addr
with NewVal
if it is currently CmpVal
otherwise leaves it unchanged. Puts the original value from Addr
in Res
.
OldValRes
must be a generic virtual register of scalar type. Addr
must be a generic virtual register with pointer type. OldValRes
, CmpVal
, and NewVal
must be generic virtual registers of the same type.Definition at line 902 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMemOperand(), Addr, llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().
Referenced by llvm::LegalizerHelper::lower().
MachineInstrBuilder MachineIRBuilder::buildAtomicCmpXchgWithSuccess | ( | Register | OldValRes, |
Register | SuccessRes, | ||
Register | Addr, | ||
Register | CmpVal, | ||
Register | NewVal, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def>, SuccessRes<def> = G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO
.
Atomically replace the value at Addr
with NewVal
if it is currently CmpVal
otherwise leaves it unchanged. Puts the original value from Addr
in Res
, along with an s1 indicating whether it was replaced.
OldValRes
must be a generic virtual register of scalar type. SuccessRes
must be a generic virtual register of scalar type. It will be assigned 0 on failure and 1 on success. Addr
must be a generic virtual register with pointer type. OldValRes
, CmpVal
, and NewVal
must be generic virtual registers of the same type.Definition at line 874 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMemOperand(), Addr, llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMW | ( | unsigned | Opcode, |
const DstOp & | OldValRes, | ||
const SrcOp & | Addr, | ||
const SrcOp & | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO
.
Atomically read-modify-update the value at Addr
with Val
. Puts the original value from Addr
in OldValRes
. The modification is determined by the opcode.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 926 of file MachineIRBuilder.cpp.
References llvm::DstOp::addDefToMIB(), Addr, llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::MachineMemOperand::isAtomic(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().
Referenced by buildAtomicRMWAdd(), buildAtomicRMWAnd(), buildAtomicRMWFAdd(), buildAtomicRMWFMax(), buildAtomicRMWFMin(), buildAtomicRMWFSub(), buildAtomicRMWMax(), buildAtomicRMWMin(), buildAtomicRMWNand(), buildAtomicRMWOr(), buildAtomicRMWSub(), buildAtomicRMWUmax(), buildAtomicRMWUmin(), buildAtomicRMWXchg(), and buildAtomicRMWXor().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWAdd | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO
.
Atomically replace the value at Addr
with the addition of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 957 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWAnd | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO
.
Atomically replace the value at Addr
with the bitwise and of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 969 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFAdd | ( | const DstOp & | OldValRes, |
const SrcOp & | Addr, | ||
const SrcOp & | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO
.
Definition at line 1019 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFMax | ( | const DstOp & | OldValRes, |
const SrcOp & | Addr, | ||
const SrcOp & | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_FMAX Addr, Val, MMO
.
Atomically replace the value at Addr
with the floating point maximum of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 1034 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFMin | ( | const DstOp & | OldValRes, |
const SrcOp & | Addr, | ||
const SrcOp & | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_FMIN Addr, Val, MMO
.
Atomically replace the value at Addr
with the floating point minimum of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 1041 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFSub | ( | const DstOp & | OldValRes, |
const SrcOp & | Addr, | ||
const SrcOp & | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO
.
Definition at line 1027 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWMax | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO
.
Atomically replace the value at Addr
with the signed maximum of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 994 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWMin | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO
.
Atomically replace the value at Addr
with the signed minimum of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 1000 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWNand | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO
.
Atomically replace the value at Addr
with the bitwise nand of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 975 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWOr | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO
.
Atomically replace the value at Addr
with the bitwise or of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 980 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWSub | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO
.
Atomically replace the value at Addr
with the subtraction of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 963 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWUmax | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO
.
Atomically replace the value at Addr
with the unsigned maximum of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 1006 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWUmin | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO
.
Atomically replace the value at Addr
with the unsigned minimum of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 1012 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWXchg | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO
.
Atomically replace the value at Addr
with Val
. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 951 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
MachineInstrBuilder MachineIRBuilder::buildAtomicRMWXor | ( | Register | OldValRes, |
Register | Addr, | ||
Register | Val, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO
.
Atomically replace the value at Addr
with the bitwise xor of Val
and the original value. Puts the original value from Addr
in OldValRes
.
OldValRes
must be a generic virtual register. Addr
must be a generic virtual register with pointer type. OldValRes
, and Val
must be generic virtual registers of the same type.Definition at line 988 of file MachineIRBuilder.cpp.
References Addr, and buildAtomicRMW().
|
inline |
Build and insert Dst
= G_BITCAST Src
.
Definition at line 699 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::bitcastDst(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), llvm::LegalizerHelper::bitcastSrc(), llvm::LegalizerHelper::coerceToScalar(), insertBitcasts(), llvm::LegalizerHelper::lowerBitcast(), and llvm::LegalizerHelper::lowerExtract().
|
inline |
Build and insert Dst
= G_BITREVERSE Src
.
Definition at line 2082 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildBlockAddress | ( | Register | Res, |
const BlockAddress * | BA | ||
) |
Build and insert Res
= G_BLOCK_ADDR BA
.
G_BLOCK_ADDR computes the address of a basic block.
Res
must be a generic virtual register of a pointer type.Definition at line 1055 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addBlockAddress(), llvm::MachineInstrBuilder::addDef(), assert(), buildInstr(), getMRI(), and getType().
MachineInstrBuilder MachineIRBuilder::buildBoolExt | ( | const DstOp & | Res, |
const SrcOp & | Op, | ||
bool | IsFP | ||
) |
Definition at line 496 of file MachineIRBuilder.cpp.
References buildInstr(), getBoolExtOp(), getMRI(), and getType().
MachineInstrBuilder MachineIRBuilder::buildBoolExtInReg | ( | const DstOp & | Res, |
const SrcOp & | Op, | ||
bool | IsVector, | ||
bool | IsFP | ||
) |
Definition at line 503 of file MachineIRBuilder.cpp.
References buildCopy(), buildSExtInReg(), buildZExtInReg(), getMF(), llvm::MachineFunction::getSubtarget(), llvm::TargetSubtargetInfo::getTargetLowering(), llvm_unreachable, llvm::TargetLoweringBase::UndefinedBooleanContent, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.
MachineInstrBuilder MachineIRBuilder::buildBr | ( | MachineBasicBlock & | Dest | ) |
Build and insert G_BR Dest
.
G_BR is an unconditional branch to Dest
.
Definition at line 285 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addMBB(), and buildInstr().
MachineInstrBuilder MachineIRBuilder::buildBrCond | ( | const SrcOp & | Tst, |
MachineBasicBlock & | Dest | ||
) |
Build and insert G_BRCOND Tst
, Dest
.
G_BRCOND is a conditional branch to Dest
.
Tst
must be a generic virtual register with scalar type. At the beginning of legalization, this will be a single bit (s1). Targets with interesting flags registers may change this. For a wider type, whether the branch is taken must only depend on bit 0 (for now).Definition at line 387 of file MachineIRBuilder.cpp.
References llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::SrcOp::getLLTTy(), and getMRI().
MachineInstrBuilder MachineIRBuilder::buildBrIndirect | ( | Register | Tgt | ) |
Build and insert G_BRINDIRECT Tgt
.
G_BRINDIRECT is an indirect branch to Tgt
.
Tgt
must be a generic virtual register with pointer type.Definition at line 289 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), and getType().
MachineInstrBuilder MachineIRBuilder::buildBrJT | ( | Register | TablePtr, |
unsigned | JTI, | ||
Register | IndexReg | ||
) |
Build and insert G_BRJT TablePtr
, JTI
, IndexReg
.
G_BRJT is a jump table branch using a table base pointer TablePtr
, jump table index JTI
and index IndexReg
TablePtr
must be a generic virtual register with pointer type. JTI
must be a jump table index. IndexReg
must be a generic virtual register with pointer type.Definition at line 294 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addJumpTableIndex(), llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), and getType().
|
inline |
Build and insert Dst
= G_BSWAP Src0
.
Definition at line 1741 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildBuildVector | ( | const DstOp & | Res, |
ArrayRef< Register > | Ops | ||
) |
Build and insert Res
= G_BUILD_VECTOR Op0
, ...
G_BUILD_VECTOR creates a vector value from multiple scalar registers.
Res
(and no more) must be covered by the input scalar registers. Ops
registers must be identical.Definition at line 683 of file MachineIRBuilder.cpp.
References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().
Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::CSEMIRBuilder::buildInstr(), llvm::LegalizerHelper::equalizeVectorShuffleLengths(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarExtract().
MachineInstrBuilder MachineIRBuilder::buildBuildVectorConstant | ( | const DstOp & | Res, |
ArrayRef< APInt > | Ops | ||
) |
Build and insert Res
= G_BUILD_VECTOR Op0
, ... where each OpN is built with G_CONSTANT.
Definition at line 693 of file MachineIRBuilder.cpp.
References buildConstant(), buildInstr(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), getMRI(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::reserve(), and llvm::ArrayRef< T >::size().
Referenced by llvm::CSEMIRBuilder::buildInstr().
MachineInstrBuilder MachineIRBuilder::buildBuildVectorTrunc | ( | const DstOp & | Res, |
ArrayRef< Register > | Ops | ||
) |
Build and insert Res
= G_BUILD_VECTOR_TRUNC Op0
, ...
G_BUILD_VECTOR_TRUNC creates a vector value from multiple scalar registers which have types larger than the destination vector element type, and truncates the values to fit.
If the operands given are already the same size as the vector elt type, then this method will instead create a G_BUILD_VECTOR instruction.
Ops
registers must be identical.Definition at line 710 of file MachineIRBuilder.cpp.
References llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), llvm::DstOp::getLLTTy(), and getMRI().
MachineInstrBuilder MachineIRBuilder::buildCast | ( | const DstOp & | Dst, |
const SrcOp & | Src | ||
) |
Build and insert an appropriate cast between two registers of equal size.
Definition at line 568 of file MachineIRBuilder.cpp.
References assert(), buildCopy(), buildInstr(), getMRI(), llvm::LLT::isPointer(), and llvm::LLT::isScalar().
Referenced by llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), buildExtract(), buildInsert(), llvm::LegalizerHelper::lowerDynStackAlloc(), and llvm::LegalizerHelper::lowerInsert().
MachineInstrBuilder MachineIRBuilder::buildConcatVectors | ( | const DstOp & | Res, |
ArrayRef< Register > | Ops | ||
) |
Build and insert Res
= G_CONCAT_VECTORS Op0
, ...
G_CONCAT_VECTORS creates a vector from the concatenation of 2 or more vectors.
Res
(and no more) must be covered by the input registers. Definition at line 754 of file MachineIRBuilder.cpp.
References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().
Referenced by llvm::LegalizerHelper::equalizeVectorShuffleLengths(), and llvm::LegalizerHelper::fewerElementsVectorShuffle().
MachineInstrBuilder MachineIRBuilder::buildConstant | ( | const DstOp & | Res, |
const APInt & | Val | ||
) |
Definition at line 365 of file MachineIRBuilder.cpp.
References buildConstant(), llvm::ConstantInt::get(), getContext(), getFunction(), and getMF().
|
virtual |
Build and insert Res
= G_CONSTANT Val
.
G_CONSTANT is an integer constant with the specified size and value. Val
will be extended or truncated to the size of Reg
.
Res
must be a generic virtual register with scalar or pointer type.Reimplemented in llvm::CSEMIRBuilder, and llvm::CSEMIRBuilder.
Definition at line 310 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addCImm(), llvm::MachineInstrBuilder::addDef(), llvm::DstOp::addDefToMIB(), assert(), buildInstr(), buildSplatVector(), llvm::ConstantInt::getBitWidth(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getScalarSizeInBits(), llvm::LLT::getScalarType(), and llvm::LLT::isVector().
Referenced by llvm::CombinerHelper::applyCombineConstPtrAddToI2P(), llvm::CombinerHelper::applyCombineMulByNegativeOne(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineUnmergeConstant(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddImmedChain(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), buildBuildVectorConstant(), llvm::CSEMIRBuilder::buildConstant(), buildConstant(), llvm::SPIRVGlobalRegistry::buildConstantInt(), buildExtractVectorElementConstant(), buildLoadFromOffset(), buildLogBase2(), buildMaskLowPtrBits(), buildNeg(), buildNot(), buildShuffleSplat(), buildZExtInReg(), llvm::CallLowering::ValueHandler::copyArgumentMemory(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), getMemsetValue(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), materializePtrAdd(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::AMDGPUCallLowering::passSpecialInputs(), llvm::CombinerHelper::replaceInstWithConstant(), and llvm::LegalizerHelper::widenScalar().
MachineInstrBuilder MachineIRBuilder::buildConstant | ( | const DstOp & | Res, |
int64_t | Val | ||
) |
Build and insert Res
= G_CONSTANT Val
.
G_CONSTANT is an integer constant with the specified size and value.
Res
must be a generic virtual register with scalar type.Definition at line 331 of file MachineIRBuilder.cpp.
References buildConstant(), llvm::IntegerType::get(), llvm::ConstantInt::get(), getContext(), getFunction(), llvm::DstOp::getLLTTy(), getMF(), getMRI(), and getScalarSizeInBits().
MachineInstrBuilder MachineIRBuilder::buildConstantPool | ( | const DstOp & | Res, |
unsigned | Idx | ||
) |
Build and insert Res
= G_CONSTANT_POOL Idx
.
G_CONSTANT_POOL materializes the address of an object in the constant pool.
Res
must be a generic virtual register with pointer type.Definition at line 167 of file MachineIRBuilder.cpp.
References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and Idx.
Referenced by llvm::LegalizerHelper::lowerFConstant().
MachineInstrBuilder MachineIRBuilder::buildConstDbgValue | ( | const Constant & | C, |
const MDNode * | Variable, | ||
const MDNode * | Expr | ||
) |
Build and insert a DBG_VALUE instructions specifying that Variable
is given by C
(suitably modified by Expr
).
Definition at line 90 of file MachineIRBuilder.cpp.
References assert(), buildInstrNoInsert(), llvm::CallingConv::C, getDL(), insertInstr(), and isValid().
MachineInstrBuilder MachineIRBuilder::buildCopy | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= COPY Op.
Register-to-register COPY sets Res
to Op
.
Definition at line 305 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineI2PToP2I(), llvm::CombinerHelper::applyCombineShuffleVector(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applySextTruncSextLoad(), llvm::CombinerHelper::applyShuffleToExtract(), llvm::CallLowering::IncomingValueHandler::assignValueToReg(), buildAnyextOrCopy(), buildBoolExtInReg(), buildCast(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), llvm::LegalizerHelper::fewerElementsVectorReductions(), fixupPHIOpBanks(), llvm::genWorkgroupQuery(), llvm::CallLowering::handleAssignments(), llvm::AMDGPUCallLowering::handleImplicitCallArguments(), handleMustTailForwardedRegisters(), llvm::AArch64CallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::X86CallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::lowerStackRestore(), llvm::LegalizerHelper::lowerStackSave(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::CombinerHelper::replaceRegWith(), and selectCopy().
|
inline |
Build and insert Res
= G_CTLZ Op0
, Src0
.
Definition at line 1721 of file MachineIRBuilder.h.
References buildInstr().
Referenced by buildLogBase2(), and llvm::LegalizerHelper::lowerBitCount().
|
inline |
Build and insert Res
= G_CTLZ_ZERO_UNDEF Op0
, Src0
.
Definition at line 1726 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerBitCount(), and llvm::LegalizerHelper::lowerU64ToF32BitOps().
|
inline |
Build and insert Res
= G_CTPOP Op0
, Src0
.
Definition at line 1716 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerBitCount(), and llvm::LegalizerHelper::narrowScalarCTPOP().
|
inline |
Build and insert Res
= G_CTTZ Op0
, Src0
.
Definition at line 1731 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_CTTZ_ZERO_UNDEF Op0
, Src0
.
Definition at line 1736 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerBitCount().
MachineInstrBuilder MachineIRBuilder::buildDbgLabel | ( | const MDNode * | Label | ) |
Build and insert a DBG_LABEL instructions specifying that Label
is given.
Convert "llvm.dbg.label Label" to "DBG_LABEL Label".
Definition at line 125 of file MachineIRBuilder.cpp.
References assert(), buildInstr(), and llvm::MachineIRBuilderState::DL.
MachineInstrBuilder MachineIRBuilder::buildDeleteTrailingVectorElements | ( | const DstOp & | Res, |
const SrcOp & | Op0 | ||
) |
Build and insert a, b, ..., x, y, z = G_UNMERGE_VALUES Op0
Res
= G_BUILD_VECTOR a, b, ..., x.
Delete trailing elements in Op0
to match number of elements in Res
.
Res
and Op0
must be generic virtual registers with vector type, same vector element type and Op0 must have more elements then Res.Definition at line 267 of file MachineIRBuilder.cpp.
References assert(), buildMergeLikeInstr(), buildUnmerge(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), llvm::LLT::isVector(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by llvm::LegalizerHelper::moreElementsVector(), and llvm::LegalizerHelper::moreElementsVectorDst().
MachineInstrBuilder MachineIRBuilder::buildDirectDbgValue | ( | Register | Reg, |
const MDNode * | Variable, | ||
const MDNode * | Expr | ||
) |
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable
lives in Reg
(suitably modified by Expr
).
Definition at line 50 of file MachineIRBuilder.cpp.
References assert(), llvm::BuildMI(), llvm::get(), getDL(), getMF(), getTII(), insertInstr(), and isValid().
MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc | ( | const DstOp & | Res, |
const SrcOp & | Size, | ||
Align | Alignment | ||
) |
Build and insert Res
= G_DYN_STACKALLOC Size
, Align
.
G_DYN_STACKALLOC does a dynamic stack allocation and writes the address of the allocated memory into Res
.
Res
must be a generic virtual register with pointer type.Definition at line 134 of file MachineIRBuilder.cpp.
References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), Size, and llvm::Align::value().
MachineInstrBuilder MachineIRBuilder::buildExtOrTrunc | ( | unsigned | ExtOpc, |
const DstOp & | Res, | ||
const SrcOp & | Op | ||
) |
Build and insert Res
= ExtOpc
, Res
= G_TRUNC Op
, or Res
= COPY Op
depending on the differing sizes of Res
and Op
.
///
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type.Definition at line 520 of file MachineIRBuilder.cpp.
References assert(), buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().
Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), buildAnyExtOrTrunc(), buildSExtOrTrunc(), buildZExtOrTrunc(), and llvm::AArch64LegalizerInfo::legalizeIntrinsic().
MachineInstrBuilder MachineIRBuilder::buildExtract | ( | const DstOp & | Res, |
const SrcOp & | Src, | ||
uint64_t | Index | ||
) |
Build and insert Res0, ... = G_EXTRACT Src, Idx0
.
Res
and Src
must be generic virtual registers.Definition at line 588 of file MachineIRBuilder.cpp.
References assert(), buildCast(), buildInstr(), getMRI(), llvm::LLT::getSizeInBits(), and llvm::LLT::isValid().
Referenced by llvm::LegalizerHelper::narrowScalarExtract(), and llvm::LegalizerHelper::narrowScalarInsert().
MachineInstrBuilder MachineIRBuilder::buildExtractVectorElement | ( | const DstOp & | Res, |
const SrcOp & | Val, | ||
const SrcOp & | Idx | ||
) |
Build and insert Res
= G_EXTRACT_VECTOR_ELT Val
, Idx
.
Res
must be a generic virtual register with scalar type. Val
must be a generic virtual register with vector type. Idx
must be a generic virtual register with scalar type.Definition at line 869 of file MachineIRBuilder.cpp.
References buildInstr(), and Idx.
Referenced by llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), buildExtractVectorElementConstant(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), and llvm::LegalizerHelper::lowerShuffleVector().
|
inline |
Build and insert Res
= G_EXTRACT_VECTOR_ELT Val
, Idx
.
Res
must be a generic virtual register with scalar type. Val
must be a generic virtual register with vector type.Definition at line 1237 of file MachineIRBuilder.h.
References buildConstant(), buildExtractVectorElement(), Idx, and llvm::LLT::scalar().
Referenced by llvm::CombinerHelper::applyShuffleToExtract(), and llvm::LegalizerHelper::equalizeVectorShuffleLengths().
|
inline |
Build and insert Res
= G_FABS Op0
.
Definition at line 1794 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerIntrinsicRound().
|
inline |
Build and insert Res
= G_FADD Op0
, Op1
.
Definition at line 1746 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFMad(), and llvm::LegalizerHelper::lowerIntrinsicRound().
|
inline |
Build and insert Dst
= G_FCANONICALIZE Src0
.
Definition at line 1801 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyFsubToFneg(), and llvm::LegalizerHelper::lowerFMinNumMaxNum().
MachineInstrBuilder MachineIRBuilder::buildFCmp | ( | CmpInst::Predicate | Pred, |
const DstOp & | Res, | ||
const SrcOp & | Op0, | ||
const SrcOp & | Op1, | ||
std::optional< unsigned > | Flags = std::nullopt |
||
) |
Build and insert a Res
= G_FCMP Pred
Op0
,Op1
.
Res
must be a generic virtual register with scalar or vector type. Typically this starts as s1 or <N x s1>. Op0
and Op1 must be generic virtual registers with the same number of elements as Res
(or scalar, if Res
is scalar). Pred
must be a floating-point predicate.Definition at line 845 of file MachineIRBuilder.cpp.
Referenced by llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFPTOUI(), and llvm::LegalizerHelper::lowerIntrinsicRound().
MachineInstrBuilder MachineIRBuilder::buildFConstant | ( | const DstOp & | Res, |
const APFloat & | Val | ||
) |
Definition at line 380 of file MachineIRBuilder.cpp.
References buildFConstant(), llvm::ConstantFP::get(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), and getMF().
|
virtual |
Build and insert Res
= G_FCONSTANT Val
.
G_FCONSTANT is a floating-point constant with the specified size and value.
Res
must be a generic virtual register with scalar type.Reimplemented in llvm::CSEMIRBuilder, and llvm::CSEMIRBuilder.
Definition at line 339 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addDef(), llvm::DstOp::addDefToMIB(), llvm::MachineInstrBuilder::addFPImm(), assert(), buildInstr(), buildSplatVector(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getScalarType(), llvm::APFloat::getSemantics(), llvm::LLT::getSizeInBits(), llvm::APFloatBase::getSizeInBits(), llvm::ConstantFP::getValueAPF(), llvm::LLT::isPointer(), and llvm::LLT::isVector().
Referenced by llvm::CombinerHelper::applyCombineConstantFoldFpUnary(), llvm::SPIRVGlobalRegistry::buildConstantFP(), llvm::CSEMIRBuilder::buildFConstant(), buildFConstant(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerIntrinsicRound(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerUITOFP(), and llvm::CombinerHelper::replaceInstWithFConstant().
MachineInstrBuilder MachineIRBuilder::buildFConstant | ( | const DstOp & | Res, |
double | Val | ||
) |
Definition at line 371 of file MachineIRBuilder.cpp.
References buildFConstant(), llvm::ConstantFP::get(), llvm::getAPFloatFromSize(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::DstOp::getLLTTy(), getMF(), getMRI(), and llvm::LLT::getScalarSizeInBits().
|
inline |
Build and insert Res
= G_FCOPYSIGN Op0
, Op1
.
Definition at line 1860 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerIntrinsicRound().
|
inline |
Build and insert Res
= G_FDIV Op0
, Op1
.
Definition at line 1767 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildFence | ( | unsigned | Ordering, |
unsigned | Scope | ||
) |
Build and insert G_FENCE Ordering, Scope
.
Definition at line 1048 of file MachineIRBuilder.cpp.
References llvm::MachineInstrBuilder::addImm(), and buildInstr().
|
inline |
Build and insert Dst
= G_FEXP2 Src
.
Definition at line 1833 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= GFFLOOR Op0
, Op1
.
Definition at line 1815 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Fract
, Exp
= G_FFREXP Src
.
Definition at line 1854 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildFIDbgValue | ( | int | FI, |
const MDNode * | Variable, | ||
const MDNode * | Expr | ||
) |
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable
lives in the stack slot specified by FI
(suitably modified by Expr
).
Definition at line 75 of file MachineIRBuilder.cpp.
References assert(), buildInstrNoInsert(), getDL(), insertInstr(), and isValid().
|
inline |
Build and insert Dst
= G_FLDEXP Src0
, Src1
.
Definition at line 1847 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Dst
= G_FLOG Src
.
Definition at line 1821 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Dst
= G_FLOG2 Src
.
Definition at line 1827 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_FMA Op0
, Op1
, Op2
.
Definition at line 1774 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_FMAD Op0
, Op1
, Op2
.
Definition at line 1781 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Definition at line 1626 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Definition at line 1638 of file MachineIRBuilder.h.
References buildInstr().
Referenced by AMDGPUCombinerHelper::applyExpandPromotedF16FMed3().
|
inline |
Definition at line 1620 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Definition at line 1632 of file MachineIRBuilder.h.
References buildInstr().
Referenced by AMDGPUCombinerHelper::applyExpandPromotedF16FMed3().
|
inline |
Definition at line 1613 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerFMad().
|
inline |
Build and insert Res
= G_FNEG Op0
.
Definition at line 1788 of file MachineIRBuilder.h.
References buildInstr().
Referenced by AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::applyFsubToFneg(), llvm::LegalizerHelper::lower(), and llvm::LegalizerHelper::lowerSITOFP().
|
inline |
Build and insert Res
= G_FPEXT Op
.
Definition at line 683 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Dst
= G_FPOW Src0
, Src1
.
Definition at line 1839 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerFPOWI().
|
inline |
Build and insert Res
= G_FPTOSI Src0
.
Definition at line 1881 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerFPTOUI().
|
inline |
Build and insert Res
= G_FPTOUI Src0
.
Definition at line 1876 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildFPTrunc | ( | const DstOp & | Res, |
const SrcOp & | Op, | ||
std::optional< unsigned > | Flags = std::nullopt |
||
) |
Build and insert Res
= G_FPTRUNC Op
.
G_FPTRUNC converts a floating-point value into one with a smaller type.
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type. Res
must be smaller than Op
Definition at line 833 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), llvm::MipsLegalizerInfo::legalizeCustom(), and llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16().
MachineInstrBuilder MachineIRBuilder::buildFrameIndex | ( | const DstOp & | Res, |
int | Idx | ||
) |
Build and insert Res
= G_FRAME_INDEX Idx
.
G_FRAME_INDEX materializes the address of an alloca value or other stack-based object.
Res
must be a generic virtual register with pointer type.Definition at line 145 of file MachineIRBuilder.cpp.
References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and Idx.
Referenced by llvm::LegalizerHelper::createStackTemporary(), llvm::CallLowering::insertSRetOutgoingArgument(), and llvm::MipsCallLowering::lowerFormalArguments().
|
inline |
Build and insert Dst
= G_FREEZE Src
.
Definition at line 1530 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::narrowScalar().
|
inline |
Build and insert Dst
= G_FRINT Src0
, Src1
.
Definition at line 1886 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_FSUB Op0
, Op1
.
Definition at line 1760 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerFPTOUI(), and llvm::LegalizerHelper::lowerIntrinsicRound().
MachineInstrBuilder MachineIRBuilder::buildGlobalValue | ( | const DstOp & | Res, |
const GlobalValue * | GV | ||
) |
Build and insert Res
= G_GLOBAL_VALUE GV
.
G_GLOBAL_VALUE materializes the address of the specified global into Res
.
Res
must be a generic virtual register with pointer type in the same address space as GV
.Definition at line 154 of file MachineIRBuilder.cpp.
References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::PointerType::getAddressSpace(), llvm::DstOp::getLLTTy(), getMRI(), and llvm::GlobalValue::getType().
Referenced by addCallTargetOperands(), and llvm::MipsCallLowering::lowerCall().
MachineInstrBuilder MachineIRBuilder::buildICmp | ( | CmpInst::Predicate | Pred, |
const DstOp & | Res, | ||
const SrcOp & | Op0, | ||
const SrcOp & | Op1 | ||
) |
Build and insert a Res
= G_ICMP Pred
, Op0
, Op1
.
Res
must be a generic virtual register with scalar or vector type. Typically this starts as s1 or <N x s1>. Op0
and Op1 must be generic virtual registers with the same number of elements as Res
. If Res
is a scalar, Op0
must be either a scalar or pointer. Pred
must be an integer predicate.Definition at line 838 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by llvm::buildAtomicCompareExchangeInst(), llvm::genWorkgroupQuery(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarShift().
MachineInstrBuilder MachineIRBuilder::buildIndirectDbgValue | ( | Register | Reg, |
const MDNode * | Variable, | ||
const MDNode * | Expr | ||
) |
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable
lives in memory at Reg
(suitably modified by Expr
).
Definition at line 63 of file MachineIRBuilder.cpp.
References assert(), llvm::BuildMI(), llvm::get(), getDL(), getMF(), getTII(), insertInstr(), and isValid().
MachineInstrBuilder MachineIRBuilder::buildInsert | ( | const DstOp & | Res, |
const SrcOp & | Src, | ||
const SrcOp & | Op, | ||
unsigned | Index | ||
) |
Definition at line 762 of file MachineIRBuilder.cpp.
References assert(), buildCast(), buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().
Referenced by llvm::LegalizerHelper::narrowScalarInsert().
MachineInstrBuilder MachineIRBuilder::buildInsertVectorElement | ( | const DstOp & | Res, |
const SrcOp & | Val, | ||
const SrcOp & | Elt, | ||
const SrcOp & | Idx | ||
) |
Build and insert Res
= G_INSERT_VECTOR_ELT Val
, Elt
, Idx
.
Res
and Val
must be a generic virtual register Elt
and Idx
must be a generic virtual register with scalar type.Definition at line 863 of file MachineIRBuilder.cpp.
References buildInstr(), and Idx.
Referenced by llvm::LegalizerHelper::bitcastInsertVectorElt(), buildShuffleSplat(), and llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt().
|
virtual |
Reimplemented in llvm::CSEMIRBuilder.
Definition at line 1099 of file MachineIRBuilder.cpp.
References llvm::all_of(), assert(), buildInstr(), llvm::ArrayRef< T >::empty(), getMRI(), llvm::LLT::getNumElements(), llvm::CmpInst::isFPPredicate(), llvm::CmpInst::isIntPredicate(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), llvm::LLT::isVector(), llvm::ArrayRef< T >::size(), llvm::SrcOp::Ty_Predicate, validateBinaryOp(), validateSelectOp(), validateShiftOp(), validateTruncExt(), and validateUnaryOp().
|
inline |
Build and insert <empty> = Opcode
<empty>.
The insertion point is the one set by the last call of either setBasicBlock or setMI.
Definition at line 393 of file MachineIRBuilder.h.
References buildInstrNoInsert(), and insertInstr().
Referenced by llvm::CombinerHelper::applyBuildInstructionSteps(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtOfExt(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), buildAbs(), buildAdd(), buildAddrSpaceCast(), buildAnd(), buildAnyExt(), buildAShr(), buildAssertInstr(), buildAtomicCmpXchg(), buildAtomicCmpXchgWithSuccess(), llvm::buildAtomicCompareExchangeInst(), llvm::buildAtomicFlagInst(), llvm::buildAtomicInitInst(), llvm::buildAtomicLoadInst(), buildAtomicRMW(), llvm::buildAtomicRMWInst(), llvm::buildAtomicStoreInst(), llvm::buildBarrierInst(), buildBitcast(), buildBitReverse(), buildBlockAddress(), buildBoolExt(), buildBr(), buildBrCond(), buildBrIndirect(), buildBrJT(), buildBSwap(), buildBuildVector(), buildBuildVectorConstant(), buildBuildVectorTrunc(), buildCast(), buildConcatVectors(), llvm::CSEMIRBuilder::buildConstant(), buildConstant(), llvm::SPIRVGlobalRegistry::buildConstantInt(), buildConstantPool(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), buildCopy(), buildCTLZ(), buildCTLZ_ZERO_UNDEF(), buildCTPOP(), buildCTTZ(), buildCTTZ_ZERO_UNDEF(), buildDbgLabel(), buildDynStackAlloc(), llvm::buildEnqueueKernel(), buildExtOrTrunc(), buildExtract(), buildExtractVectorElement(), buildFAbs(), buildFAdd(), buildFCanonicalize(), buildFConstant(), buildFCopysign(), buildFDiv(), buildFence(), buildFExp2(), buildFFloor(), buildFFrexp(), buildFLdexp(), buildFLog(), buildFLog2(), buildFMA(), buildFMAD(), buildFMaxNum(), buildFMaxNumIEEE(), buildFMinNum(), buildFMinNumIEEE(), buildFMul(), buildFNeg(), buildFPExt(), buildFPow(), buildFPTOSI(), buildFPTOUI(), buildFPTrunc(), buildFrameIndex(), buildFreeze(), buildFRint(), buildFSub(), buildGlobalValue(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), buildICmp(), buildInsert(), buildInsertVectorElement(), llvm::CSEMIRBuilder::buildInstr(), buildInstr(), buildIntrinsic(), buildIntrinsicTrunc(), buildIntToPtr(), buildIsFPClass(), buildJumpTable(), buildLoadInstr(), buildLShr(), buildMemTransferInst(), buildMergeLikeInstr(), buildMergeValues(), buildMul(), llvm::buildNDRange(), buildNeg(), buildNot(), llvm::buildOpDecorate(), llvm::buildOpName(), buildOr(), buildPtrAdd(), buildPtrMask(), buildPtrToInt(), buildRotateLeft(), buildRotateRight(), buildSAdde(), buildSAddo(), buildSbfx(), buildSExt(), buildSExtInReg(), buildShl(), buildShuffleVector(), buildSITOFP(), buildSMax(), buildSMin(), buildSMulH(), buildSplatVector(), buildSSube(), buildSSubo(), buildStore(), buildStrictFAdd(), buildSub(), buildTrunc(), buildUAdde(), buildUAddo(), buildUbfx(), buildUITOFP(), buildUMax(), buildUMin(), buildUMulH(), buildUndef(), buildUnmerge(), buildURem(), buildUSube(), buildUSubo(), buildVecReduceAdd(), buildVecReduceAnd(), buildVecReduceFAdd(), buildVecReduceFMax(), buildVecReduceFMaximum(), buildVecReduceFMin(), buildVecReduceFMinimum(), buildVecReduceFMul(), buildVecReduceMul(), buildVecReduceOr(), buildVecReduceSeqFAdd(), buildVecReduceSeqFMul(), buildVecReduceSMax(), buildVecReduceSMin(), buildVecReduceUMax(), buildVecReduceUMin(), buildVecReduceXor(), buildXor(), buildZExt(), convertPtrToInt(), copySubReg(), createTuple(), llvm::LegalizerHelper::fewerElementsVectorMultiEltType(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::LegalizerHelper::fewerElementsVectorReductions(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::generateAsyncCopy(), llvm::generateConvertInst(), llvm::generateDotOrFMulInst(), llvm::generateEnqueueInst(), llvm::generateExtInst(), llvm::generateGroupInst(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), llvm::generateLoadStoreInst(), llvm::generateReadImageInst(), llvm::generateRelationalInst(), llvm::generateSampleImageInst(), llvm::generateSpecConstantInst(), llvm::generateVectorLoadStoreInst(), llvm::generateWriteImageInst(), llvm::SPIRVGlobalRegistry::getOrCreateConstNullPtr(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeDeviceEvent(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypePipe(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampler(), llvm::insertAssignInstr(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitreverse(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::M68kCallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::LegalizerHelper::lowerDIVREM(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerFMinNumMaxNum(), llvm::SPIRVCallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::AArch64CallLowering::lowerReturn(), llvm::SPIRVCallLowering::lowerReturn(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::LegalizerHelper::moreElementsVector(), MSA2OpIntrinsicToGeneric(), MSA3OpIntrinsicToGeneric(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarBasic(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::narrowScalarShift(), processInstr(), SelectMSA3OpIntrinsic(), llvm::AArch64GISelUtils::tryEmitBZero(), llvm::LegalizerHelper::widenScalar(), llvm::LegalizerHelper::widenScalarDst(), and llvm::LegalizerHelper::widenScalarSrc().
MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert | ( | unsigned | Opcode | ) |
Build but don't insert <empty> = Opcode
<empty>.
Definition at line 39 of file MachineIRBuilder.cpp.
References llvm::BuildMI(), llvm::MCInstrInfo::get(), getDL(), getMF(), getPCSections(), and getTII().
Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), buildConstDbgValue(), buildFIDbgValue(), buildInstr(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::M68kCallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::RISCVCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::ARMCallLowering::lowerReturn(), llvm::MipsCallLowering::lowerReturn(), llvm::X86CallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::M68kCallLowering::lowerReturn(), llvm::PPCCallLowering::lowerReturn(), llvm::RISCVCallLowering::lowerReturn(), llvm::AMDGPUCallLowering::lowerTailCall(), and llvm::RegBankSelect::repairReg().
MachineInstrBuilder MachineIRBuilder::buildIntrinsic | ( | Intrinsic::ID | ID, |
ArrayRef< DstOp > | Res | ||
) |
Definition at line 819 of file MachineIRBuilder.cpp.
References buildIntrinsic(), llvm::Intrinsic::getAttributes(), getContext(), and Results.
MachineInstrBuilder MachineIRBuilder::buildIntrinsic | ( | Intrinsic::ID | ID, |
ArrayRef< DstOp > | Res, | ||
bool | HasSideEffects, | ||
bool | isConvergent | ||
) |
Definition at line 808 of file MachineIRBuilder.cpp.
References buildInstr(), getIntrinsicOpcode(), getMRI(), and Results.
MachineInstrBuilder MachineIRBuilder::buildIntrinsic | ( | Intrinsic::ID | ID, |
ArrayRef< Register > | Res | ||
) |
Definition at line 800 of file MachineIRBuilder.cpp.
References buildIntrinsic(), llvm::Intrinsic::getAttributes(), and getContext().
MachineInstrBuilder MachineIRBuilder::buildIntrinsic | ( | Intrinsic::ID | ID, |
ArrayRef< Register > | Res, | ||
bool | HasSideEffects, | ||
bool | isConvergent | ||
) |
Build and insert a G_INTRINSIC instruction.
There are four different opcodes based on combinations of whether the intrinsic has side effects and whether it is convergent. These properties can be specified as explicit parameters, or else they are retrieved from the MCID for the intrinsic.
The parameter Res
provides the Registers or MOs that will be defined by this instruction.
Definition at line 789 of file MachineIRBuilder.cpp.
References buildInstr(), and getIntrinsicOpcode().
Referenced by llvm::buildEnqueueKernel(), buildIntrinsic(), and llvm::genWorkgroupQuery().
|
inline |
Build and insert Dst
= G_INTRINSIC_TRUNC Src0
.
Definition at line 1808 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerFFloor(), and llvm::LegalizerHelper::lowerIntrinsicRound().
|
inline |
Build and insert a G_INTTOPTR instruction.
Definition at line 694 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyPtrAddZero(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), and llvm::LegalizerHelper::lowerSelect().
|
inline |
Build and insert a Res
= G_IS_FPCLASS Pred
, Src
, Mask
.
Definition at line 1195 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildJumpTable | ( | const LLT | PtrTy, |
unsigned | JTI | ||
) |
Build and insert Res
= G_JUMP_TABLE JTI
.
G_JUMP_TABLE sets Res
to the address of the jump table specified by the jump table index JTI
.
Definition at line 176 of file MachineIRBuilder.cpp.
References buildInstr().
|
inline |
Build and insert Res = G_LOAD Addr, MMO
.
Loads the value stored at Addr
. Puts the result in Res
.
Res
must be a generic virtual register. Addr
must be a generic virtual register with pointer type.Definition at line 927 of file MachineIRBuilder.h.
References Addr, and buildLoadInstr().
Referenced by buildLoad(), buildLoadFromOffset(), llvm::buildLoadInst(), llvm::CallLowering::insertSRetLoads(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::reduceLoadStoreWidth().
MachineInstrBuilder MachineIRBuilder::buildLoad | ( | const DstOp & | Res, |
const SrcOp & | Addr, | ||
MachinePointerInfo | PtrInfo, | ||
Align | Alignment, | ||
MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone , |
||
const AAMDNodes & | AAInfo = AAMDNodes() |
||
) |
Build and insert a G_LOAD instruction, while constructing the MachineMemOperand.
Definition at line 398 of file MachineIRBuilder.cpp.
References Addr, assert(), buildLoad(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::MachineMemOperand::MOLoad, and llvm::MachineMemOperand::MOStore.
MachineInstrBuilder MachineIRBuilder::buildLoadFromOffset | ( | const DstOp & | Dst, |
const SrcOp & | BasePtr, | ||
MachineMemOperand & | BaseMMO, | ||
int64_t | Offset | ||
) |
Helper to create a load from a constant offset given a base address.
Load the type of Dst
from Offset
from the given base address and memory operand.
Definition at line 425 of file MachineIRBuilder.cpp.
References buildConstant(), buildLoad(), buildPtrAdd(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::LLT::getSizeInBits(), llvm::Offset, Ptr, and llvm::LLT::scalar().
MachineInstrBuilder MachineIRBuilder::buildLoadInstr | ( | unsigned | Opcode, |
const DstOp & | Res, | ||
const SrcOp & | Addr, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert Res = <opcode> Addr, MMO
.
Loads the value stored at Addr
. Puts the result in Res
.
Res
must be a generic virtual register. Addr
must be a generic virtual register with pointer type.Definition at line 411 of file MachineIRBuilder.cpp.
References llvm::DstOp::addDefToMIB(), Addr, assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and isValid().
Referenced by llvm::CombinerHelper::applySextInRegOfLoad(), buildLoad(), llvm::LegalizerHelper::lowerFConstant(), llvm::LegalizerHelper::lowerLoad(), and llvm::LegalizerHelper::narrowScalar().
|
inline |
Definition at line 1649 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), and llvm::LegalizerHelper::widenScalar().
MachineInstrBuilder MachineIRBuilder::buildMaskLowPtrBits | ( | const DstOp & | Res, |
const SrcOp & | Op0, | ||
uint32_t | NumBits | ||
) |
Build and insert Res
= G_PTRMASK Op0
, G_CONSTANT
(1 << NumBits) - 1.
This clears the low bits of a pointer operand without destroying its pointer properties. This has the effect of rounding the address down to a specified alignment in bits.
Res
and Op0
must be generic virtual registers with pointer type. NumBits
must be an integer representing the number of low bits to be cleared in Op0
.Definition at line 225 of file MachineIRBuilder.cpp.
References buildConstant(), buildPtrMask(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getSizeInBits(), and llvm::LLT::scalar().
|
inline |
Definition at line 2050 of file MachineIRBuilder.h.
References buildMemTransferInst(), and Size.
Referenced by llvm::CallLowering::ValueHandler::copyArgumentMemory().
|
inline |
Build and insert G_MEMCPY or G_MEMMOVE.
Definition at line 2038 of file MachineIRBuilder.h.
References llvm::MachineInstrBuilder::addMemOperand(), buildInstr(), and Size.
Referenced by buildMemCpy().
MachineInstrBuilder MachineIRBuilder::buildMergeLikeInstr | ( | const DstOp & | Res, |
ArrayRef< Register > | Ops | ||
) |
Build and insert Res
= G_MERGE_VALUES Op0
, ... or Res
= G_BUILD_VECTOR Op0
, ... or Res
= G_CONCAT_VECTORS Op0
, ...
G_MERGE_VALUES combines the input elements contiguously into a larger register. It is used when the destination register is not a vector. G_BUILD_VECTOR combines scalar inputs into a vector register. G_CONCAT_VECTORS combines vector inputs into a vector register.
Res
(and no more) must be covered by the input registers. Ops
registers must be identical.Definition at line 628 of file MachineIRBuilder.cpp.
References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShuffleVector(), buildDeleteTrailingVectorElements(), buildPadVectorWithUndefElements(), llvm::LegalizerHelper::fewerElementsVectorMerge(), llvm::LegalizerHelper::fewerElementsVectorMultiEltType(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerBitcast(), llvm::X86CallLowering::lowerCall(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarMul(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), and llvm::LegalizationArtifactCombiner::ArtifactValueFinder::tryCombineMergeLike().
MachineInstrBuilder MachineIRBuilder::buildMergeLikeInstr | ( | const DstOp & | Res, |
std::initializer_list< SrcOp > | Ops | ||
) |
Definition at line 639 of file MachineIRBuilder.cpp.
References assert(), and buildInstr().
MachineInstrBuilder MachineIRBuilder::buildMergeValues | ( | const DstOp & | Res, |
ArrayRef< Register > | Ops | ||
) |
Build and insert Res
= G_MERGE_VALUES Op0
, ...
G_MERGE_VALUES combines the input elements contiguously into a larger register. It should only be used when the destination register is not a vector.
Res
(and no more) must be covered by the input registers. Ops
registers must be identical.Definition at line 617 of file MachineIRBuilder.cpp.
References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), and llvm::SmallVectorBase< Size_T >::size().
|
inline |
Build and insert Res
= G_MUL Op0
, Op1
.
G_MUL sets Res
to the product of integer parameters Op0
and Op1
, truncated to their width.
Res
, Op0
and Op1
must be generic virtual registers with the same (scalar or vector) type).Definition at line 1588 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::bitcastExtractVectorElt(), getMemsetValue(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::LegalizerHelper::lower(), and llvm::LegalizerHelper::lowerSMULH_UMULH().
|
inline |
Build and insert integer negation Zero
= G_CONSTANT 0 Res
= G_SUB Zero, Op0
.
Definition at line 1710 of file MachineIRBuilder.h.
References buildConstant(), buildInstr(), and getMRI().
|
inline |
Build and insert a bitwise not, NegOne
= G_CONSTANT -1 Res
= G_OR Op0
, NegOne.
Definition at line 1702 of file MachineIRBuilder.h.
References buildConstant(), buildInstr(), and getMRI().
Referenced by llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), and llvm::LegalizerHelper::lowerSelect().
|
inline |
Build and insert Res
= G_OR Op0
, Op1
.
G_OR sets Res
to the bitwise or of integer parameters Op0
and Op1
.
Res
, Op0
and Op1
must be generic virtual registers with the same (scalar or vector) type).Definition at line 1687 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::LegalizerHelper::lowerSelect(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::AMDGPUCallLowering::passSpecialInputs(), and llvm::LegalizerHelper::widenScalar().
MachineInstrBuilder MachineIRBuilder::buildPadVectorWithUndefElements | ( | const DstOp & | Res, |
const SrcOp & | Op0 | ||
) |
Build and insert a, b, ..., x = G_UNMERGE_VALUES Op0
Res
= G_BUILD_VECTOR a, b, ..., x, undef, ..., undef.
Pad Op0
with undef elements to match number of elements in Res
.
Res
and Op0
must be generic virtual registers with vector type, same vector element type and Op0 must have fewer elements then Res.Definition at line 236 of file MachineIRBuilder.cpp.
References assert(), buildMergeLikeInstr(), buildUndef(), buildUnmerge(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), llvm::SrcOp::getReg(), llvm::MachineInstrBuilder::getReg(), llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by llvm::AArch64CallLowering::lowerReturn(), and llvm::LegalizerHelper::moreElementsVectorSrc().
MachineInstrBuilder MachineIRBuilder::buildPtrAdd | ( | const DstOp & | Res, |
const SrcOp & | Op0, | ||
const SrcOp & | Op1, | ||
std::optional< unsigned > | Flags = std::nullopt |
||
) |
Build and insert Res
= G_PTR_ADD Op0
, Op1
.
G_PTR_ADD adds Op1
addressible units to the pointer specified by Op0
, storing the resulting pointer in Res
. Addressible units are typically bytes but this can vary between targets.
Res
and Op0
must be generic virtual registers with pointer type. Op1
must be a generic virtual register with scalar type.Definition at line 200 of file MachineIRBuilder.cpp.
References assert(), buildInstr(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), and getMRI().
Referenced by llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), buildLoadFromOffset(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerStore(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), and materializePtrAdd().
|
inline |
Build and insert Res
= G_PTRMASK Op0
, Op1
.
Definition at line 518 of file MachineIRBuilder.h.
References buildInstr().
Referenced by buildMaskLowPtrBits().
|
inline |
Build and insert a G_PTRTOINT instruction.
Definition at line 689 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), llvm::LegalizerHelper::coerceToScalar(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizerHelper::lowerStore().
|
inline |
Build and insert Dst
= G_ROTL Src
, Amt
.
Definition at line 2076 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Dst
= G_ROTR Src
, Amt
.
Definition at line 2070 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
, CarryOut
= G_SADDE Op0
, Op1
, CarryInp
.
Definition at line 632 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
, CarryOut
= G_SADDO Op0
, Op1
.
Definition at line 591 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Dst
= G_SBFX Src
, LSB
, Width
.
Definition at line 2058 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildSelect | ( | const DstOp & | Res, |
const SrcOp & | Tst, | ||
const SrcOp & | Op0, | ||
const SrcOp & | Op1, | ||
std::optional< unsigned > | Flags = std::nullopt |
||
) |
Build and insert a Res
= G_SELECT Tst
, Op0
, Op1
.
Res
, Op0
and Op1
must be generic virtual registers with the same type. Tst
must be a generic virtual register with scalar, pointer or vector type. If vector then it must have the same number of elements as the other parameters.Definition at line 855 of file MachineIRBuilder.cpp.
Referenced by llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::buildSelectInst(), llvm::generateSelectInst(), llvm::genWorkgroupQuery(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerIntrinsicRound(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUITOFP(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarSelect(), and llvm::LegalizerHelper::narrowScalarShift().
MachineInstrBuilder MachineIRBuilder::buildSExt | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= G_SEXT Op
.
G_SEXT produces a register of the specified width, with bits 0 to sizeof(Ty
) * 8 set to Op
. The remaining bits are duplicated from the high bit of Op
(i.e. 2s-complement sign extended).
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type. Op
must be smaller than Res
Definition at line 474 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lowerFPTOSI(), and llvm::LegalizerHelper::narrowScalar().
|
inline |
Build and insert Res
= G_SEXT_INREG Op
, ImmOp.
Definition at line 678 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyAshShlToSextInreg(), buildBoolExtInReg(), llvm::LegalizerHelper::lowerLoad(), and llvm::LegalizerHelper::lowerSelect().
MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= G_SEXT Op
, Res
= G_TRUNC Op
, or Res
= COPY Op
depending on the differing sizes of Res
and Op
.
///
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type.Definition at line 544 of file MachineIRBuilder.cpp.
References buildExtOrTrunc().
Referenced by llvm::LegalizerHelper::lowerSelect().
|
inline |
Definition at line 1643 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), and llvm::AMDGPUCallLowering::passSpecialInputs().
MachineInstrBuilder MachineIRBuilder::buildShuffleSplat | ( | const DstOp & | Res, |
const SrcOp & | Src | ||
) |
Build and insert a vector splat of a scalar Src
using a G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom.
Src
must have the same type as the element type of Dst
Definition at line 722 of file MachineIRBuilder.cpp.
References assert(), buildConstant(), buildInsertVectorElement(), buildShuffleVector(), buildUndef(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), and llvm::LLT::scalar().
Referenced by llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizerHelper::moreElementsVector().
MachineInstrBuilder MachineIRBuilder::buildShuffleVector | ( | const DstOp & | Res, |
const SrcOp & | Src1, | ||
const SrcOp & | Src2, | ||
ArrayRef< int > | Mask | ||
) |
Build and insert Res
= G_SHUFFLE_VECTOR Src1
, Src2
, Mask
.
Definition at line 734 of file MachineIRBuilder.cpp.
References llvm::MachineFunction::allocateShuffleMask(), assert(), buildInstr(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMF(), getMRI(), and llvm::LLT::getNumElements().
Referenced by buildShuffleSplat(), llvm::LegalizerHelper::equalizeVectorShuffleLengths(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), and llvm::LegalizerHelper::moreElementsVectorShuffle().
|
inline |
Build and insert Res
= G_SITOFP Src0
.
Definition at line 1871 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerFFloor(), and llvm::LegalizerHelper::lowerFPOWI().
|
inline |
Build and insert Res
= G_SMAX Op0
, Op1
.
Definition at line 1898 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), and llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16().
|
inline |
Build and insert Res
= G_SMIN Op0
, Op1
.
Definition at line 1892 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerAddSubSatToMinMax(), and llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16().
|
inline |
Definition at line 1600 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildSplatVector | ( | const DstOp & | Res, |
const SrcOp & | Src | ||
) |
Build and insert Res
= G_BUILD_VECTOR with Src
replicated to fill the number of elements.
Definition at line 703 of file MachineIRBuilder.cpp.
References buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().
Referenced by buildConstant(), llvm::CSEMIRBuilder::buildConstant(), buildFConstant(), llvm::CSEMIRBuilder::buildFConstant(), and getMemsetValue().
|
inline |
Build and insert Res
, CarryOut
= G_SSUBE Op0
, Op1
, CarryInp
.
Definition at line 640 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
, CarryOut
= G_SUBO Op0
, Op1
.
Definition at line 597 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildStore | ( | const SrcOp & | Val, |
const SrcOp & | Addr, | ||
MachineMemOperand & | MMO | ||
) |
Build and insert G_STORE Val, Addr, MMO
.
Stores the value Val
to Addr
.
Val
must be a generic virtual register. Addr
must be a generic virtual register with pointer type.Definition at line 442 of file MachineIRBuilder.cpp.
References Addr, llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::SrcOp::getLLTTy(), getMRI(), and isValid().
Referenced by buildStore(), llvm::CallLowering::insertSRetStores(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::reduceLoadStoreWidth().
MachineInstrBuilder MachineIRBuilder::buildStore | ( | const SrcOp & | Val, |
const SrcOp & | Addr, | ||
MachinePointerInfo | PtrInfo, | ||
Align | Alignment, | ||
MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone , |
||
const AAMDNodes & | AAInfo = AAMDNodes() |
||
) |
Build and insert a G_STORE instruction, while constructing the MachineMemOperand.
Definition at line 456 of file MachineIRBuilder.cpp.
References Addr, assert(), buildStore(), llvm::SrcOp::getLLTTy(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::MachineMemOperand::MOLoad, and llvm::MachineMemOperand::MOStore.
|
inline |
Build and insert Res
= G_STRICT_FADD Op0
, Op1
.
Definition at line 1754 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lower().
|
inline |
Build and insert Res
= G_SUB Op0
, Op1
.
G_SUB sets Res
to the difference of integer parameters Op0
and Op1
, truncated to their width.
Res
, Op0
and Op1
must be generic virtual registers with the same (scalar or vector) type).Definition at line 1572 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineMulByNegativeOne(), llvm::CombinerHelper::applySimplifyAddToSub(), llvm::CombinerHelper::applyUMulHToLShr(), buildLogBase2(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::narrowScalarShift(), and llvm::LegalizerHelper::widenScalar().
MachineInstrBuilder MachineIRBuilder::buildTrunc | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= G_TRUNC Op
.
G_TRUNC extracts the low bits of a type. For a vector type each element is truncated independently before being packed into the destination.
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type. Res
must be smaller than Op
Definition at line 827 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), llvm::CallLowering::IncomingValueHandler::assignValueToReg(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarSrc(), and llvm::LegalizerHelper::widenScalar().
|
inline |
Build and insert Res
, CarryOut
= G_UADDE Op0
, Op1
, CarryIn
.
G_UADDE sets Res
to Op0
+ Op1
+ CarryIn
(truncated to the bit width) and sets CarryOut
to 1 if the result overflowed in unsigned arithmetic.
Res
, Op0
and Op1
must be generic virtual registers with the same scalar type. CarryOut
and CarryIn
must be generic virtual registers with the same scalar type (typically s1)Definition at line 616 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
, CarryOut
= G_UADDO Op0
, Op1
.
G_UADDO sets Res
to Op0
+ Op1
(truncated to the bit width) and sets CarryOut
to 1 if the result overflowed in unsigned arithmetic.
Res
, Op0
and Op1
must be generic virtual registers with the same scalar type. CarryOut
must be generic virtual register with scalar type (typically s1)Definition at line 579 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Dst
= G_UBFX Src
, LSB
, Width
.
Definition at line 2064 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_UITOFP Src0
.
Definition at line 1866 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerSITOFP().
|
inline |
Build and insert Res
= G_UMAX Op0
, Op1
.
Definition at line 1910 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_UMIN Op0
, Op1
.
Definition at line 1904 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::LegalizerHelper::lowerAddSubSatToMinMax().
|
inline |
Definition at line 1594 of file MachineIRBuilder.h.
References buildInstr().
MachineInstrBuilder MachineIRBuilder::buildUndef | ( | const DstOp & | Res | ) |
Build and insert Res
= IMPLICIT_DEF.
Definition at line 613 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::CombinerHelper::applyShuffleToExtract(), buildPadVectorWithUndefElements(), buildShuffleSplat(), llvm::LegalizerHelper::equalizeVectorShuffleLengths(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineShuffleVector(), llvm::LegalizerHelper::moreElementsVector(), llvm::LegalizerHelper::narrowScalar(), llvm::AMDGPUCallLowering::passSpecialInputs(), and llvm::CombinerHelper::replaceInstWithUndef().
MachineInstrBuilder MachineIRBuilder::buildUnmerge | ( | ArrayRef< LLT > | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res0
, ... = G_UNMERGE_VALUES Op
.
G_UNMERGE_VALUES splits contiguous bits of the input into multiple
Res
(and no more) must be covered by the input registers. Res
registers must be identical.Definition at line 656 of file MachineIRBuilder.cpp.
References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), buildDeleteTrailingVectorElements(), buildPadVectorWithUndefElements(), extractParts(), llvm::LegalizerHelper::fewerElementsVectorMerge(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarCTPOP(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), and llvm::LegalizationArtifactCombiner::ArtifactValueFinder::tryCombineMergeLike().
MachineInstrBuilder MachineIRBuilder::buildUnmerge | ( | ArrayRef< Register > | Res, |
const SrcOp & | Op | ||
) |
Definition at line 673 of file MachineIRBuilder.cpp.
References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), and llvm::SmallVectorBase< Size_T >::size().
MachineInstrBuilder MachineIRBuilder::buildUnmerge | ( | LLT | Res, |
const SrcOp & | Op | ||
) |
Build and insert an unmerge of Res
sized pieces to cover Op
.
Definition at line 666 of file MachineIRBuilder.cpp.
References buildInstr(), getMRI(), and llvm::LLT::getSizeInBits().
|
inline |
Build and insert Res
= G_UREM Op0
, Op1
.
Definition at line 1607 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyRotateOutOfRange(), and llvm::LegalizerHelper::lowerFunnelShiftAsShifts().
|
inline |
Build and insert Res
, CarryOut
= G_USUBE Op0
, Op1
, CarryInp
.
Definition at line 624 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
, CarryOut
= G_USUBO Op0
, Op1
.
Definition at line 585 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_ADD Src
.
Definition at line 1993 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_AND Src
.
Definition at line 2003 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_FADD Src
.
ScalarIn
is the scalar accumulator input to the reduction operation of VecIn
.
Definition at line 1954 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_FMAX Src
.
Definition at line 1971 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_FMAXIMUM Src
.
Definition at line 1981 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_FMIN Src
.
Definition at line 1976 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_FMINIMUM Src
.
Definition at line 1987 of file MachineIRBuilder.h.
References buildInstr().
|
inline |
Build and insert Res
= G_VECREDUCE_FMUL Src
.
ScalarIn
is the scalar accumulator input to the reduction operation of VecIn
.
Definition at line 1964 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_MUL Src
.
Definition at line 1998 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_OR Src
.
Definition at line 2008 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_SEQ_FADD ScalarIn
, VecIn
.
ScalarIn
is the scalar accumulator input to start the sequential reduction operation of VecIn
.
Definition at line 1932 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_SEQ_FMUL ScalarIn
, VecIn
.
ScalarIn
is the scalar accumulator input to start the sequential reduction operation of VecIn
.
Definition at line 1943 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_SMAX Src
.
Definition at line 2018 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_SMIN Src
.
Definition at line 2023 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_UMAX Src
.
Definition at line 2028 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_UMIN Src
.
Definition at line 2033 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_VECREDUCE_XOR Src
.
Definition at line 2013 of file MachineIRBuilder.h.
References buildInstr().
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Build and insert Res
= G_XOR Op0
, Op1
.
Definition at line 1694 of file MachineIRBuilder.h.
References buildInstr().
Referenced by llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerSITOFP(), and llvm::LegalizerHelper::narrowScalar().
MachineInstrBuilder MachineIRBuilder::buildZExt | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= G_ZEXT Op
.
G_ZEXT produces a register of the specified width, with bits 0 to sizeof(Ty
) * 8 set to Op
. The remaining bits are 0. For a vector register, each element is extended individually.
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type. Op
must be smaller than Res
Definition at line 479 of file MachineIRBuilder.cpp.
References buildInstr().
Referenced by llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lower(), llvm::AArch64CallLowering::lowerCall(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerMergeValues(), llvm::AArch64CallLowering::lowerReturn(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), and llvm::LegalizerHelper::narrowScalar().
MachineInstrBuilder MachineIRBuilder::buildZExtInReg | ( | const DstOp & | Res, |
const SrcOp & | Op, | ||
int64_t | ImmOp | ||
) |
Build and inserts Res
= G_AND
Op
, LowBitsSet(ImmOp)
Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is emulated using G_AND.
Definition at line 559 of file MachineIRBuilder.cpp.
References buildAnd(), buildConstant(), llvm::DstOp::getLLTTy(), llvm::APInt::getLowBitsSet(), getMRI(), and llvm::LLT::getScalarSizeInBits().
Referenced by buildBoolExtInReg(), and llvm::LegalizerHelper::lowerStore().
MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc | ( | const DstOp & | Res, |
const SrcOp & | Op | ||
) |
Build and insert Res
= G_ZEXT Op
, Res
= G_TRUNC Op
, or Res
= COPY Op
depending on the differing sizes of Res
and Op
.
///
Res
must be a generic virtual register with scalar or vector type. Op
must be a generic virtual register with scalar or vector type.Definition at line 549 of file MachineIRBuilder.cpp.
References buildExtOrTrunc().
Referenced by llvm::CombinerHelper::applyCombineP2IToI2P(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::genWorkgroupQuery(), getMemsetValue(), and llvm::LegalizerHelper::widenScalar().
Definition at line 484 of file MachineIRBuilder.cpp.
References getMF(), llvm::MachineFunction::getSubtarget(), llvm::TargetSubtargetInfo::getTargetLowering(), llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.
Referenced by buildBoolExt(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 287 of file MachineIRBuilder.h.
References llvm::Function::getContext(), llvm::MachineFunction::getFunction(), and getMF().
Referenced by llvm::CombinerHelper::applyCombineConstantFoldFpUnary(), buildConstant(), and buildIntrinsic().
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Definition at line 312 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::CSEInfo.
Referenced by llvm::CSEMIRBuilder::buildInstr().
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Definition at line 313 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::CSEInfo.
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Definition at line 283 of file MachineIRBuilder.h.
References llvm::Module::getDataLayout(), llvm::MachineFunction::getFunction(), getMF(), and llvm::GlobalValue::getParent().
Referenced by llvm::buildEnqueueKernel(), llvm::CSEMIRBuilder::buildInstr(), llvm::LegalizerHelper::coerceToScalar(), llvm::LegalizerHelper::createStackTemporary(), llvm::CallLowering::insertSRetOutgoingArgument(), llvm::SPIRVCallLowering::lowerCall(), llvm::CallLowering::lowerCall(), llvm::LegalizerHelper::lowerFConstant(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::LegalizerHelper::lowerStore(), and llvm::LegalizerHelper::reduceLoadStoreWidth().
Get the current instruction's debug location.
Definition at line 378 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::DL.
Referenced by llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType().
Getter for DebugLoc.
Definition at line 292 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::DL.
Referenced by buildConstDbgValue(), buildDirectDbgValue(), buildFIDbgValue(), buildIndirectDbgValue(), and buildInstrNoInsert().
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Current insertion point for new instructions.
Definition at line 316 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::II.
Referenced by llvm::LegalizerHelper::bitcastDst(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(), insertInstr(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::widenScalar(), and llvm::LegalizerHelper::widenScalarDst().
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Definition at line 307 of file MachineIRBuilder.h.
References getMBB().
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Getter for the basic block we currently build.
Definition at line 302 of file MachineIRBuilder.h.
References assert(), and llvm::MachineIRBuilderState::MBB.
Referenced by llvm::LegalizerHelper::bitcastDst(), getMBB(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(), handleMustTailForwardedRegisters(), insertInstr(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::RISCVCallLowering::lowerCall(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerFormalArguments(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerFormalArguments(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::widenScalar(), and llvm::LegalizerHelper::widenScalarDst().
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Getter for the function we currently build.
Definition at line 273 of file MachineIRBuilder.h.
References assert(), and llvm::MachineIRBuilderState::MF.
Referenced by llvm::CombinerHelper::applySextInRegOfLoad(), llvm::SPIRVGlobalRegistry::assignTypeToVReg(), buildAnyextOrCopy(), llvm::buildAtomicCompareExchangeInst(), buildBoolExtInReg(), llvm::buildBoolRegister(), llvm::buildBuiltinVariableLoad(), buildConstant(), llvm::SPIRVGlobalRegistry::buildConstantFP(), llvm::SPIRVGlobalRegistry::buildConstantInt(), buildDirectDbgValue(), llvm::buildEnqueueKernel(), buildFConstant(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), buildIndirectDbgValue(), buildInstrNoInsert(), buildLoad(), buildLoadFromOffset(), llvm::buildLoadInst(), llvm::buildNDRange(), buildShuffleVector(), buildStore(), convertPtrToInt(), llvm::CallLowering::ValueHandler::copyArgumentMemory(), llvm::createLibcall(), llvm::createMemLibcall(), llvm::LegalizerHelper::createStackTemporary(), createTuple(), createTypeVReg(), llvm::CallLowering::determineAndHandleAssignments(), llvm::generateImageSizeQueryInst(), llvm::generateReadImageInst(), llvm::genWorkgroupQuery(), getBoolExtOp(), getContext(), getDataLayout(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeDeviceEvent(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeFunctionWithArgs(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypePipe(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampler(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVBoolType(), llvm::getOrCreateSPIRVDeviceEventPointer(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVIntegerType(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVType(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVTypeByName(), llvm::CombinerHelper::getTargetLowering(), llvm::CallLowering::handleAssignments(), handleMustTailForwardedRegisters(), llvm::insertAssignInstr(), llvm::CallLowering::insertSRetLoads(), llvm::CallLowering::insertSRetOutgoingArgument(), llvm::CallLowering::insertSRetStores(), llvm::AArch64CallLowering::isEligibleForTailCallOptimization(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AMDGPULegalizerInfo::legalizeMinNumMaxNum(), llvm::LegalizerHelper::libcall(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::M68kCallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::RISCVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::CallLowering::lowerCall(), llvm::LegalizerHelper::lowerFConstant(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerFormalArguments(), llvm::M68kCallLowering::lowerFormalArguments(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::PPCCallLowering::lowerFormalArguments(), llvm::RISCVCallLowering::lowerFormalArguments(), llvm::SPIRVCallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::ARMCallLowering::lowerReturn(), llvm::MipsCallLowering::lowerReturn(), llvm::X86CallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::M68kCallLowering::lowerReturn(), llvm::PPCCallLowering::lowerReturn(), llvm::SPIRVCallLowering::lowerReturn(), llvm::LegalizerHelper::lowerStore(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::CombinerHelper::matchCombineConstPtrAddToI2P(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchPtrAddZero(), llvm::parseToTargetExtType(), llvm::AMDGPUCallLowering::passSpecialInputs(), propagateSPIRVType(), llvm::LegalizerHelper::reduceLoadStoreWidth(), llvm::RegBankSelect::repairReg(), setInsertPt(), setMBB(), llvm::CombinerHelper::tryCombineMemCpyFamily(), llvm::AArch64GISelUtils::tryEmitBZero(), llvm::CombinerHelper::tryEmitMemcpyInline(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 278 of file MachineIRBuilder.h.
References assert(), and llvm::MachineIRBuilderState::MF.
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Getter for MRI.
Definition at line 295 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::MRI.
Referenced by buildAnyextOrCopy(), buildAtomicCmpXchg(), buildAtomicCmpXchgWithSuccess(), llvm::buildAtomicCompareExchangeInst(), llvm::buildAtomicFlagInst(), llvm::buildAtomicInitInst(), llvm::buildAtomicLoadInst(), buildAtomicRMW(), llvm::buildAtomicRMWInst(), llvm::buildAtomicStoreInst(), llvm::buildBarrierInst(), buildBlockAddress(), buildBoolExt(), llvm::buildBoolRegister(), buildBrCond(), buildBrIndirect(), buildBrJT(), buildBuildVectorConstant(), buildBuildVectorTrunc(), llvm::buildBuiltinVariableLoad(), buildCast(), buildConstant(), llvm::CSEMIRBuilder::buildConstant(), buildConstantPool(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), buildDeleteTrailingVectorElements(), buildDynStackAlloc(), llvm::buildEnqueueKernel(), buildExtOrTrunc(), buildExtract(), buildFConstant(), llvm::CSEMIRBuilder::buildFConstant(), buildFrameIndex(), buildGlobalValue(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), buildInsert(), llvm::CSEMIRBuilder::buildInstr(), buildInstr(), buildIntrinsic(), buildLoad(), buildLoadFromOffset(), llvm::buildLoadInst(), buildLoadInstr(), buildLogBase2(), buildMaskLowPtrBits(), llvm::buildMemSemanticsReg(), llvm::buildNDRange(), buildNeg(), buildNot(), buildPadVectorWithUndefElements(), buildPtrAdd(), buildShuffleSplat(), buildShuffleVector(), buildSplatVector(), buildStore(), buildUnmerge(), buildZExtInReg(), llvm::generateEnqueueInst(), llvm::generateGroupInst(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), llvm::generateLoadStoreInst(), llvm::generateReadImageInst(), llvm::generateSampleImageInst(), llvm::generateSpecConstantInst(), llvm::generateWriteImageInst(), llvm::genWorkgroupQuery(), getMemsetValue(), llvm::AArch64LegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::libcall(), llvm::SPIRV::lowerBuiltin(), llvm::SPIRV::lowerBuiltinType(), llvm::SPIRVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerFormalArguments(), llvm::InlineAsmLowering::lowerInlineAsm(), materializePtrAdd(), and llvm::AArch64GISelUtils::tryEmitBZero().
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Definition at line 296 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::MRI.
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Definition at line 367 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::Observer.
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Get the current instruction's PC sections metadata.
Definition at line 384 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::PCSections.
Referenced by buildInstrNoInsert().
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Getter for the State.
Definition at line 299 of file MachineIRBuilder.h.
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Definition at line 267 of file MachineIRBuilder.h.
References assert(), and llvm::MachineIRBuilderState::TII.
Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyFunnelShiftToRotate(), llvm::CombinerHelper::applyNotCmp(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), buildDirectDbgValue(), buildIndirectDbgValue(), buildInstrNoInsert(), llvm::createMemLibcall(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBitCount(), llvm::MipsCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerReturn(), llvm::LegalizerHelper::lowerVectorReduction(), llvm::CombinerHelper::matchEqualDefs(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::CombinerHelper::matchMulOBy2(), llvm::CombinerHelper::replaceOpcodeWith(), SelectMSA3OpIntrinsic(), and llvm::LegalizerHelper::widenScalar().
MachineInstrBuilder MachineIRBuilder::insertInstr | ( | MachineInstrBuilder | MIB | ) |
Insert an existing instruction at the insertion point.
Definition at line 43 of file MachineIRBuilder.cpp.
References getInsertPt(), getMBB(), llvm::MachineBasicBlock::insert(), and recordInsertion().
Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), buildConstDbgValue(), buildDirectDbgValue(), buildFIDbgValue(), buildIndirectDbgValue(), buildInstr(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::M68kCallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::RISCVCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::ARMCallLowering::lowerReturn(), llvm::MipsCallLowering::lowerReturn(), llvm::X86CallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::M68kCallLowering::lowerReturn(), llvm::PPCCallLowering::lowerReturn(), llvm::RISCVCallLowering::lowerReturn(), and llvm::AMDGPUCallLowering::lowerTailCall().
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Definition at line 371 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::Observer.
std::optional< MachineInstrBuilder > MachineIRBuilder::materializePtrAdd | ( | Register & | Res, |
Register | Op0, | ||
const LLT | ValueTy, | ||
uint64_t | Value | ||
) |
Materialize and insert Res
= G_PTR_ADD Op0
, (G_CONSTANT Value
)
G_PTR_ADD adds Value
bytes to the pointer specified by Op0
, storing the resulting pointer in Res
. If Value
is zero then no G_PTR_ADD or G_CONSTANT will be created and
Res
.Op0
must be a generic virtual register with pointer type. ValueTy
must be a scalar type. Res
must be 0. This is to detect confusion between materializePtrAdd() and buildPtrAdd(). Res
will either be a new generic virtual register of the same type as Op0
or Op0
itself.Definition at line 210 of file MachineIRBuilder.cpp.
References assert(), buildConstant(), buildPtrAdd(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), getMRI(), getType(), and llvm::LLT::isScalar().
Referenced by llvm::CallLowering::insertSRetLoads(), llvm::CallLowering::insertSRetStores(), and llvm::LegalizerHelper::reduceLoadStoreWidth().
|
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Definition at line 237 of file MachineIRBuilder.h.
References llvm::GISelChangeObserver::createdInstr(), and llvm::MachineIRBuilderState::Observer.
Referenced by insertInstr().
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Definition at line 363 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::Observer.
Referenced by llvm::Combiner::Combiner(), and MachineIRBuilder().
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Definition at line 330 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::CSEInfo, and Info.
Referenced by llvm::Combiner::Combiner().
Set the debug location to DL
for all the next build instructions.
Definition at line 375 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::DL, and DL.
Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), MachineIRBuilder(), and setInstrAndDebugLoc().
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Set the insertion point before the specified position.
Definition at line 321 of file MachineIRBuilder.h.
References assert(), getMF(), llvm::MachineIRBuilderState::II, llvm::MachineIRBuilderState::MBB, and MBB.
Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineShuffleVector(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyShuffleToExtract(), llvm::LegalizerHelper::bitcastDst(), llvm::LegalizerHelper::fewerElementsVectorPhi(), fixupPHIOpBanks(), generateAssignInstrs(), llvm::insertAssignInstr(), insertBitcasts(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::RISCVCallLowering::lowerCall(), MachineIRBuilder(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineShuffleVector(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::moreElementsVectorPhi(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarDst(), processInstr(), propagateSPIRVType(), llvm::LegalizerHelper::widenScalar(), and llvm::LegalizerHelper::widenScalarDst().
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Set the insertion point to before MI.
Definition at line 348 of file MachineIRBuilder.h.
References assert(), llvm::MachineIRBuilderState::II, MI, setMBB(), and setPCSections().
Referenced by llvm::CombinerHelper::applyBuildInstructionSteps(), llvm::CombinerHelper::applyCombineI2PToP2I(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::CombinerHelper::applyCombineP2IToI2P(), llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applySimplifyAddToSub(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerFormalArguments(), MachineIRBuilder(), llvm::CombinerHelper::replaceInstWithConstant(), llvm::CombinerHelper::replaceInstWithFConstant(), llvm::CombinerHelper::replaceInstWithUndef(), and setInstrAndDebugLoc().
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Set the insertion point to before MI, and set the debug loc to MI's loc.
Definition at line 358 of file MachineIRBuilder.h.
References MI, setDebugLoc(), and setInstr().
Referenced by llvm::CombinerHelper::applyAshShlToSextInreg(), llvm::CombinerHelper::applyBuildFn(), llvm::CombinerHelper::applyBuildFnNoErase(), llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), llvm::CombinerHelper::applyCombineConstantFoldFpUnary(), llvm::CombinerHelper::applyCombineConstPtrAddToI2P(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtOfExt(), llvm::CombinerHelper::applyCombineMulByNegativeOne(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeConstant(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyFsubToFneg(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddZero(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applySextInRegOfLoad(), llvm::CombinerHelper::applySextTruncSextLoad(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::CombinerHelper::buildSDivUsingMul(), llvm::CombinerHelper::buildUDivUsingMul(), llvm::LegalizerHelper::equalizeVectorShuffleLengths(), llvm::LegalizerHelper::legalizeInstrStep(), llvm::LegalizerHelper::lowerRotate(), llvm::LegalizerHelper::moreElementsVectorShuffle(), llvm::LegalizationArtifactCombiner::ArtifactValueFinder::tryCombineMergeLike(), llvm::AArch64GISelUtils::tryEmitBZero(), and llvm::LegalizerHelper::widenScalar().
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Set the insertion point to the end of MBB
.
MBB
must be contained by getMF(). Definition at line 339 of file MachineIRBuilder.h.
References assert(), getMF(), llvm::MachineIRBuilderState::II, llvm::MachineIRBuilderState::MBB, and MBB.
Referenced by llvm::RegBankSelect::assignRegisterBanks(), llvm::RISCVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerFormalArguments(), and setInstr().
void MachineIRBuilder::setMF | ( | MachineFunction & | MF | ) |
Definition at line 24 of file MachineIRBuilder.cpp.
References llvm::MachineIRBuilderState::DL, llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineIRBuilderState::II, llvm::MachineIRBuilderState::MBB, llvm::MachineIRBuilderState::MF, llvm::MachineIRBuilderState::MRI, llvm::MachineIRBuilderState::Observer, llvm::MachineIRBuilderState::PCSections, and llvm::MachineIRBuilderState::TII.
Referenced by llvm::Combiner::Combiner(), llvm::RegBankSelect::init(), llvm::Legalizer::legalizeMachineFunction(), llvm::SPIRVCallLowering::lowerCall(), and MachineIRBuilder().
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Set the PC sections metadata to MD
for all the next build instructions.
Definition at line 381 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::PCSections.
Referenced by setInstr().
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Definition at line 369 of file MachineIRBuilder.h.
References llvm::MachineIRBuilderState::Observer.
Referenced by llvm::Legalizer::legalizeMachineFunction().
Definition at line 187 of file MachineIRBuilder.cpp.
References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().
Referenced by buildInstr().
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Definition at line 1082 of file MachineIRBuilder.cpp.
References assert(), llvm::LLT::getNumElements(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isVector().
Referenced by buildInstr().
Definition at line 193 of file MachineIRBuilder.cpp.
References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().
Referenced by buildInstr().
Definition at line 1063 of file MachineIRBuilder.cpp.
References assert(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::isScalar(), and llvm::LLT::isVector().
Referenced by buildInstr().
Definition at line 182 of file MachineIRBuilder.cpp.
References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().
Referenced by buildInstr().