LLVM  14.0.0git
Public Member Functions | Protected Member Functions | List of all members
llvm::MachineIRBuilder Class Reference

Helper class to build MachineInstr. More...

#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"

Inheritance diagram for llvm::MachineIRBuilder:
Inheritance graph
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Public Member Functions

 MachineIRBuilder ()=default
 Some constructors for easy use. More...
 
 MachineIRBuilder (MachineFunction &MF)
 
 MachineIRBuilder (MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt)
 
 MachineIRBuilder (MachineInstr &MI)
 
 MachineIRBuilder (MachineInstr &MI, GISelChangeObserver &Observer)
 
virtual ~MachineIRBuilder ()=default
 
 MachineIRBuilder (const MachineIRBuilderState &BState)
 
const TargetInstrInfogetTII ()
 
MachineFunctiongetMF ()
 Getter for the function we currently build. More...
 
const MachineFunctiongetMF () const
 
const DataLayoutgetDataLayout () const
 
const DebugLocgetDL ()
 Getter for DebugLoc. More...
 
MachineRegisterInfogetMRI ()
 Getter for MRI. More...
 
const MachineRegisterInfogetMRI () const
 
MachineIRBuilderStategetState ()
 Getter for the State. More...
 
const MachineBasicBlockgetMBB () const
 Getter for the basic block we currently build. More...
 
MachineBasicBlockgetMBB ()
 
GISelCSEInfogetCSEInfo ()
 
const GISelCSEInfogetCSEInfo () const
 
MachineBasicBlock::iterator getInsertPt ()
 Current insertion point for new instructions. More...
 
void setInsertPt (MachineBasicBlock &MBB, MachineBasicBlock::iterator II)
 Set the insertion point before the specified position. More...
 
void setCSEInfo (GISelCSEInfo *Info)
 
void setInstrAndDebugLoc (MachineInstr &MI)
 Set the insertion point to before MI, and set the debug loc to MI's loc. More...
 
void setChangeObserver (GISelChangeObserver &Observer)
 
void stopObservingChanges ()
 
void setDebugLoc (const DebugLoc &DL)
 Set the debug location to DL for all the next build instructions. More...
 
const DebugLocgetDebugLoc ()
 Get the current instruction's debug location. More...
 
MachineInstrBuilder buildInstr (unsigned Opcode)
 Build and insert <empty> = Opcode <empty>. More...
 
MachineInstrBuilder buildInstrNoInsert (unsigned Opcode)
 Build but don't insert <empty> = Opcode <empty>. More...
 
MachineInstrBuilder insertInstr (MachineInstrBuilder MIB)
 Insert an existing instruction at the insertion point. More...
 
MachineInstrBuilder buildDirectDbgValue (Register Reg, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in Reg (suitably modified by Expr). More...
 
MachineInstrBuilder buildIndirectDbgValue (Register Reg, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in memory at Reg (suitably modified by Expr). More...
 
MachineInstrBuilder buildFIDbgValue (int FI, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in the stack slot specified by FI (suitably modified by Expr). More...
 
MachineInstrBuilder buildConstDbgValue (const Constant &C, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instructions specifying that Variable is given by C (suitably modified by Expr). More...
 
MachineInstrBuilder buildDbgLabel (const MDNode *Label)
 Build and insert a DBG_LABEL instructions specifying that Label is given. More...
 
MachineInstrBuilder buildDynStackAlloc (const DstOp &Res, const SrcOp &Size, Align Alignment)
 Build and insert Res = G_DYN_STACKALLOC Size, Align. More...
 
MachineInstrBuilder buildFrameIndex (const DstOp &Res, int Idx)
 Build and insert Res = G_FRAME_INDEX Idx. More...
 
MachineInstrBuilder buildGlobalValue (const DstOp &Res, const GlobalValue *GV)
 Build and insert Res = G_GLOBAL_VALUE GV. More...
 
MachineInstrBuilder buildPtrAdd (const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res = G_PTR_ADD Op0, Op1. More...
 
Optional< MachineInstrBuildermaterializePtrAdd (Register &Res, Register Op0, const LLT ValueTy, uint64_t Value)
 Materialize and insert Res = G_PTR_ADD Op0, (G_CONSTANT Value) More...
 
MachineInstrBuilder buildPtrMask (const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res = G_PTRMASK Op0, Op1. More...
 
MachineInstrBuilder buildMaskLowPtrBits (const DstOp &Res, const SrcOp &Op0, uint32_t NumBits)
 Build and insert Res = G_PTRMASK Op0, G_CONSTANT (1 << NumBits) - 1. More...
 
MachineInstrBuilder buildUAddo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_UADDO Op0, Op1. More...
 
MachineInstrBuilder buildUSubo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_USUBO Op0, Op1. More...
 
MachineInstrBuilder buildSAddo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_SADDO Op0, Op1. More...
 
MachineInstrBuilder buildSSubo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_SUBO Op0, Op1. More...
 
MachineInstrBuilder buildUAdde (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_UADDE Op0, Op1, CarryIn. More...
 
MachineInstrBuilder buildUSube (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_USUBE Op0, Op1, CarryInp. More...
 
MachineInstrBuilder buildSAdde (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_SADDE Op0, Op1, CarryInp. More...
 
MachineInstrBuilder buildSSube (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_SSUBE Op0, Op1, CarryInp. More...
 
MachineInstrBuilder buildAnyExt (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_ANYEXT Op0. More...
 
MachineInstrBuilder buildSExt (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_SEXT Op. More...
 
MachineInstrBuilder buildSExtInReg (const DstOp &Res, const SrcOp &Op, int64_t ImmOp)
 Build and insert Res = G_SEXT_INREG Op, ImmOp. More...
 
MachineInstrBuilder buildFPExt (const DstOp &Res, const SrcOp &Op, Optional< unsigned > Flags=None)
 Build and insert Res = G_FPEXT Op. More...
 
MachineInstrBuilder buildPtrToInt (const DstOp &Dst, const SrcOp &Src)
 Build and insert a G_PTRTOINT instruction. More...
 
MachineInstrBuilder buildIntToPtr (const DstOp &Dst, const SrcOp &Src)
 Build and insert a G_INTTOPTR instruction. More...
 
MachineInstrBuilder buildBitcast (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_BITCAST Src. More...
 
MachineInstrBuilder buildAddrSpaceCast (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_ADDRSPACE_CAST Src. More...
 
unsigned getBoolExtOp (bool IsVec, bool IsFP) const
 
MachineInstrBuilder buildBoolExt (const DstOp &Res, const SrcOp &Op, bool IsFP)
 
MachineInstrBuilder buildZExt (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_ZEXT Op. More...
 
MachineInstrBuilder buildSExtOrTrunc (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_SEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op. More...
 
MachineInstrBuilder buildZExtOrTrunc (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_ZEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op. More...
 
MachineInstrBuilder buildAnyExtOrTrunc (const DstOp &Res, const SrcOp &Op)
 Res = COPY Op depending on the differing sizes of Res and Op. More...
 
MachineInstrBuilder buildExtOrTrunc (unsigned ExtOpc, const DstOp &Res, const SrcOp &Op)
 Build and insert Res = ExtOpc, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op. More...
 
MachineInstrBuilder buildZExtInReg (const DstOp &Res, const SrcOp &Op, int64_t ImmOp)
 Build and inserts Res = G_AND Op, LowBitsSet(ImmOp) Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is emulated using G_AND. More...
 
MachineInstrBuilder buildCast (const DstOp &Dst, const SrcOp &Src)
 Build and insert an appropriate cast between two registers of equal size. More...
 
MachineInstrBuilder buildBr (MachineBasicBlock &Dest)
 Build and insert G_BR Dest. More...
 
MachineInstrBuilder buildBrCond (const SrcOp &Tst, MachineBasicBlock &Dest)
 Build and insert G_BRCOND Tst, Dest. More...
 
MachineInstrBuilder buildBrIndirect (Register Tgt)
 Build and insert G_BRINDIRECT Tgt. More...
 
MachineInstrBuilder buildBrJT (Register TablePtr, unsigned JTI, Register IndexReg)
 Build and insert G_BRJT TablePtr, JTI, IndexReg. More...
 
virtual MachineInstrBuilder buildConstant (const DstOp &Res, const ConstantInt &Val)
 Build and insert Res = G_CONSTANT Val. More...
 
MachineInstrBuilder buildConstant (const DstOp &Res, int64_t Val)
 Build and insert Res = G_CONSTANT Val. More...
 
MachineInstrBuilder buildConstant (const DstOp &Res, const APInt &Val)
 
virtual MachineInstrBuilder buildFConstant (const DstOp &Res, const ConstantFP &Val)
 Build and insert Res = G_FCONSTANT Val. More...
 
MachineInstrBuilder buildFConstant (const DstOp &Res, double Val)
 
MachineInstrBuilder buildFConstant (const DstOp &Res, const APFloat &Val)
 
MachineInstrBuilder buildCopy (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = COPY Op. More...
 
MachineInstrBuilder buildAssertZExt (const DstOp &Res, const SrcOp &Op, unsigned Size)
 Build and insert Res = G_ASSERT_ZEXT Op, Size. More...
 
MachineInstrBuilder buildAssertSExt (const DstOp &Res, const SrcOp &Op, unsigned Size)
 Build and insert Res = G_ASSERT_SEXT Op, Size. More...
 
MachineInstrBuilder buildLoad (const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)
 Build and insert Res = G_LOAD Addr, MMO. More...
 
MachineInstrBuilder buildLoad (const DstOp &Res, const SrcOp &Addr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
 Build and insert a G_LOAD instruction, while constructing the MachineMemOperand. More...
 
MachineInstrBuilder buildLoadInstr (unsigned Opcode, const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)
 Build and insert Res = <opcode> Addr, MMO. More...
 
MachineInstrBuilder buildLoadFromOffset (const DstOp &Dst, const SrcOp &BasePtr, MachineMemOperand &BaseMMO, int64_t Offset)
 Helper to create a load from a constant offset given a base address. More...
 
MachineInstrBuilder buildStore (const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO)
 Build and insert G_STORE Val, Addr, MMO. More...
 
MachineInstrBuilder buildStore (const SrcOp &Val, const SrcOp &Addr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
 Build and insert a G_STORE instruction, while constructing the MachineMemOperand. More...
 
MachineInstrBuilder buildExtract (const DstOp &Res, const SrcOp &Src, uint64_t Index)
 Build and insert Res0, ... More...
 
MachineInstrBuilder buildUndef (const DstOp &Res)
 Build and insert Res = IMPLICIT_DEF. More...
 
void buildSequence (Register Res, ArrayRef< Register > Ops, ArrayRef< uint64_t > Indices)
 Build and insert instructions to put Ops together at the specified p Indices to form a larger register. More...
 
MachineInstrBuilder buildMerge (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_MERGE_VALUES Op0, ... More...
 
MachineInstrBuilder buildMerge (const DstOp &Res, std::initializer_list< SrcOp > Ops)
 
MachineInstrBuilder buildUnmerge (ArrayRef< LLT > Res, const SrcOp &Op)
 Build and insert Res0, ... More...
 
MachineInstrBuilder buildUnmerge (ArrayRef< Register > Res, const SrcOp &Op)
 
MachineInstrBuilder buildUnmerge (LLT Res, const SrcOp &Op)
 Build and insert an unmerge of Res sized pieces to cover Op. More...
 
MachineInstrBuilder buildBuildVector (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_BUILD_VECTOR Op0, ... More...
 
MachineInstrBuilder buildSplatVector (const DstOp &Res, const SrcOp &Src)
 Build and insert Res = G_BUILD_VECTOR with Src replicated to fill the number of elements. More...
 
MachineInstrBuilder buildBuildVectorTrunc (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_BUILD_VECTOR_TRUNC Op0, ... More...
 
MachineInstrBuilder buildShuffleSplat (const DstOp &Res, const SrcOp &Src)
 Build and insert a vector splat of a scalar Src using a G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom. More...
 
MachineInstrBuilder buildShuffleVector (const DstOp &Res, const SrcOp &Src1, const SrcOp &Src2, ArrayRef< int > Mask)
 Build and insert Res = G_SHUFFLE_VECTOR Src1, Src2, Mask. More...
 
MachineInstrBuilder buildConcatVectors (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_CONCAT_VECTORS Op0, ... More...
 
MachineInstrBuilder buildInsert (const DstOp &Res, const SrcOp &Src, const SrcOp &Op, unsigned Index)
 
MachineInstrBuilder buildIntrinsic (Intrinsic::ID ID, ArrayRef< Register > Res, bool HasSideEffects)
 Build and insert either a G_INTRINSIC (if HasSideEffects is false) or G_INTRINSIC_W_SIDE_EFFECTS instruction. More...
 
MachineInstrBuilder buildIntrinsic (Intrinsic::ID ID, ArrayRef< DstOp > Res, bool HasSideEffects)
 
MachineInstrBuilder buildFPTrunc (const DstOp &Res, const SrcOp &Op, Optional< unsigned > Flags=None)
 Build and insert Res = G_FPTRUNC Op. More...
 
MachineInstrBuilder buildTrunc (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_TRUNC Op. More...
 
MachineInstrBuilder buildICmp (CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert a Res = G_ICMP Pred, Op0, Op1. More...
 
MachineInstrBuilder buildFCmp (CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1, Optional< unsigned > Flags=None)
 Build and insert a Res = G_FCMP PredOp0, Op1. More...
 
MachineInstrBuilder buildSelect (const DstOp &Res, const SrcOp &Tst, const SrcOp &Op0, const SrcOp &Op1, Optional< unsigned > Flags=None)
 Build and insert a Res = G_SELECT Tst, Op0, Op1. More...
 
MachineInstrBuilder buildInsertVectorElement (const DstOp &Res, const SrcOp &Val, const SrcOp &Elt, const SrcOp &Idx)
 Build and insert Res = G_INSERT_VECTOR_ELT Val, Elt, Idx. More...
 
MachineInstrBuilder buildExtractVectorElement (const DstOp &Res, const SrcOp &Val, const SrcOp &Idx)
 Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx. More...
 
MachineInstrBuilder buildAtomicCmpXchgWithSuccess (Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO)
 Build and insert OldValRes<def>, SuccessRes<def> = G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO. More...
 
MachineInstrBuilder buildAtomicCmpXchg (Register OldValRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO. More...
 
MachineInstrBuilder buildAtomicRMW (unsigned Opcode, const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWXchg (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWAdd (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWSub (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWAnd (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWNand (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWOr (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWXor (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWMax (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWMin (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWUmax (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWUmin (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWFAdd (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO. More...
 
MachineInstrBuilder buildAtomicRMWFSub (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO. More...
 
MachineInstrBuilder buildFence (unsigned Ordering, unsigned Scope)
 Build and insert G_FENCE Ordering, Scope. More...
 
MachineInstrBuilder buildFreeze (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_FREEZE Src. More...
 
MachineInstrBuilder buildBlockAddress (Register Res, const BlockAddress *BA)
 Build and insert Res = G_BLOCK_ADDR BA. More...
 
MachineInstrBuilder buildAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_ADD Op0, Op1. More...
 
MachineInstrBuilder buildSub (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_SUB Op0, Op1. More...
 
MachineInstrBuilder buildMul (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_MUL Op0, Op1. More...
 
MachineInstrBuilder buildUMulH (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildSMulH (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildURem (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_UREM Op0, Op1. More...
 
MachineInstrBuilder buildFMul (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildFMinNum (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildFMaxNum (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildFMinNumIEEE (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildFMaxNumIEEE (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildShl (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildLShr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildAShr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 
MachineInstrBuilder buildAnd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_AND Op0, Op1. More...
 
MachineInstrBuilder buildOr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_OR Op0, Op1. More...
 
MachineInstrBuilder buildXor (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_XOR Op0, Op1. More...
 
MachineInstrBuilder buildNot (const DstOp &Dst, const SrcOp &Src0)
 Build and insert a bitwise not, NegOne = G_CONSTANT -1 Res = G_OR Op0, NegOne. More...
 
MachineInstrBuilder buildNeg (const DstOp &Dst, const SrcOp &Src0)
 Build and insert integer negation Zero = G_CONSTANT 0 Res = G_SUB Zero, Op0. More...
 
MachineInstrBuilder buildCTPOP (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTPOP Op0, Src0. More...
 
MachineInstrBuilder buildCTLZ (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTLZ Op0, Src0. More...
 
MachineInstrBuilder buildCTLZ_ZERO_UNDEF (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTLZ_ZERO_UNDEF Op0, Src0. More...
 
MachineInstrBuilder buildCTTZ (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTTZ Op0, Src0. More...
 
MachineInstrBuilder buildCTTZ_ZERO_UNDEF (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTTZ_ZERO_UNDEF Op0, Src0. More...
 
MachineInstrBuilder buildBSwap (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Dst = G_BSWAP Src0. More...
 
MachineInstrBuilder buildFAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_FADD Op0, Op1. More...
 
MachineInstrBuilder buildFSub (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_FSUB Op0, Op1. More...
 
MachineInstrBuilder buildFDiv (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Res = G_FDIV Op0, Op1. More...
 
MachineInstrBuilder buildFMA (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, Optional< unsigned > Flags=None)
 Build and insert Res = G_FMA Op0, Op1, Op2. More...
 
MachineInstrBuilder buildFMAD (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, Optional< unsigned > Flags=None)
 Build and insert Res = G_FMAD Op0, Op1, Op2. More...
 
MachineInstrBuilder buildFNeg (const DstOp &Dst, const SrcOp &Src0, Optional< unsigned > Flags=None)
 Build and insert Res = G_FNEG Op0. More...
 
MachineInstrBuilder buildFAbs (const DstOp &Dst, const SrcOp &Src0, Optional< unsigned > Flags=None)
 Build and insert Res = G_FABS Op0. More...
 
MachineInstrBuilder buildFCanonicalize (const DstOp &Dst, const SrcOp &Src0, Optional< unsigned > Flags=None)
 Build and insert Dst = G_FCANONICALIZE Src0. More...
 
MachineInstrBuilder buildIntrinsicTrunc (const DstOp &Dst, const SrcOp &Src0, Optional< unsigned > Flags=None)
 Build and insert Dst = G_INTRINSIC_TRUNC Src0. More...
 
MachineInstrBuilder buildFFloor (const DstOp &Dst, const SrcOp &Src0, Optional< unsigned > Flags=None)
 Build and insert Res = GFFLOOR Op0, Op1. More...
 
MachineInstrBuilder buildFLog (const DstOp &Dst, const SrcOp &Src, Optional< unsigned > Flags=None)
 Build and insert Dst = G_FLOG Src. More...
 
MachineInstrBuilder buildFLog2 (const DstOp &Dst, const SrcOp &Src, Optional< unsigned > Flags=None)
 Build and insert Dst = G_FLOG2 Src. More...
 
MachineInstrBuilder buildFExp2 (const DstOp &Dst, const SrcOp &Src, Optional< unsigned > Flags=None)
 Build and insert Dst = G_FEXP2 Src. More...
 
MachineInstrBuilder buildFPow (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, Optional< unsigned > Flags=None)
 Build and insert Dst = G_FPOW Src0, Src1. More...
 
MachineInstrBuilder buildFCopysign (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_FCOPYSIGN Op0, Op1. More...
 
MachineInstrBuilder buildUITOFP (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_UITOFP Src0. More...
 
MachineInstrBuilder buildSITOFP (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_SITOFP Src0. More...
 
MachineInstrBuilder buildFPTOUI (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_FPTOUI Src0. More...
 
MachineInstrBuilder buildFPTOSI (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_FPTOSI Src0. More...
 
MachineInstrBuilder buildSMin (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_SMIN Op0, Op1. More...
 
MachineInstrBuilder buildSMax (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_SMAX Op0, Op1. More...
 
MachineInstrBuilder buildUMin (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_UMIN Op0, Op1. More...
 
MachineInstrBuilder buildUMax (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_UMAX Op0, Op1. More...
 
MachineInstrBuilder buildAbs (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_ABS Src. More...
 
MachineInstrBuilder buildJumpTable (const LLT PtrTy, unsigned JTI)
 Build and insert Res = G_JUMP_TABLE JTI. More...
 
MachineInstrBuilder buildVecReduceSeqFAdd (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_SEQ_FADD ScalarIn, VecIn. More...
 
MachineInstrBuilder buildVecReduceSeqFMul (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_SEQ_FMUL ScalarIn, VecIn. More...
 
MachineInstrBuilder buildVecReduceFAdd (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_FADD Src. More...
 
MachineInstrBuilder buildVecReduceFMul (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_FMUL Src. More...
 
MachineInstrBuilder buildVecReduceFMax (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_FMAX Src. More...
 
MachineInstrBuilder buildVecReduceFMin (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_FMIN Src. More...
 
MachineInstrBuilder buildVecReduceAdd (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_ADD Src. More...
 
MachineInstrBuilder buildVecReduceMul (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_MUL Src. More...
 
MachineInstrBuilder buildVecReduceAnd (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_AND Src. More...
 
MachineInstrBuilder buildVecReduceOr (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_OR Src. More...
 
MachineInstrBuilder buildVecReduceXor (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_XOR Src. More...
 
MachineInstrBuilder buildVecReduceSMax (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_SMAX Src. More...
 
MachineInstrBuilder buildVecReduceSMin (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_SMIN Src. More...
 
MachineInstrBuilder buildVecReduceUMax (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_UMAX Src. More...
 
MachineInstrBuilder buildVecReduceUMin (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_UMIN Src. More...
 
MachineInstrBuilder buildMemTransferInst (unsigned Opcode, const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO)
 Build and insert G_MEMCPY or G_MEMMOVE. More...
 
MachineInstrBuilder buildMemCpy (const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO)
 
MachineInstrBuilder buildSbfx (const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width)
 Build and insert Dst = G_SBFX Src, LSB, Width. More...
 
MachineInstrBuilder buildUbfx (const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width)
 Build and insert Dst = G_UBFX Src, LSB, Width. More...
 
MachineInstrBuilder buildRotateRight (const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt)
 Build and insert Dst = G_ROTR Src, Amt. More...
 
MachineInstrBuilder buildRotateLeft (const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt)
 Build and insert Dst = G_ROTL Src, Amt. More...
 
MachineInstrBuilder buildBitReverse (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_BITREVERSE Src. More...
 
virtual MachineInstrBuilder buildInstr (unsigned Opc, ArrayRef< DstOp > DstOps, ArrayRef< SrcOp > SrcOps, Optional< unsigned > Flags=None)
 
Setters for the insertion point.

Set the MachineFunction where to build instructions.

void setMF (MachineFunction &MF)
 
void setMBB (MachineBasicBlock &MBB)
 Set the insertion point to the end of MBB. More...
 
void setInstr (MachineInstr &MI)
 Set the insertion point to before MI. More...
 

Protected Member Functions

void validateTruncExt (const LLT Dst, const LLT Src, bool IsExtend)
 
void validateUnaryOp (const LLT Res, const LLT Op0)
 
void validateBinaryOp (const LLT Res, const LLT Op0, const LLT Op1)
 
void validateShiftOp (const LLT Res, const LLT Op0, const LLT Op1)
 
void validateSelectOp (const LLT ResTy, const LLT TstTy, const LLT Op0Ty, const LLT Op1Ty)
 
void recordInsertion (MachineInstr *InsertedInstr) const
 

Detailed Description

Helper class to build MachineInstr.

It keeps internally the insertion point and debug location for all the new instructions we want to create. This information can be modify via the related setters.

Definition at line 212 of file MachineIRBuilder.h.

Constructor & Destructor Documentation

◆ MachineIRBuilder() [1/6]

llvm::MachineIRBuilder::MachineIRBuilder ( )
default

Some constructors for easy use.

◆ MachineIRBuilder() [2/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineFunction MF)
inline

Definition at line 234 of file MachineIRBuilder.h.

References setMF().

◆ MachineIRBuilder() [3/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  InsPt 
)
inline

Definition at line 236 of file MachineIRBuilder.h.

References MBB, setInsertPt(), and setMF().

◆ MachineIRBuilder() [4/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineInstr MI)
inline

Definition at line 241 of file MachineIRBuilder.h.

References MI, setDebugLoc(), and setInstr().

◆ MachineIRBuilder() [5/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineInstr MI,
GISelChangeObserver Observer 
)
inline

Definition at line 247 of file MachineIRBuilder.h.

References setChangeObserver().

◆ ~MachineIRBuilder()

virtual llvm::MachineIRBuilder::~MachineIRBuilder ( )
virtualdefault

◆ MachineIRBuilder() [6/6]

llvm::MachineIRBuilder::MachineIRBuilder ( const MachineIRBuilderState BState)
inline

Definition at line 254 of file MachineIRBuilder.h.

Member Function Documentation

◆ buildAbs()

MachineInstrBuilder llvm::MachineIRBuilder::buildAbs ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_ABS Src.

Definition at line 1719 of file MachineIRBuilder.h.

References buildInstr().

◆ buildAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildAdd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_ADD Op0, Op1.

G_ADD sets Res to the sum of integer parameters Op0 and Op1, truncated to their width.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same (scalar or vector) type).
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1388 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), and llvm::LegalizerHelper::narrowScalarCTPOP().

◆ buildAddrSpaceCast()

MachineInstrBuilder llvm::MachineIRBuilder::buildAddrSpaceCast ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_ADDRSPACE_CAST Src.

Definition at line 638 of file MachineIRBuilder.h.

References buildInstr().

◆ buildAnd()

MachineInstrBuilder llvm::MachineIRBuilder::buildAnd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_AND Op0, Op1.

G_AND sets Res to the bitwise and of integer parameters Op0 and Op1.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same (scalar or vector) type).
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1505 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applySimplifyURemByPow2(), buildZExtInReg(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizerHelper::lowerU64ToF32BitOps().

◆ buildAnyExt()

MachineInstrBuilder MachineIRBuilder::buildAnyExt ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_ANYEXT Op0.

G_ANYEXT produces a register of the specified width, with bits 0 to sizeof(Ty) * 8 set to Op. The remaining bits are unspecified (i.e. this is neither zero nor sign-extension). For a vector register, each element is extended individually.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Op must be smaller than Res
Returns
The newly created instruction.

Definition at line 414 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by buildAnyextOrCopy(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarInsert().

◆ buildAnyExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildAnyExtOrTrunc ( const DstOp Res,
const SrcOp Op 
)

Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 482 of file MachineIRBuilder.cpp.

References buildExtOrTrunc().

Referenced by llvm::LegalizerHelper::lowerStore().

◆ buildAShr()

MachineInstrBuilder llvm::MachineIRBuilder::buildAShr ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

◆ buildAssertSExt()

MachineInstrBuilder MachineIRBuilder::buildAssertSExt ( const DstOp Res,
const SrcOp Op,
unsigned  Size 
)

Build and insert Res = G_ASSERT_SEXT Op, Size.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 243 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addImm(), buildInstr(), and llvm::Check::Size.

Referenced by llvm::CallLowering::IncomingValueHandler::buildExtensionHint().

◆ buildAssertZExt()

MachineInstrBuilder MachineIRBuilder::buildAssertZExt ( const DstOp Res,
const SrcOp Op,
unsigned  Size 
)

Build and insert Res = G_ASSERT_ZEXT Op, Size.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 249 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addImm(), buildInstr(), and llvm::Check::Size.

Referenced by llvm::CallLowering::IncomingValueHandler::buildExtensionHint(), and llvm::LegalizerHelper::lowerLoad().

◆ buildAtomicCmpXchg()

MachineInstrBuilder MachineIRBuilder::buildAtomicCmpXchg ( Register  OldValRes,
Register  Addr,
Register  CmpVal,
Register  NewVal,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO.

Atomically replace the value at Addr with NewVal if it is currently CmpVal otherwise leaves it unchanged. Puts the original value from Addr in Res.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register of scalar type.
Addr must be a generic virtual register with pointer type.
OldValRes, CmpVal, and NewVal must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 813 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMemOperand(), Addr, llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().

Referenced by llvm::LegalizerHelper::lower().

◆ buildAtomicCmpXchgWithSuccess()

MachineInstrBuilder MachineIRBuilder::buildAtomicCmpXchgWithSuccess ( Register  OldValRes,
Register  SuccessRes,
Register  Addr,
Register  CmpVal,
Register  NewVal,
MachineMemOperand MMO 
)

Build and insert OldValRes<def>, SuccessRes<def> = G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO.

Atomically replace the value at Addr with NewVal if it is currently CmpVal otherwise leaves it unchanged. Puts the original value from Addr in Res, along with an s1 indicating whether it was replaced.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register of scalar type.
SuccessRes must be a generic virtual register of scalar type. It will be assigned 0 on failure and 1 on success.
Addr must be a generic virtual register with pointer type.
OldValRes, CmpVal, and NewVal must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 785 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMemOperand(), Addr, llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().

◆ buildAtomicRMW()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMW ( unsigned  Opcode,
const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO.

Atomically read-modify-update the value at Addr with Val. Puts the original value from Addr in OldValRes. The modification is determined by the opcode.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 837 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), Addr, llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::MachineMemOperand::isAtomic(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().

Referenced by buildAtomicRMWAdd(), buildAtomicRMWAnd(), buildAtomicRMWFAdd(), buildAtomicRMWFSub(), buildAtomicRMWMax(), buildAtomicRMWMin(), buildAtomicRMWNand(), buildAtomicRMWOr(), buildAtomicRMWSub(), buildAtomicRMWUmax(), buildAtomicRMWUmin(), buildAtomicRMWXchg(), and buildAtomicRMWXor().

◆ buildAtomicRMWAdd()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWAdd ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO.

Atomically replace the value at Addr with the addition of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 868 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWAnd()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWAnd ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise and of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 880 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWFAdd()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFAdd ( const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO.

Definition at line 930 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWFSub()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFSub ( const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO.

Definition at line 938 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWMax()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWMax ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO.

Atomically replace the value at Addr with the signed maximum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 905 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWMin()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWMin ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO.

Atomically replace the value at Addr with the signed minimum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 911 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWNand()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWNand ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise nand of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 886 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWOr()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWOr ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise or of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 891 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWSub()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWSub ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO.

Atomically replace the value at Addr with the subtraction of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 874 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWUmax()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWUmax ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO.

Atomically replace the value at Addr with the unsigned maximum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 917 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWUmin()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWUmin ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO.

Atomically replace the value at Addr with the unsigned minimum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 923 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWXchg()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWXchg ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO.

Atomically replace the value at Addr with Val. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 862 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWXor()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWXor ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise xor of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 899 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildBitcast()

MachineInstrBuilder llvm::MachineIRBuilder::buildBitcast ( const DstOp Dst,
const SrcOp Src 
)
inline

◆ buildBitReverse()

MachineInstrBuilder llvm::MachineIRBuilder::buildBitReverse ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_BITREVERSE Src.

Definition at line 1872 of file MachineIRBuilder.h.

References buildInstr().

◆ buildBlockAddress()

MachineInstrBuilder MachineIRBuilder::buildBlockAddress ( Register  Res,
const BlockAddress BA 
)

Build and insert Res = G_BLOCK_ADDR BA.

G_BLOCK_ADDR computes the address of a basic block.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register of a pointer type.
Returns
The newly created instruction.

Definition at line 952 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addBlockAddress(), llvm::MachineInstrBuilder::addDef(), assert(), buildInstr(), getMRI(), llvm::Intrinsic::getType(), and llvm::LegalityPredicates::isPointer().

◆ buildBoolExt()

MachineInstrBuilder MachineIRBuilder::buildBoolExt ( const DstOp Res,
const SrcOp Op,
bool  IsFP 
)

◆ buildBr()

MachineInstrBuilder MachineIRBuilder::buildBr ( MachineBasicBlock Dest)

Build and insert G_BR Dest.

G_BR is an unconditional branch to Dest.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 218 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addMBB(), and buildInstr().

◆ buildBrCond()

MachineInstrBuilder MachineIRBuilder::buildBrCond ( const SrcOp Tst,
MachineBasicBlock Dest 
)

Build and insert G_BRCOND Tst, Dest.

G_BRCOND is a conditional branch to Dest.

Precondition
setBasicBlock or setMI must have been called.
Tst must be a generic virtual register with scalar type. At the beginning of legalization, this will be a single bit (s1). Targets with interesting flags registers may change this. For a wider type, whether the branch is taken must only depend on bit 0 (for now).
Returns
The newly created instruction.

Definition at line 332 of file MachineIRBuilder.cpp.

References llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::SrcOp::getLLTTy(), getMRI(), and llvm::LegalityPredicates::isScalar().

◆ buildBrIndirect()

MachineInstrBuilder MachineIRBuilder::buildBrIndirect ( Register  Tgt)

Build and insert G_BRINDIRECT Tgt.

G_BRINDIRECT is an indirect branch to Tgt.

Precondition
setBasicBlock or setMI must have been called.
Tgt must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 222 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::Intrinsic::getType(), and llvm::LegalityPredicates::isPointer().

◆ buildBrJT()

MachineInstrBuilder MachineIRBuilder::buildBrJT ( Register  TablePtr,
unsigned  JTI,
Register  IndexReg 
)

Build and insert G_BRJT TablePtr, JTI, IndexReg.

G_BRJT is a jump table branch using a table base pointer TablePtr, jump table index JTI and index IndexReg

Precondition
setBasicBlock or setMI must have been called.
TablePtr must be a generic virtual register with pointer type.
JTI must be be a jump table index.
IndexReg must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 227 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addJumpTableIndex(), llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::Intrinsic::getType(), and llvm::LegalityPredicates::isPointer().

◆ buildBSwap()

MachineInstrBuilder llvm::MachineIRBuilder::buildBSwap ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Dst = G_BSWAP Src0.

Definition at line 1574 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyTruncStoreMerge().

◆ buildBuildVector()

MachineInstrBuilder MachineIRBuilder::buildBuildVector ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_BUILD_VECTOR Op0, ...

G_BUILD_VECTOR creates a vector value from multiple scalar registers.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input scalar registers.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 632 of file MachineIRBuilder.cpp.

References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::fewerElementsVectorCasts(), llvm::LegalizerHelper::fewerElementsVectorCmp(), llvm::LegalizerHelper::fewerElementsVectorSelect(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarExtract().

◆ buildBuildVectorTrunc()

MachineInstrBuilder MachineIRBuilder::buildBuildVectorTrunc ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_BUILD_VECTOR_TRUNC Op0, ...

G_BUILD_VECTOR_TRUNC creates a vector value from multiple scalar registers which have types larger than the destination vector element type, and truncates the values to fit.

If the operands given are already the same size as the vector elt type, then this method will instead create a G_BUILD_VECTOR instruction.

Precondition
setBasicBlock or setMI must have been called.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 648 of file MachineIRBuilder.cpp.

References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

◆ buildCast()

MachineInstrBuilder MachineIRBuilder::buildCast ( const DstOp Dst,
const SrcOp Src 
)

◆ buildConcatVectors()

MachineInstrBuilder MachineIRBuilder::buildConcatVectors ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_CONCAT_VECTORS Op0, ...

G_CONCAT_VECTORS creates a vector from the concatenation of 2 or more vectors.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input registers.
The type of all source operands must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 689 of file MachineIRBuilder.cpp.

References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

Referenced by llvm::LegalizerHelper::fewerElementsVectorCasts(), llvm::LegalizerHelper::fewerElementsVectorCmp(), llvm::LegalizerHelper::fewerElementsVectorSelect(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), and llvm::LegalizerHelper::moreElementsVectorSrc().

◆ buildConstant() [1/3]

MachineInstrBuilder MachineIRBuilder::buildConstant ( const DstOp Res,
const APInt Val 
)

◆ buildConstant() [2/3]

MachineInstrBuilder MachineIRBuilder::buildConstant ( const DstOp Res,
const ConstantInt Val 
)
virtual

Build and insert Res = G_CONSTANT Val.

G_CONSTANT is an integer constant with the specified size and value. Val will be extended or truncated to the size of Reg.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or pointer type.
Returns
The newly created instruction.

Reimplemented in llvm::CSEMIRBuilder.

Definition at line 255 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addCImm(), llvm::MachineInstrBuilder::addDef(), llvm::DstOp::addDefToMIB(), assert(), buildInstr(), buildSplatVector(), llvm::ConstantInt::getBitWidth(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getScalarSizeInBits(), llvm::LLT::getScalarType(), and llvm::LLT::isVector().

Referenced by applyAdjustICmpImmAndPred(), llvm::CombinerHelper::applyCombineConstPtrAddToI2P(), llvm::CombinerHelper::applyCombineMulByNegativeOne(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineUnmergeConstant(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), applyEXT(), applyFConstantToConstant(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddImmedChain(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyTruncStoreMerge(), applyVAshrLshrImm(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), llvm::CSEMIRBuilder::buildConstant(), buildConstant(), buildLoadFromOffset(), buildMaskLowPtrBits(), buildNeg(), buildNot(), buildShuffleSplat(), buildZExtInReg(), llvm::CallLowering::ValueHandler::copyArgumentMemory(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), getMemsetValue(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), materializePtrAdd(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::AMDGPUCallLowering::passSpecialInputs(), llvm::CombinerHelper::replaceInstWithConstant(), and llvm::LegalizerHelper::widenScalar().

◆ buildConstant() [3/3]

MachineInstrBuilder MachineIRBuilder::buildConstant ( const DstOp Res,
int64_t  Val 
)

Build and insert Res = G_CONSTANT Val.

G_CONSTANT is an integer constant with the specified size and value.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Returns
The newly created instruction.

Definition at line 276 of file MachineIRBuilder.cpp.

References buildConstant(), llvm::IntegerType::get(), llvm::ConstantInt::get(), getFunction(), llvm::DstOp::getLLTTy(), getMF(), getMRI(), and getScalarSizeInBits().

◆ buildConstDbgValue()

MachineInstrBuilder MachineIRBuilder::buildConstDbgValue ( const Constant C,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instructions specifying that Variable is given by C (suitably modified by Expr).

Definition at line 92 of file MachineIRBuilder.cpp.

References assert(), buildInstrNoInsert(), getDL(), insertInstr(), and isValid().

◆ buildCopy()

MachineInstrBuilder MachineIRBuilder::buildCopy ( const DstOp Res,
const SrcOp Op 
)

◆ buildCTLZ()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTLZ ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTLZ Op0, Src0.

Definition at line 1554 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount().

◆ buildCTLZ_ZERO_UNDEF()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTLZ_ZERO_UNDEF ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTLZ_ZERO_UNDEF Op0, Src0.

Definition at line 1559 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount(), and llvm::LegalizerHelper::lowerU64ToF32BitOps().

◆ buildCTPOP()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTPOP ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTPOP Op0, Src0.

Definition at line 1549 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount(), and llvm::LegalizerHelper::narrowScalarCTPOP().

◆ buildCTTZ()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTTZ ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTTZ Op0, Src0.

Definition at line 1564 of file MachineIRBuilder.h.

References buildInstr().

◆ buildCTTZ_ZERO_UNDEF()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTTZ_ZERO_UNDEF ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTTZ_ZERO_UNDEF Op0, Src0.

Definition at line 1569 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount().

◆ buildDbgLabel()

MachineInstrBuilder MachineIRBuilder::buildDbgLabel ( const MDNode Label)

Build and insert a DBG_LABEL instructions specifying that Label is given.

Convert "llvm.dbg.label Label" to "DBG_LABEL Label".

Definition at line 117 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), and llvm::MachineIRBuilderState::DL.

◆ buildDirectDbgValue()

MachineInstrBuilder MachineIRBuilder::buildDirectDbgValue ( Register  Reg,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in Reg (suitably modified by Expr).

Definition at line 52 of file MachineIRBuilder.cpp.

References assert(), llvm::BuildMI(), get, getDL(), getMF(), getTII(), insertInstr(), isValid(), and Reg.

◆ buildDynStackAlloc()

MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc ( const DstOp Res,
const SrcOp Size,
Align  Alignment 
)

Build and insert Res = G_DYN_STACKALLOC Size, Align.

G_DYN_STACKALLOC does a dynamic stack allocation and writes the address of the allocated memory into Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 126 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LegalityPredicates::isPointer(), llvm::Check::Size, and llvm::Align::value().

◆ buildExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildExtOrTrunc ( unsigned  ExtOpc,
const DstOp Res,
const SrcOp Op 
)

Build and insert Res = ExtOpc, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 448 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LegalityPredicates::isScalar(), and llvm::LegalityPredicates::isVector().

Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), buildAnyExtOrTrunc(), buildSExtOrTrunc(), and buildZExtOrTrunc().

◆ buildExtract()

MachineInstrBuilder MachineIRBuilder::buildExtract ( const DstOp Res,
const SrcOp Src,
uint64_t  Index 
)

Build and insert Res0, ...

= G_EXTRACT Src, Idx0.

Precondition
setBasicBlock or setMI must have been called.
Res and Src must be generic virtual registers.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 516 of file MachineIRBuilder.cpp.

References assert(), buildCast(), buildInstr(), getMRI(), llvm::LLT::getSizeInBits(), Index, and llvm::LLT::isValid().

Referenced by llvm::LegalizerHelper::narrowScalarExtract(), and llvm::LegalizerHelper::narrowScalarInsert().

◆ buildExtractVectorElement()

MachineInstrBuilder MachineIRBuilder::buildExtractVectorElement ( const DstOp Res,
const SrcOp Val,
const SrcOp Idx 
)

Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Val must be a generic virtual register with vector type.
Idx must be a generic virtual register with scalar type.
Returns
The newly created instruction.

Definition at line 780 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), and llvm::LegalizerHelper::lowerShuffleVector().

◆ buildFAbs()

MachineInstrBuilder llvm::MachineIRBuilder::buildFAbs ( const DstOp Dst,
const SrcOp Src0,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FABS Op0.

Definition at line 1620 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildFAdd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

◆ buildFCanonicalize()

MachineInstrBuilder llvm::MachineIRBuilder::buildFCanonicalize ( const DstOp Dst,
const SrcOp Src0,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Dst = G_FCANONICALIZE Src0.

Definition at line 1626 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFMinNumMaxNum().

◆ buildFCmp()

MachineInstrBuilder MachineIRBuilder::buildFCmp ( CmpInst::Predicate  Pred,
const DstOp Res,
const SrcOp Op0,
const SrcOp Op1,
Optional< unsigned >  Flags = None 
)

Build and insert a Res = G_FCMP PredOp0, Op1.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type. Typically this starts as s1 or <N x s1>.
Op0 and Op1 must be generic virtual registers with the same number of elements as Res (or scalar, if Res is scalar).
Pred must be a floating-point predicate.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 755 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::LegalizerHelper::fewerElementsVectorCmp(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFPTOUI(), and llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildFConstant() [1/3]

MachineInstrBuilder MachineIRBuilder::buildFConstant ( const DstOp Res,
const APFloat Val 
)

◆ buildFConstant() [2/3]

MachineInstrBuilder MachineIRBuilder::buildFConstant ( const DstOp Res,
const ConstantFP Val 
)
virtual

◆ buildFConstant() [3/3]

MachineInstrBuilder MachineIRBuilder::buildFConstant ( const DstOp Res,
double  Val 
)

◆ buildFCopysign()

MachineInstrBuilder llvm::MachineIRBuilder::buildFCopysign ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_FCOPYSIGN Op0, Op1.

Definition at line 1669 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildFDiv()

MachineInstrBuilder llvm::MachineIRBuilder::buildFDiv ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FDIV Op0, Op1.

Definition at line 1593 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFence()

MachineInstrBuilder MachineIRBuilder::buildFence ( unsigned  Ordering,
unsigned  Scope 
)

Build and insert G_FENCE Ordering, Scope.

Definition at line 945 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addImm(), and buildInstr().

◆ buildFExp2()

MachineInstrBuilder llvm::MachineIRBuilder::buildFExp2 ( const DstOp Dst,
const SrcOp Src,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Dst = G_FEXP2 Src.

Definition at line 1656 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFFloor()

MachineInstrBuilder llvm::MachineIRBuilder::buildFFloor ( const DstOp Dst,
const SrcOp Src0,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = GFFLOOR Op0, Op1.

Definition at line 1638 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFIDbgValue()

MachineInstrBuilder MachineIRBuilder::buildFIDbgValue ( int  FI,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in the stack slot specified by FI (suitably modified by Expr).

Definition at line 77 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMetadata(), assert(), buildInstr(), getDL(), and isValid().

◆ buildFLog()

MachineInstrBuilder llvm::MachineIRBuilder::buildFLog ( const DstOp Dst,
const SrcOp Src,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Dst = G_FLOG Src.

Definition at line 1644 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFLog2()

MachineInstrBuilder llvm::MachineIRBuilder::buildFLog2 ( const DstOp Dst,
const SrcOp Src,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Dst = G_FLOG2 Src.

Definition at line 1650 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMA()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMA ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
const SrcOp Src2,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FMA Op0, Op1, Op2.

Definition at line 1600 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMAD()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMAD ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
const SrcOp Src2,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FMAD Op0, Op1, Op2.

Definition at line 1607 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMaxNum()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMaxNum ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1458 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMaxNumIEEE()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMaxNumIEEE ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1470 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMinNum()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMinNum ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1452 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMinNumIEEE()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMinNumIEEE ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1464 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMul ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1446 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFMad().

◆ buildFNeg()

MachineInstrBuilder llvm::MachineIRBuilder::buildFNeg ( const DstOp Dst,
const SrcOp Src0,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FNEG Op0.

Definition at line 1614 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lower(), and llvm::LegalizerHelper::lowerSITOFP().

◆ buildFPExt()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPExt ( const DstOp Res,
const SrcOp Op,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FPEXT Op.

Definition at line 616 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFPow()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPow ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Dst = G_FPOW Src0, Src1.

Definition at line 1662 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFPOWI().

◆ buildFPTOSI()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPTOSI ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_FPTOSI Src0.

Definition at line 1690 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFPTOUI().

◆ buildFPTOUI()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPTOUI ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_FPTOUI Src0.

Definition at line 1685 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFPTrunc()

MachineInstrBuilder MachineIRBuilder::buildFPTrunc ( const DstOp Res,
const SrcOp Op,
Optional< unsigned >  Flags = None 
)

Build and insert Res = G_FPTRUNC Op.

G_FPTRUNC converts a floating-point value into one with a smaller type.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Res must be smaller than Op
Returns
The newly created instruction.

Definition at line 742 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::MipsLegalizerInfo::legalizeCustom().

◆ buildFrameIndex()

MachineInstrBuilder MachineIRBuilder::buildFrameIndex ( const DstOp Res,
int  Idx 
)

Build and insert Res = G_FRAME_INDEX Idx.

G_FRAME_INDEX materializes the address of an alloca value or other stack-based object.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 137 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and llvm::LegalityPredicates::isPointer().

Referenced by llvm::LegalizerHelper::createStackTemporary(), llvm::CallLowering::insertSRetOutgoingArgument(), and llvm::MipsCallLowering::lowerFormalArguments().

◆ buildFreeze()

MachineInstrBuilder llvm::MachineIRBuilder::buildFreeze ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_FREEZE Src.

Definition at line 1363 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFSub()

MachineInstrBuilder llvm::MachineIRBuilder::buildFSub ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_FSUB Op0, Op1.

Definition at line 1586 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerFPTOUI(), and llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildGlobalValue()

MachineInstrBuilder MachineIRBuilder::buildGlobalValue ( const DstOp Res,
const GlobalValue GV 
)

Build and insert Res = G_GLOBAL_VALUE GV.

G_GLOBAL_VALUE materializes the address of the specified global into Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type in the same address space as GV.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 146 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::PointerType::getAddressSpace(), llvm::DstOp::getLLTTy(), getMRI(), llvm::GlobalValue::getType(), and llvm::LegalityPredicates::isPointer().

Referenced by addCallTargetOperands(), and llvm::MipsCallLowering::lowerCall().

◆ buildICmp()

MachineInstrBuilder MachineIRBuilder::buildICmp ( CmpInst::Predicate  Pred,
const DstOp Res,
const SrcOp Op0,
const SrcOp Op1 
)

Build and insert a Res = G_ICMP Pred, Op0, Op1.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type. Typically this starts as s1 or <N x s1>.
Op0 and Op1 must be generic virtual registers with the same number of elements as Res. If Res is a scalar, Op0 must be either a scalar or pointer.
Pred must be an integer predicate.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 748 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::LegalizerHelper::fewerElementsVectorCmp(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarShift().

◆ buildIndirectDbgValue()

MachineInstrBuilder MachineIRBuilder::buildIndirectDbgValue ( Register  Reg,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in memory at Reg (suitably modified by Expr).

Definition at line 65 of file MachineIRBuilder.cpp.

References assert(), llvm::BuildMI(), get, getDL(), getMF(), getTII(), insertInstr(), isValid(), and Reg.

◆ buildInsert()

MachineInstrBuilder MachineIRBuilder::buildInsert ( const DstOp Res,
const SrcOp Src,
const SrcOp Op,
unsigned  Index 
)

◆ buildInsertVectorElement()

MachineInstrBuilder MachineIRBuilder::buildInsertVectorElement ( const DstOp Res,
const SrcOp Val,
const SrcOp Elt,
const SrcOp Idx 
)

Build and insert Res = G_INSERT_VECTOR_ELT Val, Elt, Idx.

Precondition
setBasicBlock or setMI must have been called.
Res and Val must be a generic virtual register
Elt and Idx must be a generic virtual register with scalar type.
Returns
The newly created instruction.

Definition at line 774 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::LegalizerHelper::bitcastInsertVectorElt(), buildShuffleSplat(), and llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt().

◆ buildInstr() [1/2]

MachineInstrBuilder MachineIRBuilder::buildInstr ( unsigned  Opc,
ArrayRef< DstOp DstOps,
ArrayRef< SrcOp SrcOps,
Optional< unsigned >  Flags = None 
)
virtual

◆ buildInstr() [2/2]

MachineInstrBuilder llvm::MachineIRBuilder::buildInstr ( unsigned  Opcode)
inline

Build and insert <empty> = Opcode <empty>.

The insertion point is the one set by the last call of either setBasicBlock or setMI.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 367 of file MachineIRBuilder.h.

References buildInstrNoInsert(), and insertInstr().

Referenced by llvm::CombinerHelper::applyBuildInstructionSteps(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtOfExt(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineTruncOfExt(), applyEXT(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), applyShuffleVectorPseudo(), applyVAshrLshrImm(), buildAbs(), buildAdd(), buildAddrSpaceCast(), buildAnd(), buildAnyExt(), buildAShr(), buildAssertSExt(), buildAssertZExt(), buildAtomicCmpXchg(), buildAtomicCmpXchgWithSuccess(), buildAtomicRMW(), buildBitcast(), buildBitReverse(), buildBlockAddress(), buildBoolExt(), buildBr(), buildBrCond(), buildBrIndirect(), buildBrJT(), buildBSwap(), buildBuildVector(), buildBuildVectorTrunc(), buildCast(), buildConcatVectors(), buildConstant(), buildCopy(), buildCTLZ(), buildCTLZ_ZERO_UNDEF(), buildCTPOP(), buildCTTZ(), buildCTTZ_ZERO_UNDEF(), buildDbgLabel(), buildDynStackAlloc(), buildExtOrTrunc(), buildExtract(), buildExtractVectorElement(), buildFAbs(), buildFAdd(), buildFCanonicalize(), buildFCmp(), buildFConstant(), buildFCopysign(), buildFDiv(), buildFence(), buildFExp2(), buildFFloor(), buildFIDbgValue(), buildFLog(), buildFLog2(), buildFMA(), buildFMAD(), buildFMaxNum(), buildFMaxNumIEEE(), buildFMinNum(), buildFMinNumIEEE(), buildFMul(), buildFNeg(), buildFPExt(), buildFPow(), buildFPTOSI(), buildFPTOUI(), buildFPTrunc(), buildFrameIndex(), buildFreeze(), buildFSub(), buildGlobalValue(), buildICmp(), buildInsert(), buildInsertVectorElement(), llvm::CSEMIRBuilder::buildInstr(), buildInstr(), buildIntrinsic(), buildIntrinsicTrunc(), buildIntToPtr(), buildJumpTable(), buildLoadInstr(), buildLShr(), buildMemTransferInst(), buildMerge(), buildMul(), buildNeg(), buildNot(), buildOr(), buildPtrAdd(), buildPtrMask(), buildPtrToInt(), buildRotateLeft(), buildRotateRight(), buildSAdde(), buildSAddo(), buildSbfx(), buildSelect(), buildSExt(), buildSExtInReg(), buildShl(), buildShuffleVector(), buildSITOFP(), buildSMax(), buildSMin(), buildSMulH(), buildSplatVector(), buildSSube(), buildSSubo(), buildStore(), buildSub(), buildTrunc(), buildUAdde(), buildUAddo(), buildUbfx(), buildUITOFP(), buildUMax(), buildUMin(), buildUMulH(), buildUndef(), buildUnmerge(), buildURem(), buildUSube(), buildUSubo(), buildVecReduceAdd(), buildVecReduceAnd(), buildVecReduceFAdd(), buildVecReduceFMax(), buildVecReduceFMin(), buildVecReduceFMul(), buildVecReduceMul(), buildVecReduceOr(), buildVecReduceSeqFAdd(), buildVecReduceSeqFMul(), buildVecReduceSMax(), buildVecReduceSMin(), buildVecReduceUMax(), buildVecReduceUMin(), buildVecReduceXor(), buildXor(), buildZExt(), copySubReg(), createTuple(), llvm::LegalizerHelper::fewerElementsVectorCasts(), llvm::LegalizerHelper::fewerElementsVectorMulo(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::LegalizerHelper::fewerElementsVectorReductions(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitreverse(), llvm::MipsCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::LegalizerHelper::lowerDIVREM(), llvm::LegalizerHelper::lowerFMinNumMaxNum(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::PPCCallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::LegalizerHelper::moreElementsVector(), MSA2OpIntrinsicToGeneric(), MSA3OpIntrinsicToGeneric(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarBasic(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::reduceOperationWidth(), SelectMSA3OpIntrinsic(), llvm::AArch64GISelUtils::tryEmitBZero(), llvm::LegalizerHelper::widenScalar(), llvm::LegalizerHelper::widenScalarDst(), and llvm::LegalizerHelper::widenScalarSrc().

◆ buildInstrNoInsert()

MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert ( unsigned  Opcode)

◆ buildIntrinsic() [1/2]

MachineInstrBuilder MachineIRBuilder::buildIntrinsic ( Intrinsic::ID  ID,
ArrayRef< DstOp Res,
bool  HasSideEffects 
)

Definition at line 725 of file MachineIRBuilder.cpp.

References buildInstr(), getMRI(), and Results.

◆ buildIntrinsic() [2/2]

MachineInstrBuilder MachineIRBuilder::buildIntrinsic ( Intrinsic::ID  ID,
ArrayRef< Register Res,
bool  HasSideEffects 
)

Build and insert either a G_INTRINSIC (if HasSideEffects is false) or G_INTRINSIC_W_SIDE_EFFECTS instruction.

Its first operand will be the result register definition unless Reg is NoReg (== 0). The second operand will be the intrinsic's ID.

Callers are expected to add the required definitions and uses afterwards.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 713 of file MachineIRBuilder.cpp.

References buildInstr().

◆ buildIntrinsicTrunc()

MachineInstrBuilder llvm::MachineIRBuilder::buildIntrinsicTrunc ( const DstOp Dst,
const SrcOp Src0,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Dst = G_INTRINSIC_TRUNC Src0.

Definition at line 1632 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFFloor(), and llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildIntToPtr()

MachineInstrBuilder llvm::MachineIRBuilder::buildIntToPtr ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert a G_INTTOPTR instruction.

Definition at line 628 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyPtrAddZero(), llvm::LegalizerHelper::lowerLoad(), and llvm::LegalizerHelper::lowerMergeValues().

◆ buildJumpTable()

MachineInstrBuilder MachineIRBuilder::buildJumpTable ( const LLT  PtrTy,
unsigned  JTI 
)

Build and insert Res = G_JUMP_TABLE JTI.

G_JUMP_TABLE sets Res to the address of the jump table specified by the jump table index JTI.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 159 of file MachineIRBuilder.cpp.

References buildInstr().

◆ buildLoad() [1/2]

MachineInstrBuilder llvm::MachineIRBuilder::buildLoad ( const DstOp Res,
const SrcOp Addr,
MachineMemOperand MMO 
)
inline

Build and insert Res = G_LOAD Addr, MMO.

Loads the value stored at Addr. Puts the result in Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 832 of file MachineIRBuilder.h.

References Addr, and buildLoadInstr().

Referenced by buildLoad(), buildLoadFromOffset(), llvm::CallLowering::insertSRetLoads(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::reduceLoadStoreWidth().

◆ buildLoad() [2/2]

MachineInstrBuilder MachineIRBuilder::buildLoad ( const DstOp Res,
const SrcOp Addr,
MachinePointerInfo  PtrInfo,
Align  Alignment,
MachineMemOperand::Flags  MMOFlags = MachineMemOperand::MONone,
const AAMDNodes AAInfo = AAMDNodes() 
)

Build and insert a G_LOAD instruction, while constructing the MachineMemOperand.

Definition at line 343 of file MachineIRBuilder.cpp.

References Addr, assert(), buildLoad(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::MachineMemOperand::MOLoad, and llvm::MachineMemOperand::MOStore.

◆ buildLoadFromOffset()

MachineInstrBuilder MachineIRBuilder::buildLoadFromOffset ( const DstOp Dst,
const SrcOp BasePtr,
MachineMemOperand BaseMMO,
int64_t  Offset 
)

Helper to create a load from a constant offset given a base address.

Load the type of Dst from Offset from the given base address and memory operand.

Definition at line 370 of file MachineIRBuilder.cpp.

References buildConstant(), buildLoad(), buildPtrAdd(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::LLT::getSizeInBits(), Offset, and llvm::LLT::scalar().

◆ buildLoadInstr()

MachineInstrBuilder MachineIRBuilder::buildLoadInstr ( unsigned  Opcode,
const DstOp Res,
const SrcOp Addr,
MachineMemOperand MMO 
)

Build and insert Res = <opcode> Addr, MMO.

Loads the value stored at Addr. Puts the result in Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 356 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), Addr, assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LegalityPredicates::isPointer(), and isValid().

Referenced by llvm::CombinerHelper::applySextInRegOfLoad(), buildLoad(), llvm::LegalizerHelper::lowerLoad(), and llvm::LegalizerHelper::narrowScalar().

◆ buildLShr()

MachineInstrBuilder llvm::MachineIRBuilder::buildLShr ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

◆ buildMaskLowPtrBits()

MachineInstrBuilder MachineIRBuilder::buildMaskLowPtrBits ( const DstOp Res,
const SrcOp Op0,
uint32_t  NumBits 
)

Build and insert Res = G_PTRMASK Op0, G_CONSTANT (1 << NumBits) - 1.

This clears the low bits of a pointer operand without destroying its pointer properties. This has the effect of rounding the address down to a specified alignment in bits.

Precondition
setBasicBlock or setMI must have been called.
Res and Op0 must be generic virtual registers with pointer type.
NumBits must be an integer representing the number of low bits to be cleared in Op0.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 208 of file MachineIRBuilder.cpp.

References buildConstant(), buildPtrMask(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getSizeInBits(), and llvm::LLT::scalar().

◆ buildMemCpy()

MachineInstrBuilder llvm::MachineIRBuilder::buildMemCpy ( const SrcOp DstPtr,
const SrcOp SrcPtr,
const SrcOp Size,
MachineMemOperand DstMMO,
MachineMemOperand SrcMMO 
)
inline

◆ buildMemTransferInst()

MachineInstrBuilder llvm::MachineIRBuilder::buildMemTransferInst ( unsigned  Opcode,
const SrcOp DstPtr,
const SrcOp SrcPtr,
const SrcOp Size,
MachineMemOperand DstMMO,
MachineMemOperand SrcMMO 
)
inline

Build and insert G_MEMCPY or G_MEMMOVE.

Definition at line 1828 of file MachineIRBuilder.h.

References llvm::MachineInstrBuilder::addMemOperand(), buildInstr(), and llvm::Check::Size.

Referenced by buildMemCpy().

◆ buildMerge() [1/2]

MachineInstrBuilder MachineIRBuilder::buildMerge ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_MERGE_VALUES Op0, ...

G_MERGE_VALUES combines the input elements contiguously into a larger register.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input registers.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 586 of file MachineIRBuilder.cpp.

References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShuffleVector(), buildSequence(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerBitcast(), llvm::X86CallLowering::lowerCall(), llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarMul(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), and llvm::LegalizerHelper::widenWithUnmerge().

◆ buildMerge() [2/2]

MachineInstrBuilder MachineIRBuilder::buildMerge ( const DstOp Res,
std::initializer_list< SrcOp Ops 
)

Definition at line 597 of file MachineIRBuilder.cpp.

References assert(), and buildInstr().

◆ buildMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildMul ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_MUL Op0, Op1.

G_MUL sets Res to the sum of integer parameters Op0 and Op1, truncated to their width.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same (scalar or vector) type).
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1421 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::bitcastExtractVectorElt(), getMemsetValue(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::LegalizerHelper::lower(), and llvm::LegalizerHelper::lowerSMULH_UMULH().

◆ buildNeg()

MachineInstrBuilder llvm::MachineIRBuilder::buildNeg ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert integer negation Zero = G_CONSTANT 0 Res = G_SUB Zero, Op0.

Definition at line 1543 of file MachineIRBuilder.h.

References buildConstant(), buildInstr(), and getMRI().

◆ buildNot()

MachineInstrBuilder llvm::MachineIRBuilder::buildNot ( const DstOp Dst,
const SrcOp Src0 
)
inline

◆ buildOr()

MachineInstrBuilder llvm::MachineIRBuilder::buildOr ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

◆ buildPtrAdd()

MachineInstrBuilder MachineIRBuilder::buildPtrAdd ( const DstOp Res,
const SrcOp Op0,
const SrcOp Op1 
)

Build and insert Res = G_PTR_ADD Op0, Op1.

G_PTR_ADD adds Op1 addressible units to the pointer specified by Op0, storing the resulting pointer in Res. Addressible units are typically bytes but this can vary between targets.

Precondition
setBasicBlock or setMI must have been called.
Res and Op0 must be generic virtual registers with pointer type.
Op1 must be a generic virtual register with scalar type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 182 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::LegalityPredicates::isPointer(), and llvm::LegalityPredicates::isScalar().

Referenced by llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), buildLoadFromOffset(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerStore(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), and materializePtrAdd().

◆ buildPtrMask()

MachineInstrBuilder llvm::MachineIRBuilder::buildPtrMask ( const DstOp Res,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res = G_PTRMASK Op0, Op1.

Definition at line 479 of file MachineIRBuilder.h.

References buildInstr().

Referenced by buildMaskLowPtrBits().

◆ buildPtrToInt()

MachineInstrBuilder llvm::MachineIRBuilder::buildPtrToInt ( const DstOp Dst,
const SrcOp Src 
)
inline

◆ buildRotateLeft()

MachineInstrBuilder llvm::MachineIRBuilder::buildRotateLeft ( const DstOp Dst,
const SrcOp Src,
const SrcOp Amt 
)
inline

Build and insert Dst = G_ROTL Src, Amt.

Definition at line 1866 of file MachineIRBuilder.h.

References buildInstr().

◆ buildRotateRight()

MachineInstrBuilder llvm::MachineIRBuilder::buildRotateRight ( const DstOp Dst,
const SrcOp Src,
const SrcOp Amt 
)
inline

Build and insert Dst = G_ROTR Src, Amt.

Definition at line 1860 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyTruncStoreMerge().

◆ buildSAdde()

MachineInstrBuilder llvm::MachineIRBuilder::buildSAdde ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_SADDE Op0, Op1, CarryInp.

Definition at line 565 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSAddo()

MachineInstrBuilder llvm::MachineIRBuilder::buildSAddo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_SADDO Op0, Op1.

Definition at line 524 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSbfx()

MachineInstrBuilder llvm::MachineIRBuilder::buildSbfx ( const DstOp Dst,
const SrcOp Src,
const SrcOp LSB,
const SrcOp Width 
)
inline

Build and insert Dst = G_SBFX Src, LSB, Width.

Definition at line 1848 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSelect()

MachineInstrBuilder MachineIRBuilder::buildSelect ( const DstOp Res,
const SrcOp Tst,
const SrcOp Op0,
const SrcOp Op1,
Optional< unsigned >  Flags = None 
)

Build and insert a Res = G_SELECT Tst, Op0, Op1.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same type.
Tst must be a generic virtual register with scalar, pointer or vector type. If vector then it must have the same number of elements as the other parameters.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 764 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::LegalizerHelper::fewerElementsVectorSelect(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerIntrinsicRound(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUITOFP(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarSelect(), and llvm::LegalizerHelper::narrowScalarShift().

◆ buildSequence()

void MachineIRBuilder::buildSequence ( Register  Res,
ArrayRef< Register Ops,
ArrayRef< uint64_t Indices 
)

Build and insert instructions to put Ops together at the specified p Indices to form a larger register.

If the types of the input registers are uniform and cover the entirity of Res then a G_MERGE_VALUES will be produced. Otherwise an IMPLICIT_DEF followed by a sequence of G_INSERT instructions.

Precondition
setBasicBlock or setMI must have been called.
The final element of the sequence must not extend past the end of the destination register.
The bits defined by each Op (derived from index and scalar size) must not overlap.
Indices must be in ascending order of bit position.

Definition at line 541 of file MachineIRBuilder.cpp.

References assert(), buildInsert(), buildMerge(), buildUndef(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::ArrayRef< T >::empty(), getMRI(), llvm::LLT::getSizeInBits(), llvm::Intrinsic::getType(), llvm::MachineRegisterInfo::getType(), i, llvm::is_sorted(), isValid(), and llvm::ArrayRef< T >::size().

◆ buildSExt()

MachineInstrBuilder MachineIRBuilder::buildSExt ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_SEXT Op.

G_SEXT produces a register of the specified width, with bits 0 to sizeof(Ty) * 8 set to Op. The remaining bits are duplicated from the high bit of Op (i.e. 2s-complement sign extended).

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Op must be smaller than Res
Returns
The newly created instruction.

Definition at line 419 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizerHelper::narrowScalar().

◆ buildSExtInReg()

MachineInstrBuilder llvm::MachineIRBuilder::buildSExtInReg ( const DstOp Res,
const SrcOp Op,
int64_t  ImmOp 
)
inline

Build and insert Res = G_SEXT_INREG Op, ImmOp.

Definition at line 611 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyAshShlToSextInreg(), llvm::LegalizerHelper::fewerElementsVectorSextInReg(), and llvm::LegalizerHelper::lowerLoad().

◆ buildSExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_SEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 472 of file MachineIRBuilder.cpp.

References buildExtOrTrunc().

◆ buildShl()

MachineInstrBuilder llvm::MachineIRBuilder::buildShl ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

◆ buildShuffleSplat()

MachineInstrBuilder MachineIRBuilder::buildShuffleSplat ( const DstOp Res,
const SrcOp Src 
)

Build and insert a vector splat of a scalar Src using a G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom.

Precondition
setBasicBlock or setMI must have been called.
Src must have the same type as the element type of Dst
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 657 of file MachineIRBuilder.cpp.

References assert(), buildConstant(), buildInsertVectorElement(), buildShuffleVector(), buildUndef(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), and llvm::LLT::scalar().

Referenced by llvm::LegalizerHelper::lowerSelect().

◆ buildShuffleVector()

MachineInstrBuilder MachineIRBuilder::buildShuffleVector ( const DstOp Res,
const SrcOp Src1,
const SrcOp Src2,
ArrayRef< int Mask 
)

Build and insert Res = G_SHUFFLE_VECTOR Src1, Src2, Mask.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 669 of file MachineIRBuilder.cpp.

References llvm::MachineFunction::allocateShuffleMask(), assert(), buildInstr(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMF(), getMRI(), llvm::LLT::getNumElements(), and llvm::BitmaskEnumDetail::Mask().

Referenced by buildShuffleSplat(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), and llvm::LegalizerHelper::moreElementsVectorShuffle().

◆ buildSITOFP()

MachineInstrBuilder llvm::MachineIRBuilder::buildSITOFP ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_SITOFP Src0.

Definition at line 1680 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFFloor(), and llvm::LegalizerHelper::lowerFPOWI().

◆ buildSMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildSMax ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

◆ buildSMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildSMin ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_SMIN Op0, Op1.

Definition at line 1695 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerAddSubSatToMinMax(), and llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16().

◆ buildSMulH()

MachineInstrBuilder llvm::MachineIRBuilder::buildSMulH ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1433 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSplatVector()

MachineInstrBuilder MachineIRBuilder::buildSplatVector ( const DstOp Res,
const SrcOp Src 
)

Build and insert Res = G_BUILD_VECTOR with Src replicated to fill the number of elements.

Definition at line 641 of file MachineIRBuilder.cpp.

References buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().

Referenced by llvm::CSEMIRBuilder::buildConstant(), buildConstant(), llvm::CSEMIRBuilder::buildFConstant(), buildFConstant(), and getMemsetValue().

◆ buildSSube()

MachineInstrBuilder llvm::MachineIRBuilder::buildSSube ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_SSUBE Op0, Op1, CarryInp.

Definition at line 573 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSSubo()

MachineInstrBuilder llvm::MachineIRBuilder::buildSSubo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_SUBO Op0, Op1.

Definition at line 530 of file MachineIRBuilder.h.

References buildInstr().

◆ buildStore() [1/2]

MachineInstrBuilder MachineIRBuilder::buildStore ( const SrcOp Val,
const SrcOp Addr,
MachineMemOperand MMO 
)

◆ buildStore() [2/2]

MachineInstrBuilder MachineIRBuilder::buildStore ( const SrcOp Val,
const SrcOp Addr,
MachinePointerInfo  PtrInfo,
Align  Alignment,
MachineMemOperand::Flags  MMOFlags = MachineMemOperand::MONone,
const AAMDNodes AAInfo = AAMDNodes() 
)

◆ buildSub()

MachineInstrBuilder llvm::MachineIRBuilder::buildSub ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

◆ buildTrunc()

MachineInstrBuilder MachineIRBuilder::buildTrunc ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_TRUNC Op.

G_TRUNC extracts the low bits of a type. For a vector type each element is truncated independently before being packed into the destination.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Res must be smaller than Op
Returns
The newly created instruction.

Definition at line 737 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShl(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), llvm::CallLowering::IncomingValueHandler::assignValueToReg(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarSrc(), and llvm::LegalizerHelper::widenScalar().

◆ buildUAdde()

MachineInstrBuilder llvm::MachineIRBuilder::buildUAdde ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_UADDE Op0, Op1, CarryIn.

G_UADDE sets Res to Op0 + Op1 + CarryIn (truncated to the bit width) and sets CarryOut to 1 if the result overflowed in unsigned arithmetic.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same scalar type.
CarryOut and CarryIn must be generic virtual registers with the same scalar type (typically s1)
Returns
The newly created instruction.

Definition at line 549 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUAddo()

MachineInstrBuilder llvm::MachineIRBuilder::buildUAddo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_UADDO Op0, Op1.

G_UADDO sets Res to Op0 + Op1 (truncated to the bit width) and sets CarryOut to 1 if the result overflowed in unsigned arithmetic.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same scalar type.
CarryOut must be generic virtual register with scalar type (typically s1)
Returns
The newly created instruction.

Definition at line 512 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUbfx()

MachineInstrBuilder llvm::MachineIRBuilder::buildUbfx ( const DstOp Dst,
const SrcOp Src,
const SrcOp LSB,
const SrcOp Width 
)
inline

Build and insert Dst = G_UBFX Src, LSB, Width.

Definition at line 1854 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUITOFP()

MachineInstrBuilder llvm::MachineIRBuilder::buildUITOFP ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_UITOFP Src0.

Definition at line 1675 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerSITOFP().

◆ buildUMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildUMax ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_UMAX Op0, Op1.

Definition at line 1713 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildUMin ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_UMIN Op0, Op1.

Definition at line 1707 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerAddSubSatToMinMax().

◆ buildUMulH()

MachineInstrBuilder llvm::MachineIRBuilder::buildUMulH ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Definition at line 1427 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUndef()

MachineInstrBuilder MachineIRBuilder::buildUndef ( const DstOp Res)

◆ buildUnmerge() [1/3]

MachineInstrBuilder MachineIRBuilder::buildUnmerge ( ArrayRef< LLT Res,
const SrcOp Op 
)

Build and insert Res0, ...

= G_UNMERGE_VALUES Op

G_UNMERGE_VALUES splits contiguous bits of the input into multiple

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input registers.
The type of all Res registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 603 of file MachineIRBuilder.cpp.

References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), buildUnmerge(), extractParts(), llvm::LegalizerHelper::fewerElementsVectorMulo(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarCTPOP(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), and llvm::LegalizerHelper::widenWithUnmerge().

◆ buildUnmerge() [2/3]

MachineInstrBuilder MachineIRBuilder::buildUnmerge ( ArrayRef< Register Res,
const SrcOp Op 
)

◆ buildUnmerge() [3/3]

MachineInstrBuilder MachineIRBuilder::buildUnmerge ( LLT  Res,
const SrcOp Op 
)

Build and insert an unmerge of Res sized pieces to cover Op.

Definition at line 613 of file MachineIRBuilder.cpp.

References buildUnmerge(), getMRI(), llvm::LLT::getSizeInBits(), and I.

◆ buildURem()

MachineInstrBuilder llvm::MachineIRBuilder::buildURem ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
Optional< unsigned >  Flags = None 
)
inline

Build and insert Res = G_UREM Op0, Op1.

Definition at line 1440 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyRotateOutOfRange(), and llvm::LegalizerHelper::lowerFunnelShiftAsShifts().

◆ buildUSube()

MachineInstrBuilder llvm::MachineIRBuilder::buildUSube ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_USUBE Op0, Op1, CarryInp.

Definition at line 557 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUSubo()

MachineInstrBuilder llvm::MachineIRBuilder::buildUSubo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_USUBO Op0, Op1.

Definition at line 518 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceAdd ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_ADD Src.

Definition at line 1783 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceAnd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceAnd ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_AND Src.

Definition at line 1793 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFAdd ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_FADD Src.

ScalarIn is the scalar accumulator input to the reduction operation of VecIn.

Definition at line 1757 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMax ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_FMAX Src.

Definition at line 1774 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMin ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_FMIN Src.

Definition at line 1779 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMul ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_FMUL Src.

ScalarIn is the scalar accumulator input to the reduction operation of VecIn.

Definition at line 1767 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceMul ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_MUL Src.

Definition at line 1788 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceOr()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceOr ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_OR Src.

Definition at line 1798 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSeqFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSeqFAdd ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_SEQ_FADD ScalarIn, VecIn.

ScalarIn is the scalar accumulator input to start the sequential reduction operation of VecIn.

Definition at line 1735 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSeqFMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSeqFMul ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_SEQ_FMUL ScalarIn, VecIn.

ScalarIn is the scalar accumulator input to start the sequential reduction operation of VecIn.

Definition at line 1746 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSMax ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_SMAX Src.

Definition at line 1808 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSMin ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_SMIN Src.

Definition at line 1813 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceUMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceUMax ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_UMAX Src.

Definition at line 1818 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceUMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceUMin ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_UMIN Src.

Definition at line 1823 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceXor()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceXor ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_XOR Src.

Definition at line 1803 of file MachineIRBuilder.h.

References buildInstr().

◆ buildXor()

MachineInstrBuilder llvm::MachineIRBuilder::buildXor ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

◆ buildZExt()

MachineInstrBuilder MachineIRBuilder::buildZExt ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_ZEXT Op.

G_ZEXT produces a register of the specified width, with bits 0 to sizeof(Ty) * 8 set to Op. The remaining bits are 0. For a vector register, each element is extended individually.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Op must be smaller than Res
Returns
The newly created instruction.

Definition at line 424 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerMergeValues(), llvm::AArch64CallLowering::lowerReturn(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), and llvm::LegalizerHelper::narrowScalar().

◆ buildZExtInReg()

MachineInstrBuilder MachineIRBuilder::buildZExtInReg ( const DstOp Res,
const SrcOp Op,
int64_t  ImmOp 
)

Build and inserts Res = G_AND Op, LowBitsSet(ImmOp) Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is emulated using G_AND.

Definition at line 487 of file MachineIRBuilder.cpp.

References buildAnd(), buildConstant(), llvm::DstOp::getLLTTy(), llvm::APInt::getLowBitsSet(), getMRI(), llvm::LLT::getScalarSizeInBits(), and llvm::BitmaskEnumDetail::Mask().

Referenced by llvm::LegalizerHelper::lowerStore().

◆ buildZExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_ZEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 477 of file MachineIRBuilder.cpp.

References buildExtOrTrunc().

Referenced by llvm::CombinerHelper::applyCombineP2IToI2P(), getMemsetValue(), and llvm::LegalizerHelper::widenScalar().

◆ getBoolExtOp()

unsigned MachineIRBuilder::getBoolExtOp ( bool  IsVec,
bool  IsFP 
) const

◆ getCSEInfo() [1/2]

GISelCSEInfo* llvm::MachineIRBuilder::getCSEInfo ( )
inline

Definition at line 297 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::CSEInfo.

Referenced by llvm::CSEMIRBuilder::buildInstr().

◆ getCSEInfo() [2/2]

const GISelCSEInfo* llvm::MachineIRBuilder::getCSEInfo ( ) const
inline

Definition at line 298 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::CSEInfo.

◆ getDataLayout()

const DataLayout& llvm::MachineIRBuilder::getDataLayout ( ) const
inline

◆ getDebugLoc()

const DebugLoc& llvm::MachineIRBuilder::getDebugLoc ( )
inline

Get the current instruction's debug location.

Definition at line 358 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::DL.

◆ getDL()

const DebugLoc& llvm::MachineIRBuilder::getDL ( )
inline

◆ getInsertPt()

MachineBasicBlock::iterator llvm::MachineIRBuilder::getInsertPt ( )
inline

◆ getMBB() [1/2]

MachineBasicBlock& llvm::MachineIRBuilder::getMBB ( )
inline

Definition at line 292 of file MachineIRBuilder.h.

References getMBB().

◆ getMBB() [2/2]

const MachineBasicBlock& llvm::MachineIRBuilder::getMBB ( ) const
inline

◆ getMF() [1/2]

MachineFunction& llvm::MachineIRBuilder::getMF ( )
inline

Getter for the function we currently build.

Definition at line 262 of file MachineIRBuilder.h.

References assert(), and llvm::MachineIRBuilderState::MF.

Referenced by llvm::CombinerHelper::applyCombineConstantFoldFpUnary(), llvm::CombinerHelper::applySextInRegOfLoad(), buildAnyextOrCopy(), buildConstant(), buildDirectDbgValue(), buildFConstant(), buildIndirectDbgValue(), buildInstrNoInsert(), buildLoad(), buildLoadFromOffset(), buildShuffleVector(), buildStore(), llvm::CallLowering::ValueHandler::copyArgumentMemory(), llvm::createLibcall(), llvm::createMemLibcall(), llvm::LegalizerHelper::createStackTemporary(), createTuple(), llvm::CallLowering::determineAndHandleAssignments(), getBoolExtOp(), getDataLayout(), llvm::CombinerHelper::getTargetLowering(), llvm::CallLowering::handleAssignments(), handleMustTailForwardedRegisters(), llvm::CallLowering::insertSRetLoads(), llvm::CallLowering::insertSRetOutgoingArgument(), llvm::CallLowering::insertSRetStores(), llvm::AArch64CallLowering::isEligibleForTailCallOptimization(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::AMDGPULegalizerInfo::legalizeMinNumMaxNum(), llvm::LegalizerHelper::libcall(), llvm::MipsCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::CallLowering::lowerCall(), llvm::PPCCallLowering::lowerFormalArguments(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerFormalArguments(), llvm::M68kCallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerFormalArguments(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::MipsCallLowering::lowerReturn(), llvm::X86CallLowering::lowerReturn(), llvm::M68kCallLowering::lowerReturn(), llvm::ARMCallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::lowerStore(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::CombinerHelper::matchCombineConstPtrAddToI2P(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchPtrAddZero(), llvm::AMDGPUCallLowering::passSpecialInputs(), llvm::LegalizerHelper::reduceLoadStoreWidth(), setInsertPt(), setMBB(), llvm::CombinerHelper::tryCombineMemCpyFamily(), llvm::AArch64GISelUtils::tryEmitBZero(), llvm::CombinerHelper::tryEmitMemcpyInline(), and llvm::LegalizerHelper::widenScalar().

◆ getMF() [2/2]

const MachineFunction& llvm::MachineIRBuilder::getMF ( ) const
inline

Definition at line 267 of file MachineIRBuilder.h.

References assert(), and llvm::MachineIRBuilderState::MF.

◆ getMRI() [1/2]

MachineRegisterInfo* llvm::MachineIRBuilder::getMRI ( )
inline

◆ getMRI() [2/2]

const MachineRegisterInfo* llvm::MachineIRBuilder::getMRI ( ) const
inline

Definition at line 281 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::MRI.

◆ getState()

MachineIRBuilderState& llvm::MachineIRBuilder::getState ( )
inline

Getter for the State.

Definition at line 284 of file MachineIRBuilder.h.

◆ getTII()

const TargetInstrInfo& llvm::MachineIRBuilder::getTII ( )
inline

◆ insertInstr()

MachineInstrBuilder MachineIRBuilder::insertInstr ( MachineInstrBuilder  MIB)

◆ materializePtrAdd()

Optional< MachineInstrBuilder > MachineIRBuilder::materializePtrAdd ( Register Res,
Register  Op0,
const LLT  ValueTy,
uint64_t  Value 
)

Materialize and insert Res = G_PTR_ADD Op0, (G_CONSTANT Value)

G_PTR_ADD adds Value bytes to the pointer specified by Op0, storing the resulting pointer in Res. If Value is zero then no G_PTR_ADD or G_CONSTANT will be created and

Precondition
Op0 will be assigned to Res.
setBasicBlock or setMI must have been called.
Op0 must be a generic virtual register with pointer type.
ValueTy must be a scalar type.
Res must be 0. This is to detect confusion between materializePtrAdd() and buildPtrAdd().
Postcondition
Res will either be a new generic virtual register of the same type as Op0 or Op0 itself.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 193 of file MachineIRBuilder.cpp.

References assert(), buildConstant(), buildPtrAdd(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), getMRI(), llvm::Intrinsic::getType(), llvm::LLT::isScalar(), and llvm::None.

Referenced by llvm::CallLowering::insertSRetLoads(), llvm::CallLowering::insertSRetStores(), and llvm::LegalizerHelper::reduceLoadStoreWidth().

◆ recordInsertion()

void llvm::MachineIRBuilder::recordInsertion ( MachineInstr InsertedInstr) const
inlineprotected

◆ setChangeObserver()

void llvm::MachineIRBuilder::setChangeObserver ( GISelChangeObserver Observer)
inline

Definition at line 347 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::Observer.

Referenced by MachineIRBuilder().

◆ setCSEInfo()

void llvm::MachineIRBuilder::setCSEInfo ( GISelCSEInfo Info)
inline

Definition at line 315 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::CSEInfo, and Info.

◆ setDebugLoc()

void llvm::MachineIRBuilder::setDebugLoc ( const DebugLoc DL)
inline

Set the debug location to DL for all the next build instructions.

Definition at line 355 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::DL, and DL.

Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), MachineIRBuilder(), and setInstrAndDebugLoc().

◆ setInsertPt()

void llvm::MachineIRBuilder::setInsertPt ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  II 
)
inline

◆ setInstr()

void llvm::MachineIRBuilder::setInstr ( MachineInstr MI)
inline

◆ setInstrAndDebugLoc()

void llvm::MachineIRBuilder::setInstrAndDebugLoc ( MachineInstr MI)
inline

Set the insertion point to before MI, and set the debug loc to MI's loc.

Precondition
MI must be in getMF().

Definition at line 342 of file MachineIRBuilder.h.

References MI, setDebugLoc(), and setInstr().

Referenced by applyAdjustICmpImmAndPred(), llvm::CombinerHelper::applyAshShlToSextInreg(), llvm::CombinerHelper::applyBuildFn(), llvm::CombinerHelper::applyBuildFnNoErase(), llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), llvm::CombinerHelper::applyCombineConstantFoldFpUnary(), llvm::CombinerHelper::applyCombineConstPtrAddToI2P(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtOfExt(), llvm::CombinerHelper::applyCombineMulByNegativeOne(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShl(), llvm::CombinerHelper::applyCombineUnmergeConstant(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddZero(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applySextInRegOfLoad(), llvm::CombinerHelper::applySextTruncSextLoad(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyTruncStoreMerge(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::LegalizerHelper::legalizeInstrStep(), llvm::LegalizerHelper::lowerRotate(), lowerVectorFCMP(), llvm::LegalizerHelper::moreElementsVectorShuffle(), and llvm::AArch64GISelUtils::tryEmitBZero().

◆ setMBB()

void llvm::MachineIRBuilder::setMBB ( MachineBasicBlock MBB)
inline

◆ setMF()

void MachineIRBuilder::setMF ( MachineFunction MF)

◆ stopObservingChanges()

void llvm::MachineIRBuilder::stopObservingChanges ( )
inline

◆ validateBinaryOp()

void MachineIRBuilder::validateBinaryOp ( const LLT  Res,
const LLT  Op0,
const LLT  Op1 
)
protected

Definition at line 170 of file MachineIRBuilder.cpp.

References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().

Referenced by buildInstr().

◆ validateSelectOp()

void MachineIRBuilder::validateSelectOp ( const LLT  ResTy,
const LLT  TstTy,
const LLT  Op0Ty,
const LLT  Op1Ty 
)
protected

◆ validateShiftOp()

void MachineIRBuilder::validateShiftOp ( const LLT  Res,
const LLT  Op0,
const LLT  Op1 
)
protected

Definition at line 176 of file MachineIRBuilder.cpp.

References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().

Referenced by buildInstr().

◆ validateTruncExt()

void MachineIRBuilder::validateTruncExt ( const LLT  Dst,
const LLT  Src,
bool  IsExtend 
)
protected

◆ validateUnaryOp()

void MachineIRBuilder::validateUnaryOp ( const LLT  Res,
const LLT  Op0 
)
protected

Definition at line 165 of file MachineIRBuilder.cpp.

References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().

Referenced by buildInstr().


The documentation for this class was generated from the following files: