LLVM  15.0.0git
Legalizer.cpp
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1 //===-- llvm/CodeGen/GlobalISel/Legalizer.cpp -----------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file This file implements the LegalizerHelper class to legalize individual
10 /// instructions and the LegalizePass wrapper pass for the primary
11 /// legalization.
12 //
13 //===----------------------------------------------------------------------===//
14 
29 #include "llvm/InitializePasses.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/Error.h"
32 
33 #define DEBUG_TYPE "legalizer"
34 
35 using namespace llvm;
36 
37 static cl::opt<bool>
38  EnableCSEInLegalizer("enable-cse-in-legalizer",
39  cl::desc("Should enable CSE in Legalizer"),
40  cl::Optional, cl::init(false));
41 
42 // This is a temporary hack, should be removed soon.
44  "allow-ginsert-as-artifact",
45  cl::desc("Allow G_INSERT to be considered an artifact. Hack around AMDGPU "
46  "test infinite loops."),
47  cl::Optional, cl::init(true));
48 
49 enum class DebugLocVerifyLevel {
50  None,
53 };
54 #ifndef NDEBUG
56  "verify-legalizer-debug-locs",
57  cl::desc("Verify that debug locations are handled"),
58  cl::values(
59  clEnumValN(DebugLocVerifyLevel::None, "none", "No verification"),
61  "Verify legalizations"),
63  "legalizations+artifactcombiners",
64  "Verify legalizations and artifact combines")),
66 #else
67 // Always disable it for release builds by preventing the observer from being
68 // installed.
70 #endif
71 
72 char Legalizer::ID = 0;
74  "Legalize the Machine IR a function's Machine IR", false,
75  false)
79  "Legalize the Machine IR a function's Machine IR", false,
80  false)
81 
83 
90 }
91 
92 void Legalizer::init(MachineFunction &MF) {
93 }
94 
95 static bool isArtifact(const MachineInstr &MI) {
96  switch (MI.getOpcode()) {
97  default:
98  return false;
99  case TargetOpcode::G_TRUNC:
100  case TargetOpcode::G_ZEXT:
101  case TargetOpcode::G_ANYEXT:
102  case TargetOpcode::G_SEXT:
103  case TargetOpcode::G_MERGE_VALUES:
104  case TargetOpcode::G_UNMERGE_VALUES:
105  case TargetOpcode::G_CONCAT_VECTORS:
106  case TargetOpcode::G_BUILD_VECTOR:
107  case TargetOpcode::G_EXTRACT:
108  return true;
109  case TargetOpcode::G_INSERT:
110  return AllowGInsertAsArtifact;
111  }
112 }
115 
116 namespace {
117 class LegalizerWorkListManager : public GISelChangeObserver {
118  InstListTy &InstList;
119  ArtifactListTy &ArtifactList;
120 #ifndef NDEBUG
122 #endif
123 
124 public:
125  LegalizerWorkListManager(InstListTy &Insts, ArtifactListTy &Arts)
126  : InstList(Insts), ArtifactList(Arts) {}
127 
128  void createdOrChangedInstr(MachineInstr &MI) {
129  // Only legalize pre-isel generic instructions.
130  // Legalization process could generate Target specific pseudo
131  // instructions with generic types. Don't record them
132  if (isPreISelGenericOpcode(MI.getOpcode())) {
133  if (isArtifact(MI))
134  ArtifactList.insert(&MI);
135  else
136  InstList.insert(&MI);
137  }
138  }
139 
140  void createdInstr(MachineInstr &MI) override {
141  LLVM_DEBUG(NewMIs.push_back(&MI));
142  createdOrChangedInstr(MI);
143  }
144 
145  void printNewInstrs() {
146  LLVM_DEBUG({
147  for (const auto *MI : NewMIs)
148  dbgs() << ".. .. New MI: " << *MI;
149  NewMIs.clear();
150  });
151  }
152 
153  void erasingInstr(MachineInstr &MI) override {
154  LLVM_DEBUG(dbgs() << ".. .. Erasing: " << MI);
155  InstList.remove(&MI);
156  ArtifactList.remove(&MI);
157  }
158 
159  void changingInstr(MachineInstr &MI) override {
160  LLVM_DEBUG(dbgs() << ".. .. Changing MI: " << MI);
161  }
162 
163  void changedInstr(MachineInstr &MI) override {
164  // When insts change, we want to revisit them to legalize them again.
165  // We'll consider them the same as created.
166  LLVM_DEBUG(dbgs() << ".. .. Changed MI: " << MI);
167  createdOrChangedInstr(MI);
168  }
169 };
170 } // namespace
171 
174  ArrayRef<GISelChangeObserver *> AuxObservers,
175  LostDebugLocObserver &LocObserver,
176  MachineIRBuilder &MIRBuilder) {
177  MIRBuilder.setMF(MF);
179 
180  // Populate worklists.
181  InstListTy InstList;
182  ArtifactListTy ArtifactList;
184  // Perform legalization bottom up so we can DCE as we legalize.
185  // Traverse BB in RPOT and within each basic block, add insts top down,
186  // so when we pop_back_val in the legalization process, we traverse bottom-up.
187  for (auto *MBB : RPOT) {
188  if (MBB->empty())
189  continue;
190  for (MachineInstr &MI : *MBB) {
191  // Only legalize pre-isel generic instructions: others don't have types
192  // and are assumed to be legal.
193  if (!isPreISelGenericOpcode(MI.getOpcode()))
194  continue;
195  if (isArtifact(MI))
196  ArtifactList.deferred_insert(&MI);
197  else
198  InstList.deferred_insert(&MI);
199  }
200  }
201  ArtifactList.finalize();
202  InstList.finalize();
203 
204  // This observer keeps the worklists updated.
205  LegalizerWorkListManager WorkListObserver(InstList, ArtifactList);
206  // We want both WorkListObserver as well as all the auxiliary observers (e.g.
207  // CSEInfo) to observe all changes. Use the wrapper observer.
208  GISelObserverWrapper WrapperObserver(&WorkListObserver);
209  for (GISelChangeObserver *Observer : AuxObservers)
210  WrapperObserver.addObserver(Observer);
211 
212  // Now install the observer as the delegate to MF.
213  // This will keep all the observers notified about new insertions/deletions.
214  RAIIMFObsDelInstaller Installer(MF, WrapperObserver);
215  LegalizerHelper Helper(MF, LI, WrapperObserver, MIRBuilder);
216  LegalizationArtifactCombiner ArtCombiner(MIRBuilder, MRI, LI);
217  bool Changed = false;
219  do {
220  LLVM_DEBUG(dbgs() << "=== New Iteration ===\n");
221  assert(RetryList.empty() && "Expected no instructions in RetryList");
222  unsigned NumArtifacts = ArtifactList.size();
223  while (!InstList.empty()) {
224  MachineInstr &MI = *InstList.pop_back_val();
225  assert(isPreISelGenericOpcode(MI.getOpcode()) &&
226  "Expecting generic opcode");
227  if (isTriviallyDead(MI, MRI)) {
228  eraseInstr(MI, MRI, &LocObserver);
229  continue;
230  }
231 
232  // Do the legalization for this instruction.
233  auto Res = Helper.legalizeInstrStep(MI, LocObserver);
234  // Error out if we couldn't legalize this instruction. We may want to
235  // fall back to DAG ISel instead in the future.
237  // Move illegal artifacts to RetryList instead of aborting because
238  // legalizing InstList may generate artifacts that allow
239  // ArtifactCombiner to combine away them.
240  if (isArtifact(MI)) {
241  LLVM_DEBUG(dbgs() << ".. Not legalized, moving to artifacts retry\n");
242  assert(NumArtifacts == 0 &&
243  "Artifacts are only expected in instruction list starting the "
244  "second iteration, but each iteration starting second must "
245  "start with an empty artifacts list");
246  (void)NumArtifacts;
247  RetryList.push_back(&MI);
248  continue;
249  }
251  return {Changed, &MI};
252  }
253  WorkListObserver.printNewInstrs();
254  LocObserver.checkpoint();
255  Changed |= Res == LegalizerHelper::Legalized;
256  }
257  // Try to combine the instructions in RetryList again if there
258  // are new artifacts. If not, stop legalizing.
259  if (!RetryList.empty()) {
260  if (!ArtifactList.empty()) {
261  while (!RetryList.empty())
262  ArtifactList.insert(RetryList.pop_back_val());
263  } else {
264  LLVM_DEBUG(dbgs() << "No new artifacts created, not retrying!\n");
266  return {Changed, RetryList.front()};
267  }
268  }
269  LocObserver.checkpoint();
270  while (!ArtifactList.empty()) {
271  MachineInstr &MI = *ArtifactList.pop_back_val();
272  assert(isPreISelGenericOpcode(MI.getOpcode()) &&
273  "Expecting generic opcode");
274  if (isTriviallyDead(MI, MRI)) {
275  eraseInstr(MI, MRI, &LocObserver);
276  continue;
277  }
278  SmallVector<MachineInstr *, 4> DeadInstructions;
279  LLVM_DEBUG(dbgs() << "Trying to combine: " << MI);
280  if (ArtCombiner.tryCombineInstruction(MI, DeadInstructions,
281  WrapperObserver)) {
282  WorkListObserver.printNewInstrs();
283  eraseInstrs(DeadInstructions, MRI, &LocObserver);
284  LocObserver.checkpoint(
285  VerifyDebugLocs ==
287  Changed = true;
288  continue;
289  }
290  // If this was not an artifact (that could be combined away), this might
291  // need special handling. Add it to InstList, so when it's processed
292  // there, it has to be legal or specially handled.
293  else {
294  LLVM_DEBUG(dbgs() << ".. Not combined, moving to instructions list\n");
295  InstList.insert(&MI);
296  }
297  }
298  } while (!InstList.empty());
299 
300  return {Changed, /*FailedOn*/ nullptr};
301 }
302 
304  // If the ISel pipeline failed, do not bother running that pass.
305  if (MF.getProperties().hasProperty(
307  return false;
308  LLVM_DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
309  init(MF);
310  const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
312  getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEWrapper();
313  MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
314 
315  const size_t NumBlocks = MF.size();
316 
317  std::unique_ptr<MachineIRBuilder> MIRBuilder;
318  GISelCSEInfo *CSEInfo = nullptr;
319  bool EnableCSE = EnableCSEInLegalizer.getNumOccurrences()
321  : TPC.isGISelCSEEnabled();
322  if (EnableCSE) {
323  MIRBuilder = std::make_unique<CSEMIRBuilder>();
324  CSEInfo = &Wrapper.get(TPC.getCSEConfig());
325  MIRBuilder->setCSEInfo(CSEInfo);
326  } else
327  MIRBuilder = std::make_unique<MachineIRBuilder>();
328 
330  if (EnableCSE && CSEInfo) {
331  // We want CSEInfo in addition to WorkListObserver to observe all changes.
332  AuxObservers.push_back(CSEInfo);
333  }
334  assert(!CSEInfo || !errorToBool(CSEInfo->verify()));
335  LostDebugLocObserver LocObserver(DEBUG_TYPE);
337  AuxObservers.push_back(&LocObserver);
338 
339  const LegalizerInfo &LI = *MF.getSubtarget().getLegalizerInfo();
340  MFResult Result =
341  legalizeMachineFunction(MF, LI, AuxObservers, LocObserver, *MIRBuilder);
342 
343  if (Result.FailedOn) {
344  reportGISelFailure(MF, TPC, MORE, "gisel-legalize",
345  "unable to legalize instruction", *Result.FailedOn);
346  return false;
347  }
348  // For now don't support if new blocks are inserted - we would need to fix the
349  // outer loop for that.
350  if (MF.size() != NumBlocks) {
351  MachineOptimizationRemarkMissed R("gisel-legalize", "GISelFailure",
352  MF.getFunction().getSubprogram(),
353  /*MBB=*/nullptr);
354  R << "inserting blocks is not supported yet";
355  reportGISelFailure(MF, TPC, MORE, R);
356  return false;
357  }
358 
359  if (LocObserver.getNumLostDebugLocs()) {
360  MachineOptimizationRemarkMissed R("gisel-legalize", "LostDebugLoc",
361  MF.getFunction().getSubprogram(),
362  /*MBB=*/&*MF.begin());
363  R << "lost "
364  << ore::NV("NumLostDebugLocs", LocObserver.getNumLostDebugLocs())
365  << " debug locations during pass";
366  reportGISelWarning(MF, TPC, MORE, R);
367  // Example remark:
368  // --- !Missed
369  // Pass: gisel-legalize
370  // Name: GISelFailure
371  // DebugLoc: { File: '.../legalize-urem.mir', Line: 1, Column: 0 }
372  // Function: test_urem_s32
373  // Args:
374  // - String: 'lost '
375  // - NumLostDebugLocs: '1'
376  // - String: ' debug locations during pass'
377  // ...
378  }
379 
380  // If for some reason CSE was not enabled, make sure that we invalidate the
381  // CSEInfo object (as we currently declare that the analysis is preserved).
382  // The next time get on the wrapper is called, it will force it to recompute
383  // the analysis.
384  if (!EnableCSE)
385  Wrapper.setComputed(false);
386  return Result.Changed;
387 }
llvm::MachineIRBuilder::setMF
void setMF(MachineFunction &MF)
Definition: MachineIRBuilder.cpp:24
llvm::MachineFunctionProperties::hasProperty
bool hasProperty(Property P) const
Definition: MachineFunction.h:176
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::LostDebugLocObserver
Definition: LostDebugLocObserver.h:19
llvm::GISelWorkList::deferred_insert
void deferred_insert(MachineInstr *I)
Definition: GISelWorkList.h:50
llvm::GISelCSEAnalysisWrapperPass
The actual analysis pass wrapper.
Definition: CSEInfo.h:220
llvm::Legalizer::ID
static char ID
Definition: Legalizer.h:38
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::SmallVector< MachineInstr *, 4 >
Wrapper
amdgpu aa AMDGPU Address space based Alias Analysis Wrapper
Definition: AMDGPUAliasAnalysis.cpp:31
llvm::isPreISelGenericOpcode
bool isPreISelGenericOpcode(unsigned Opcode)
Check whether the given Opcode is a generic opcode that is not supposed to appear after ISel.
Definition: TargetOpcodes.h:30
llvm::Function::getSubprogram
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1573
llvm::GISelCSEInfo
The CSE Analysis object.
Definition: CSEInfo.h:69
llvm::MachineOptimizationRemarkEmitter
The optimization diagnostic interface.
Definition: MachineOptimizationRemarkEmitter.h:151
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
Error.h
OptimizationRemarkEmitter.h
llvm::LegalizerHelper::UnableToLegalize
@ UnableToLegalize
Some kind of error has occurred and we could not legalize this instruction.
Definition: LegalizerHelper.h:71
llvm::eraseInstrs
void eraseInstrs(ArrayRef< MachineInstr * > DeadInstrs, MachineRegisterInfo &MRI, LostDebugLocObserver *LocObserver=nullptr)
Definition: Utils.cpp:1320
EnableCSEInLegalizer
static cl::opt< bool > EnableCSEInLegalizer("enable-cse-in-legalizer", cl::desc("Should enable CSE in Legalizer"), cl::Optional, cl::init(false))
IR
Legalize the Machine IR a function s Machine IR
Definition: Legalizer.cpp:79
llvm::ore::NV
DiagnosticInfoOptimizationBase::Argument NV
Definition: OptimizationRemarkEmitter.h:136
llvm::getSelectionDAGFallbackAnalysisUsage
void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.
Definition: Utils.cpp:879
llvm::SmallVectorImpl::pop_back_val
LLVM_NODISCARD T pop_back_val()
Definition: SmallVector.h:654
llvm::reportGISelWarning
void reportGISelWarning(MachineFunction &MF, const TargetPassConfig &TPC, MachineOptimizationRemarkEmitter &MORE, MachineOptimizationRemarkMissed &R)
Report an ISel warning as a missed optimization remark to the LLVMContext's diagnostic stream.
Definition: Utils.cpp:261
llvm::LegalizerHelper
Definition: LegalizerHelper.h:46
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:103
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
LegalizationArtifactCombiner.h
llvm::TargetPassConfig::isGISelCSEEnabled
virtual bool isGISelCSEEnabled() const
Check whether continuous CSE should be enabled in GISel passes.
Definition: TargetPassConfig.cpp:1563
a
=0.0 ? 0.0 :(a > 0.0 ? 1.0 :-1.0) a
Definition: README.txt:489
VerifyDebugLocs
static cl::opt< DebugLocVerifyLevel > VerifyDebugLocs("verify-legalizer-debug-locs", cl::desc("Verify that debug locations are handled"), cl::values(clEnumValN(DebugLocVerifyLevel::None, "none", "No verification"), clEnumValN(DebugLocVerifyLevel::Legalizations, "legalizations", "Verify legalizations"), clEnumValN(DebugLocVerifyLevel::LegalizationsAndArtifactCombiners, "legalizations+artifactcombiners", "Verify legalizations and artifact combines")), cl::init(DebugLocVerifyLevel::Legalizations))
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
CSEInfo.h
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:650
LostDebugLocObserver.h
llvm::Legalizer
Definition: Legalizer.h:36
DebugLocVerifyLevel::LegalizationsAndArtifactCombiners
@ LegalizationsAndArtifactCombiners
llvm::LostDebugLocObserver::checkpoint
void checkpoint(bool CheckDebugLocs=true)
Call this to indicate that it's a good point to assess whether locations have been lost.
Definition: LostDebugLocObserver.cpp:70
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
Utils.h
llvm::MachineFunction::getProperties
const MachineFunctionProperties & getProperties() const
Get the function properties.
Definition: MachineFunction.h:731
false
Definition: StackSlotColoring.cpp:141
DebugLocVerifyLevel
DebugLocVerifyLevel
Definition: Legalizer.cpp:49
CSEMIRBuilder.h
llvm::MachineFunction::size
unsigned size() const
Definition: MachineFunction.h:832
INITIALIZE_PASS_BEGIN
INITIALIZE_PASS_BEGIN(Legalizer, DEBUG_TYPE, "Legalize the Machine IR a function's Machine IR", false, false) INITIALIZE_PASS_END(Legalizer
llvm::cl::Option::getNumOccurrences
int getNumOccurrences() const
Definition: CommandLine.h:395
llvm::MachineFunction::begin
iterator begin()
Definition: MachineFunction.h:822
DebugLocVerifyLevel::None
@ None
llvm::None
const NoneType None
Definition: None.h:24
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::LostDebugLocObserver::getNumLostDebugLocs
unsigned getNumLostDebugLocs() const
Definition: LostDebugLocObserver.h:28
INITIALIZE_PASS_END
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:58
MachineOptimizationRemarkEmitter.h
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:640
llvm::cl::opt< bool >
llvm::cl::values
ValuesClass values(OptsTy... Options)
Helper to build a ValuesClass by forwarding a variable number of arguments as an initializer list to ...
Definition: CommandLine.h:685
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:219
llvm::eraseInstr
void eraseInstr(MachineInstr &MI, MachineRegisterInfo &MRI, LostDebugLocObserver *LocObserver=nullptr)
Definition: Utils.cpp:1335
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::MachineOptimizationRemarkMissed
Diagnostic information for missed-optimization remarks.
Definition: MachineOptimizationRemarkEmitter.h:83
INITIALIZE_PASS_DEPENDENCY
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
s
multiplies can be turned into SHL s
Definition: README.txt:370
llvm::Legalizer::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition: Legalizer.cpp:303
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:432
llvm::Legalizer::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Definition: Legalizer.cpp:84
TargetPassConfig.h
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:567
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:82
llvm::errorToBool
bool errorToBool(Error Err)
Helper for converting an Error to a bool.
Definition: Error.h:1066
llvm::isTriviallyDead
bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI)
Check whether an instruction MI is dead: it only defines dead virtual registers, and doesn't have oth...
Definition: Utils.cpp:211
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::GISelWorkList::pop_back_val
MachineInstr * pop_back_val()
Definition: GISelWorkList.h:102
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
AllowGInsertAsArtifact
static cl::opt< bool > AllowGInsertAsArtifact("allow-ginsert-as-artifact", cl::desc("Allow G_INSERT to be considered an artifact. Hack around AMDGPU " "test infinite loops."), cl::Optional, cl::init(true))
llvm::AnalysisUsage::addPreserved
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
Definition: PassAnalysisSupport.h:98
TargetSubtargetInfo.h
clEnumValN
#define clEnumValN(ENUMVAL, FLAGNAME, DESC)
Definition: CommandLine.h:660
llvm::GISelWorkList::remove
void remove(const MachineInstr *I)
Remove I from the worklist if it exists.
Definition: GISelWorkList.h:83
llvm::GISelChangeObserver
Abstract class that contains various methods for clients to notify about changes.
Definition: GISelChangeObserver.h:29
MORE
#define MORE()
Definition: regcomp.c:252
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
GISelWorkList.h
llvm::cl::Optional
@ Optional
Definition: CommandLine.h:115
llvm::Legalizer::legalizeMachineFunction
static MFResult legalizeMachineFunction(MachineFunction &MF, const LegalizerInfo &LI, ArrayRef< GISelChangeObserver * > AuxObservers, LostDebugLocObserver &LocObserver, MachineIRBuilder &MIRBuilder)
Definition: Legalizer.cpp:173
llvm::GISelWorkList::insert
void insert(MachineInstr *I)
Add the specified instruction to the worklist if it isn't already in it.
Definition: GISelWorkList.h:74
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::TargetPassConfig::getCSEConfig
virtual std::unique_ptr< CSEConfigBase > getCSEConfig() const
Returns the CSEConfig object to use for the current optimization level.
Definition: TargetPassConfig.cpp:1567
llvm::TargetSubtargetInfo::getLegalizerInfo
virtual const LegalizerInfo * getLegalizerInfo() const
Definition: TargetSubtargetInfo.h:121
llvm::MachineFunctionProperties::Property::FailedISel
@ FailedISel
llvm::Legalizer::MFResult
Definition: Legalizer.h:40
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:606
DEBUG_TYPE
#define DEBUG_TYPE
Definition: Legalizer.cpp:33
LegalizerHelper.h
llvm::GISelCSEInfo::verify
Error verify()
Definition: CSEInfo.cpp:272
llvm::GISelCSEAnalysisWrapper
Simple wrapper that does the following.
Definition: CSEInfo.h:202
llvm::ReversePostOrderTraversal
Definition: PostOrderIterator.h:291
llvm::reportGISelFailure
void reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC, MachineOptimizationRemarkEmitter &MORE, MachineOptimizationRemarkMissed &R)
Report an ISel error as a missed optimization remark to the LLVMContext's diagnostic stream.
Definition: Utils.cpp:267
Legalizer.h
PostOrderIterator.h
llvm::LegalizationArtifactCombiner
Definition: LegalizationArtifactCombiner.h:33
Machine
COFF::MachineTypes Machine
Definition: COFFYAML.cpp:369
llvm::GISelWorkList
Definition: GISelWorkList.h:27
llvm::GISelObserverWrapper::addObserver
void addObserver(GISelChangeObserver *O)
Definition: GISelChangeObserver.h:75
isArtifact
static bool isArtifact(const MachineInstr &MI)
Definition: Legalizer.cpp:95
llvm::LegalizerHelper::MIRBuilder
MachineIRBuilder & MIRBuilder
Expose MIRBuilder so clients can set their own RecordInsertInstruction functions.
Definition: LegalizerHelper.h:50
llvm::LegalizationArtifactCombiner::tryCombineInstruction
bool tryCombineInstruction(MachineInstr &MI, SmallVectorImpl< MachineInstr * > &DeadInsts, GISelObserverWrapper &WrapperObserver)
Try to combine away MI.
Definition: LegalizationArtifactCombiner.h:1068
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:249
llvm::GISelObserverWrapper
Simple wrapper observer that takes several observers, and calls each one for each event.
Definition: GISelChangeObserver.h:66
llvm::LegalizerInfo
Definition: LegalizerInfo.h:1180
llvm::AnalysisUsage::addRequired
AnalysisUsage & addRequired()
Definition: PassAnalysisSupport.h:75
GISelChangeObserver.h
llvm::cl::desc
Definition: CommandLine.h:405
DebugLocVerifyLevel::Legalizations
@ Legalizations
llvm::MachineIRBuilder::stopObservingChanges
void stopObservingChanges()
Definition: MachineIRBuilder.h:358
llvm::GISelWorkList::size
unsigned size() const
Definition: GISelWorkList.h:40
llvm::LegalizerHelper::legalizeInstrStep
LegalizeResult legalizeInstrStep(MachineInstr &MI, LostDebugLocObserver &LocObserver)
Replace MI by a sequence of legal instructions that can implement the same operation.
Definition: LegalizerHelper.cpp:112
InitializePasses.h
llvm::GISelWorkList::empty
bool empty() const
Definition: GISelWorkList.h:38
Debug.h
llvm::LegalizerHelper::Legalized
@ Legalized
Instruction has been legalized and the MachineFunction changed.
Definition: LegalizerHelper.h:67
llvm::GISelWorkList::finalize
void finalize()
Definition: GISelWorkList.h:61
llvm::RAIIMFObsDelInstaller
Class to install both of the above.
Definition: GISelChangeObserver.h:129