LLVM  14.0.0git
Legalizer.cpp
Go to the documentation of this file.
1 //===-- llvm/CodeGen/GlobalISel/Legalizer.cpp -----------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file This file implements the LegalizerHelper class to legalize individual
10 /// instructions and the LegalizePass wrapper pass for the primary
11 /// legalization.
12 //
13 //===----------------------------------------------------------------------===//
14 
17 #include "llvm/ADT/SetVector.h"
30 #include "llvm/InitializePasses.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/Support/Error.h"
34 
35 #include <iterator>
36 
37 #define DEBUG_TYPE "legalizer"
38 
39 using namespace llvm;
40 
41 static cl::opt<bool>
42  EnableCSEInLegalizer("enable-cse-in-legalizer",
43  cl::desc("Should enable CSE in Legalizer"),
44  cl::Optional, cl::init(false));
45 
46 // This is a temporary hack, should be removed soon.
48  "allow-ginsert-as-artifact",
49  cl::desc("Allow G_INSERT to be considered an artifact. Hack around AMDGPU "
50  "test infinite loops."),
51  cl::Optional, cl::init(true));
52 
53 enum class DebugLocVerifyLevel {
54  None,
57 };
58 #ifndef NDEBUG
60  "verify-legalizer-debug-locs",
61  cl::desc("Verify that debug locations are handled"),
62  cl::values(
63  clEnumValN(DebugLocVerifyLevel::None, "none", "No verification"),
65  "Verify legalizations"),
67  "legalizations+artifactcombiners",
68  "Verify legalizations and artifact combines")),
70 #else
71 // Always disable it for release builds by preventing the observer from being
72 // installed.
74 #endif
75 
76 char Legalizer::ID = 0;
78  "Legalize the Machine IR a function's Machine IR", false,
79  false)
83  "Legalize the Machine IR a function's Machine IR", false,
84  false)
85 
87 
94 }
95 
96 void Legalizer::init(MachineFunction &MF) {
97 }
98 
99 static bool isArtifact(const MachineInstr &MI) {
100  switch (MI.getOpcode()) {
101  default:
102  return false;
103  case TargetOpcode::G_TRUNC:
104  case TargetOpcode::G_ZEXT:
105  case TargetOpcode::G_ANYEXT:
106  case TargetOpcode::G_SEXT:
107  case TargetOpcode::G_MERGE_VALUES:
108  case TargetOpcode::G_UNMERGE_VALUES:
109  case TargetOpcode::G_CONCAT_VECTORS:
110  case TargetOpcode::G_BUILD_VECTOR:
111  case TargetOpcode::G_EXTRACT:
112  return true;
113  case TargetOpcode::G_INSERT:
114  return AllowGInsertAsArtifact;
115  }
116 }
119 
120 namespace {
121 class LegalizerWorkListManager : public GISelChangeObserver {
122  InstListTy &InstList;
123  ArtifactListTy &ArtifactList;
124 #ifndef NDEBUG
126 #endif
127 
128 public:
129  LegalizerWorkListManager(InstListTy &Insts, ArtifactListTy &Arts)
130  : InstList(Insts), ArtifactList(Arts) {}
131 
132  void createdOrChangedInstr(MachineInstr &MI) {
133  // Only legalize pre-isel generic instructions.
134  // Legalization process could generate Target specific pseudo
135  // instructions with generic types. Don't record them
136  if (isPreISelGenericOpcode(MI.getOpcode())) {
137  if (isArtifact(MI))
138  ArtifactList.insert(&MI);
139  else
140  InstList.insert(&MI);
141  }
142  }
143 
144  void createdInstr(MachineInstr &MI) override {
145  LLVM_DEBUG(NewMIs.push_back(&MI));
146  createdOrChangedInstr(MI);
147  }
148 
149  void printNewInstrs() {
150  LLVM_DEBUG({
151  for (const auto *MI : NewMIs)
152  dbgs() << ".. .. New MI: " << *MI;
153  NewMIs.clear();
154  });
155  }
156 
157  void erasingInstr(MachineInstr &MI) override {
158  LLVM_DEBUG(dbgs() << ".. .. Erasing: " << MI);
159  InstList.remove(&MI);
160  ArtifactList.remove(&MI);
161  }
162 
163  void changingInstr(MachineInstr &MI) override {
164  LLVM_DEBUG(dbgs() << ".. .. Changing MI: " << MI);
165  }
166 
167  void changedInstr(MachineInstr &MI) override {
168  // When insts change, we want to revisit them to legalize them again.
169  // We'll consider them the same as created.
170  LLVM_DEBUG(dbgs() << ".. .. Changed MI: " << MI);
171  createdOrChangedInstr(MI);
172  }
173 };
174 } // namespace
175 
178  ArrayRef<GISelChangeObserver *> AuxObservers,
179  LostDebugLocObserver &LocObserver,
180  MachineIRBuilder &MIRBuilder) {
181  MIRBuilder.setMF(MF);
183 
184  // Populate worklists.
185  InstListTy InstList;
186  ArtifactListTy ArtifactList;
188  // Perform legalization bottom up so we can DCE as we legalize.
189  // Traverse BB in RPOT and within each basic block, add insts top down,
190  // so when we pop_back_val in the legalization process, we traverse bottom-up.
191  for (auto *MBB : RPOT) {
192  if (MBB->empty())
193  continue;
194  for (MachineInstr &MI : *MBB) {
195  // Only legalize pre-isel generic instructions: others don't have types
196  // and are assumed to be legal.
197  if (!isPreISelGenericOpcode(MI.getOpcode()))
198  continue;
199  if (isArtifact(MI))
200  ArtifactList.deferred_insert(&MI);
201  else
202  InstList.deferred_insert(&MI);
203  }
204  }
205  ArtifactList.finalize();
206  InstList.finalize();
207 
208  // This observer keeps the worklists updated.
209  LegalizerWorkListManager WorkListObserver(InstList, ArtifactList);
210  // We want both WorkListObserver as well as all the auxiliary observers (e.g.
211  // CSEInfo) to observe all changes. Use the wrapper observer.
212  GISelObserverWrapper WrapperObserver(&WorkListObserver);
213  for (GISelChangeObserver *Observer : AuxObservers)
214  WrapperObserver.addObserver(Observer);
215 
216  // Now install the observer as the delegate to MF.
217  // This will keep all the observers notified about new insertions/deletions.
218  RAIIMFObsDelInstaller Installer(MF, WrapperObserver);
219  LegalizerHelper Helper(MF, LI, WrapperObserver, MIRBuilder);
220  LegalizationArtifactCombiner ArtCombiner(MIRBuilder, MRI, LI);
221  bool Changed = false;
223  do {
224  LLVM_DEBUG(dbgs() << "=== New Iteration ===\n");
225  assert(RetryList.empty() && "Expected no instructions in RetryList");
226  unsigned NumArtifacts = ArtifactList.size();
227  while (!InstList.empty()) {
228  MachineInstr &MI = *InstList.pop_back_val();
229  assert(isPreISelGenericOpcode(MI.getOpcode()) &&
230  "Expecting generic opcode");
231  if (isTriviallyDead(MI, MRI)) {
232  eraseInstr(MI, MRI, &LocObserver);
233  continue;
234  }
235 
236  // Do the legalization for this instruction.
237  auto Res = Helper.legalizeInstrStep(MI, LocObserver);
238  // Error out if we couldn't legalize this instruction. We may want to
239  // fall back to DAG ISel instead in the future.
241  // Move illegal artifacts to RetryList instead of aborting because
242  // legalizing InstList may generate artifacts that allow
243  // ArtifactCombiner to combine away them.
244  if (isArtifact(MI)) {
245  LLVM_DEBUG(dbgs() << ".. Not legalized, moving to artifacts retry\n");
246  assert(NumArtifacts == 0 &&
247  "Artifacts are only expected in instruction list starting the "
248  "second iteration, but each iteration starting second must "
249  "start with an empty artifacts list");
250  (void)NumArtifacts;
251  RetryList.push_back(&MI);
252  continue;
253  }
255  return {Changed, &MI};
256  }
257  WorkListObserver.printNewInstrs();
258  LocObserver.checkpoint();
259  Changed |= Res == LegalizerHelper::Legalized;
260  }
261  // Try to combine the instructions in RetryList again if there
262  // are new artifacts. If not, stop legalizing.
263  if (!RetryList.empty()) {
264  if (!ArtifactList.empty()) {
265  while (!RetryList.empty())
266  ArtifactList.insert(RetryList.pop_back_val());
267  } else {
268  LLVM_DEBUG(dbgs() << "No new artifacts created, not retrying!\n");
270  return {Changed, RetryList.front()};
271  }
272  }
273  LocObserver.checkpoint();
274  while (!ArtifactList.empty()) {
275  MachineInstr &MI = *ArtifactList.pop_back_val();
276  assert(isPreISelGenericOpcode(MI.getOpcode()) &&
277  "Expecting generic opcode");
278  if (isTriviallyDead(MI, MRI)) {
279  eraseInstr(MI, MRI, &LocObserver);
280  continue;
281  }
282  SmallVector<MachineInstr *, 4> DeadInstructions;
283  LLVM_DEBUG(dbgs() << "Trying to combine: " << MI);
284  if (ArtCombiner.tryCombineInstruction(MI, DeadInstructions,
285  WrapperObserver)) {
286  WorkListObserver.printNewInstrs();
287  eraseInstrs(DeadInstructions, MRI, &LocObserver);
288  LocObserver.checkpoint(
289  VerifyDebugLocs ==
291  Changed = true;
292  continue;
293  }
294  // If this was not an artifact (that could be combined away), this might
295  // need special handling. Add it to InstList, so when it's processed
296  // there, it has to be legal or specially handled.
297  else {
298  LLVM_DEBUG(dbgs() << ".. Not combined, moving to instructions list\n");
299  InstList.insert(&MI);
300  }
301  }
302  } while (!InstList.empty());
303 
304  return {Changed, /*FailedOn*/ nullptr};
305 }
306 
308  // If the ISel pipeline failed, do not bother running that pass.
309  if (MF.getProperties().hasProperty(
311  return false;
312  LLVM_DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
313  init(MF);
314  const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
316  getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEWrapper();
317  MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
318 
319  const size_t NumBlocks = MF.size();
320 
321  std::unique_ptr<MachineIRBuilder> MIRBuilder;
322  GISelCSEInfo *CSEInfo = nullptr;
323  bool EnableCSE = EnableCSEInLegalizer.getNumOccurrences()
325  : TPC.isGISelCSEEnabled();
326  if (EnableCSE) {
327  MIRBuilder = std::make_unique<CSEMIRBuilder>();
328  CSEInfo = &Wrapper.get(TPC.getCSEConfig());
329  MIRBuilder->setCSEInfo(CSEInfo);
330  } else
331  MIRBuilder = std::make_unique<MachineIRBuilder>();
332 
334  if (EnableCSE && CSEInfo) {
335  // We want CSEInfo in addition to WorkListObserver to observe all changes.
336  AuxObservers.push_back(CSEInfo);
337  }
338  assert(!CSEInfo || !errorToBool(CSEInfo->verify()));
339  LostDebugLocObserver LocObserver(DEBUG_TYPE);
341  AuxObservers.push_back(&LocObserver);
342 
343  const LegalizerInfo &LI = *MF.getSubtarget().getLegalizerInfo();
344  MFResult Result =
345  legalizeMachineFunction(MF, LI, AuxObservers, LocObserver, *MIRBuilder);
346 
347  if (Result.FailedOn) {
348  reportGISelFailure(MF, TPC, MORE, "gisel-legalize",
349  "unable to legalize instruction", *Result.FailedOn);
350  return false;
351  }
352  // For now don't support if new blocks are inserted - we would need to fix the
353  // outer loop for that.
354  if (MF.size() != NumBlocks) {
355  MachineOptimizationRemarkMissed R("gisel-legalize", "GISelFailure",
356  MF.getFunction().getSubprogram(),
357  /*MBB=*/nullptr);
358  R << "inserting blocks is not supported yet";
359  reportGISelFailure(MF, TPC, MORE, R);
360  return false;
361  }
362 
363  if (LocObserver.getNumLostDebugLocs()) {
364  MachineOptimizationRemarkMissed R("gisel-legalize", "LostDebugLoc",
365  MF.getFunction().getSubprogram(),
366  /*MBB=*/&*MF.begin());
367  R << "lost "
368  << ore::NV("NumLostDebugLocs", LocObserver.getNumLostDebugLocs())
369  << " debug locations during pass";
370  reportGISelWarning(MF, TPC, MORE, R);
371  // Example remark:
372  // --- !Missed
373  // Pass: gisel-legalize
374  // Name: GISelFailure
375  // DebugLoc: { File: '.../legalize-urem.mir', Line: 1, Column: 0 }
376  // Function: test_urem_s32
377  // Args:
378  // - String: 'lost '
379  // - NumLostDebugLocs: '1'
380  // - String: ' debug locations during pass'
381  // ...
382  }
383 
384  // If for some reason CSE was not enabled, make sure that we invalidate the
385  // CSEInfo object (as we currently declare that the analysis is preserved).
386  // The next time get on the wrapper is called, it will force it to recompute
387  // the analysis.
388  if (!EnableCSE)
389  Wrapper.setComputed(false);
390  return Result.Changed;
391 }
llvm::MachineIRBuilder::setMF
void setMF(MachineFunction &MF)
Definition: MachineIRBuilder.cpp:26
llvm::MachineFunctionProperties::hasProperty
bool hasProperty(Property P) const
Definition: MachineFunction.h:169
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::LostDebugLocObserver
Definition: LostDebugLocObserver.h:19
llvm::GISelWorkList::deferred_insert
void deferred_insert(MachineInstr *I)
Definition: GISelWorkList.h:51
llvm::GISelCSEAnalysisWrapperPass
The actual analysis pass wrapper.
Definition: CSEInfo.h:220
llvm::Legalizer::ID
static char ID
Definition: Legalizer.h:33
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::SmallVector< MachineInstr *, 4 >
Wrapper
amdgpu aa AMDGPU Address space based Alias Analysis Wrapper
Definition: AMDGPUAliasAnalysis.cpp:31
llvm::isPreISelGenericOpcode
bool isPreISelGenericOpcode(unsigned Opcode)
Check whether the given Opcode is a generic opcode that is not supposed to appear after ISel.
Definition: TargetOpcodes.h:30
llvm::Function::getSubprogram
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1541
llvm::GISelCSEInfo
The CSE Analysis object.
Definition: CSEInfo.h:69
llvm::MachineOptimizationRemarkEmitter
The optimization diagnostic interface.
Definition: MachineOptimizationRemarkEmitter.h:150
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
Error.h
llvm::LegalizerHelper::UnableToLegalize
@ UnableToLegalize
Some kind of error has occurred and we could not legalize this instruction.
Definition: LegalizerHelper.h:64
llvm::eraseInstrs
void eraseInstrs(ArrayRef< MachineInstr * > DeadInstrs, MachineRegisterInfo &MRI, LostDebugLocObserver *LocObserver=nullptr)
Definition: Utils.cpp:1210
EnableCSEInLegalizer
static cl::opt< bool > EnableCSEInLegalizer("enable-cse-in-legalizer", cl::desc("Should enable CSE in Legalizer"), cl::Optional, cl::init(false))
IR
Legalize the Machine IR a function s Machine IR
Definition: Legalizer.cpp:83
llvm::ore::NV
DiagnosticInfoOptimizationBase::Argument NV
Definition: OptimizationRemarkEmitter.h:136
llvm::getSelectionDAGFallbackAnalysisUsage
void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.
Definition: Utils.cpp:863
llvm::SmallVectorImpl::pop_back_val
LLVM_NODISCARD T pop_back_val()
Definition: SmallVector.h:635
llvm::reportGISelWarning
void reportGISelWarning(MachineFunction &MF, const TargetPassConfig &TPC, MachineOptimizationRemarkEmitter &MORE, MachineOptimizationRemarkMissed &R)
Report an ISel warning as a missed optimization remark to the LLVMContext's diagnostic stream.
Definition: Utils.cpp:246
llvm::LegalizerHelper
Definition: LegalizerHelper.h:39
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:102
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
LegalizationArtifactCombiner.h
llvm::TargetPassConfig::isGISelCSEEnabled
virtual bool isGISelCSEEnabled() const
Check whether continuous CSE should be enabled in GISel passes.
Definition: TargetPassConfig.cpp:1534
MachineRegisterInfo.h
a
=0.0 ? 0.0 :(a > 0.0 ? 1.0 :-1.0) a
Definition: README.txt:489
VerifyDebugLocs
static cl::opt< DebugLocVerifyLevel > VerifyDebugLocs("verify-legalizer-debug-locs", cl::desc("Verify that debug locations are handled"), cl::values(clEnumValN(DebugLocVerifyLevel::None, "none", "No verification"), clEnumValN(DebugLocVerifyLevel::Legalizations, "legalizations", "Verify legalizations"), clEnumValN(DebugLocVerifyLevel::LegalizationsAndArtifactCombiners, "legalizations+artifactcombiners", "Verify legalizations and artifact combines")), cl::init(DebugLocVerifyLevel::Legalizations))
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
CSEInfo.h
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:644
TargetMachine.h
LostDebugLocObserver.h
llvm::Legalizer
Definition: Legalizer.h:31
DebugLocVerifyLevel::LegalizationsAndArtifactCombiners
@ LegalizationsAndArtifactCombiners
llvm::LostDebugLocObserver::checkpoint
void checkpoint(bool CheckDebugLocs=true)
Call this to indicate that it's a good point to assess whether locations have been lost.
Definition: LostDebugLocObserver.cpp:70
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
Utils.h
llvm::MachineFunction::getProperties
const MachineFunctionProperties & getProperties() const
Get the function properties.
Definition: MachineFunction.h:725
false
Definition: StackSlotColoring.cpp:142
DebugLocVerifyLevel
DebugLocVerifyLevel
Definition: Legalizer.cpp:53
CSEMIRBuilder.h
llvm::MachineFunction::size
unsigned size() const
Definition: MachineFunction.h:826
INITIALIZE_PASS_BEGIN
INITIALIZE_PASS_BEGIN(Legalizer, DEBUG_TYPE, "Legalize the Machine IR a function's Machine IR", false, false) INITIALIZE_PASS_END(Legalizer
llvm::cl::Option::getNumOccurrences
int getNumOccurrences() const
Definition: CommandLine.h:402
llvm::MachineFunction::begin
iterator begin()
Definition: MachineFunction.h:816
DebugLocVerifyLevel::None
@ None
llvm::None
const NoneType None
Definition: None.h:23
llvm::LostDebugLocObserver::getNumLostDebugLocs
unsigned getNumLostDebugLocs() const
Definition: LostDebugLocObserver.h:28
INITIALIZE_PASS_END
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:58
MachineOptimizationRemarkEmitter.h
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:634
llvm::cl::opt< bool >
llvm::cl::values
ValuesClass values(OptsTy... Options)
Helper to build a ValuesClass by forwarding a variable number of arguments as an initializer list to ...
Definition: CommandLine.h:697
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:212
llvm::eraseInstr
void eraseInstr(MachineInstr &MI, MachineRegisterInfo &MRI, LostDebugLocObserver *LocObserver=nullptr)
Definition: Utils.cpp:1225
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineOptimizationRemarkMissed
Diagnostic information for missed-optimization remarks.
Definition: MachineOptimizationRemarkEmitter.h:82
INITIALIZE_PASS_DEPENDENCY
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
s
multiplies can be turned into SHL s
Definition: README.txt:370
llvm::Legalizer::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition: Legalizer.cpp:307
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:441
llvm::Legalizer::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Definition: Legalizer.cpp:88
TargetPassConfig.h
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:542
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
function
print Print MemDeps of function
Definition: MemDepPrinter.cpp:83
llvm::errorToBool
bool errorToBool(Error Err)
Helper for converting an Error to a bool.
Definition: Error.h:1068
llvm::isTriviallyDead
bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI)
Check whether an instruction MI is dead: it only defines dead virtual registers, and doesn't have oth...
Definition: Utils.cpp:196
llvm::MachineFunction
Definition: MachineFunction.h:234
llvm::GISelWorkList::pop_back_val
MachineInstr * pop_back_val()
Definition: GISelWorkList.h:99
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
AllowGInsertAsArtifact
static cl::opt< bool > AllowGInsertAsArtifact("allow-ginsert-as-artifact", cl::desc("Allow G_INSERT to be considered an artifact. Hack around AMDGPU " "test infinite loops."), cl::Optional, cl::init(true))
llvm::AnalysisUsage::addPreserved
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
Definition: PassAnalysisSupport.h:98
TargetSubtargetInfo.h
clEnumValN
#define clEnumValN(ENUMVAL, FLAGNAME, DESC)
Definition: CommandLine.h:672
llvm::GISelWorkList::remove
void remove(const MachineInstr *I)
Remove I from the worklist if it exists.
Definition: GISelWorkList.h:82
llvm::GISelChangeObserver
Abstract class that contains various methods for clients to notify about changes.
Definition: GISelChangeObserver.h:29
MORE
#define MORE()
Definition: regcomp.c:252
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
GISelWorkList.h
llvm::cl::Optional
@ Optional
Definition: CommandLine.h:119
llvm::Legalizer::legalizeMachineFunction
static MFResult legalizeMachineFunction(MachineFunction &MF, const LegalizerInfo &LI, ArrayRef< GISelChangeObserver * > AuxObservers, LostDebugLocObserver &LocObserver, MachineIRBuilder &MIRBuilder)
Definition: Legalizer.cpp:177
llvm::GISelWorkList::insert
void insert(MachineInstr *I)
Add the specified instruction to the worklist if it isn't already in it.
Definition: GISelWorkList.h:75
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::TargetPassConfig::getCSEConfig
virtual std::unique_ptr< CSEConfigBase > getCSEConfig() const
Returns the CSEConfig object to use for the current optimization level.
Definition: TargetPassConfig.cpp:1538
llvm::TargetSubtargetInfo::getLegalizerInfo
virtual const LegalizerInfo * getLegalizerInfo() const
Definition: TargetSubtargetInfo.h:120
llvm::MachineFunctionProperties::Property::FailedISel
@ FailedISel
llvm::Legalizer::MFResult
Definition: Legalizer.h:35
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:600
DEBUG_TYPE
#define DEBUG_TYPE
Definition: Legalizer.cpp:37
LegalizerHelper.h
llvm::GISelCSEInfo::verify
Error verify()
Definition: CSEInfo.cpp:271
llvm::GISelCSEAnalysisWrapper
Simple wrapper that does the following.
Definition: CSEInfo.h:202
llvm::ReversePostOrderTraversal
Definition: PostOrderIterator.h:290
llvm::reportGISelFailure
void reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC, MachineOptimizationRemarkEmitter &MORE, MachineOptimizationRemarkMissed &R)
Report an ISel error as a missed optimization remark to the LLVMContext's diagnostic stream.
Definition: Utils.cpp:252
Legalizer.h
PostOrderIterator.h
llvm::LegalizationArtifactCombiner
Definition: LegalizationArtifactCombiner.h:33
Machine
COFF::MachineTypes Machine
Definition: COFFYAML.cpp:366
llvm::GISelWorkList
Definition: GISelWorkList.h:28
llvm::GISelObserverWrapper::addObserver
void addObserver(GISelChangeObserver *O)
Definition: GISelChangeObserver.h:75
isArtifact
static bool isArtifact(const MachineInstr &MI)
Definition: Legalizer.cpp:99
llvm::LegalizerHelper::MIRBuilder
MachineIRBuilder & MIRBuilder
Expose MIRBuilder so clients can set their own RecordInsertInstruction functions.
Definition: LegalizerHelper.h:43
llvm::LegalizationArtifactCombiner::tryCombineInstruction
bool tryCombineInstruction(MachineInstr &MI, SmallVectorImpl< MachineInstr * > &DeadInsts, GISelObserverWrapper &WrapperObserver)
Try to combine away MI.
Definition: LegalizationArtifactCombiner.h:1060
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:240
llvm::GISelObserverWrapper
Simple wrapper observer that takes several observers, and calls each one for each event.
Definition: GISelChangeObserver.h:66
llvm::LegalizerInfo
Definition: LegalizerInfo.h:1108
llvm::AnalysisUsage::addRequired
AnalysisUsage & addRequired()
Definition: PassAnalysisSupport.h:75
GISelChangeObserver.h
llvm::cl::desc
Definition: CommandLine.h:412
DebugLocVerifyLevel::Legalizations
@ Legalizations
llvm::MachineIRBuilder::stopObservingChanges
void stopObservingChanges()
Definition: MachineIRBuilder.h:351
llvm::GISelWorkList::size
unsigned size() const
Definition: GISelWorkList.h:41
llvm::LegalizerHelper::legalizeInstrStep
LegalizeResult legalizeInstrStep(MachineInstr &MI, LostDebugLocObserver &LocObserver)
Replace MI by a sequence of legal instructions that can implement the same operation.
Definition: LegalizerHelper.cpp:109
InitializePasses.h
llvm::GISelWorkList::empty
bool empty() const
Definition: GISelWorkList.h:39
Debug.h
llvm::LegalizerHelper::Legalized
@ Legalized
Instruction has been legalized and the MachineFunction changed.
Definition: LegalizerHelper.h:60
SetVector.h
llvm::GISelWorkList::finalize
void finalize()
Definition: GISelWorkList.h:62
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37
llvm::RAIIMFObsDelInstaller
Class to install both of the above.
Definition: GISelChangeObserver.h:129