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20 #ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H
21 #define LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H
33 class GenericMachineInstr;
34 class MachineFunction;
35 class MachineIRBuilder;
37 class MachineInstrBuilder;
38 struct MachinePointerInfo;
39 template <
typename T>
class SmallVectorImpl;
41 class MachineRegisterInfo;
42 class GISelChangeObserver;
43 class LostDebugLocObserver;
145 unsigned TruncOpcode = TargetOpcode::G_TRUNC);
199 void extractVectorParts(
Register Reg,
unsigned NumElst,
216 void mergeMixedSubvectors(Register DstReg, ArrayRef<Register> PartRegs);
218 void appendVectorElts(SmallVectorImpl<Register> &Elts, Register
Reg);
224 LLT extractGCDType(SmallVectorImpl<Register> &Parts, LLT DstTy,
225 LLT NarrowTy, Register SrcReg);
230 void extractGCDType(SmallVectorImpl<Register> &Parts, LLT GCDTy,
248 LLT buildLCMMergePieces(LLT DstTy, LLT NarrowTy, LLT GCDTy,
249 SmallVectorImpl<Register> &VRegs,
250 unsigned PadStrategy = TargetOpcode::G_ANYEXT);
255 void buildWidenedRemergeToDst(Register DstReg, LLT LCMTy,
256 ArrayRef<Register> RemergeRegs);
261 void multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
262 ArrayRef<Register> Src1Regs,
263 ArrayRef<Register> Src2Regs, LLT NarrowTy);
265 void changeOpcode(MachineInstr &
MI,
unsigned NewOpcode);
268 LLT SrcTy, LLT NarrowTy,
275 LegalizeResult lowerMemcpyInline(MachineInstr &
MI, Register Dst, Register Src,
292 MachinePointerInfo &PtrInfo);
307 GenericMachineInstr &
MI,
unsigned NumElts,
308 std::initializer_list<unsigned> NonVecOpIndices = {});
334 LLT HalfTy, LLT ShiftAmtTy);
337 unsigned TypeIdx, LLT NarrowTy);
419 const CallLowering::ArgInfo &Result,
425 const CallLowering::ArgInfo &Result,
426 ArrayRef<CallLowering::ArgInfo>
Args);
431 MachineInstr &
MI, LostDebugLocObserver &LocObserver);
MachineInstrBuilder createStackTemporary(TypeSize Bytes, Align Alignment, MachinePointerInfo &PtrInfo)
Create a stack temporary based on the size in bytes and the alignment.
LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt, LLT HalfTy, LLT ShiftAmtTy)
LegalizeResult narrowScalarBasic(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
This is an optimization pass for GlobalISel generic memory operations.
LegalizeResult moreElementsVectorPhi(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)
LegalizeResult lowerFPTOSI(MachineInstr &MI)
LegalizeResult libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver)
Legalize an instruction by emiting a runtime library call instead.
LegalizeResult lowerFPTRUNC_F64_TO_F16(MachineInstr &MI)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
LegalizeResult lowerFCopySign(MachineInstr &MI)
LegalizeResult lowerBitreverse(MachineInstr &MI)
Reg
All possible values of the reg field in the ModR/M byte.
void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx, unsigned ExtOpcode)
Legalize a single operand OpIdx of the machine instruction MI as a Use by extending the operand's typ...
LegalizeResult lowerBitcast(MachineInstr &MI)
LegalizeResult lowerExtract(MachineInstr &MI)
LegalizeResult lowerFPTOUI(MachineInstr &MI)
void bitcastSrc(MachineInstr &MI, LLT CastTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a use by inserting a G_BITCAST to Ca...
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit.
LegalizeResult lowerFMad(MachineInstr &MI)
@ UnableToLegalize
Some kind of error has occurred and we could not legalize this instruction.
LegalizeResult lowerShlSat(MachineInstr &MI)
LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Legalize an instruction by splitting it into simpler parts, hopefully understood by the target.
LegalizeResult lowerSelect(MachineInstr &MI)
LegalizeResult lowerDIVREM(MachineInstr &MI)
LegalizeResult lowerAbsToAddXor(MachineInstr &MI)
LegalizeResult lowerFFloor(MachineInstr &MI)
LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer, MachineIRBuilder &B)
LegalizeResult lowerVectorReduction(MachineInstr &MI)
void moreElementsVectorSrc(MachineInstr &MI, LLT MoreTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a Use by producing a vector with und...
Align getStackTemporaryAlignment(LLT Type, Align MinAlign=Align()) const
Return the alignment to use for a stack temporary object with the given type.
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
LegalizeResult lowerBswap(MachineInstr &MI)
LegalizeResult lowerFunnelShiftAsShifts(MachineInstr &MI)
LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
LegalizeResult lowerSITOFP(MachineInstr &MI)
LegalizeResult narrowScalarMul(MachineInstr &MI, LLT Ty)
LegalizeResult narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI)
LegalizeResult lowerShuffleVector(MachineInstr &MI)
LegalizeResult lowerFPTRUNC(MachineInstr &MI)
LegalizeResult narrowScalarCTLZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
void moreElementsVectorDst(MachineInstr &MI, LLT MoreTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a Def by performing it with addition...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Legalize an instruction by reducing the width of the underlying scalar type.
LegalizeResult bitcast(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Legalize an instruction by replacing the value type.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI)
LegalizeResult fewerElementsVectorMultiEltType(GenericMachineInstr &MI, unsigned NumElts, std::initializer_list< unsigned > NonVecOpIndices={})
Handles most opcodes.
LegalizeResult lowerInsert(MachineInstr &MI)
LegalizeResult lowerAddSubSatToMinMax(MachineInstr &MI)
LegalizeResult lowerUITOFP(MachineInstr &MI)
LegalizeResult narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Legalize a vector instruction by splitting into multiple components, each acting on the same scalar t...
LegalizeResult lowerIntrinsicRound(MachineInstr &MI)
LegalizeResult lowerExtractInsertVectorElt(MachineInstr &MI)
Lower a vector extract or insert by writing the vector to a stack temporary and reloading the element...
Register getVectorElementPointer(Register VecPtr, LLT VecTy, Register Index)
Get a pointer to vector element Index located in memory for a vector of type VecTy starting at a base...
LegalizeResult lowerAbsToMaxNeg(MachineInstr &MI)
LegalizeResult lowerFunnelShift(MachineInstr &MI)
LegalizeResult lowerReadWriteRegister(MachineInstr &MI)
LegalizeResult lowerFunnelShiftWithInverse(MachineInstr &MI)
const LegalizerInfo & getLegalizerInfo() const
Expose LegalizerInfo so the clients can re-use.
LegalizeResult fewerElementsVectorPhi(GenericMachineInstr &MI, unsigned NumElts)
Helper class to build MachineInstr.
Representation of each machine instruction.
LegalizerHelper::LegalizeResult createLibcall(MachineIRBuilder &MIRBuilder, const char *Name, const CallLowering::ArgInfo &Result, ArrayRef< CallLowering::ArgInfo > Args, CallingConv::ID CC)
Helper function that creates a libcall to the given Name using the given calling convention CC.
LegalizeResult narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
LegalizeResult lowerMergeValues(MachineInstr &MI)
LegalizeResult lowerSMULH_UMULH(MachineInstr &MI)
LegalizeResult lowerMinMax(MachineInstr &MI)
LegalizeResult moreElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)
LegalizeResult fewerElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx, unsigned ExtOpcode)
LegalizeResult lowerStore(GStore &MI)
LegalizeResult fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
LegalizeResult fewerElementsVectorUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy)
Legalize an instruction by performing the operation on a wider scalar type (for example a 16-bit addi...
LegalizeResult narrowScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
@ AlreadyLegal
Instruction was already legal and no change was made to the MachineFunction.
LegalizeResult lowerLoad(GAnyLoad &MI)
LegalizeResult lowerBitCount(MachineInstr &MI)
LegalizeResult narrowScalarExt(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
LegalizeResult fewerElementsVectorSextInReg(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
GISelChangeObserver & Observer
To keep track of changes made by the LegalizerHelper.
void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a Use by truncating the operand's ty...
constexpr char IsVolatile[]
Key for Kernel::Arg::Metadata::mIsVolatile.
LegalizeResult lowerUnmergeValues(MachineInstr &MI)
Abstract class that contains various methods for clients to notify about changes.
void bitcastDst(MachineInstr &MI, LLT CastTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a def by inserting a G_BITCAST from ...
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
const TargetLowering & getTargetLowering() const
void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx=0, unsigned TruncOpcode=TargetOpcode::G_TRUNC)
Legalize a single operand OpIdx of the machine instruction MI as a Def by extending the operand's typ...
LegalizeResult bitcastInsertVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)
Perform Bitcast legalize action on G_INSERT_VECTOR_ELT.
LegalizeResult lowerMemCpyFamily(MachineInstr &MI, unsigned MaxLen=0)
LegalizeResult narrowScalarShift(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
LegalizeResult lowerAddSubSatToAddoSubo(MachineInstr &MI)
LegalizeResult narrowScalarFPTOI(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
LegalizeResult lowerFMinNumMaxNum(MachineInstr &MI)
LegalizeResult fewerElementsVectorReductions(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
LegalizeResult narrowScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
LegalizeResult lowerFPOWI(MachineInstr &MI)
LegalizeResult lowerDynStackAlloc(MachineInstr &MI)
LegalizerHelper::LegalizeResult createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI, LostDebugLocObserver &LocObserver)
Create a libcall to memcpy et al.
LegalizeResult lowerRotateWithReverseRotate(MachineInstr &MI)
MachineIRBuilder & MIRBuilder
Expose MIRBuilder so clients can set their own RecordInsertInstruction functions.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
LegalizeResult reduceLoadStoreWidth(GLoadStore &MI, unsigned TypeIdx, LLT NarrowTy)
Register coerceToScalar(Register Val)
Cast the given value to an LLT::scalar with an equivalent size.
LegalizeResult fewerElementsVectorMerge(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)
Legalize a vector instruction by increasing the number of vector elements involved and ignoring the a...
LegalizeResult lowerRotate(MachineInstr &MI)
LegalizeResult legalizeInstrStep(MachineInstr &MI, LostDebugLocObserver &LocObserver)
Replace MI by a sequence of legal instructions that can implement the same operation.
@ Legalized
Instruction has been legalized and the MachineFunction changed.
LegalizeResult bitcastExtractVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)
Perform Bitcast legalize action on G_EXTRACT_VECTOR_ELT.