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30 #include "llvm/Config/llvm-config.h"
53 assert((PrevMask & ~NewMask).none() &&
"Must not remove bits");
54 if (PrevMask.
any() || NewMask.
none())
59 for (; PSetI.
isValid(); ++PSetI)
60 CurrSetPressure[*PSetI] += Weight;
68 if (NewMask.
any() || PrevMask.
none())
73 for (; PSetI.
isValid(); ++PSetI) {
74 assert(CurrSetPressure[*PSetI] >= Weight &&
"register pressure underflow");
75 CurrSetPressure[*PSetI] -= Weight;
79 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
84 for (
unsigned i = 0,
e = SetPressure.
size();
i <
e; ++
i) {
85 if (SetPressure[
i] != 0) {
96 dbgs() <<
"Max Pressure: ";
98 dbgs() <<
"Live In: ";
101 if (!
P.LaneMask.all())
106 dbgs() <<
"Live Out: ";
109 if (!
P.LaneMask.all())
119 dbgs() <<
"Curr Pressure: ";
127 const char *sep =
"";
144 dbgs() <<
"[Excess=";
146 dbgs() <<
", CriticalMax=";
148 dbgs() <<
", CurrentMax=";
158 if (PreviousMask.
any() || NewMask.
none())
163 for (; PSetI.
isValid(); ++PSetI) {
164 CurrSetPressure[*PSetI] += Weight;
230 this->NumRegUnits = NumRegUnits;
247 CurrSetPressure.clear();
248 LiveThruPressure.clear();
251 if (RequireIntervals)
268 bool TrackLaneMasks,
bool TrackUntiedDefs) {
276 this->TrackUntiedDefs = TrackUntiedDefs;
277 this->TrackLaneMasks = TrackLaneMasks;
279 if (RequireIntervals) {
280 assert(lis &&
"IntervalPressure requires LiveIntervals");
296 if (RequireIntervals)
304 if (RequireIntervals)
313 if (IdxPos == MBB->
end())
320 if (RequireIntervals)
332 if (RequireIntervals)
345 assert(LiveRegs.
size() == 0 &&
"no region boundary");
374 return Other.RegUnit == RegUnit;
376 if (
I == RegUnits.
end())
386 return Other.RegUnit == RegUnit;
388 if (
I == RegUnits.end()) {
389 RegUnits.push_back(Pair);
398 return Other.RegUnit == RegUnit;
400 if (
I == RegUnits.end()) {
412 return Other.RegUnit == RegUnit;
414 if (
I != RegUnits.end()) {
416 if (
I->LaneMask.none())
431 if (Property(SR, Pos))
432 Result |= SR.LaneMask;
434 }
else if (Property(LI, Pos)) {
452 bool TrackLaneMasks,
Register RegUnit,
467 class RegisterOperandsCollector {
478 : RegOpers(RegOpers),
TRI(
TRI),
MRI(
MRI), IgnoreDead(IgnoreDead) {}
482 collectOperand(*OperI);
491 collectOperandLanes(*OperI);
522 if (
Reg.isVirtual()) {
538 pushRegLanes(
Reg, SubRegIdx, RegOpers.
Uses);
549 pushRegLanes(
Reg, SubRegIdx, RegOpers.
Defs);
553 void pushRegLanes(
Register Reg,
unsigned SubRegIdx,
555 if (
Reg.isVirtual()) {
573 bool TrackLaneMasks,
bool IgnoreDead) {
584 for (
auto RI =
Defs.begin(); RI !=
Defs.end(); ) {
605 for (
auto I =
Defs.begin();
I !=
Defs.end(); ) {
612 AddFlagsMI !=
nullptr && (LiveAfter & ~
I->LaneMask).none())
616 if (ActualDef.
none()) {
619 I->LaneMask = ActualDef;
623 for (
auto I =
Uses.begin();
I !=
Uses.end(); ) {
627 if (LaneMask.
none()) {
630 I->LaneMask = LaneMask;
634 if (AddFlagsMI !=
nullptr) {
641 if (LiveAfter.
none())
676 for (; PSetI.
isValid(); ++PSetI) {
679 for (;
I !=
E &&
I->isValid(); ++
I) {
680 if (
I->getPSet() >= *PSetI)
687 if (!
I->isValid() ||
I->getPSet() != *PSetI) {
693 unsigned NewUnitInc =
I->getUnitInc() + Weight;
694 if (NewUnitInc != 0) {
695 I->setUnitInc(NewUnitInc);
699 for (J = std::next(
I); J !=
E && J->
isValid(); ++J, ++
I)
721 return Other.RegUnit == RegUnit;
725 if (
I == LiveInOrOut.end()) {
728 LiveInOrOut.push_back(Pair);
730 PrevMask =
I->LaneMask;
732 I->LaneMask = NewMask;
767 assert(!CurrPos->isDebugOrPseudoInstr());
786 PreviousMask = LiveOut;
789 if (NewMask.
none()) {
792 if (TrackLaneMasks && LiveUses !=
nullptr)
800 if (RequireIntervals)
809 if (NewMask == PreviousMask)
813 if (PreviousMask.
none()) {
814 if (LiveUses !=
nullptr) {
815 if (!TrackLaneMasks) {
822 bool IsRedef =
I != LiveUses->end();
834 if (RequireIntervals) {
843 if (TrackUntiedDefs) {
847 (LiveRegs.
contains(RegUnit) &
Def.LaneMask).none())
848 UntiedDefs.insert(RegUnit);
866 if (RequireIntervals && !CurrPos->isDebugOrPseudoInstr())
876 if (CurrPos->isDebugInstr() || CurrPos->isPseudoProbe()) {
886 if (TrackLaneMasks) {
889 }
else if (RequireIntervals) {
893 recede(RegOpers, LiveUses);
898 assert(!TrackUntiedDefs &&
"unsupported mode");
904 if (RequireIntervals)
909 if (RequireIntervals)
925 if (RequireIntervals) {
927 if (LastUseMask.
any()) {
952 if (TrackLaneMasks) {
966 for (
unsigned i = 0,
e = OldPressureVec.
size();
i <
e; ++
i) {
967 unsigned POld = OldPressureVec[
i];
968 unsigned PNew = NewPressureVec[
i];
969 int PDiff = (
int)PNew - (
int)POld;
974 if (!LiveThruPressureVec.
empty())
975 Limit += LiveThruPressureVec[
i];
981 PDiff = PNew - Limit;
982 }
else if (Limit > PNew)
983 PDiff = Limit - POld;
1007 unsigned CritIdx = 0, CritEnd = CriticalPSets.
size();
1008 for (
unsigned i = 0,
e = OldMaxPressureVec.
size();
i <
e; ++
i) {
1009 unsigned POld = OldMaxPressureVec[
i];
1010 unsigned PNew = NewMaxPressureVec[
i];
1015 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() <
i)
1018 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() ==
i) {
1019 int PDiff = (
int)PNew - (
int)CriticalPSets[CritIdx].getUnitInc();
1044 assert(!
MI->isDebugOrPseudoInstr() &&
"Expect a nondebug instruction.");
1047 if (RequireIntervals)
1056 else if (RequireIntervals)
1069 LaneBitmask LiveAfter = (LiveLanes & ~DefLanes) | UseLanes;
1102 std::vector<unsigned> SavedPressure = CurrSetPressure;
1103 std::vector<unsigned> SavedMaxPressure =
P.MaxSetPressure;
1110 MaxPressureLimit, Delta);
1115 P.MaxSetPressure.swap(SavedMaxPressure);
1116 CurrSetPressure.swap(SavedPressure);
1125 if (Delta != Delta2) {
1126 dbgs() <<
"PDiff: ";
1128 dbgs() <<
"DELTA: " << *
MI;
1167 unsigned CritIdx = 0, CritEnd = CriticalPSets.
size();
1169 PDiffI = PDiff.
begin(), PDiffE = PDiff.
end();
1170 PDiffI != PDiffE && PDiffI->
isValid(); ++PDiffI) {
1172 unsigned PSetID = PDiffI->getPSet();
1174 if (!LiveThruPressure.empty())
1175 Limit += LiveThruPressure[PSetID];
1177 unsigned POld = CurrSetPressure[PSetID];
1178 unsigned MOld =
P.MaxSetPressure[PSetID];
1179 unsigned MNew = MOld;
1181 unsigned PNew = POld + PDiffI->getUnitInc();
1182 assert((PDiffI->getUnitInc() >= 0) == (PNew >= POld)
1183 &&
"PSet overflow/underflow");
1188 unsigned ExcessInc = 0;
1190 ExcessInc = POld > Limit ? PNew - POld : PNew - Limit;
1191 else if (POld > Limit)
1192 ExcessInc = Limit - POld;
1202 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() < PSetID)
1205 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == PSetID) {
1206 int CritInc = (
int)MNew - (
int)CriticalPSets[CritIdx].getUnitInc();
1234 if (InstSlot >= PriorUseIdx && InstSlot < NextUseIdx) {
1237 LastUseMask &= ~UseMask;
1238 if (LastUseMask.
none())
1247 assert(RequireIntervals);
1257 assert(RequireIntervals);
1261 const LiveRange::Segment *S = LR.getSegmentContaining(Pos);
1262 return S != nullptr && S->end == Pos.getRegSlot();
1268 assert(RequireIntervals);
1273 return S !=
nullptr &&
S->start < Pos.
getRegSlot(
true) &&
1285 assert(!
MI->isDebugOrPseudoInstr() &&
"Expect a nondebug instruction.");
1288 if (RequireIntervals)
1297 if (RequireIntervals) {
1301 if (LastUseMask.
none())
1311 if (LastUseMask.
none())
1348 std::vector<unsigned> SavedPressure = CurrSetPressure;
1349 std::vector<unsigned> SavedMaxPressure =
P.MaxSetPressure;
1356 MaxPressureLimit, Delta);
1361 P.MaxSetPressure.swap(SavedMaxPressure);
1362 CurrSetPressure.swap(SavedPressure);
1368 std::vector<unsigned> &PressureResult,
1369 std::vector<unsigned> &MaxPressureResult) {
1371 PressureResult = CurrSetPressure;
1372 MaxPressureResult =
P.MaxSetPressure;
1377 P.MaxSetPressure.swap(MaxPressureResult);
1378 CurrSetPressure.swap(PressureResult);
1384 std::vector<unsigned> &PressureResult,
1385 std::vector<unsigned> &MaxPressureResult) {
1387 PressureResult = CurrSetPressure;
1388 MaxPressureResult =
P.MaxSetPressure;
1393 P.MaxSetPressure.swap(MaxPressureResult);
1394 CurrSetPressure.swap(PressureResult);
bool hasUntiedDef(Register VirtReg) const
unsigned getPSetOrMax() const
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
void reset()
Clear the result so it can be used for another round of pressure tracking.
MachineBasicBlock::const_iterator BottomPos
LaneBitmask getLiveThroughAt(Register RegUnit, SlotIndex Pos) const
void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS)
Use liveness information to find dead defs not marked with a dead flag and move them to the DeadDefs ...
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
This is an optimization pass for GlobalISel generic memory operations.
iterator erase(const_iterator CI)
void addLiveRegs(ArrayRef< RegisterMaskPair > Regs)
Force liveness of virtual registers or physical register units.
void init(const MachineFunction *mf, const RegisterClassInfo *rci, const LiveIntervals *lis, const MachineBasicBlock *mbb, MachineBasicBlock::const_iterator pos, bool TrackLaneMasks, bool TrackUntiedDefs)
Setup the RegPressureTracker.
Printable printVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI)
Create Printable object to print virtual registers and physical registers on a raw_ostream.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
SmallVector< RegisterMaskPair, 8 > Defs
List of virtual registers and register units defined by the instruction which are not dead.
SlotIndex getCurrSlot() const
Get the SlotIndex for the first nondebug instruction including or after the current position.
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
List of registers defined and used by a machine instruction.
List of PressureChanges in order of increasing, unique PSetID.
void getUpwardPressure(const MachineInstr *MI, std::vector< unsigned > &PressureResult, std::vector< unsigned > &MaxPressureResult)
Get the pressure of each PSet after traversing this instruction bottom-up.
LaneBitmask erase(RegisterMaskPair Pair)
Clears the Pair.LaneMask lanes of Pair.Reg (mark them as dead).
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Reg
All possible values of the reg field in the ModR/M byte.
const TargetRegisterInfo * getTargetRegisterInfo() const
bool isDeadDef() const
Return true if this instruction has a dead def.
This represents a simple continuous liveness interval for a value.
static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, bool TrackLaneMasks, Register RegUnit, SlotIndex Pos)
RegisterPressure computed within a region of instructions delimited by TopIdx and BottomIdx.
void bumpDeadDefs(ArrayRef< RegisterMaskPair > DeadDefs)
static LaneBitmask getRegLanes(ArrayRef< RegisterMaskPair > RegUnits, Register RegUnit)
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
LLVM_ATTRIBUTE_RETURNS_NONNULL void * safe_calloc(size_t Count, size_t Sz)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Track the current register pressure at some position in the instruction stream, and remember the high...
LaneBitmask insert(RegisterMaskPair Pair)
Mark the Pair.LaneMask lanes of Pair.Reg as live.
MachineBasicBlock::const_iterator TopPos
Record the boundary of the region being tracked.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
void openBottom(MachineBasicBlock::const_iterator PrevBottom)
If the current bottom is the previous instr (before advancing), open it.
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
void closeRegion()
Finalize the region boundaries and recored live ins and live outs.
Register RegUnit
Virtual register or register unit.
Result of a LiveRange query.
void init(unsigned N)
Initialize an array of N PressureDiffs.
unsigned const TargetRegisterInfo * TRI
bool empty() const
empty - Check if the array is empty.
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
Register Usage Information Collector
MachineInstrBundleIterator< const MachineInstr > const_iterator
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static void addRegLanes(SmallVectorImpl< RegisterMaskPair > &RegUnits, RegisterMaskPair Pair)
void addInstruction(unsigned Idx, const RegisterOperands &RegOpers, const MachineRegisterInfo &MRI)
Record pressure difference induced by the given operand list to node with index Idx.
Iterate over the pressure sets affected by the given physical or virtual register.
bool isBottomClosed() const
Does this pressure result have a valid bottom position and live outs.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
iterator_range< use_nodbg_iterator > use_nodbg_operands(Register Reg) const
bool liveAt(SlotIndex index) const
PressureChange CurrentMax
LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const
Return a bitmask representing the parts of a register that are covered by SubIdx.
LiveRange * getCachedRegUnit(unsigned Unit)
Return the live range for register unit Unit if it has already been computed, or nullptr if it hasn't...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void getUpwardPressureDelta(const MachineInstr *MI, PressureDiff &PDiff, RegPressureDelta &Delta, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit) const
This is the fast version of querying register pressure that does not directly depend on current liven...
static void removeRegLanes(SmallVectorImpl< RegisterMaskPair > &RegUnits, RegisterMaskPair Pair)
const_iterator end() const
void getDownwardPressure(const MachineInstr *MI, std::vector< unsigned > &PressureResult, std::vector< unsigned > &MaxPressureResult)
Get the pressure of each PSet after traversing this instruction top-down.
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
static constexpr LaneBitmask getNone()
SlotIndex TopIdx
Record the boundary of the region being tracked.
MachineOperand class - Representation of each machine instruction operand.
unsigned getWeight() const
SmallVector< RegisterMaskPair, 8 > LiveOutRegs
void initLiveThru(const RegPressureTracker &RPTracker)
Initialize the LiveThru pressure set based on the untied defs found in RPTracker.
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
SlotIndex getDeadSlot() const
Returns the dead def kill slot for the current instruction.
LiveInterval - This class represents the liveness of a register, or stack slot.
static void computeExcessPressureDelta(ArrayRef< unsigned > OldPressureVec, ArrayRef< unsigned > NewPressureVec, RegPressureDelta &Delta, const RegisterClassInfo *RCI, ArrayRef< unsigned > LiveThruPressureVec)
Find the max change in excess pressure across all sets.
SlotIndex - An opaque wrapper around machine indexes.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
static void computeMaxPressureDelta(ArrayRef< unsigned > OldMaxPressureVec, ArrayRef< unsigned > NewMaxPressureVec, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit, RegPressureDelta &Delta)
Find the max change in max pressure that either surpasses a critical PSet limit or exceeds the curren...
void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI, const MachineRegisterInfo &MRI, bool TrackLaneMasks, bool IgnoreDead)
Analyze the given instruction MI and fill in the Uses, Defs and DeadDefs list based on the MachineOpe...
static void decreaseSetPressure(std::vector< unsigned > &CurrSetPressure, const MachineRegisterInfo &MRI, Register Reg, LaneBitmask PrevMask, LaneBitmask NewMask)
Decrease pressure for each pressure set provided by TargetRegisterInfo.
static void setRegZero(SmallVectorImpl< RegisterMaskPair > &RegUnits, Register RegUnit)
bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void recedeSkipDebugValues()
Recede until we find an instruction which is not a DebugValue.
SlotIndex getBaseIndex() const
Returns the base index for associated with this index.
SmallVector< RegisterMaskPair, 8 > DeadDefs
List of virtual registers and register units defined by the instruction but dead.
void openTop(MachineBasicBlock::const_iterator PrevTop)
If the current top is the previous instruction (before receding), open it.
void closeBottom()
Set the boundary for the bottom of the region and summarize live outs.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Representation of each machine instruction.
void clear()
clear - Clears the set.
void appendTo(ContainerT &To) const
This class represents the liveness of a register, stack slot, etc.
static const LiveRange * getLiveRange(const LiveIntervals &LIS, unsigned Reg)
SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const
Return the last index in the given basic block.
void setRegisterDefReadUndef(Register Reg, bool IsUndef=true)
Mark all subregister defs of register Reg with the undef flag.
void closeTop()
Set the boundary for the top of the region and summarize live ins.
virtual unsigned getNumRegPressureSets() const =0
Get the number of dimensions of register pressure.
constexpr bool any() const
void advance()
Advance across the current instruction.
LiveQueryResult Query(SlotIndex Idx) const
Query Liveness at Idx.
IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It, then continue decrementing it while it points to a debug instruction.
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
bool isValid() const
isValid - Returns true until all the operands have been visited.
bool isAllocatable(MCRegister PhysReg) const
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been...
virtual const char * getRegPressureSetName(unsigned Idx) const =0
Get the name of this register unit pressure set.
PressureChange CriticalMax
std::vector< unsigned > MaxSetPressure
Map of max reg pressure indexed by pressure set ID, not class ID.
void getMaxDownwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit)
Consider the pressure increase caused by traversing this instruction top-down.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SmallVector< RegisterMaskPair, 8 > LiveInRegs
List of live in virtual registers or physical register units.
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
void init(const MachineRegisterInfo &MRI)
Register getReg() const
getReg - Returns the register number.
void decreaseRegPressure(Register RegUnit, LaneBitmask PreviousMask, LaneBitmask NewMask)
SlotIndex getRegSlot(bool EC=false) const
Returns the register use/def slot in the current instruction for a normal or early-clobber def.
LiveInterval & getInterval(Register Reg)
void getMaxUpwardPressureDelta(const MachineInstr *MI, PressureDiff *PDiff, RegPressureDelta &Delta, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit)
Consider the pressure increase caused by traversing this instruction bottom-up.
void dumpRegSetPressure(ArrayRef< unsigned > SetPressure, const TargetRegisterInfo *TRI)
bool isTopClosed() const
Does this pressure result have a valid top position and live ins.
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
constexpr bool none() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
A live range for subregisters.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
unsigned getSubReg() const
static void increaseSetPressure(std::vector< unsigned > &CurrSetPressure, const MachineRegisterInfo &MRI, unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask)
Increase pressure for each pressure set provided by TargetRegisterInfo.
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
unsigned getRegPressureSetLimit(unsigned Idx) const
Get the register unit limit for the given pressure set index.
RegisterPressure computed within a region of instructions delimited by TopPos and BottomPos.
Store the effects of a change in pressure on things that MI scheduler cares about.
LaneBitmask getMaxLaneMaskForVReg(Register Reg) const
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual registe...
LaneBitmask getLiveLanesAt(Register RegUnit, SlotIndex Pos) const
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register.
ConstMIBundleOperands - Iterate over all operands in a const bundle of machine instructions.
void openBottom(SlotIndex PrevBottom)
If the current bottom is not greater than the previous index, open it.
void bumpDownwardPressure(const MachineInstr *MI)
Record the downward impact of a single instruction on current register pressure.
static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, bool TrackLaneMasks, Register RegUnit, SlotIndex Pos, LaneBitmask SafeDefault, bool(*Property)(const LiveRange &LR, SlotIndex Pos))
Capture a change in pressure for a single pressure set.
void discoverLiveInOrOut(RegisterMaskPair Pair, SmallVectorImpl< RegisterMaskPair > &LiveInOrOut)
void adjustLaneLiveness(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, SlotIndex Pos, MachineInstr *AddFlagsMI=nullptr)
Use liveness information to find out which uses/defs are partially undefined/dead and adjust the Regi...
void openTop(SlotIndex NextTop)
If the current top is not less than or equal to the next index, open it.
void discoverLiveIn(RegisterMaskPair Pair)
Add Reg to the live in set and increase max pressure.
void bumpUpwardPressure(const MachineInstr *MI)
Record the upward impact of a single instruction on current register pressure.
static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask, SlotIndex PriorUseIdx, SlotIndex NextUseIdx, const MachineRegisterInfo &MRI, const LiveIntervals *LIS)
Helper to find a vreg use between two indices [PriorUseIdx, NextUseIdx).
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
SmallVector< RegisterMaskPair, 8 > Uses
List of virtual registers and register units read by the instruction.
const Segment * getSegmentContaining(SlotIndex Idx) const
Return the segment that contains the specified index, or null if there is none.
bool hasSubRanges() const
Returns true if subregister liveness information is available.
size_t size() const
size - Get the array size.
void addPressureChange(Register RegUnit, bool IsDec, const MachineRegisterInfo *MRI)
Add a change in pressure to the pressure diff of a given instruction.
bool isInternalRead() const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void dump(const TargetRegisterInfo *TRI) const
LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const
void discoverLiveOut(RegisterMaskPair Pair)
Add Reg to the live out set and increase max pressure.
void dump(const TargetRegisterInfo &TRI) const
PSetIterator getPressureSets(Register RegUnit) const
Get an iterator over the pressure sets affected by the given physical or virtual register.
void increaseRegPressure(Register RegUnit, LaneBitmask PreviousMask, LaneBitmask NewMask)
void recede(SmallVectorImpl< RegisterMaskPair > *LiveUses=nullptr)
Recede across the previous instruction.
LaneBitmask contains(Register Reg) const
static constexpr LaneBitmask getAll()
const_iterator begin() const
Optional< std::vector< StOtherPiece > > Other
A Use represents the edge between a Value definition and its users.
void reset()
Clear the result so it can be used for another round of pressure tracking.
iterator_range< subrange_iterator > subranges()